intel/nir: Plumb devinfo through lower_mem_access_bit_sizes
authorJason Ekstrand <jason.ekstrand@intel.com>
Thu, 28 Feb 2019 16:02:03 +0000 (10:02 -0600)
committerJason Ekstrand <jason@jlekstrand.net>
Mon, 11 Nov 2019 17:17:02 +0000 (17:17 +0000)
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
src/intel/compiler/brw_nir.c
src/intel/compiler/brw_nir.h
src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c

index ed6bcff7009cd82de674a9a69503ac836a1852f7..547b60ddc0f7eefb381f200a9ace29f8b7dbbb8f 100644 (file)
@@ -814,7 +814,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
 
    UNUSED bool progress; /* Written by OPT */
 
-   OPT(brw_nir_lower_mem_access_bit_sizes);
+   OPT(brw_nir_lower_mem_access_bit_sizes, devinfo);
 
    do {
       progress = false;
index 6f685478fd8f33d5d6baa7490c9a16c2bacce9c9..556648e6f72e25ed26f03d19c4e76bac6c555f0d 100644 (file)
@@ -128,7 +128,8 @@ void brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin,
 void brw_nir_rewrite_bindless_image_intrinsic(nir_intrinsic_instr *intrin,
                                               nir_ssa_def *handle);
 
-bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader);
+bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
+                                        const struct gen_device_info *devinfo);
 
 void brw_postprocess_nir(nir_shader *nir,
                          const struct brw_compiler *compiler,
index 80aae4916bf9462aeabab8347866298088ee4a78..564cb6dabe3c7cd78c352e3f888f068a3b0e564e 100644 (file)
@@ -74,7 +74,8 @@ dup_mem_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
 }
 
 static bool
-lower_mem_load_bit_size(nir_builder *b, nir_intrinsic_instr *intrin)
+lower_mem_load_bit_size(nir_builder *b, nir_intrinsic_instr *intrin,
+                        const struct gen_device_info *devinfo)
 {
    assert(intrin->dest.is_ssa);
    if (intrin->dest.ssa.bit_size == 32)
@@ -140,7 +141,8 @@ lower_mem_load_bit_size(nir_builder *b, nir_intrinsic_instr *intrin)
 }
 
 static bool
-lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin)
+lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin,
+                         const struct gen_device_info *devinfo)
 {
    assert(intrin->src[0].is_ssa);
    nir_ssa_def *value = intrin->src[0].ssa;
@@ -223,7 +225,8 @@ lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin)
 }
 
 static bool
-lower_mem_access_bit_sizes_impl(nir_function_impl *impl)
+lower_mem_access_bit_sizes_impl(nir_function_impl *impl,
+                                const struct gen_device_info *devinfo)
 {
    bool progress = false;
 
@@ -242,14 +245,14 @@ lower_mem_access_bit_sizes_impl(nir_function_impl *impl)
          case nir_intrinsic_load_global:
          case nir_intrinsic_load_ssbo:
          case nir_intrinsic_load_shared:
-            if (lower_mem_load_bit_size(&b, intrin))
+            if (lower_mem_load_bit_size(&b, intrin, devinfo))
                progress = true;
             break;
 
          case nir_intrinsic_store_global:
          case nir_intrinsic_store_ssbo:
          case nir_intrinsic_store_shared:
-            if (lower_mem_store_bit_size(&b, intrin))
+            if (lower_mem_store_bit_size(&b, intrin, devinfo))
                progress = true;
             break;
 
@@ -284,12 +287,13 @@ lower_mem_access_bit_sizes_impl(nir_function_impl *impl)
  * handle in hardware and with a trivial write-mask.
  */
 bool
-brw_nir_lower_mem_access_bit_sizes(nir_shader *shader)
+brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
+                                   const struct gen_device_info *devinfo)
 {
    bool progress = false;
 
    nir_foreach_function(func, shader) {
-      if (func->impl && lower_mem_access_bit_sizes_impl(func->impl))
+      if (func->impl && lower_mem_access_bit_sizes_impl(func->impl, devinfo))
          progress = true;
    }