[libre-riscv-dev] [Bug 304] New: Define minimum viable interface set for 180nm ASIC
authorbugzilla-daemon <bugzilla-daemon@libre-soc.org>
Fri, 8 May 2020 11:15:06 +0000 (11:15 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Fri, 8 May 2020 11:15:08 +0000 (12:15 +0100)
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+Date: Fri, 08 May 2020 11:15:06 +0000
+X-Bugzilla-Reason: CC
+X-Bugzilla-Type: new
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
+X-Bugzilla-Version: unspecified
+X-Bugzilla-Keywords: 
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
+X-Bugzilla-Status: CONFIRMED
+X-Bugzilla-Resolution: 
+X-Bugzilla-Priority: ---
+X-Bugzilla-Assigned-To: lkcl@lkcl.net
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+Subject: [libre-riscv-dev] [Bug 304] New: Define minimum viable interface
+ set for 180nm ASIC
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