[AArch64] Add -fno-vect-cost-model to sve2/whilerw_1.c

Bumping the cost of vec_to_scalar made the .s loop in
gcc.target/aarch64/sve2/whilerw_1.c use a runtime profitability check,
like the .d version already did.  Since the cost model isn't really
being tested here, the most robust fix seemed to be to disable it,
which I should really have done from the outset.

2019-11-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
	* gcc.target/aarch64/sve2/whilerw_1.c: Add -fno-vect-cost-model.
	Require x0 in the .d test too.

From-SVN: r278549

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7ff0ce70c20a77d9c353fcb8890edb3e67233fe6..0da099547cd0c7ab993c76328c70a564d4fd4166 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-11-21  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * gcc.target/aarch64/sve2/whilerw_1.c: Add -fno-vect-cost-model.
+       Require x0 in the .d test too.
+
 2019-11-21  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/91355

diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c b/gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c
index 63a6d2f4d627114a261b9e401489c3702d8c3a91..213ba3e6e0a1fd7a4abbf20b97f46d56bd06c5f9 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve2/whilerw_1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize" } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model" } */
 /* { dg-require-effective-target lp64 } */
 
 #include <stdint.h>
@@ -26,5 +26,5 @@ TEST_LOOP (int64_t);
 /* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.b, x0, x1\n} 1 } } */
 /* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.h, x0, x1\n} 1 } } */
 /* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.s, x0, x1\n} 1 } } */
-/* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.d, x[0-9]+, x1\n} 1 } } */
+/* { dg-final { scan-assembler-times {\twhilerw\tp[0-9]+\.d, x0, x1\n} 1 } } */
 /* { dg-final { scan-assembler-not {\twhilewr\t} } } */