This isolates the architecture specific ISA types a little bit, and
means that ThreadContexts don't *have* to find an architecture specific
class to return, even if they don't naturally have one lying around.
Change-Id: Ide10b5d945ec6076947b2ccdea87c86e96e40857
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25008
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
System *getSystemPtr() override { return _cpu->system; }
- ArmISA::ISA *
+ BaseISA *
getIsaPtr() override
{
panic("%s not implemented.", __FUNCTION__);
return checkerCPU;
}
- TheISA::ISA *getIsaPtr() override { return actualTC->getIsaPtr(); }
+ BaseISA *getIsaPtr() override { return actualTC->getIsaPtr(); }
TheISA::Decoder *
getDecoderPtr() override
CheckerCPU *getCheckerCpuPtr() override { return NULL; }
- TheISA::ISA *
+ BaseISA *
getIsaPtr() override
{
return cpu->isa[thread->threadId()];
CheckerCPU *getCheckerCpuPtr() override { return NULL; }
- TheISA::ISA *getIsaPtr() override { return isa; }
+ BaseISA *getIsaPtr() override { return isa; }
TheISA::Decoder *getDecoderPtr() override { return &decoder; }
#include <iostream>
#include <string>
+#include "arch/generic/isa.hh"
#include "arch/registers.hh"
#include "arch/types.hh"
#include "base/types.hh"
virtual CheckerCPU *getCheckerCpuPtr() = 0;
- virtual TheISA::ISA *getIsaPtr() = 0;
+ virtual BaseISA *getIsaPtr() = 0;
virtual TheISA::Decoder *getDecoderPtr() = 0;