* sh.h (OVERRIDE_OPTIONS): Allow first scheduling pass for SH5.

From-SVN: r61118

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f25bab9c1602992bb5b8dd52d2d505aa19b7825c..0d37abbee54fca0caaaffbd091c8fa3920100a14 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+Thu Jan  9 17:23:19 2003  J"orn Rennecke <joern.rennecke@superh.com>
+
+       * sh.h (OVERRIDE_OPTIONS): Allow first scheduling pass for SH5.
+
 2003-01-09  Kazu Hirata  <kazu@cs.umass.edu>
 
        * config/h8300/h8300.md (*extzv_1_r_h8300): Correct the insn

diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index a7a77c0bdff9d4be3bbb6277ba065ca425088266..015e5baeb55f6dc412a845d6ff4deb164d84f651 100644 (file)
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -470,10 +470,13 @@ do {                                                                      \
   if (flag_pic && ! TARGET_PREFERGOT)                                  \
     flag_no_function_cse = 1;                                          \
                                                                        \
-  /* Never run scheduling before reload, since that can                        \
-     break global alloc, and generates slower code anyway due          \
-     to the pressure on R0.  */                                                \
-  flag_schedule_insns = 0;                                             \
+  if (SMALL_REGISTER_CLASSES)                                          \
+    {                                                                  \
+      /* Never run scheduling before reload, since that can            \
+        break global alloc, and generates slower code anyway due       \
+        to the pressure on R0.  */                                     \
+      flag_schedule_insns = 0;                                         \
+    }                                                                  \
                                                                        \
   /* Allocation boundary (in *bytes*) for the code of a function.      \
      SH1: 32 bit alignment is faster, because instructions are always  \