test_cell: don't generate directional shifts with \B_SIGNED=1

This was made an explicit error in e97e33d, "kernel: require \B_SIGNED=0
on $shl, $sshl, $shr, $sshr.".

diff --git a/passes/tests/test_cell.cc b/passes/tests/test_cell.cc
index 942468e295aa68163b51ada323e2501f578ff5af..125efbaa3607a4ebc7c7e0d2185ea8f94c9ec2f9 100644 (file)
--- a/passes/tests/test_cell.cc
+++ b/passes/tests/test_cell.cc
@@ -264,6 +264,10 @@ static void create_gold_module(RTLIL::Design *design, RTLIL::IdString cell_type,
                cell->setPort(ID::Y, wire);
        }
 
+       if (cell_type.in(ID($shl), ID($shr), ID($sshl), ID($sshr))) {
+               cell->parameters[ID::B_SIGNED] = false;
+       }
+
        if (muxdiv && cell_type.in(ID($div), ID($mod), ID($divfloor), ID($modfloor))) {
                auto b_not_zero = module->ReduceBool(NEW_ID, cell->getPort(ID::B));
                auto div_out = module->addWire(NEW_ID, GetSize(cell->getPort(ID::Y)));