Added english language description, spaces and brackets for lhaux instruction

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 7dd4bd0cdf7d98277f7fa0a425e46ba70ed69de7..7055c23f600dac74488a864fd3d0d2b590cce1c4 100644 (file)
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -271,6 +271,17 @@ Pseudo-code:
     RT <- EXTS(MEM(EA, 2))
     RA <- EA
 
+Description:
+
+    Let the effective address (EA) be the sum (RA)+ (RB).
+    The halfword in storage addressed by EA is loaded into
+    RT48:63. RT 0:47 are filled with a copy of bit 0 of the
+    loaded halfword.
+
+    EA is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None