ac/surface: move non-displayable DCC to the end of the buffer
authorMarek Olšák <marek.olsak@amd.com>
Wed, 22 Apr 2020 22:51:42 +0000 (18:51 -0400)
committerMarge Bot <eric+marge@anholt.net>
Wed, 29 Apr 2020 14:53:25 +0000 (14:53 +0000)
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4697>

src/amd/common/ac_surface.c

index 3b0955dc45634e9af585feb6c92dd9b1e8e7f680..8773fd51b473343aba610a87bacca52229b796c1 100644 (file)
@@ -1758,9 +1758,9 @@ int ac_compute_surface(ADDR_HANDLE addrlib, const struct radeon_info *info,
        if (surf->dcc_size &&
            /* dcc_size is computed on GFX9+ only if it's displayable. */
            (info->chip_class >= GFX9 || !get_display_flag(config, surf))) {
-               surf->dcc_offset = align64(surf->total_size, surf->dcc_alignment);
-               surf->total_size = surf->dcc_offset + surf->dcc_size;
-
+               /* It's better when displayable DCC is immediately after
+                * the image due to hw-specific reasons.
+                */
                if (info->chip_class >= GFX9 &&
                    surf->u.gfx9.dcc_retile_num_elements) {
                        /* Add space for the displayable DCC buffer. */
@@ -1781,6 +1781,9 @@ int ac_compute_surface(ADDR_HANDLE addrlib, const struct radeon_info *info,
                                                   surf->u.gfx9.dcc_retile_num_elements * 4;
                        }
                }
+
+               surf->dcc_offset = align64(surf->total_size, surf->dcc_alignment);
+               surf->total_size = surf->dcc_offset + surf->dcc_size;
        }
 
        return 0;