These ilp32 relocations were missing for some reason.
bfd/ChangeLog:
* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.
include/ChangeLog:
* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
(R_AARCH64_P32_MOVW_PREL_G1): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.
* testsuite/ld-aarch64/emit-relocs-22.d: New test.
* testsuite/ld-aarch64/emit-relocs-22.s: New test.
* testsuite/ld-aarch64/emit-relocs-23.d: New test.
* testsuite/ld-aarch64/emit-relocs-23.s: New test.
+2019-06-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.
+
2019-06-14 Alan Modra <amodra@gmail.com>
* Makefile.in: Regenerate.
PC relative address inline. */
/* MOV[NZ]: ((S+A-P) >> 0) & 0xffff */
- HOWTO64 (AARCH64_R (MOVW_PREL_G0), /* type */
+ HOWTO (AARCH64_R (MOVW_PREL_G0), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
17, /* bitsize */
TRUE), /* pcrel_offset */
/* MOVK: ((S+A-P) >> 0) & 0xffff [no overflow check] */
- HOWTO64 (AARCH64_R (MOVW_PREL_G0_NC), /* type */
+ HOWTO (AARCH64_R (MOVW_PREL_G0_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
TRUE), /* pcrel_offset */
/* MOV[NZ]: ((S+A-P) >> 16) & 0xffff */
- HOWTO64 (AARCH64_R (MOVW_PREL_G1), /* type */
+ HOWTO (AARCH64_R (MOVW_PREL_G1), /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
17, /* bitsize */
+2019-06-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
+ (R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
+ (R_AARCH64_P32_MOVW_PREL_G1): Define.
+
2019-06-03 Nick Alcock <nick.alcock@oracle.com>
* ctf.h (ctf_enum.cte_value): Fix type to int32_t.
/* BL: ((S+A-P) >> 2) & 0x3ffffff. */
RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
+/* Group relocations to create a 16 or 32 bit PC-relative offset inline. */
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22)
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23)
+RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24)
RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
+2019-06-14 Szabolcs Nagy <szabolcs.nagy@arm.com>
+
+ * testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.
+ * testsuite/ld-aarch64/emit-relocs-22.d: New test.
+ * testsuite/ld-aarch64/emit-relocs-22.s: New test.
+ * testsuite/ld-aarch64/emit-relocs-23.d: New test.
+ * testsuite/ld-aarch64/emit-relocs-23.s: New test.
+
2019-06-14 Alan Modra <amodra@gmail.com>
* Makefile.in: Regenerate.
# Relocation Tests
run_dump_test_lp64 "weak-undefined"
+run_dump_test "emit-relocs-22"
+run_dump_test "emit-relocs-23"
run_dump_test "emit-relocs-28"
run_dump_test "emit-relocs-86"
run_dump_test "emit-relocs-86-overflow"
--- /dev/null
+#source: emit-relocs-22.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld --defsym foo1=0x12345 --defsym foo2=0x1234 -e0 --emit-relocs
+#objdump: -dr
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+.* <\.text>:
+ +10000: 528468ad mov w13, #0x2345 // #9029
+ +10000: R_AARCH64_P32_MOVW_PREL_G0 foo1
+ +10004: 129db9f1 mov w17, #0xffff1230 // #-60880
+ +10004: R_AARCH64_P32_MOVW_PREL_G0 foo2
--- /dev/null
+.text
+ movz w13, :prel_g0:foo1
+ movz w17, :prel_g0:foo2
--- /dev/null
+#source: emit-relocs-23.s
+#as: -mabi=ilp32
+#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld --defsym foo=0x12345678 -e0 --emit-relocs
+#objdump: -dr
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+.* <\.text>:
+ +10000: 728acf0d movk w13, #0x5678
+ +10000: R_AARCH64_P32_MOVW_PREL_G0_NC foo
+ +10004: 52a24671 mov w17, #0x12330000 // #305332224
+ +10004: R_AARCH64_P32_MOVW_PREL_G1 foo
--- /dev/null
+.text
+ movk w13, :prel_g0_nc:foo
+ movz w17, :prel_g1:foo