* <https://bugs.libre-soc.org/show_bug.cgi?id=236>
* [OpenCAPI spec](http://opencapi.org/wp-content/uploads/2017/02/OpenCAPI-TL.WGsec_.V3p1.2017Jan27.pdf) p47-49 for AMO section
+* [RISC-V A](https://github.com/riscv/riscv-isa-manual/blob/master/src/a.tex)
-## Motivation
+# Motivation
Power ISA currently has some issues with its atomic operations support,
which are exacerbated by 3D Data structure processing in 3D
Shader Binaries needing
of the order of 10^5 or greater atomic locks per second per SMP Core.
-### Power ISA's current atomic operations are inefficient
+## Power ISA's current atomic operations are inefficient
Implementations have a hard time recognizing existing atomic operations
via macro-op fusion because they would often have to detect and fuse a
Having single atomic operations is useful for implementations that want to send atomic operations to a shared cache since they can be more efficient to execute there, rather than having to move a whole cache block. Relying exclusively on
TODO
-### Power ISA doesn't align well with C++11 atomics
+## Power ISA doesn't align well with C++11 atomics
[P0668R5: Revising the C++ memory model](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0668r5.html):
> http://plv.mpi-sws.org/scfix/paper.pdf (which this discussion relies
> on heavily).
-### Power ISA's Atomic-Memory-Operations have issues
+## Power ISA's Atomic-Memory-Operations have issues
PowerISA v3.1 Book II section 4.5: Atomic Memory Operations