* gas/ppc/power4.s: Fix invalid lq offsets.

	* gas/ppc/power4.d: Update.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index f92b1f5f768462f0e40e42be4654f039f6ed03ee..715628bd7d25c85546797e196748d65cf1b71c46 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-10-26  Alan Modra  <amodra@gmail.com>
+
+       * gas/ppc/power4.s: Fix invalid lq offsets.
+       * gas/ppc/power4.d: Update.
+
 2012-10-24  Roland McGrath  <mcgrathr@google.com>
 
        * gas/i386/rex.s: Add test of REX prefix before fsave (i.e. fwait).

diff --git a/gas/testsuite/gas/ppc/power4.d b/gas/testsuite/gas/ppc/power4.d
index f5978c8ff35a9ee1aadeffcf1653594f7d566dab..eca4de7c4f3691758ecc84178e79fc8b70356137 100644 (file)
--- a/gas/testsuite/gas/ppc/power4.d
+++ b/gas/testsuite/gas/ppc/power4.d
@@ -10,23 +10,23 @@ start address 0x0+
 
 Sections:
 Idx Name +Size +VMA +LMA +File off +Algn
- +0 \.text +0+dc +0+ +0+ +.*
+ +0 \.text +0+c8 +0+ +0+ +.*
  +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
- +1 \.data +0+10 +0+ +0+ +.*
+ +1 \.data +0+20 +0+ +0+ +.*
  +CONTENTS, ALLOC, LOAD, DATA
  +2 \.bss +0+ +0+ +0+ +.*
  +ALLOC
- +3 \.toc +0+30 +0+ +0+ +.*
+ +3 \.toc +0+20 +0+ +0+ +.*
  +CONTENTS, ALLOC, LOAD, RELOC, DATA
 SYMBOL TABLE:
 0+ l +d +\.text        0+ (|\.text)
 0+ l +d +\.data        0+ (|\.data)
 0+ l +d +\.bss 0+ (|\.bss)
 0+ l +\.data   0+ dsym0
-0+8 l +\.data  0+ dsym1
+0+10 l +\.data 0+ dsym1
 0+ l +d +\.toc 0+ (|\.toc)
-0+8 l +\.data  0+ usym0
-0+10 l +\.data 0+ usym1
+0+10 l +\.data 0+ usym0
+0+20 l +\.data 0+ usym1
 0+ +\*UND\*    0+ esym0
 0+ +\*UND\*    0+ esym1
 
@@ -34,77 +34,67 @@ SYMBOL TABLE:
 Disassembly of section \.text:
 
 0+ <\.text>:
- +0:   e0 83 00 00     lq      r4,0\(r3\)
-                       2: R_PPC64_ADDR16_LO_DS \.data
- +4:   e0 83 00 00     lq      r4,0\(r3\)
-                       6: R_PPC64_ADDR16_LO_DS \.data\+0x8
- +8:   e0 83 00 00     lq      r4,0\(r3\)
-                       a: R_PPC64_ADDR16_LO_DS \.data\+0x8
- +c:   e0 83 00 10     lq      r4,16\(r3\)
-                       e: R_PPC64_ADDR16_LO_DS \.data\+0x10
- +10:  e0 83 00 00     lq      r4,0\(r3\)
-                       12: R_PPC64_ADDR16_LO_DS        esym0
- +14:  e0 83 00 00     lq      r4,0\(r3\)
-                       16: R_PPC64_ADDR16_LO_DS        esym1
- +18:  e0 82 00 00     lq      r4,0\(r2\)
-                       1a: R_PPC64_TOC16_DS    \.toc
- +1c:  e0 82 00 00     lq      r4,0\(r2\)
-                       1e: R_PPC64_TOC16_DS    \.toc\+0x8
- +20:  e0 82 00 10     lq      r4,16\(r2\)
-                       22: R_PPC64_TOC16_DS    \.toc\+0x10
- +24:  e0 82 00 10     lq      r4,16\(r2\)
-                       26: R_PPC64_TOC16_DS    \.toc\+0x18
- +28:  e0 82 00 20     lq      r4,32\(r2\)
-                       2a: R_PPC64_TOC16_DS    \.toc\+0x20
- +2c:  e0 82 00 20     lq      r4,32\(r2\)
-                       2e: R_PPC64_TOC16_DS    \.toc\+0x28
- +30:  e0 c2 00 20     lq      r6,32\(r2\)
-                       32: R_PPC64_TOC16_LO_DS \.toc\+0x28
- +34:  e0 80 00 00     lq      r4,0\(0\)
-                       36: R_PPC64_ADDR16_LO_DS        \.text
- +38:  e0 c3 00 00     lq      r6,0\(r3\)
-                       3a: R_PPC64_GOT16_DS    dsym0
- +3c:  e0 c3 00 00     lq      r6,0\(r3\)
-                       3e: R_PPC64_GOT16_LO_DS dsym0
- +40:  e0 c3 00 00     lq      r6,0\(r3\)
-                       42: R_PPC64_PLT16_LO_DS \.data
- +44:  e0 c3 00 00     lq      r6,0\(r3\)
-                       46: R_PPC64_SECTOFF_DS  \.data\+0x8
- +48:  e0 c3 00 00     lq      r6,0\(r3\)
-                       4a: R_PPC64_SECTOFF_LO_DS       \.data\+0x8
- +4c:  e0 c4 00 10     lq      r6,16\(r4\)
- +50:  f8 c7 00 02     stq     r6,0\(r7\)
- +54:  f8 c7 00 12     stq     r6,16\(r7\)
- +58:  f8 c7 ff f2     stq     r6,-16\(r7\)
- +5c:  f8 c7 80 02     stq     r6,-32768\(r7\)
- +60:  f8 c7 7f f2     stq     r6,32752\(r7\)
- +64:  00 00 02 00     attn
- +68:  7c 6f f1 20     mtcr    r3
- +6c:  7c 6f f1 20     mtcr    r3
- +70:  7c 68 11 20     mtcrf   129,r3
- +74:  7c 70 11 20     mtocrf  1,r3
- +78:  7c 70 21 20     mtocrf  2,r3
- +7c:  7c 70 41 20     mtocrf  4,r3
- +80:  7c 70 81 20     mtocrf  8,r3
- +84:  7c 71 01 20     mtocrf  16,r3
- +88:  7c 72 01 20     mtocrf  32,r3
- +8c:  7c 74 01 20     mtocrf  64,r3
- +90:  7c 78 01 20     mtocrf  128,r3
- +94:  7c 60 00 26     mfcr    r3
- +98:  7c 70 10 26     mfocrf  r3,1
- +9c:  7c 70 20 26     mfocrf  r3,2
- +a0:  7c 70 40 26     mfocrf  r3,4
- +a4:  7c 70 80 26     mfocrf  r3,8
- +a8:  7c 71 00 26     mfocrf  r3,16
- +ac:  7c 72 00 26     mfocrf  r3,32
- +b0:  7c 74 00 26     mfocrf  r3,64
- +b4:  7c 78 00 26     mfocrf  r3,128
- +b8:  7c 01 17 ec     dcbz    r1,r2
- +bc:  7c 23 27 ec     dcbzl   r3,r4
- +c0:  7c 05 37 ec     dcbz    r5,r6
- +c4:  e0 40 00 10     lq      r2,16\(0\)
- +c8:  e0 05 00 10     lq      r0,16\(r5\)
- +cc:  e0 45 00 10     lq      r2,16\(r5\)
- +d0:  f8 40 00 12     stq     r2,16\(0\)
- +d4:  f8 05 00 12     stq     r0,16\(r5\)
- +d8:  f8 45 00 12     stq     r2,16\(r5\)
+.*:    e0 83 00 00     lq      r4,0\(r3\)
+.*: R_PPC64_ADDR16_LO_DS       \.data
+.*:    e0 83 00 10     lq      r4,16\(r3\)
+.*: R_PPC64_ADDR16_LO_DS       \.data\+0x10
+.*:    e0 83 00 10     lq      r4,16\(r3\)
+.*: R_PPC64_ADDR16_LO_DS       \.data\+0x10
+.*:    e0 83 00 20     lq      r4,32\(r3\)
+.*: R_PPC64_ADDR16_LO_DS       \.data\+0x20
+.*:    e0 83 00 00     lq      r4,0\(r3\)
+.*: R_PPC64_ADDR16_LO_DS       esym0
+.*:    e0 83 00 00     lq      r4,0\(r3\)
+.*: R_PPC64_ADDR16_LO_DS       esym1
+.*:    e0 82 00 00     lq      r4,0\(r2\)
+.*: R_PPC64_TOC16_DS   \.toc
+.*:    e0 82 00 10     lq      r4,16\(r2\)
+.*: R_PPC64_TOC16_DS   \.toc\+0x10
+.*:    e0 80 00 00     lq      r4,0\(0\)
+.*: R_PPC64_ADDR16_LO_DS       \.text
+.*:    e0 c3 00 00     lq      r6,0\(r3\)
+.*: R_PPC64_GOT16_DS   dsym0
+.*:    e0 c3 00 00     lq      r6,0\(r3\)
+.*: R_PPC64_GOT16_LO_DS        dsym0
+.*:    e0 c3 00 00     lq      r6,0\(r3\)
+.*: R_PPC64_PLT16_LO_DS        \.data
+.*:    e0 c3 00 10     lq      r6,16\(r3\)
+.*: R_PPC64_SECTOFF_DS \.data\+0x10
+.*:    e0 c3 00 10     lq      r6,16\(r3\)
+.*: R_PPC64_SECTOFF_LO_DS      \.data\+0x10
+.*:    e0 c4 00 20     lq      r6,32\(r4\)
+.*:    f8 c7 00 02     stq     r6,0\(r7\)
+.*:    f8 c7 00 12     stq     r6,16\(r7\)
+.*:    f8 c7 ff f2     stq     r6,-16\(r7\)
+.*:    f8 c7 80 02     stq     r6,-32768\(r7\)
+.*:    f8 c7 7f f2     stq     r6,32752\(r7\)
+.*:    00 00 02 00     attn
+.*:    7c 6f f1 20     mtcr    r3
+.*:    7c 6f f1 20     mtcr    r3
+.*:    7c 68 11 20     mtcrf   129,r3
+.*:    7c 70 11 20     mtocrf  1,r3
+.*:    7c 70 21 20     mtocrf  2,r3
+.*:    7c 70 41 20     mtocrf  4,r3
+.*:    7c 70 81 20     mtocrf  8,r3
+.*:    7c 71 01 20     mtocrf  16,r3
+.*:    7c 72 01 20     mtocrf  32,r3
+.*:    7c 74 01 20     mtocrf  64,r3
+.*:    7c 78 01 20     mtocrf  128,r3
+.*:    7c 60 00 26     mfcr    r3
+.*:    7c 70 10 26     mfocrf  r3,1
+.*:    7c 70 20 26     mfocrf  r3,2
+.*:    7c 70 40 26     mfocrf  r3,4
+.*:    7c 70 80 26     mfocrf  r3,8
+.*:    7c 71 00 26     mfocrf  r3,16
+.*:    7c 72 00 26     mfocrf  r3,32
+.*:    7c 74 00 26     mfocrf  r3,64
+.*:    7c 78 00 26     mfocrf  r3,128
+.*:    7c 01 17 ec     dcbz    r1,r2
+.*:    7c 23 27 ec     dcbzl   r3,r4
+.*:    7c 05 37 ec     dcbz    r5,r6
+.*:    e0 40 00 10     lq      r2,16\(0\)
+.*:    e0 05 00 10     lq      r0,16\(r5\)
+.*:    e0 45 00 10     lq      r2,16\(r5\)
+.*:    f8 40 00 12     stq     r2,16\(0\)
+.*:    f8 05 00 12     stq     r0,16\(r5\)
+.*:    f8 45 00 12     stq     r2,16\(r5\)

diff --git a/gas/testsuite/gas/ppc/power4.s b/gas/testsuite/gas/ppc/power4.s
index 7e9042d71635d960f3d3504b397e9f31ca0534b7..2e44c7ca4f7ae55235498c9e72f20eadf7dee1f3 100644 (file)
--- a/gas/testsuite/gas/ppc/power4.s
+++ b/gas/testsuite/gas/ppc/power4.s
@@ -1,22 +1,20 @@
        .section        ".data"
+       .p2align        4
 dsym0: .llong  0xdeadbeef
+       .llong  0xc0ffee
 dsym1:
 
        .section        ".toc"
+       .p2align        4
 .L_tsym0:
        .tc     ignored0[TC],dsym0
-.L_tsym1:
        .tc     ignored1[TC],dsym1
-.L_tsym2:
+.L_tsym1:
        .tc     ignored2[TC],usym0
-.L_tsym3:
        .tc     ignored3[TC],usym1
-.L_tsym4:
-       .tc     ignored4[TC],esym0
-.L_tsym5:
-       .tc     ignored5[TC],esym1
 
        .section        ".text"
+       .p2align        4
        lq      4,dsym0@l(3)
        lq      4,dsym1@l(3)
        lq      4,usym0@l(3)
@@ -25,11 +23,6 @@ dsym1:
        lq      4,esym1@l(3)
        lq      4,.L_tsym0@toc(2)
        lq      4,.L_tsym1@toc(2)
-       lq      4,.L_tsym2@toc(2)
-       lq      4,.L_tsym3@toc(2)
-       lq      4,.L_tsym4@toc(2)
-       lq      4,.L_tsym5@toc(2)
-       lq      6,.L_tsym5@toc@l(2)
        lq      4,.text@l(0)    
        lq      6,dsym0@got(3)
        lq      6,dsym0@got@l(3)
@@ -81,5 +74,6 @@ dsym1:
 
        .section        ".data"
 usym0: .llong  0xcafebabe
+       .llong  0xc0ffee
 usym1: