(no commit message)

diff --git a/openpower/isa/svfixedarith.mdwn b/openpower/isa/svfixedarith.mdwn
index 32c8f09c3ebfe160a1642a554f1a6fc144471a86..bb0c798b23de99e7149ce04a33e63a8971e41d0d 100644 (file)
--- a/openpower/isa/svfixedarith.mdwn
+++ b/openpower/isa/svfixedarith.mdwn
@@ -15,21 +15,3 @@ Pseudo-code:
 Special Registers Altered:
 
     None
-
-# [DRAFT] Twin Multiply and Subtract Doubleword
-
-* msubed RT,RA,RB,RC
-
-Pseudocode:
-
-    <!-- SVP64: RA,RB,RC,RT have EXTRA2, RS as below   -->
-    <!-- bit 8 of EXTRA is clear: RS.[s|v]=RT.[s|v]+VL -->
-    <!-- bit 8 of EXTRA is set  : RS.[s|v]=RC.[s|v]    -->
-    prod[0:127] <- (RA) * (RB)
-    sub[0:127] <- EXTZ(RC) - prod
-    RT <- sub[64:127]
-    RS <- sub[0:63]
-
-Special Registers Altered:
-
-    None