enum {
NOUVEAU_BO_CONTEXT_FRAMEBUFFER = 0,
- NOUVEAU_BO_CONTEXT_LMA_DEPTH,
+ NOUVEAU_BO_CONTEXT_HIERZ,
NOUVEAU_BO_CONTEXT_SURFACE,
NOUVEAU_BO_CONTEXT_TEXTURE0,
NOUVEAU_BO_CONTEXT_TEXTURE1,
#define NV25TCL_DMA_IN_MEMORY5 0x000001a0
#define NV25TCL_DMA_IN_MEMORY8 0x000001ac
#define NV25TCL_DMA_IN_MEMORY9 0x000001b0
+#define NV25TCL_HIERZ_PITCH 0x0000022c
+#define NV25TCL_HIERZ_OFFSET 0x00000230
#endif /* NOUVEAU_REG_H */
}
static void
-setup_lma_buffer(struct gl_context *ctx)
+setup_hierz_buffer(struct gl_context *ctx)
{
struct nouveau_channel *chan = context_chan(ctx);
struct nouveau_grobj *celsius = context_eng3d(ctx);
- struct nouveau_bo_context *bctx = context_bctx(ctx, LMA_DEPTH);
+ struct nouveau_bo_context *bctx = context_bctx(ctx, HIERZ);
struct gl_framebuffer *fb = ctx->DrawBuffer;
struct nouveau_framebuffer *nfb = to_nouveau_framebuffer(fb);
unsigned pitch = align(fb->Width, 128),
s->bo, 0, bo_flags);
if (context_chipset(ctx) >= 0x17) {
- setup_lma_buffer(ctx);
+ setup_hierz_buffer(ctx);
context_dirty(ctx, ZCLEAR);
}
}
OUT_RING (chan, 2);
if (context_chipset(ctx) >= 0x25) {
- BEGIN_RING(chan, kelvin, 0x022c, 2);
- OUT_RING (chan, 0x280);
- OUT_RING (chan, 0x07d28000);
-
BEGIN_RING(chan, kelvin, 0x1da4, 1);
OUT_RING (chan, 0);
}
}
}
+static void
+setup_hierz_buffer(struct gl_context *ctx)
+{
+ struct nouveau_channel *chan = context_chan(ctx);
+ struct nouveau_grobj *kelvin = context_eng3d(ctx);
+ struct nouveau_bo_context *bctx = context_bctx(ctx, HIERZ);
+ struct gl_framebuffer *fb = ctx->DrawBuffer;
+ struct nouveau_framebuffer *nfb = to_nouveau_framebuffer(fb);
+ unsigned pitch = align(fb->Width, 128),
+ height = align(fb->Height, 2),
+ size = pitch * height;
+
+ if (!nfb->hierz.bo || nfb->hierz.bo->size != size) {
+ nouveau_bo_ref(NULL, &nfb->hierz.bo);
+ nouveau_bo_new(context_dev(ctx), NOUVEAU_BO_VRAM, 0, size,
+ &nfb->hierz.bo);
+ }
+
+ BEGIN_RING(chan, kelvin, NV25TCL_HIERZ_PITCH, 1);
+ OUT_RING(chan, pitch);
+
+ nouveau_bo_markl(bctx, kelvin, NV25TCL_HIERZ_OFFSET, nfb->hierz.bo,
+ 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
+}
+
void
nv20_emit_framebuffer(struct gl_context *ctx, int emit)
{
nouveau_bo_markl(bctx, kelvin, NV20TCL_ZETA_OFFSET,
s->bo, 0, bo_flags);
+
+ if (context_chipset(ctx) >= 0x25)
+ setup_hierz_buffer(ctx);
} else {
rt_format |= get_rt_format(MESA_FORMAT_Z24_S8);
zeta_pitch = rt_pitch;