Add actual wandwor test that is part of "make test"

Signed-off-by: Clifford Wolf <clifford@clifford.at>

diff --git a/tests/simple/wandwor.v b/tests/simple/wandwor.v
new file mode 100644 (file)
index 0000000..34404aa
--- /dev/null
+++ b/tests/simple/wandwor.v
@@ -0,0 +1,36 @@
+module wandwor_test0 (A, B, C, D, X, Y, Z);
+       input A, B, C, D;
+       output wor X;
+       output wand Y;
+       output Z;
+
+       assign X = A, X = B, Y = C, Y = D;
+       foo foo_0 (C, D, X);
+       foo foo_1 (A, B, Y);
+       foo foo_2 (X, Y, Z);
+endmodule
+
+module wandwor_test1 (A, B, C, D, X, Y, Z);
+       input [3:0] A, B, C, D;
+       output wor [3:0] X;
+       output wand [3:0] Y;
+       output Z;
+
+       bar bar_inst (
+               .I0({A, B}),
+               .I1({B, A}),
+               .O({X, Y})
+       );
+
+       assign X = C, X = D;
+       assign Y = C, Y = D;
+       assign Z = ^{X,Y};
+endmodule
+
+module foo(input I0, I1, output O);
+       assign O = I0 ^ I1;
+endmodule
+
+module bar(input [7:0] I0, I1, output [7:0] O);
+       assign O = I0 + I1;
+endmodule

diff --git a/tests/various/wandwor.v b/tests/various/wandwor.v
deleted file mode 100644 (file)
index fc072da..0000000
--- a/tests/various/wandwor.v
+++ /dev/null
@@ -1,33 +0,0 @@
-module a(Q);
-       output wire Q = 0;
-endmodule
-
-module b(D);
-       input wire D;
-endmodule
-
-module c;
-       // net definitions
-       wor D;
-       wand E;
-
-       // assignments to wired logic nets
-       assign D = 1;
-       assign D = 0;
-       assign D = 1;
-       assign D = 0;
-
-       // assignments of wired logic nets to wires
-       wire F = E;
-
-       genvar i;
-       for (i = 0; i < 3; i = i + 1)
-       begin : genloop
-               // connection of module outputs
-               a a_inst (.Q(E));
-
-               // connection of module inputs
-               b b_inst (.D(E));
-       end
-endmodule
-