bool "mips"
config BR2_mipsel
bool "mipsel"
+config BR2_nios2
+ bool "nios2"
config BR2_powerpc
bool "powerpc"
config BR2_sh
default "m68k" if BR2_m68k
default "mips" if BR2_mips
default "mipsel" if BR2_mipsel
+ default "nios2" if BR2_nios2
default "powerpc" if BR2_powerpc
default "sh2a_nofpueb" if BR2_sh2a_nofpueb
default "sh2eb" if BR2_sh2eb
config BR2_ENDIAN
string
default "LITTLE" if BR2_arm || BR2_cris || BR2_i386 || BR2_mipsel || \
- BR2_sh3 || BR2_sh4 || BR2_x86_64
+ BR2_sh3 || BR2_sh4 || BR2_x86_64 || BR2_nios2
default "BIG" if BR2_alpha || BR2_armeb || BR2_m68k || BR2_mips || \
BR2_powerpc || BR2_sh2a_nofpueb || BR2_sh2eb || \
BR2_sh3eb || BR2_sh4eb || BR2_sparc
source "package/Config.in"
source "target/Config.in"
-
--- /dev/null
+--- binutils-2.15/bfd/Makefile.am 2004-05-17 21:35:56.000000000 +0200
++++ binutils-2.15-nios2/bfd/Makefile.am 2005-05-17 12:20:13.000000000 +0200
+@@ -82,6 +82,7 @@ ALL_MACHINES = \
+ cpu-mips.lo \
+ cpu-mmix.lo \
+ cpu-msp430.lo \
++ cpu-nios2.lo \
+ cpu-or32.lo \
+ cpu-ns32k.lo \
+ cpu-openrisc.lo \
+@@ -139,6 +140,7 @@ ALL_MACHINES_CFILES = \
+ cpu-msp430.c \
+ cpu-or32.c \
+ cpu-ns32k.c \
++ cpu-nios2.c \
+ cpu-openrisc.c \
+ cpu-pdp11.c \
+ cpu-pj.c \
+@@ -241,6 +243,7 @@ BFD32_BACKENDS = \
+ elfxx-mips.lo \
+ elf32-mips.lo \
+ elf32-msp430.lo \
++ elf32-nios2.lo \
+ elf32-openrisc.lo \
+ elf32-or32.lo \
+ elf32-pj.lo \
+@@ -405,6 +408,7 @@ BFD32_BACKENDS_CFILES = \
+ elfxx-mips.c \
+ elf32-mips.c \
+ elf32-msp430.c \
++ elf32-nios2.c \
+ elf32-openrisc.c \
+ elf32-or32.c \
+ elf32-pj.c \
+@@ -943,6 +947,7 @@ cpu-mcore.lo: cpu-mcore.c $(INCDIR)/file
+ cpu-mips.lo: cpu-mips.c $(INCDIR)/filenames.h
+ cpu-mmix.lo: cpu-mmix.c $(INCDIR)/filenames.h
+ cpu-msp430.lo: cpu-msp430.c $(INCDIR)/filenames.h
++cpu-nios2.lo: cpu-nios2.c $(INCDIR)/filenames.h
+ cpu-or32.lo: cpu-or32.c $(INCDIR)/filenames.h
+ cpu-ns32k.lo: cpu-ns32k.c $(INCDIR)/filenames.h ns32k.h
+ cpu-openrisc.lo: cpu-openrisc.c $(INCDIR)/filenames.h
+@@ -1250,6 +1255,10 @@ elf32-msp430.lo: elf32-msp430.c $(INCDIR
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+ $(INCDIR)/elf/msp430.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
++elf32-nios2.lo: elf32-nios2.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
++ genlink.h elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
++ $(INCDIR)/elf/external.h $(INCDIR)/elf/nios2.h \
++ $(INCDIR)/elf/reloc-macros.h elf32-target.h
+ elf32-openrisc.lo: elf32-openrisc.c $(INCDIR)/filenames.h \
+ elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/openrisc.h \
+--- binutils-2.15/bfd/Makefile.in 2004-05-17 21:35:56.000000000 +0200
++++ binutils-2.15-nios2/bfd/Makefile.in 2005-05-17 12:20:13.000000000 +0200
+@@ -210,6 +210,7 @@ ALL_MACHINES = \
+ cpu-mips.lo \
+ cpu-mmix.lo \
+ cpu-msp430.lo \
++ cpu-nios2.lo \
+ cpu-or32.lo \
+ cpu-ns32k.lo \
+ cpu-openrisc.lo \
+@@ -267,6 +268,7 @@ ALL_MACHINES_CFILES = \
+ cpu-mmix.c \
+ cpu-msp430.c \
+ cpu-or32.c \
++ cpu-nios2.c \
+ cpu-ns32k.c \
+ cpu-openrisc.c \
+ cpu-pdp11.c \
+@@ -371,6 +373,7 @@ BFD32_BACKENDS = \
+ elfxx-mips.lo \
+ elf32-mips.lo \
+ elf32-msp430.lo \
++ elf32-nios2.lo \
+ elf32-openrisc.lo \
+ elf32-or32.lo \
+ elf32-pj.lo \
+@@ -536,6 +539,7 @@ BFD32_BACKENDS_CFILES = \
+ elfxx-mips.c \
+ elf32-mips.c \
+ elf32-msp430.c \
++ elf32-nios2.c \
+ elf32-openrisc.c \
+ elf32-or32.c \
+ elf32-pj.c \
+@@ -1482,6 +1486,7 @@ cpu-mmix.lo: cpu-mmix.c $(INCDIR)/filena
+ cpu-msp430.lo: cpu-msp430.c $(INCDIR)/filenames.h
+ cpu-or32.lo: cpu-or32.c $(INCDIR)/filenames.h
+ cpu-ns32k.lo: cpu-ns32k.c $(INCDIR)/filenames.h ns32k.h
++cpu-nios2.lo: cpu-nios2.c $(INCDIR)/filenames.h
+ cpu-openrisc.lo: cpu-openrisc.c $(INCDIR)/filenames.h
+ cpu-pdp11.lo: cpu-pdp11.c $(INCDIR)/filenames.h
+ cpu-pj.lo: cpu-pj.c $(INCDIR)/filenames.h
+@@ -1787,6 +1792,10 @@ elf32-msp430.lo: elf32-msp430.c $(INCDIR
+ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
+ $(INCDIR)/elf/msp430.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
++elf32-nios2.lo: elf32-nios2.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
++ genlink.h elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
++ $(INCDIR)/elf/external.h $(INCDIR)/elf/nios2.h \
++ $(INCDIR)/elf/reloc-macros.h elf32-target.h
+ elf32-openrisc.lo: elf32-openrisc.c $(INCDIR)/filenames.h \
+ elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/openrisc.h \
+--- binutils-2.15/bfd/archures.c 2003-12-03 18:38:48.000000000 +0100
++++ binutils-2.15-nios2/bfd/archures.c 2005-05-17 12:20:13.000000000 +0200
+@@ -330,6 +330,8 @@ DESCRIPTION
+ .#define bfd_mach_msp44 44
+ . bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
+ .#define bfd_mach_xtensa 1
++. bfd_arch_nios2,
++.#define bfd_mach_nios2 1
+ . bfd_arch_last
+ . };
+ */
+@@ -422,6 +424,7 @@ extern const bfd_arch_info_type bfd_w65_
+ extern const bfd_arch_info_type bfd_xstormy16_arch;
+ extern const bfd_arch_info_type bfd_xtensa_arch;
+ extern const bfd_arch_info_type bfd_z8k_arch;
++extern const bfd_arch_info_type bfd_nios2_arch;
+
+ static const bfd_arch_info_type * const bfd_archures_list[] =
+ {
+@@ -460,6 +463,7 @@ static const bfd_arch_info_type * const
+ &bfd_mn10200_arch,
+ &bfd_mn10300_arch,
+ &bfd_msp430_arch,
++ &bfd_nios2_arch,
+ &bfd_ns32k_arch,
+ &bfd_openrisc_arch,
+ &bfd_or32_arch,
+--- binutils-2.15/bfd/bfd-in2.h 2004-05-17 21:35:56.000000000 +0200
++++ binutils-2.15-nios2/bfd/bfd-in2.h 2005-05-17 12:20:13.000000000 +0200
+@@ -830,37 +830,48 @@ extern void bfd_elf64_ia64_after_parse
+ (int);
+
+ /* Extracted from init.c. */
+-void bfd_init (void);
++void
++bfd_init PARAMS ((void));
+
+ /* Extracted from opncls.c. */
+-bfd *bfd_openr (const char *filename, const char *target);
++bfd *
++bfd_openr PARAMS ((const char *filename, const char *target));
+
+-bfd *bfd_fdopenr (const char *filename, const char *target, int fd);
++bfd *
++bfd_fdopenr PARAMS ((const char *filename, const char *target, int fd));
+
+-bfd *bfd_openstreamr (const char *, const char *, void *);
++bfd *
++bfd_openstreamr PARAMS ((const char *, const char *, void *));
+
+-bfd *bfd_openw (const char *filename, const char *target);
++bfd *
++bfd_openw PARAMS ((const char *filename, const char *target));
+
+-bfd_boolean bfd_close (bfd *abfd);
++bfd_boolean
++bfd_close PARAMS ((bfd *abfd));
+
+-bfd_boolean bfd_close_all_done (bfd *);
++bfd_boolean
++bfd_close_all_done PARAMS ((bfd *));
+
+-bfd *bfd_create (const char *filename, bfd *templ);
++bfd *
++bfd_create PARAMS ((const char *filename, bfd *templ));
+
+-bfd_boolean bfd_make_writable (bfd *abfd);
++bfd_boolean
++bfd_make_writable PARAMS ((bfd *abfd));
+
+-bfd_boolean bfd_make_readable (bfd *abfd);
++bfd_boolean
++bfd_make_readable PARAMS ((bfd *abfd));
+
+-unsigned long bfd_calc_gnu_debuglink_crc32
+- (unsigned long crc, const unsigned char *buf, bfd_size_type len);
++unsigned long
++bfd_calc_gnu_debuglink_crc32 PARAMS ((unsigned long crc, const unsigned char *buf, bfd_size_type len));
+
+-char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir);
++char *
++bfd_follow_gnu_debuglink PARAMS ((bfd *abfd, const char *dir));
+
+-struct bfd_section *bfd_create_gnu_debuglink_section
+- (bfd *abfd, const char *filename);
++struct bfd_section *
++bfd_create_gnu_debuglink_section PARAMS ((bfd *abfd, const char *filename));
+
+-bfd_boolean bfd_fill_in_gnu_debuglink_section
+- (bfd *abfd, struct bfd_section *sect, const char *filename);
++bfd_boolean
++bfd_fill_in_gnu_debuglink_section PARAMS ((bfd *abfd, struct bfd_section *sect, const char *filename));
+
+ /* Extracted from libbfd.c. */
+
+@@ -976,9 +987,11 @@ bfd_boolean bfd_fill_in_gnu_debuglink_se
+
+
+ /* Extracted from bfdio.c. */
+-long bfd_get_mtime (bfd *abfd);
++long
++bfd_get_mtime PARAMS ((bfd *abfd));
+
+-long bfd_get_size (bfd *abfd);
++long
++bfd_get_size PARAMS ((bfd *abfd));
+
+ /* Extracted from bfdwin.c. */
+ /* Extracted from section.c. */
+@@ -1421,48 +1434,54 @@ extern const struct bfd_symbol * const b
+ } \
+ while (0)
+
+-void bfd_section_list_clear (bfd *);
++void
++bfd_section_list_clear PARAMS ((bfd *));
+
+-asection *bfd_get_section_by_name (bfd *abfd, const char *name);
++asection *
++bfd_get_section_by_name PARAMS ((bfd *abfd, const char *name));
+
+-char *bfd_get_unique_section_name
+- (bfd *abfd, const char *templat, int *count);
++char *
++bfd_get_unique_section_name PARAMS ((bfd *abfd, const char *templat, int *count));
+
+-asection *bfd_make_section_old_way (bfd *abfd, const char *name);
++asection *
++bfd_make_section_old_way PARAMS ((bfd *abfd, const char *name));
+
+-asection *bfd_make_section_anyway (bfd *abfd, const char *name);
++asection *
++bfd_make_section_anyway PARAMS ((bfd *abfd, const char *name));
+
+-asection *bfd_make_section (bfd *, const char *name);
++asection *
++bfd_make_section PARAMS ((bfd *, const char *name));
+
+-bfd_boolean bfd_set_section_flags
+- (bfd *abfd, asection *sec, flagword flags);
++bfd_boolean
++bfd_set_section_flags PARAMS ((bfd *abfd, asection *sec, flagword flags));
+
+-void bfd_map_over_sections
+- (bfd *abfd,
++void
++bfd_map_over_sections PARAMS ((bfd *abfd,
+ void (*func) (bfd *abfd, asection *sect, void *obj),
+- void *obj);
++ void *obj));
+
+-bfd_boolean bfd_set_section_size
+- (bfd *abfd, asection *sec, bfd_size_type val);
++bfd_boolean
++bfd_set_section_size PARAMS ((bfd *abfd, asection *sec, bfd_size_type val));
+
+-bfd_boolean bfd_set_section_contents
+- (bfd *abfd, asection *section, const void *data,
+- file_ptr offset, bfd_size_type count);
++bfd_boolean
++bfd_set_section_contents PARAMS ((bfd *abfd, asection *section, const void *data,
++ file_ptr offset, bfd_size_type count));
+
+-bfd_boolean bfd_get_section_contents
+- (bfd *abfd, asection *section, void *location, file_ptr offset,
+- bfd_size_type count);
++bfd_boolean
++bfd_get_section_contents PARAMS ((bfd *abfd, asection *section, void *location, file_ptr offset,
++ bfd_size_type count));
+
+-bfd_boolean bfd_copy_private_section_data
+- (bfd *ibfd, asection *isec, bfd *obfd, asection *osec);
++bfd_boolean
++bfd_copy_private_section_data PARAMS ((bfd *ibfd, asection *isec, bfd *obfd, asection *osec));
+
+ #define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
+ BFD_SEND (obfd, _bfd_copy_private_section_data, \
+ (ibfd, isection, obfd, osection))
+-void _bfd_strip_section_from_output
+- (struct bfd_link_info *info, asection *section);
++void
++_bfd_strip_section_from_output PARAMS ((struct bfd_link_info *info, asection *section));
+
+-bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group);
++bfd_boolean
++bfd_generic_discard_group PARAMS ((bfd *abfd, asection *group));
+
+ /* Extracted from archures.c. */
+ enum bfd_architecture
+@@ -1728,6 +1747,8 @@ enum bfd_architecture
+ #define bfd_mach_msp44 44
+ bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
+ #define bfd_mach_xtensa 1
++ bfd_arch_nios2,
++#define bfd_mach_nios2 1
+ bfd_arch_last
+ };
+
+@@ -1754,37 +1775,47 @@ typedef struct bfd_arch_info
+ }
+ bfd_arch_info_type;
+
+-const char *bfd_printable_name (bfd *abfd);
++const char *
++bfd_printable_name PARAMS ((bfd *abfd));
+
+-const bfd_arch_info_type *bfd_scan_arch (const char *string);
++const bfd_arch_info_type *
++bfd_scan_arch PARAMS ((const char *string));
+
+-const char **bfd_arch_list (void);
++const char **
++bfd_arch_list PARAMS ((void));
+
+-const bfd_arch_info_type *bfd_arch_get_compatible
+- (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
++const bfd_arch_info_type *
++bfd_arch_get_compatible PARAMS ((const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns));
+
+-void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
++void
++bfd_set_arch_info PARAMS ((bfd *abfd, const bfd_arch_info_type *arg));
+
+-enum bfd_architecture bfd_get_arch (bfd *abfd);
++enum bfd_architecture
++bfd_get_arch PARAMS ((bfd *abfd));
+
+-unsigned long bfd_get_mach (bfd *abfd);
++unsigned long
++bfd_get_mach PARAMS ((bfd *abfd));
+
+-unsigned int bfd_arch_bits_per_byte (bfd *abfd);
++unsigned int
++bfd_arch_bits_per_byte PARAMS ((bfd *abfd));
+
+-unsigned int bfd_arch_bits_per_address (bfd *abfd);
++unsigned int
++bfd_arch_bits_per_address PARAMS ((bfd *abfd));
+
+-const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
++const bfd_arch_info_type *
++bfd_get_arch_info PARAMS ((bfd *abfd));
+
+-const bfd_arch_info_type *bfd_lookup_arch
+- (enum bfd_architecture arch, unsigned long machine);
++const bfd_arch_info_type *
++bfd_lookup_arch PARAMS ((enum bfd_architecture arch, unsigned long machine));
+
+-const char *bfd_printable_arch_mach
+- (enum bfd_architecture arch, unsigned long machine);
++const char *
++bfd_printable_arch_mach PARAMS ((enum bfd_architecture arch, unsigned long machine));
+
+-unsigned int bfd_octets_per_byte (bfd *abfd);
++unsigned int
++bfd_octets_per_byte PARAMS ((bfd *abfd));
+
+-unsigned int bfd_arch_mach_octets_per_byte
+- (enum bfd_architecture arch, unsigned long machine);
++unsigned int
++bfd_arch_mach_octets_per_byte PARAMS ((enum bfd_architecture arch, unsigned long machine));
+
+ /* Extracted from reloc.c. */
+ typedef enum bfd_reloc_status
+@@ -1967,7 +1998,8 @@ struct reloc_howto_struct
+ } \
+ }
+
+-unsigned int bfd_get_reloc_size (reloc_howto_type *);
++unsigned int
++bfd_get_reloc_size PARAMS ((reloc_howto_type *));
+
+ typedef struct relent_chain
+ {
+@@ -1976,27 +2008,27 @@ typedef struct relent_chain
+ }
+ arelent_chain;
+
+-bfd_reloc_status_type bfd_check_overflow
+- (enum complain_overflow how,
++bfd_reloc_status_type
++bfd_check_overflow PARAMS ((enum complain_overflow how,
+ unsigned int bitsize,
+ unsigned int rightshift,
+ unsigned int addrsize,
+- bfd_vma relocation);
++ bfd_vma relocation));
+
+-bfd_reloc_status_type bfd_perform_relocation
+- (bfd *abfd,
++bfd_reloc_status_type
++bfd_perform_relocation PARAMS ((bfd *abfd,
+ arelent *reloc_entry,
+ void *data,
+ asection *input_section,
+ bfd *output_bfd,
+- char **error_message);
++ char **error_message));
+
+-bfd_reloc_status_type bfd_install_relocation
+- (bfd *abfd,
++bfd_reloc_status_type
++bfd_install_relocation PARAMS ((bfd *abfd,
+ arelent *reloc_entry,
+ void *data, bfd_vma data_start,
+ asection *input_section,
+- char **error_message);
++ char **error_message));
+
+ enum bfd_reloc_code_real {
+ _dummy_first_bfd_reloc_code_real,
+@@ -3439,6 +3471,23 @@ This is the 5 bits of a value. */
+ BFD_RELOC_MSP430_16_PCREL_BYTE,
+ BFD_RELOC_MSP430_16_BYTE,
+
++/* Relocations used by the Altera New Jersey core */
++ BFD_RELOC_NIOS2_S16,
++ BFD_RELOC_NIOS2_U16,
++ BFD_RELOC_NIOS2_CALL26,
++ BFD_RELOC_NIOS2_IMM5,
++ BFD_RELOC_NIOS2_CACHE_OPX,
++ BFD_RELOC_NIOS2_IMM6,
++ BFD_RELOC_NIOS2_IMM8,
++ BFD_RELOC_NIOS2_HI16,
++ BFD_RELOC_NIOS2_LO16,
++ BFD_RELOC_NIOS2_HIADJ16,
++ BFD_RELOC_NIOS2_GPREL,
++ BFD_RELOC_NIOS2_UJMP,
++ BFD_RELOC_NIOS2_CJMP,
++ BFD_RELOC_NIOS2_CALLR,
++ BFD_RELOC_NIOS2_ALIGN,
++
+ /* IQ2000 Relocations. */
+ BFD_RELOC_IQ2000_OFFSET_16,
+ BFD_RELOC_IQ2000_OFFSET_21,
+@@ -3477,10 +3526,11 @@ BFD_RELOC_XTENSA_ASM_EXPAND. */
+ BFD_RELOC_XTENSA_ASM_SIMPLIFY,
+ BFD_RELOC_UNUSED };
+ typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
+-reloc_howto_type *bfd_reloc_type_lookup
+- (bfd *abfd, bfd_reloc_code_real_type code);
++reloc_howto_type *
++bfd_reloc_type_lookup PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
+
+-const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
++const char *
++bfd_get_reloc_code_name PARAMS ((bfd_reloc_code_real_type code));
+
+ /* Extracted from syms.c. */
+
+@@ -3611,9 +3661,11 @@ asymbol;
+ #define bfd_get_symtab_upper_bound(abfd) \
+ BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd))
+
+-bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym);
++bfd_boolean
++bfd_is_local_label PARAMS ((bfd *abfd, asymbol *sym));
+
+-bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name);
++bfd_boolean
++bfd_is_local_label_name PARAMS ((bfd *abfd, const char *name));
+
+ #define bfd_is_local_label_name(abfd, name) \
+ BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name))
+@@ -3621,27 +3673,32 @@ bfd_boolean bfd_is_local_label_name (bfd
+ #define bfd_canonicalize_symtab(abfd, location) \
+ BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location))
+
+-bfd_boolean bfd_set_symtab
+- (bfd *abfd, asymbol **location, unsigned int count);
++bfd_boolean
++bfd_set_symtab PARAMS ((bfd *abfd, asymbol **location, unsigned int count));
+
+-void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol);
++void
++bfd_print_symbol_vandf PARAMS ((bfd *abfd, void *file, asymbol *symbol));
+
+ #define bfd_make_empty_symbol(abfd) \
+ BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd))
+
+-asymbol *_bfd_generic_make_empty_symbol (bfd *);
++asymbol *
++_bfd_generic_make_empty_symbol PARAMS ((bfd *));
+
+ #define bfd_make_debug_symbol(abfd,ptr,size) \
+ BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size))
+
+-int bfd_decode_symclass (asymbol *symbol);
++int
++bfd_decode_symclass PARAMS ((asymbol *symbol));
+
+-bfd_boolean bfd_is_undefined_symclass (int symclass);
++bfd_boolean
++bfd_is_undefined_symclass PARAMS ((int symclass));
+
+-void bfd_symbol_info (asymbol *symbol, symbol_info *ret);
++void
++bfd_symbol_info PARAMS ((asymbol *symbol, symbol_info *ret));
+
+-bfd_boolean bfd_copy_private_symbol_data
+- (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym);
++bfd_boolean
++bfd_copy_private_symbol_data PARAMS ((bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym));
+
+ #define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \
+ BFD_SEND (obfd, _bfd_copy_private_symbol_data, \
+@@ -3840,57 +3897,76 @@ typedef enum bfd_error
+ }
+ bfd_error_type;
+
+-bfd_error_type bfd_get_error (void);
++bfd_error_type
++bfd_get_error PARAMS ((void));
+
+-void bfd_set_error (bfd_error_type error_tag);
++void
++bfd_set_error PARAMS ((bfd_error_type error_tag));
+
+-const char *bfd_errmsg (bfd_error_type error_tag);
++const char *
++bfd_errmsg PARAMS ((bfd_error_type error_tag));
+
+-void bfd_perror (const char *message);
++void
++bfd_perror PARAMS ((const char *message));
+
+ typedef void (*bfd_error_handler_type) (const char *, ...);
+
+-bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type);
++bfd_error_handler_type
++bfd_set_error_handler PARAMS ((bfd_error_handler_type));
+
+-void bfd_set_error_program_name (const char *);
++void
++bfd_set_error_program_name PARAMS ((const char *));
+
+-bfd_error_handler_type bfd_get_error_handler (void);
++bfd_error_handler_type
++bfd_get_error_handler PARAMS ((void));
+
+-const char *bfd_archive_filename (bfd *);
++const char *
++bfd_archive_filename PARAMS ((bfd *));
+
+-long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect);
++long
++bfd_get_reloc_upper_bound PARAMS ((bfd *abfd, asection *sect));
+
+-long bfd_canonicalize_reloc
+- (bfd *abfd, asection *sec, arelent **loc, asymbol **syms);
++long
++bfd_canonicalize_reloc PARAMS ((bfd *abfd, asection *sec, arelent **loc, asymbol **syms));
+
+-void bfd_set_reloc
+- (bfd *abfd, asection *sec, arelent **rel, unsigned int count);
++void
++bfd_set_reloc PARAMS ((bfd *abfd, asection *sec, arelent **rel, unsigned int count));
+
+-bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags);
++bfd_boolean
++bfd_set_file_flags PARAMS ((bfd *abfd, flagword flags));
+
+-int bfd_get_arch_size (bfd *abfd);
++int
++bfd_get_arch_size PARAMS ((bfd *abfd));
+
+-int bfd_get_sign_extend_vma (bfd *abfd);
++int
++bfd_get_sign_extend_vma PARAMS ((bfd *abfd));
+
+-bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma);
++bfd_boolean
++bfd_set_start_address PARAMS ((bfd *abfd, bfd_vma vma));
+
+-unsigned int bfd_get_gp_size (bfd *abfd);
++unsigned int
++bfd_get_gp_size PARAMS ((bfd *abfd));
+
+-void bfd_set_gp_size (bfd *abfd, unsigned int i);
++void
++bfd_set_gp_size PARAMS ((bfd *abfd, unsigned int i));
+
+-bfd_vma bfd_scan_vma (const char *string, const char **end, int base);
++bfd_vma
++bfd_scan_vma PARAMS ((const char *string, const char **end, int base));
+
+-bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd);
++bfd_boolean
++bfd_copy_private_bfd_data PARAMS ((bfd *ibfd, bfd *obfd));
+
+ #define bfd_copy_private_bfd_data(ibfd, obfd) \
+ BFD_SEND (obfd, _bfd_copy_private_bfd_data, \
+ (ibfd, obfd))
+-bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd);
++bfd_boolean
++bfd_merge_private_bfd_data PARAMS ((bfd *ibfd, bfd *obfd));
+
+ #define bfd_merge_private_bfd_data(ibfd, obfd) \
+ BFD_SEND (obfd, _bfd_merge_private_bfd_data, \
+ (ibfd, obfd))
+-bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags);
++bfd_boolean
++bfd_set_private_flags PARAMS ((bfd *abfd, flagword flags));
+
+ #define bfd_set_private_flags(abfd, flags) \
+ BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags))
+@@ -3968,7 +4044,8 @@ extern bfd_byte *bfd_get_relocated_secti
+ (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *,
+ bfd_boolean, asymbol **);
+
+-bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative);
++bfd_boolean
++bfd_alt_mach_code PARAMS ((bfd *abfd, int alternative));
+
+ struct bfd_preserve
+ {
+@@ -3982,27 +4059,34 @@ struct bfd_preserve
+ struct bfd_hash_table section_htab;
+ };
+
+-bfd_boolean bfd_preserve_save (bfd *, struct bfd_preserve *);
++bfd_boolean
++bfd_preserve_save PARAMS ((bfd *, struct bfd_preserve *));
+
+-void bfd_preserve_restore (bfd *, struct bfd_preserve *);
++void
++bfd_preserve_restore PARAMS ((bfd *, struct bfd_preserve *));
+
+-void bfd_preserve_finish (bfd *, struct bfd_preserve *);
++void
++bfd_preserve_finish PARAMS ((bfd *, struct bfd_preserve *));
+
+ /* Extracted from archive.c. */
+-symindex bfd_get_next_mapent
+- (bfd *abfd, symindex previous, carsym **sym);
++symindex
++bfd_get_next_mapent PARAMS ((bfd *abfd, symindex previous, carsym **sym));
+
+-bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head);
++bfd_boolean
++bfd_set_archive_head PARAMS ((bfd *output, bfd *new_head));
+
+-bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous);
++bfd *
++bfd_openr_next_archived_file PARAMS ((bfd *archive, bfd *previous));
+
+ /* Extracted from corefile.c. */
+-const char *bfd_core_file_failing_command (bfd *abfd);
++const char *
++bfd_core_file_failing_command PARAMS ((bfd *abfd));
+
+-int bfd_core_file_failing_signal (bfd *abfd);
++int
++bfd_core_file_failing_signal PARAMS ((bfd *abfd));
+
+-bfd_boolean core_file_matches_executable_p
+- (bfd *core_bfd, bfd *exec_bfd);
++bfd_boolean
++core_file_matches_executable_p PARAMS ((bfd *core_bfd, bfd *exec_bfd));
+
+ /* Extracted from targets.c. */
+ #define BFD_SEND(bfd, message, arglist) \
+@@ -4362,35 +4446,42 @@ typedef struct bfd_target
+
+ } bfd_target;
+
+-bfd_boolean bfd_set_default_target (const char *name);
++bfd_boolean
++bfd_set_default_target PARAMS ((const char *name));
+
+-const bfd_target *bfd_find_target (const char *target_name, bfd *abfd);
++const bfd_target *
++bfd_find_target PARAMS ((const char *target_name, bfd *abfd));
+
+-const char ** bfd_target_list (void);
++const char **
++bfd_target_list PARAMS ((void));
+
+-const bfd_target *bfd_search_for_target
+- (int (*search_func) (const bfd_target *, void *),
+- void *);
++const bfd_target *
++bfd_search_for_target PARAMS ((int (*search_func) (const bfd_target *, void *),
++ void *));
+
+ /* Extracted from format.c. */
+-bfd_boolean bfd_check_format (bfd *abfd, bfd_format format);
++bfd_boolean
++bfd_check_format PARAMS ((bfd *abfd, bfd_format format));
+
+-bfd_boolean bfd_check_format_matches
+- (bfd *abfd, bfd_format format, char ***matching);
++bfd_boolean
++bfd_check_format_matches PARAMS ((bfd *abfd, bfd_format format, char ***matching));
+
+-bfd_boolean bfd_set_format (bfd *abfd, bfd_format format);
++bfd_boolean
++bfd_set_format PARAMS ((bfd *abfd, bfd_format format));
+
+-const char *bfd_format_string (bfd_format format);
++const char *
++bfd_format_string PARAMS ((bfd_format format));
+
+ /* Extracted from linker.c. */
+-bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec);
++bfd_boolean
++bfd_link_split_section PARAMS ((bfd *abfd, asection *sec));
+
+ #define bfd_link_split_section(abfd, sec) \
+ BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec))
+
+ /* Extracted from simple.c. */
+-bfd_byte *bfd_simple_get_relocated_section_contents
+- (bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table);
++bfd_byte *
++bfd_simple_get_relocated_section_contents PARAMS ((bfd *abfd, asection *sec, bfd_byte *outbuf, asymbol **symbol_table));
+
+ #ifdef __cplusplus
+ }
+--- binutils-2.15/bfd/config.bfd 2004-05-17 21:35:56.000000000 +0200
++++ binutils-2.15-nios2/bfd/config.bfd 2005-05-17 12:20:13.000000000 +0200
+@@ -59,6 +59,7 @@ m6812*|m68hc12*) targ_archs="bfd_m68hc12
+ m68*) targ_archs=bfd_m68k_arch ;;
+ m88*) targ_archs=bfd_m88k_arch ;;
+ mips*) targ_archs=bfd_mips_arch ;;
++nios2*) targ_archs=bfd_nios2_arch ;;
+ or32*) targ_archs=bfd_or32_arch ;;
+ pdp11*) targ_archs=bfd_pdp11_arch ;;
+ pj*) targ_archs="bfd_pj_arch bfd_i386_arch";;
+@@ -874,6 +875,10 @@ case "${targ}" in
+ targ_underscore=yes
+ ;;
+
++ nios2-*-*)
++ targ_defvec=bfd_elf32_littlenios2_vec
++ ;;
++
+ openrisc-*-elf)
+ targ_defvec=bfd_elf32_openrisc_vec
+ ;;
+--- binutils-2.15/bfd/configure 2004-05-17 21:35:57.000000000 +0200
++++ binutils-2.15-nios2/bfd/configure 2005-05-17 12:20:13.000000000 +0200
+@@ -6322,6 +6322,7 @@ do
+ bfd_elf32_mcore_little_vec) tb="$tb elf32-mcore.lo elf32.lo $elf" ;;
+ bfd_elf32_mn10200_vec) tb="$tb elf-m10200.lo elf32.lo $elf" ;;
+ bfd_elf32_mn10300_vec) tb="$tb elf-m10300.lo elf32.lo $elf" ;;
++ bfd_elf32_littlenios2_vec) tb="$tb elf32-nios2.lo elf32.lo $elf" ;;
+ bfd_elf32_msp430_vec) tb="$tb elf32-msp430.lo elf32.lo $elf" ;;
+ bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+--- binutils-2.15/bfd/configure.in 2004-05-17 21:35:57.000000000 +0200
++++ binutils-2.15-nios2/bfd/configure.in 2005-05-17 12:20:13.000000000 +0200
+@@ -631,6 +631,7 @@ do
+ bfd_elf32_mcore_little_vec) tb="$tb elf32-mcore.lo elf32.lo $elf" ;;
+ bfd_elf32_mn10200_vec) tb="$tb elf-m10200.lo elf32.lo $elf" ;;
+ bfd_elf32_mn10300_vec) tb="$tb elf-m10300.lo elf32.lo $elf" ;;
++ bfd_elf32_littlenios2_vec) tb="$tb elf32-nios2.lo elf32.lo $elf" ;;
+ bfd_elf32_msp430_vec) tb="$tb elf32-msp430.lo elf32.lo $elf" ;;
+ bfd_elf32_nbigmips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+ bfd_elf32_nlittlemips_vec) tb="$tb elfn32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo"; target_size=64 ;;
+--- binutils-2.15/bfd/cpu-nios2.c 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/bfd/cpu-nios2.c 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,70 @@
++/* bfd back-end for Altera Nios II support
++
++ Copyright (C) 2003
++ by Nigel Gray (ngray@altera.com).
++
++This file is part of BFD, the Binary File Descriptor library.
++
++This program is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2 of the License, or
++(at your option) any later version.
++
++This program is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; if not, write to the Free Software
++Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
++
++#include "bfd.h"
++#include "sysdep.h"
++#include "libbfd.h"
++
++static const bfd_arch_info_type *nios2_compatible
++ (const bfd_arch_info_type *, const bfd_arch_info_type *);
++
++/* The default routine tests bits_per_word, which is wrong on mips as
++ mips word size doesn't correlate with reloc size. */
++
++static const bfd_arch_info_type *
++nios2_compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
++{
++ if (a->arch != b->arch)
++ return NULL;
++
++ /* Machine compatibility is checked in
++ _bfd_mips_elf_merge_private_bfd_data. */
++
++ return a;
++}
++
++#define N(BITS_WORD, BITS_ADDR, NUMBER, PRINT, DEFAULT, NEXT) \
++ { \
++ BITS_WORD, /* bits in a word */ \
++ BITS_ADDR, /* bits in an address */ \
++ 8, /* 8 bits in a byte */ \
++ bfd_arch_nios2, \
++ NUMBER, \
++ "nios2", \
++ PRINT, \
++ 3, \
++ DEFAULT, \
++ nios2_compatible, \
++ bfd_default_scan, \
++ NEXT, \
++ }
++
++#define NN(index) (&arch_info_struct[(index) + 1])
++
++static const bfd_arch_info_type arch_info_struct[] =
++{
++ N (32, 32, bfd_mach_nios2, "nios2", FALSE, 0),
++};
++
++/* There is only one architecture - but we give the default a machine number of 0
++ so the linker can distinguish it */
++const bfd_arch_info_type bfd_nios2_arch =
++N (32, 32, 0, "nios2", TRUE, &arch_info_struct[0]);
+--- binutils-2.15/bfd/elf.c 2004-05-17 21:35:57.000000000 +0200
++++ binutils-2.15-nios2/bfd/elf.c 2005-05-17 12:20:13.000000000 +0200
+@@ -3286,9 +3286,14 @@ map_sections_to_segments (bfd *abfd)
+ phdr_size = elf_tdata (abfd)->program_header_size;
+ if (phdr_size == 0)
+ phdr_size = get_elf_backend_data (abfd)->s->sizeof_phdr;
++
++ /* NG - for standalone embedded applications we don't want the program
++ headers or ELF header in the output memory map (cf CSP) */
+ if ((abfd->flags & D_PAGED) == 0
+ || sections[0]->lma < phdr_size
+- || sections[0]->lma % maxpagesize < phdr_size % maxpagesize)
++ || sections[0]->lma % maxpagesize < phdr_size % maxpagesize
++ || (elf_tdata (abfd)->elf_header[0].e_ident[EI_OSABI]
++ == ELFOSABI_STANDALONE))
+ phdr_in_segment = FALSE;
+ }
+
+--- binutils-2.15/bfd/elf32-nios2.c 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/bfd/elf32-nios2.c 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,2188 @@
++/* New Jersey-specific support for 32-bit ELF
++
++ Copyright (C) 2003
++ by Nigel Gray (ngray@altera.com).
++
++
++This file is part of BFD, the Binary File Descriptor library.
++
++This program is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2 of the License, or
++(at your option) any later version.
++
++This program is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; if not, write to the Free Software
++Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
++
++/* This file handles Altera New Jersey ELF targets */
++
++#include "bfd.h"
++#include "sysdep.h"
++#include "libbfd.h"
++#include "bfdlink.h"
++#include "genlink.h"
++#include "elf-bfd.h"
++#include "elf/nios2.h"
++#include "opcode/nios2.h"
++
++/* use RELA relocations*/
++#ifndef USE_RELA
++#define USE_RELA
++#endif
++
++#ifdef USE_REL
++#undef USE_REL
++#endif
++
++/* Function prototypes */
++
++static reloc_howto_type *nios2_elf32_bfd_reloc_type_lookup
++ (bfd *, bfd_reloc_code_real_type);
++
++static bfd_boolean nios2_elf32_relax_section
++ (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
++
++static bfd_boolean nios2_elf32_relax_delete_bytes
++ (bfd *, asection *, bfd_vma, int);
++
++static reloc_howto_type *nios2_elf32_rtype_to_howto
++ (unsigned int r_type, bfd_boolean rela_p);
++
++static void nios2_elf32_info_to_howto
++ (bfd * abfd, arelent * cache_ptr, Elf_Internal_Rela * dst);
++
++static bfd_boolean nios2_elf32_relocate_section
++ (bfd * output_bfd, struct bfd_link_info * info, bfd * input_bfd,
++ asection * input_section, bfd_byte * contents,
++ Elf_Internal_Rela * relocs, Elf_Internal_Sym * local_syms,
++ asection ** local_sections);
++
++static reloc_howto_type *lookup_howto (unsigned int rtype);
++
++static bfd_reloc_status_type nios2_elf_final_gp
++ (bfd *, asymbol *, bfd_boolean, char **, bfd_vma *,
++ struct bfd_link_info *);
++
++static bfd_boolean nios2_elf_assign_gp
++ (bfd *, bfd_vma *, struct bfd_link_info *);
++
++static bfd_reloc_status_type nios2_elf32_ignore_reloc
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_hi16_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_lo16_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_hiadj16_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_pcrel16_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_call26_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_gprel_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_ujmp_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_cjmp_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_callr_relocate
++ (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
++
++static bfd_reloc_status_type nios2_elf32_do_hi16_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++static bfd_reloc_status_type nios2_elf32_do_lo16_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++static bfd_reloc_status_type nios2_elf32_do_hiadj16_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++static bfd_reloc_status_type nios2_elf32_do_pcrel16_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++static bfd_reloc_status_type nios2_elf32_do_call26_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++static bfd_reloc_status_type nios2_elf32_do_gprel_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++static bfd_reloc_status_type nios2_elf32_do_ujmp_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++static bfd_reloc_status_type nios2_elf32_do_cjmp_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++static bfd_reloc_status_type nios2_elf32_do_callr_relocate
++ (bfd *, reloc_howto_type *, asection *,
++ bfd_byte *, bfd_vma, bfd_vma, bfd_vma);
++
++
++static void nios2_elf32_post_process_headers
++ (bfd *, struct bfd_link_info *);
++
++static bfd_boolean nios2_elf32_section_from_shdr
++ (bfd *, Elf_Internal_Shdr *, const char *name);
++
++static bfd_boolean nios2_elf32_section_flags
++ (flagword *, Elf_Internal_Shdr *);
++
++static bfd_boolean nios2_elf32_fake_sections
++ (bfd *, Elf_Internal_Shdr *, asection *);
++
++
++
++static bfd_boolean nios2_elf32_check_relocs
++ (bfd *, struct bfd_link_info *, asection *,
++ const Elf_Internal_Rela *);
++
++static asection *nios2_elf32_gc_mark_hook (asection * sec,
++ struct bfd_link_info *
++ info,
++ Elf_Internal_Rela * rel,
++ struct elf_link_hash_entry
++ * h,
++ Elf_Internal_Sym * sym);
++
++
++/* target vector */
++extern const bfd_target bfd_elf32_littlenios2_vec;
++
++/* The relocation table used for SHT_REL sections. */
++
++static reloc_howto_type elf_nios2_howto_table_rel[] = {
++ /* No relocation. */
++ HOWTO (R_NIOS2_NONE, /* type */
++ 0, /* rightshift */
++ 0, /* size (0 = byte, 1 = short, 2 = long) */
++ 0, /* bitsize */
++ FALSE, /* pc_relative */
++ 0, /* bitpos */
++ complain_overflow_dont, /* complain_on_overflow */
++ bfd_elf_generic_reloc, /* special_function */
++ "R_NIOS2_NONE", /* name */
++ FALSE, /* partial_inplace */
++ 0, /* src_mask */
++ 0, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ /* 16-bit signed immediate relocation */
++ HOWTO (R_NIOS2_S16, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 16, /* bitsize */
++ FALSE, /* pc_relative */
++ 6, /* bitpos */
++ complain_overflow_signed, /* complain on overflow */
++ bfd_elf_generic_reloc, /* special function */
++ "R_NIOS2_S16", /* name */
++ FALSE, /* partial_inplace */
++ 0x003fffc0, /* src_mask */
++ 0x003fffc0, /* dest_mask */
++ FALSE), /* pcrel_offset */
++
++ /* 16-bit unsigned immediate relocation */
++ HOWTO (R_NIOS2_U16, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 16, /* bitsize */
++ FALSE, /* pc_relative */
++ 6, /* bitpos */
++ complain_overflow_unsigned, /* complain on overflow */
++ bfd_elf_generic_reloc, /* special function */
++ "R_NIOS2_U16", /* name */
++ FALSE, /* partial_inplace */
++ 0x003fffc0, /* src_mask */
++ 0x003fffc0, /* dest_mask */
++ FALSE), /* pcrel_offset */
++
++ HOWTO (R_NIOS2_PCREL16, /* type */
++ 0, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 16, /* bitsize */
++ TRUE, /* pc_relative */
++ 6, /* bitpos */
++ complain_overflow_signed, /* complain on overflow */
++ nios2_elf32_pcrel16_relocate, /* special function */
++ "R_NIOS2_PCREL16", /* name */
++ FALSE, /* partial_inplace */
++ 0x003fffc0, /* src_mask */
++ 0x003fffc0, /* dest_mask */
++ TRUE), /* pcrel_offset */
++
++ HOWTO (R_NIOS2_CALL26, /* type */
++ 2, /* rightshift */
++ 2, /* size (0 = byte, 1 = short, 2 = long) */
++ 26, /* bitsize */
++ FALSE, /* pc_relative */
++ 6, /* bitpos */
++ complain_overflow_dont, /* complain on overflow */
++ nios2_elf32_call26_relocate, /* special function */
++ "R_NIOS2_CALL26", /* name */
++ FALSE, /* partial_inplace */
++ 0xffffffc0, /* src_mask */
++ 0xffffffc0, /* dst_mask */
++ FALSE), /* pcrel_offset */
++
++ HOWTO (R_NIOS2_IMM5,
++ 0,
++ 2,
++ 5,
++ FALSE,
++ 6,
++ complain_overflow_bitfield,
++ bfd_elf_generic_reloc,
++ "R_NIOS2_IMM5",
++ FALSE,
++ 0x000007c0,
++ 0x000007c0,
++ FALSE),
++
++ HOWTO (R_NIOS2_CACHE_OPX,
++ 0,
++ 2,
++ 5,
++ FALSE,
++ 22,
++ complain_overflow_bitfield,
++ bfd_elf_generic_reloc,
++ "R_NIOS2_CACHE_OPX",
++ FALSE,
++ 0x07c00000,
++ 0x07c00000,
++ FALSE),
++
++ HOWTO (R_NIOS2_IMM6,
++ 0,
++ 2,
++ 6,
++ FALSE,
++ 6,
++ complain_overflow_bitfield,
++ bfd_elf_generic_reloc,
++ "R_NIOS2_IMM6",
++ FALSE,
++ 0x00000fc0,
++ 0x00000fc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_IMM8,
++ 0,
++ 2,
++ 8,
++ FALSE,
++ 6,
++ complain_overflow_bitfield,
++ bfd_elf_generic_reloc,
++ "R_NIOS2_IMM8",
++ FALSE,
++ 0x00003fc0,
++ 0x00003fc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_HI16,
++ 0,
++ 2,
++ 32,
++ FALSE,
++ 6,
++ complain_overflow_dont,
++ nios2_elf32_hi16_relocate,
++ "R_NIOS2_HI16",
++ FALSE,
++ 0x003fffc0,
++ 0x003fffc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_LO16,
++ 0,
++ 2,
++ 32,
++ FALSE,
++ 6,
++ complain_overflow_dont,
++ nios2_elf32_lo16_relocate,
++ "R_NIOS2_LO16",
++ FALSE,
++ 0x003fffc0,
++ 0x003fffc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_HIADJ16,
++ 0,
++ 2,
++ 32,
++ FALSE,
++ 6,
++ complain_overflow_dont,
++ nios2_elf32_hiadj16_relocate,
++ "R_NIOS2_HIADJ16",
++ FALSE,
++ 0x003fffc0,
++ 0x003fffc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_BFD_RELOC_32,
++ 0,
++ 2, /* long */
++ 32,
++ FALSE,
++ 0,
++ complain_overflow_dont,
++ bfd_elf_generic_reloc,
++ "R_NIOS2_BFD_RELOC32",
++ FALSE,
++ 0xffffffff,
++ 0xffffffff,
++ FALSE),
++
++ HOWTO (R_NIOS2_BFD_RELOC_16,
++ 0,
++ 1, /* short */
++ 16,
++ FALSE,
++ 0,
++ complain_overflow_bitfield,
++ bfd_elf_generic_reloc,
++ "R_NIOS2_BFD_RELOC16",
++ FALSE,
++ 0x0000ffff,
++ 0x0000ffff,
++ FALSE),
++
++ HOWTO (R_NIOS2_BFD_RELOC_8,
++ 0,
++ 0, /* byte */
++ 8,
++ FALSE,
++ 0,
++ complain_overflow_bitfield,
++ bfd_elf_generic_reloc,
++ "R_NIOS2_BFD_RELOC8",
++ FALSE,
++ 0x000000ff,
++ 0x000000ff,
++ FALSE),
++
++ HOWTO (R_NIOS2_GPREL,
++ 0,
++ 2,
++ 32,
++ FALSE,
++ 6,
++ complain_overflow_dont,
++ nios2_elf32_gprel_relocate,
++ "R_NIOS2_GPREL",
++ FALSE,
++ 0x003fffc0,
++ 0x003fffc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_GNU_VTINHERIT,
++ 0,
++ 2, /* short */
++ 0,
++ FALSE,
++ 0,
++ complain_overflow_dont,
++ NULL,
++ "R_NIOS2_GNU_VTINHERIT",
++ FALSE,
++ 0,
++ 0,
++ FALSE),
++
++ HOWTO (R_NIOS2_GNU_VTENTRY,
++ 0,
++ 2, /* byte */
++ 0,
++ FALSE,
++ 0,
++ complain_overflow_dont,
++ _bfd_elf_rel_vtable_reloc_fn,
++ "R_NIOS2_GNU_VTENTRY",
++ FALSE,
++ 0,
++ 0,
++ FALSE),
++
++ HOWTO (R_NIOS2_UJMP,
++ 0,
++ 2,
++ 32,
++ FALSE,
++ 6,
++ complain_overflow_dont,
++ nios2_elf32_ujmp_relocate,
++ "R_NIOS2_UJMP",
++ FALSE,
++ 0x003fffc0,
++ 0x003fffc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_CJMP,
++ 0,
++ 2,
++ 32,
++ FALSE,
++ 6,
++ complain_overflow_dont,
++ nios2_elf32_cjmp_relocate,
++ "R_NIOS2_CJMP",
++ FALSE,
++ 0x003fffc0,
++ 0x003fffc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_CALLR,
++ 0,
++ 2,
++ 32,
++ FALSE,
++ 6,
++ complain_overflow_dont,
++ nios2_elf32_callr_relocate,
++ "R_NIOS2_CALLR",
++ FALSE,
++ 0x003fffc0,
++ 0x003fffc0,
++ FALSE),
++
++ HOWTO (R_NIOS2_ALIGN,
++ 0,
++ 2,
++ 0,
++ FALSE,
++ 0,
++ complain_overflow_dont,
++ nios2_elf32_ignore_reloc,
++ "R_NIOS2_ALIGN",
++ FALSE,
++ 0,
++ 0,
++ TRUE),
++
++/* add other relocations here */
++};
++
++static unsigned char elf_code_to_howto_index[R_NIOS2_ILLEGAL + 1];
++
++static reloc_howto_type *
++lookup_howto (unsigned int rtype)
++{
++ static int initialized = 0;
++ int i;
++ int howto_tbl_size = (int) (sizeof (elf_nios2_howto_table_rel)
++ / sizeof (elf_nios2_howto_table_rel[0]));
++
++ if (!initialized)
++ {
++ initialized = 1;
++ memset (elf_code_to_howto_index, 0xff,
++ sizeof (elf_code_to_howto_index));
++ for (i = 0; i < howto_tbl_size; i++)
++ elf_code_to_howto_index[elf_nios2_howto_table_rel[i].type] = i;
++ }
++
++ BFD_ASSERT (rtype <= R_NIOS2_ILLEGAL);
++ i = elf_code_to_howto_index[rtype];
++ if (i >= howto_tbl_size)
++ return 0;
++ return elf_nios2_howto_table_rel + i;
++}
++
++/*
++ map for converting BFD reloc types to New Jersey
++ reloc types
++ */
++struct elf_reloc_map
++{
++ bfd_reloc_code_real_type bfd_val;
++ enum elf_nios2_reloc_type elf_val;
++};
++
++static const struct elf_reloc_map nios2_reloc_map[] = {
++ {BFD_RELOC_NIOS2_S16, R_NIOS2_S16},
++ {BFD_RELOC_NIOS2_U16, R_NIOS2_U16},
++ {BFD_RELOC_16_PCREL, R_NIOS2_PCREL16},
++ {BFD_RELOC_NIOS2_CALL26, R_NIOS2_CALL26},
++ {BFD_RELOC_NIOS2_IMM5, R_NIOS2_IMM5},
++ {BFD_RELOC_NIOS2_CACHE_OPX, R_NIOS2_CACHE_OPX},
++ {BFD_RELOC_NIOS2_IMM6, R_NIOS2_IMM6},
++ {BFD_RELOC_NIOS2_IMM8, R_NIOS2_IMM8},
++ {BFD_RELOC_NIOS2_HI16, R_NIOS2_HI16},
++ {BFD_RELOC_NIOS2_LO16, R_NIOS2_LO16},
++ {BFD_RELOC_NIOS2_HIADJ16, R_NIOS2_HIADJ16},
++ {BFD_RELOC_32, R_NIOS2_BFD_RELOC_32},
++ {BFD_RELOC_16, R_NIOS2_BFD_RELOC_16},
++ {BFD_RELOC_8, R_NIOS2_BFD_RELOC_8},
++ {BFD_RELOC_NIOS2_GPREL, R_NIOS2_GPREL},
++ {BFD_RELOC_VTABLE_INHERIT, R_NIOS2_GNU_VTINHERIT},
++ {BFD_RELOC_VTABLE_ENTRY, R_NIOS2_GNU_VTENTRY},
++ {BFD_RELOC_NIOS2_UJMP, R_NIOS2_UJMP},
++ {BFD_RELOC_NIOS2_CJMP, R_NIOS2_CJMP},
++ {BFD_RELOC_NIOS2_CALLR, R_NIOS2_CALLR},
++ {BFD_RELOC_NIOS2_ALIGN, R_NIOS2_ALIGN},
++};
++
++/* Given a BFD reloc type, return a howto structure. */
++
++static reloc_howto_type *
++nios2_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
++ bfd_reloc_code_real_type code)
++{
++ int i;
++ for (i = 0;
++ i < (int) (sizeof (nios2_reloc_map) / sizeof (struct elf_reloc_map));
++ ++i)
++ {
++ if (nios2_reloc_map[i].bfd_val == code)
++ return &elf_nios2_howto_table_rel[(int) nios2_reloc_map[i].elf_val];
++ }
++
++ return NULL;
++}
++
++/* Helper function for nios2_elf32_info_to_howto */
++
++static reloc_howto_type *
++nios2_elf32_rtype_to_howto (unsigned int r_type,
++ bfd_boolean rela_p ATTRIBUTE_UNUSED)
++{
++ BFD_ASSERT (r_type < R_NIOS2_ILLEGAL);
++ return &elf_nios2_howto_table_rel[r_type];
++}
++
++/* Given a ELF32 relocation, fill in a arelent structure */
++
++static void
++nios2_elf32_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * cache_ptr,
++ Elf_Internal_Rela * dst)
++{
++ unsigned int r_type;
++
++ r_type = ELF32_R_TYPE (dst->r_info);
++ cache_ptr->howto = nios2_elf32_rtype_to_howto (r_type, FALSE);
++
++ // FIXME - do we need to do anything else here???
++}
++
++/* The assembler has output long jmp/call sequences for all calls
++ * and pc-relative branches that it cannot guarantee are within
++ * range, so the linker must attempt to "relax" these sequences to
++ * short branches and calls if it can. We avoid having to re-relax by
++ * replacing redundant instructions with nops instead of deleting them.
++ *
++ *
++ **/
++static bfd_boolean
++nios2_elf32_relax_section (bfd * abfd,
++ asection * sec,
++ struct bfd_link_info *link_info, bfd_boolean * again)
++{
++ Elf_Internal_Shdr *symtab_hdr;
++ Elf_Internal_Rela *internal_relocs;
++ Elf_Internal_Rela *irel, *irelend;
++ bfd_byte *contents = NULL;
++ Elf_Internal_Sym *isymbuf = NULL;
++
++#define OP_MATCH_NOP 0x0001883a
++
++ /* Assume nothing changes. */
++ *again = FALSE;
++
++ /* We don't have to do anything for a relocatable link, if
++ this section does not have relocs, or if this is not a
++ code section. */
++ if (link_info->relocatable
++ || (sec->flags & SEC_RELOC) == 0
++ || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
++ return TRUE;
++
++ /* If this is the first time we have been called for this section,
++ initialize the cooked size. */
++ if (sec->_cooked_size == 0)
++ sec->_cooked_size = sec->_raw_size;
++
++ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
++
++ /* Get a copy of the native relocations. */
++ internal_relocs = (_bfd_elf_link_read_relocs
++ (abfd, sec, (void *) NULL, (Elf_Internal_Rela *) NULL,
++ link_info->keep_memory));
++ if (internal_relocs == NULL)
++ goto error_return;
++
++ /* Walk through them looking for relaxing opportunities. */
++ irelend = internal_relocs + sec->reloc_count;
++ for (irel = internal_relocs; irel < irelend; irel++)
++ {
++ bfd_vma symval;
++
++ /* If this isn't something that can be relaxed, then ignore
++ this reloc. */
++ if (ELF32_R_TYPE (irel->r_info) != (int) R_NIOS2_UJMP
++ && ELF32_R_TYPE (irel->r_info) != (int) R_NIOS2_CJMP
++ && ELF32_R_TYPE (irel->r_info) != (int) R_NIOS2_CALLR)
++ {
++ continue;
++ }
++
++ /* Get the section contents if we haven't done so already. */
++ if (contents == NULL)
++ {
++ /* Get cached copy if it exists. */
++ if (elf_section_data (sec)->this_hdr.contents != NULL)
++ contents = elf_section_data (sec)->this_hdr.contents;
++ else
++ {
++ /* Go get them off disk. */
++ contents = (bfd_byte *) bfd_malloc (sec->_raw_size);
++ if (contents == NULL)
++ goto error_return;
++
++ if (!bfd_get_section_contents (abfd, sec, contents,
++ (file_ptr) 0, sec->_raw_size))
++ goto error_return;
++ }
++ }
++
++ /* Read this BFD's local symbols if we haven't done so already. */
++ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
++ {
++ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
++ if (isymbuf == NULL)
++ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
++ symtab_hdr->sh_info, 0,
++ NULL, NULL, NULL);
++ if (isymbuf == NULL)
++ goto error_return;
++ }
++
++ /* Get the value of the symbol referred to by the reloc. */
++ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
++ {
++ /* A local symbol. */
++ Elf_Internal_Sym *isym;
++ asection *sym_sec;
++
++ isym = isymbuf + ELF32_R_SYM (irel->r_info);
++ if (isym->st_shndx == SHN_UNDEF)
++ sym_sec = bfd_und_section_ptr;
++ else if (isym->st_shndx == SHN_ABS)
++ sym_sec = bfd_abs_section_ptr;
++ else if (isym->st_shndx == SHN_COMMON)
++ sym_sec = bfd_com_section_ptr;
++ else
++ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
++ symval = (isym->st_value
++ + sym_sec->output_section->vma + sym_sec->output_offset);
++ }
++ else
++ {
++ unsigned long indx;
++ struct elf_link_hash_entry *h;
++
++ /* An external symbol. */
++ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
++ h = elf_sym_hashes (abfd)[indx];
++ BFD_ASSERT (h != NULL);
++ if (h->root.type != bfd_link_hash_defined
++ && h->root.type != bfd_link_hash_defweak)
++ {
++ /* This appears to be a reference to an undefined
++ symbol. Just ignore it--it will be caught by the
++ regular reloc processing. */
++ continue;
++ }
++
++ symval = (h->root.u.def.value
++ + h->root.u.def.section->output_section->vma
++ + h->root.u.def.section->output_offset);
++ }
++
++ /* For simplicity of coding, we are going to modify the section
++ contents, the section relocs, and the BFD symbol table. We
++ must tell the rest of the code not to free up this
++ information. It would be possible to instead create a table
++ of changes which have to be made, as is done in coff-mips.c;
++ that would be more work, but would require less memory when
++ the linker is run. */
++
++ /* try to turn :
++ * movhi at, %hi(symbol)
++ * movui at, %lo(symbol)
++ * callr at
++ * into:
++ * call symbol
++ */
++ if (ELF32_R_TYPE (irel->r_info) == (int) R_NIOS2_CALLR)
++ {
++ bfd_vma targ_addr = symval + irel->r_addend;
++ bfd_vma curr_addr = (sec->output_section->vma + sec->output_offset);
++ bfd_vma targ_page, curr_page;
++ targ_page = targ_addr & 0xf0000000;
++ curr_page = curr_addr & 0xf0000000;
++
++ if (targ_page == curr_page)
++ {
++ /* change the opcode to a call */
++ bfd_put_32 (abfd, OP_MATCH_CALL, contents + irel->r_offset);
++ /* Note that we've changed the relocs, section contents, etc. */
++ elf_section_data (sec)->relocs = internal_relocs;
++ elf_section_data (sec)->this_hdr.contents = contents;
++ symtab_hdr->contents = (unsigned char *) isymbuf;
++
++ /* Fix the relocation's type. */
++ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
++ R_NIOS2_CALL26);
++
++ /* replace next two instructions with nops */
++ bfd_put_32 (abfd, OP_MATCH_NOP, contents + irel->r_offset + 4);
++ bfd_put_32 (abfd, OP_MATCH_NOP, contents + irel->r_offset + 8);
++ }
++ }
++
++ /* try to turn :
++ * movhi at, %hi(symbol)
++ * movui at, %lo(symbol)
++ * jmp at
++ * into:
++ * br symbol
++ */
++ if (ELF32_R_TYPE (irel->r_info) == (int) R_NIOS2_UJMP)
++ {
++ bfd_vma pcrel_offset;
++ Elf_Internal_Rela *irelalign = NULL;
++ Elf_Internal_Rela *irela = elf_section_data (sec)->relocs;
++ Elf_Internal_Rela *irelend = irel + sec->reloc_count;
++
++ for (; irela < irelend; irela++)
++ {
++ if (ELF32_R_TYPE (irela->r_info) == (int) R_NIOS2_ALIGN
++ && irela->r_offset > irel->r_offset + 4
++ && 8 < (1 << irela->r_addend))
++ {
++ irelalign = irela;
++ break;
++ }
++ }
++
++ /* calculate the pcrelative offset from current location */
++ pcrel_offset = symval;
++ pcrel_offset -= (sec->output_section->vma + sec->output_offset);
++ pcrel_offset += irel->r_addend;
++
++ /* we need to compute the pcrel_offset from the next instruction */
++ pcrel_offset -= (irel->r_offset + 4);
++
++ /* does this value fit in 16 bits */
++ if ((irelalign == NULL && (long) pcrel_offset <= 0x8004
++ && (long) pcrel_offset >= -0x8000) || (irelalign != NULL
++ && (long) pcrel_offset
++ <= 0x7ffc
++ && (long) pcrel_offset
++ >= -0x8000))
++ {
++ /* change the opcode to an unconditional branch */
++ bfd_put_32 (abfd, OP_MATCH_BR, contents + irel->r_offset);
++ /* Note that we've changed the relocs, section contents, etc. */
++ elf_section_data (sec)->relocs = internal_relocs;
++ elf_section_data (sec)->this_hdr.contents = contents;
++ symtab_hdr->contents = (unsigned char *) isymbuf;
++
++ /* Fix the relocation's type. */
++ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
++ R_NIOS2_PCREL16);
++
++ /* replace next two instructions with nops */
++ bfd_put_32 (abfd, OP_MATCH_NOP, contents + irel->r_offset + 4);
++ bfd_put_32 (abfd, OP_MATCH_NOP, contents + irel->r_offset + 8);
++ }
++ }
++
++ /* try to turn :
++ * b{cond} a, b skip
++ * movhi at, %hi(symbol)
++ * movui at, %lo(symbol)
++ * jmp at
++ * skip:
++ * ...
++ * into:
++ * br{opp_cond} a, b, symbol
++ */
++ if (ELF32_R_TYPE (irel->r_info) == (int) R_NIOS2_CJMP)
++ {
++ bfd_vma pcrel_offset;
++ Elf_Internal_Rela *irelalign = NULL;
++ Elf_Internal_Rela *irela = elf_section_data (sec)->relocs;
++ Elf_Internal_Rela *irelend = irel + sec->reloc_count;
++
++ for (; irela < irelend; irela++)
++ {
++ if (ELF32_R_TYPE (irela->r_info) == (int) R_NIOS2_ALIGN
++ && irela->r_offset > irel->r_offset + 4
++ && 8 < (1 << irela->r_addend))
++ {
++ irelalign = irela;
++ break;
++ }
++ }
++
++ /* calculate the pcrelative offset from current location */
++ pcrel_offset = symval;
++ pcrel_offset -= (sec->output_section->vma + sec->output_offset);
++ pcrel_offset += irel->r_addend;
++
++ /* we need to compute the pcrel_offset from this instruction
++ * ie the movhi */
++ pcrel_offset -= (irel->r_offset);
++
++ /* does this value fit in 16 bits */
++ if ((irelalign == NULL && (long) pcrel_offset <= 0x8008
++ && (long) pcrel_offset >= -0x8000) || (irelalign != NULL
++ && (long) pcrel_offset
++ <= 0x7ffc
++ && (long) pcrel_offset
++ >= -0x8000))
++ {
++ unsigned long opcode, op_a, op_b;
++ /* get the conditional branch opcode */
++ opcode = bfd_get_32 (abfd, contents + irel->r_offset - 4);
++ /* reverse the condition */
++ switch (opcode & OP_MASK_OP)
++ {
++ case OP_MATCH_BEQ:
++ opcode = (opcode & ~OP_MASK_OP) | OP_MATCH_BNE;
++ break;
++ case OP_MATCH_BNE:
++ opcode = (opcode & ~OP_MASK_OP) | OP_MATCH_BEQ;
++ break;
++ case OP_MATCH_BGE:
++ case OP_MATCH_BGEU:
++ case OP_MATCH_BLT:
++ case OP_MATCH_BLTU:
++ /* swap the operands */
++ op_a = (opcode & OP_MASK_RRT) << 5;
++ op_b = (opcode & OP_MASK_RRS) >> 5;
++ opcode =
++ (opcode & ~(OP_MASK_RRS | OP_MASK_RRT)) | op_a | op_b;
++ break;
++ default:
++ fprintf (stderr,
++ "relaxation error - expecting conditional branch, aborting\n");
++ abort ();
++ break;
++ }
++
++ /* we must set the branch target to zero so that the skip over the jmp doesn't get
++ * added to the jmp */
++ opcode = opcode & (~OP_MASK_IMM16);
++
++ /* change the opcode to the reversed conditional branch */
++ bfd_put_32 (abfd, opcode, contents + irel->r_offset - 4);
++ /* Note that we've changed the relocs, section contents, etc. */
++ elf_section_data (sec)->relocs = internal_relocs;
++ elf_section_data (sec)->this_hdr.contents = contents;
++ symtab_hdr->contents = (unsigned char *) isymbuf;
++
++ /* Fix the relocation's type. */
++ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
++ R_NIOS2_PCREL16);
++
++ /* this relocation's offset has also been reduced by 4 bytes */
++ irel->r_offset -= 4;
++
++ /* replace next two instructions with nops */
++ bfd_put_32 (abfd, OP_MATCH_NOP, contents + irel->r_offset + 4);
++ bfd_put_32 (abfd, OP_MATCH_NOP, contents + irel->r_offset + 8);
++ bfd_put_32 (abfd, OP_MATCH_NOP, contents + irel->r_offset + 12);
++ }
++ }
++
++ /* otherwise, leave alone */
++ }
++
++ if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
++ {
++ if (!link_info->keep_memory)
++ free (isymbuf);
++ else
++ {
++ /* Cache the symbols for elf_link_input_bfd. */
++ symtab_hdr->contents = (unsigned char *) isymbuf;
++ }
++ }
++
++ if (contents != NULL
++ && elf_section_data (sec)->this_hdr.contents != contents)
++ {
++ if (!link_info->keep_memory)
++ free (contents);
++ else
++ {
++ /* Cache the section contents for elf_link_input_bfd. */
++ elf_section_data (sec)->this_hdr.contents = contents;
++ }
++ }
++
++ if (internal_relocs != NULL
++ && elf_section_data (sec)->relocs != internal_relocs)
++ free (internal_relocs);
++
++
++ return TRUE;
++
++error_return:
++ if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
++ free (isymbuf);
++ if (contents != NULL
++ && elf_section_data (sec)->this_hdr.contents != contents)
++ free (contents);
++ if (internal_relocs != NULL
++ && elf_section_data (sec)->relocs != internal_relocs)
++ free (internal_relocs);
++
++ return FALSE;
++}
++
++/* Delete some bytes from a section while relaxing.
++ * Copied from mn10200 port */
++
++static bfd_boolean
++nios2_elf32_relax_delete_bytes (bfd * abfd,
++ asection * sec, bfd_vma addr, int count)
++{
++ Elf_Internal_Shdr *symtab_hdr;
++ unsigned int sec_shndx;
++ bfd_byte *contents;
++ Elf_Internal_Rela *irel, *irelend;
++ Elf_Internal_Rela *irelalign;
++ bfd_vma toaddr;
++ Elf_Internal_Sym *isym;
++ Elf_Internal_Sym *isymend;
++ struct elf_link_hash_entry **sym_hashes;
++ struct elf_link_hash_entry **end_hashes;
++ unsigned int symcount;
++ asection *asec;
++
++ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
++
++ contents = elf_section_data (sec)->this_hdr.contents;
++
++ /* The deletion must stop at the next ALIGN reloc for an aligment
++ power larger than the number of bytes we are deleting. */
++
++ irelalign = NULL;
++ /* +1 because we need to readjust symbols at end of section */
++ toaddr = sec->_cooked_size + 1;
++
++ irel = elf_section_data (sec)->relocs;
++ irelend = irel + sec->reloc_count;
++
++ for (; irel < irelend; irel++)
++ {
++ if (ELF32_R_TYPE (irel->r_info) == (int) R_NIOS2_ALIGN
++ && irel->r_offset > addr && count < (1 << irel->r_addend))
++ {
++ irelalign = irel;
++ /* +1 because we need to readjust symbols at end of section */
++ toaddr = irel->r_offset + 1;
++ break;
++ }
++ }
++
++
++ /* Actually delete the bytes. */
++ memmove (contents + addr, contents + addr + count,
++ (size_t) ((toaddr - 1) - addr - count));
++
++ if (irelalign == NULL)
++ sec->_cooked_size -= count;
++ else
++ {
++ int i;
++
++#define NOP_OPCODE (0x0001883a)
++
++ BFD_ASSERT ((count & 3) == 0);
++ for (i = 0; i < count; i += 4)
++ bfd_put_32 (abfd, (bfd_vma) NOP_OPCODE,
++ contents + (toaddr - 1) - count + i);
++ }
++
++ /* get the symbol table */
++ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
++ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
++
++ /* Adjust all the reloc offsets in this section. */
++ for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
++ {
++ /* Get the new reloc address. */
++ if ((irel->r_offset > addr && irel->r_offset < toaddr))
++ irel->r_offset -= count;
++ }
++
++ /* Adjust relocations against targets in this section whose positions
++ * have moved as a result of the relaxation */
++
++ for (asec = abfd->sections; asec; asec = asec->next)
++ {
++ irelend = elf_section_data (asec)->relocs + asec->reloc_count;
++ for (irel = elf_section_data (asec)->relocs; irel < irelend; irel++)
++ {
++ Elf_Internal_Sym *sym;
++ /* if the symbol which this reloc is against doesn't change
++ * we need to change the reloc addend */
++
++ sym = isym + ELF32_R_SYM (irel->r_info);
++ if (sym->st_shndx == sec_shndx
++ && !(sym->st_value > addr && sym->st_value < toaddr)
++ && sym->st_value + irel->r_addend > addr
++ && sym->st_value + irel->r_addend < toaddr)
++ {
++ irel->r_addend -= count;
++ }
++
++ }
++ }
++
++ /* Adjust the local symbols defined in this section. */
++ for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
++ {
++ if (isym->st_shndx == sec_shndx
++ && isym->st_value > addr && isym->st_value < toaddr)
++ isym->st_value -= count;
++
++
++ }
++
++ /* Now adjust the global symbols defined in this section. */
++ symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
++ - symtab_hdr->sh_info);
++ sym_hashes = elf_sym_hashes (abfd);
++ end_hashes = sym_hashes + symcount;
++ for (; sym_hashes < end_hashes; sym_hashes++)
++ {
++ struct elf_link_hash_entry *sym_hash = *sym_hashes;
++ if ((sym_hash->root.type == bfd_link_hash_defined
++ || sym_hash->root.type == bfd_link_hash_defweak)
++ && sym_hash->root.u.def.section == sec
++ && sym_hash->root.u.def.value > addr
++ && sym_hash->root.u.def.value < toaddr)
++ {
++ sym_hash->root.u.def.value -= count;
++ }
++ }
++
++ return TRUE;
++}
++
++struct bfd_link_info *nios2_link_info = NULL;
++
++void
++_bfd_set_link_info (info)
++ struct bfd_link_info *info;
++{
++ nios2_link_info = info;
++}
++
++bfd_boolean linker_force_make_executable = FALSE;
++
++void
++_bfd_set_force_make_executable (force)
++ bfd_boolean force;
++{
++ linker_force_make_executable = force;
++}
++
++/* Set the GP value for OUTPUT_BFD. Returns FALSE if this is a
++ dangerous relocation. */
++
++static bfd_boolean
++nios2_elf_assign_gp (bfd *output_bfd, bfd_vma *pgp, struct bfd_link_info *info)
++{
++
++ bfd_boolean gp_found;
++ struct bfd_hash_entry *h;
++ struct bfd_link_hash_entry *lh;
++
++ /* If we've already figured out what GP will be, just return it. */
++ *pgp = _bfd_get_gp_value (output_bfd);
++ if (*pgp)
++ return TRUE;
++
++ h = bfd_hash_lookup (&info->hash->table, "_gp", FALSE, FALSE);
++ lh = (struct bfd_link_hash_entry *) h;
++lookup:
++ if (lh)
++ {
++ switch (lh->type)
++ {
++ case bfd_link_hash_undefined:
++ case bfd_link_hash_undefweak:
++ case bfd_link_hash_common:
++ gp_found = FALSE;
++ break;
++ case bfd_link_hash_defined:
++ case bfd_link_hash_defweak:
++ gp_found = TRUE;
++ *pgp = lh->u.def.value;
++ break;
++ case bfd_link_hash_indirect:
++ case bfd_link_hash_warning:
++ lh = lh->u.i.link;
++ /* @@FIXME ignoring warning for now */
++ goto lookup;
++ case bfd_link_hash_new:
++ default:
++ abort ();
++ }
++ }
++ else
++ gp_found = FALSE;
++
++ if (!gp_found)
++ {
++ /* Only get the error once. */
++ *pgp = 4;
++ _bfd_set_gp_value (output_bfd, *pgp);
++ return FALSE;
++ }
++
++ _bfd_set_gp_value (output_bfd, *pgp);
++
++ return TRUE;
++}
++
++/* We have to figure out the gp value, so that we can adjust the
++ symbol value correctly. We look up the symbol _gp in the output
++ BFD. If we can't find it, we're stuck. We cache it in the ELF
++ target data. We don't need to adjust the symbol value for an
++ external symbol if we are producing relocatable output. */
++
++static bfd_reloc_status_type
++nios2_elf_final_gp (bfd *output_bfd, asymbol *symbol, bfd_boolean relocatable,
++ char **error_message, bfd_vma *pgp, struct bfd_link_info *info)
++{
++ if (bfd_is_und_section (symbol->section) && !relocatable)
++ {
++ *pgp = 0;
++ return bfd_reloc_undefined;
++ }
++
++ *pgp = _bfd_get_gp_value (output_bfd);
++ if (*pgp == 0 && (!relocatable || (symbol->flags & BSF_SECTION_SYM) != 0))
++ {
++ /* if this is called without link_info, then
++ we cannot be doing a final link */
++ if (info == NULL)
++ relocatable = TRUE;
++
++ if (relocatable)
++ {
++ /* Make up a value. */
++ *pgp = symbol->section->output_section->vma + 0x4000;
++ _bfd_set_gp_value (output_bfd, *pgp);
++ }
++ else if (!nios2_elf_assign_gp (output_bfd, pgp, info))
++ {
++ *error_message =
++ (char *)
++ _("global pointer relative relocation when _gp not defined");
++ return bfd_reloc_dangerous;
++ }
++ }
++
++ return bfd_reloc_ok;
++}
++
++
++/* Relocations that require special handling */
++
++/* This is for relocations used only when relaxing to ensure
++ * changes in size of section don't screw up .align */
++static bfd_reloc_status_type
++nios2_elf32_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
++ asymbol *symbol ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED,
++ asection *input_section, bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
++{
++ if (output_bfd != NULL)
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++}
++
++static bfd_reloc_status_type
++nios2_elf32_hi16_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol, void *data,
++ asection *input_section, bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
++{
++ /* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++ return nios2_elf32_do_hi16_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ (symbol->value
++ + symbol->section->output_section->vma
++ + symbol->section->output_offset),
++ reloc_entry->addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_lo16_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
++ void *data, asection *input_section, bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
++{
++/* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++ return nios2_elf32_do_lo16_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ (symbol->value
++ + symbol->section->output_section->vma
++ + symbol->section->output_offset),
++ reloc_entry->addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_hiadj16_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
++ void *data, asection *input_section, bfd *output_bfd,
++ char **error_message ATTRIBUTE_UNUSED)
++{
++/* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++ return nios2_elf32_do_hiadj16_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ (symbol->value
++ +
++ symbol->section->output_section->
++ vma +
++ symbol->section->output_offset),
++ reloc_entry->addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_pcrel16_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
++ void *data, asection *input_section, bfd *output_bfd,
++ char **error_message ATTRIBUTE_UNUSED)
++{
++/* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++ return nios2_elf32_do_pcrel16_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ (symbol->value
++ +
++ symbol->section->output_section->
++ vma +
++ symbol->section->output_offset),
++ reloc_entry->addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_call26_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
++ void *data, asection *input_section, bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
++{
++/* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++ return nios2_elf32_do_call26_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ (symbol->value
++ +
++ symbol->section->output_section->
++ vma +
++ symbol->section->output_offset),
++ reloc_entry->addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_gprel_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
++ void *data, asection *input_section, bfd *output_bfd, char **msg)
++{
++ bfd_vma relocation;
++ bfd_vma gp;
++ bfd_reloc_status_type r;
++
++
++/* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++ relocation = symbol->value
++ + symbol->section->output_section->vma + symbol->section->output_offset;
++
++ if ((r =
++ nios2_elf_final_gp (abfd, symbol, FALSE, msg, &gp,
++ nios2_link_info)) == bfd_reloc_ok)
++ {
++ relocation = relocation + reloc_entry->addend - gp;
++ reloc_entry->addend = 0;
++ if ((signed) relocation < -32768 || (signed) relocation > 32767)
++ {
++ *msg = _("global pointer relative address out of range");
++ r = bfd_reloc_outofrange;
++ }
++ else
++ {
++ r = nios2_elf32_do_gprel_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ relocation, reloc_entry->addend);
++ }
++ }
++
++ return r;
++}
++
++static bfd_reloc_status_type
++nios2_elf32_ujmp_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
++ void *data, asection *input_section, bfd *output_bfd, char **msg ATTRIBUTE_UNUSED)
++{
++ /* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++ return nios2_elf32_do_ujmp_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ (symbol->value
++ + symbol->section->output_section->vma
++ + symbol->section->output_offset),
++ reloc_entry->addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_cjmp_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
++ void *data, asection *input_section, bfd *output_bfd, char **msg ATTRIBUTE_UNUSED)
++{
++ /* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++ return nios2_elf32_do_cjmp_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ (symbol->value
++ + symbol->section->output_section->vma
++ + symbol->section->output_offset),
++ reloc_entry->addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_callr_relocate (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
++ void *data, asection *input_section, bfd *output_bfd, char **msg ATTRIBUTE_UNUSED)
++{
++ /* This part is from bfd_elf_generic_reloc. */
++ if (output_bfd != (bfd *) NULL
++ && (symbol->flags & BSF_SECTION_SYM) == 0
++ && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
++ {
++ reloc_entry->address += input_section->output_offset;
++ return bfd_reloc_ok;
++ }
++
++ if (output_bfd != NULL)
++ /* FIXME: See bfd_perform_relocation. Is this right? */
++ return bfd_reloc_ok;
++
++
++ return nios2_elf32_do_callr_relocate (abfd, reloc_entry->howto,
++ input_section,
++ data, reloc_entry->address,
++ (symbol->value
++ +
++ symbol->section->output_section->
++ vma +
++ symbol->section->output_offset),
++ reloc_entry->addend);
++}
++
++/* Do the relocations which require special handling */
++
++static bfd_reloc_status_type
++nios2_elf32_do_hi16_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data,
++ bfd_vma offset, bfd_vma symbol_value, bfd_vma addend)
++{
++ symbol_value = symbol_value + addend;
++ addend = 0;
++ symbol_value = (symbol_value >> 16) & 0xffff;
++ return _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset, symbol_value, addend);
++}
++
++
++static bfd_reloc_status_type
++nios2_elf32_do_lo16_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data,
++ bfd_vma offset, bfd_vma symbol_value, bfd_vma addend)
++{
++ symbol_value = symbol_value + addend;
++ addend = 0;
++ symbol_value = symbol_value & 0xffff;
++ return _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset, symbol_value, addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_do_hiadj16_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data, bfd_vma offset,
++ bfd_vma symbol_value, bfd_vma addend)
++{
++ symbol_value = symbol_value + addend;
++ addend = 0;
++ symbol_value =
++ ((symbol_value >> 16) & 0xffff) + ((symbol_value >> 15) & 0x01);
++ return _bfd_final_link_relocate (howto, abfd, input_section, data, offset,
++ symbol_value, addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_do_pcrel16_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data,
++ bfd_vma offset, bfd_vma symbol_value, bfd_vma addend)
++{
++ // NIOS2 pc relative relocations are relative to the next 32-bit instruction so we need
++ // to subtract 4 before doing a final_link_relocate
++ symbol_value = symbol_value + addend - 4;
++ addend = 0;
++ return _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset, symbol_value, addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_do_call26_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data,
++ bfd_vma offset, bfd_vma symbol_value, bfd_vma addend)
++{
++ /* check that the relocation is in the same page as the current address */
++ if (((symbol_value + addend) & 0xf0000000)
++ != ((input_section->output_section->vma + offset) & 0xf0000000))
++ return bfd_reloc_overflow;
++
++ return _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset, symbol_value, addend);
++}
++
++
++static bfd_reloc_status_type
++nios2_elf32_do_gprel_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data,
++ bfd_vma offset, bfd_vma symbol_value, bfd_vma addend)
++{
++ // because we need the output_bfd, the special handling is done
++ // in nios2_elf32_relocate_section or in nios2_elf32_gprel_relocate
++ return _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset, symbol_value, addend);
++}
++
++static bfd_reloc_status_type
++nios2_elf32_do_ujmp_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data,
++ bfd_vma offset, bfd_vma symbol_value, bfd_vma addend)
++{
++ bfd_vma symbol_lo16, symbol_hi16;
++ bfd_reloc_status_type r;
++ symbol_value = symbol_value + addend;
++ addend = 0;
++ symbol_hi16 = (symbol_value >> 16) & 0xffff;
++ symbol_lo16 = symbol_value & 0xffff;
++
++ r = _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset, symbol_hi16, addend);
++
++ if (r == bfd_reloc_ok)
++ return _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset + 4, symbol_lo16, addend);
++
++ return r;
++}
++
++static bfd_reloc_status_type
++nios2_elf32_do_cjmp_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data,
++ bfd_vma offset, bfd_vma symbol_value, bfd_vma addend)
++{
++ bfd_vma symbol_lo16, symbol_hi16;
++ bfd_reloc_status_type r;
++ symbol_value = symbol_value + addend;
++ addend = 0;
++ symbol_hi16 = (symbol_value >> 16) & 0xffff;
++ symbol_lo16 = symbol_value & 0xffff;
++
++ r = _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset, symbol_hi16, addend);
++
++ if (r == bfd_reloc_ok)
++ return _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset + 4, symbol_lo16, addend);
++
++ return r;
++}
++
++static bfd_reloc_status_type
++nios2_elf32_do_callr_relocate (bfd *abfd, reloc_howto_type *howto,
++ asection *input_section ATTRIBUTE_UNUSED, bfd_byte *data,
++ bfd_vma offset, bfd_vma symbol_value, bfd_vma addend)
++{
++ bfd_vma symbol_lo16, symbol_hi16;
++ bfd_reloc_status_type r;
++ symbol_value = symbol_value + addend;
++ addend = 0;
++ symbol_hi16 = (symbol_value >> 16) & 0xffff;
++ symbol_lo16 = symbol_value & 0xffff;
++
++ r = _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset, symbol_hi16, addend);
++
++ if (r == bfd_reloc_ok)
++ return _bfd_final_link_relocate (howto, abfd, input_section,
++ data, offset + 4, symbol_lo16, addend);
++
++ return r;
++}
++
++/*
++ The function nios2_elf32_relocate_section is used by the linker
++ to perform relocations
++*/
++static bfd_boolean
++nios2_elf32_relocate_section (bfd * output_bfd,
++ struct bfd_link_info *info,
++ bfd * input_bfd,
++ asection * input_section,
++ bfd_byte * contents,
++ Elf_Internal_Rela * relocs,
++ Elf_Internal_Sym * local_syms,
++ asection ** local_sections)
++{
++ Elf_Internal_Shdr *symtab_hdr;
++ struct elf_link_hash_entry **sym_hashes;
++ Elf_Internal_Rela *rel;
++ Elf_Internal_Rela *relend;
++
++ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
++ sym_hashes = elf_sym_hashes (input_bfd);
++ relend = relocs + input_section->reloc_count;
++
++// size_t psymalloc = 0;
++// _bfd_generic_link_output_symbols(output_bfd, input_bfd, info, &psymalloc);
++ for (rel = relocs; rel < relend; rel++)
++ {
++ reloc_howto_type *howto;
++ unsigned long r_symndx;
++ Elf_Internal_Sym *sym;
++ asection *sec;
++ struct elf_link_hash_entry *h;
++ bfd_vma relocation;
++ bfd_vma gp;
++ bfd_vma reloc_address;
++ bfd_reloc_status_type r = bfd_reloc_ok;
++ const char *name = NULL;
++ int r_type;
++ const char *format;
++ char msgbuf[256];
++ const char* msg = (const char*) NULL;
++
++
++
++ r_type = ELF32_R_TYPE (rel->r_info);
++
++ r_symndx = ELF32_R_SYM (rel->r_info);
++
++ if (info->relocatable)
++ {
++ /* This is a relocatable link. We don't have to change
++ anything, unless the reloc is against a section symbol,
++ in which case we have to adjust according to where the
++ section symbol winds up in the output section. */
++ if (r_symndx < symtab_hdr->sh_info)
++ {
++ sym = local_syms + r_symndx;
++
++ if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
++ {
++ sec = local_sections[r_symndx];
++ rel->r_addend += sec->output_offset + sym->st_value;
++ }
++ }
++ continue;
++ }
++
++ /* This is a final link. */
++ howto = lookup_howto ((unsigned) ELF32_R_TYPE (rel->r_info));
++ h = NULL;
++ sym = NULL;
++ sec = NULL;
++
++ if (r_symndx < symtab_hdr->sh_info)
++ {
++ sym = local_syms + r_symndx;
++ sec = local_sections[r_symndx];
++
++ relocation = (sec->output_section->vma
++ + sec->output_offset + sym->st_value);
++
++ // this ensures that relocations against duplicated symbols
++ // in merged sections that have been removed are fixed up against
++ // the remaining symbol and not the one that has been removed
++ if ((sec->flags & SEC_MERGE)
++ && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
++ {
++ rel->r_addend =
++ _bfd_elf_rel_local_sym (output_bfd, sym, &sec, rel->r_addend);
++ rel->r_addend -= relocation;
++ rel->r_addend += sec->output_section->vma + sec->output_offset;
++ }
++
++ name = bfd_elf_string_from_elf_section
++ (input_bfd, symtab_hdr->sh_link, sym->st_name);
++
++ name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
++ }
++ else
++ {
++ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
++
++ while (h->root.type == bfd_link_hash_indirect
++ || h->root.type == bfd_link_hash_warning)
++ h = (struct elf_link_hash_entry *) h->root.u.i.link;
++
++ name = h->root.root.string;
++
++ if (h->root.type == bfd_link_hash_defined
++ || h->root.type == bfd_link_hash_defweak)
++ {
++ sec = h->root.u.def.section;
++
++ relocation = (h->root.u.def.value
++ + sec->output_section->vma + sec->output_offset);
++ }
++ else if (h->root.type == bfd_link_hash_undefweak)
++ {
++ relocation = 0;
++ }
++ else
++ {
++ if (!((*info->callbacks->undefined_symbol)
++ (info, h->root.root.string, input_bfd,
++ input_section, rel->r_offset, TRUE)))
++ return FALSE;
++ relocation = 0;
++ }
++ }
++
++ if (sec)
++ reloc_address = sec->output_section->vma + sec->output_offset + rel->r_offset;
++ else
++ reloc_address = 0;
++
++ if (howto != NULL)
++ {
++ switch (howto->type)
++ {
++ case R_NIOS2_HI16:
++ r =
++ nios2_elf32_do_hi16_relocate (input_bfd, howto, input_section,
++ contents, rel->r_offset,
++ relocation, rel->r_addend);
++ break;
++ case R_NIOS2_LO16:
++ r =
++ nios2_elf32_do_lo16_relocate (input_bfd, howto, input_section,
++ contents, rel->r_offset,
++ relocation, rel->r_addend);
++ break;
++ case R_NIOS2_HIADJ16:
++ r =
++ nios2_elf32_do_hiadj16_relocate (input_bfd, howto,
++ input_section, contents,
++ rel->r_offset, relocation,
++ rel->r_addend);
++ break;
++ case R_NIOS2_PCREL16:
++ r =
++ nios2_elf32_do_pcrel16_relocate (input_bfd, howto,
++ input_section, contents,
++ rel->r_offset, relocation,
++ rel->r_addend);
++ break;
++ case R_NIOS2_GPREL:
++ // turns an absolute address into a gp-relative address
++ if (!nios2_elf_assign_gp (output_bfd, &gp, info))
++ {
++ format = _("global pointer relative relocation at address 0x%08x when _gp not defined\n");
++ sprintf(msgbuf, format, reloc_address);
++ msg = msgbuf;
++ r = bfd_reloc_dangerous;
++ }
++ else
++ {
++ relocation = relocation + rel->r_addend - gp;
++ rel->r_addend = 0;
++ if ((signed) relocation < -32768
++ || (signed) relocation > 32767)
++ {
++ format = _("global pointer relative offset %d at address 0x%08x out of range -32678 to 32767\n");
++ sprintf(msgbuf, format, (signed)relocation, reloc_address);
++ msg = msgbuf;
++ r = bfd_reloc_outofrange;
++ }
++ else
++ {
++ r =
++ _bfd_final_link_relocate (howto, input_bfd,
++ input_section, contents,
++ rel->r_offset, relocation,
++ rel->r_addend);
++ }
++ }
++
++ break;
++ case R_NIOS2_UJMP:
++ r =
++ nios2_elf32_do_ujmp_relocate (input_bfd, howto, input_section,
++ contents, rel->r_offset,
++ relocation, rel->r_addend);
++ break;
++ case R_NIOS2_CJMP:
++ r =
++ nios2_elf32_do_cjmp_relocate (input_bfd, howto, input_section,
++ contents, rel->r_offset,
++ relocation, rel->r_addend);
++ break;
++ case R_NIOS2_CALLR:
++ r =
++ nios2_elf32_do_callr_relocate (input_bfd, howto,
++ input_section, contents,
++ rel->r_offset, relocation,
++ rel->r_addend);
++ break;
++ case R_NIOS2_CALL26:
++ r =
++ nios2_elf32_do_call26_relocate (input_bfd, howto,
++ input_section, contents,
++ rel->r_offset, relocation,
++ rel->r_addend);
++ break;
++ case R_NIOS2_ALIGN:
++ r = bfd_reloc_ok;
++ /* comment - for symmetry this would be
++ r = nios2_elf32_do_ignore_reloc (input_bfd, howto, input_section,
++ contents, rel->r_offset,
++ relocation, rel->r_addend);
++ but do_ignore_reloc would do no more than return bfd_reloc_ok */
++ break;
++ default:
++ r = _bfd_final_link_relocate (howto, input_bfd, input_section,
++ contents, rel->r_offset,
++ relocation, rel->r_addend);
++ break;
++ }
++ }
++ else
++ {
++ r = bfd_reloc_notsupported;
++ }
++
++ if (r != bfd_reloc_ok)
++ {
++ if (h != NULL)
++ name = h->root.root.string;
++ else
++ {
++ name = (bfd_elf_string_from_elf_section
++ (input_bfd, symtab_hdr->sh_link, sym->st_name));
++ if (name == NULL || *name == '\0')
++ name = bfd_section_name (input_bfd, sec);
++ }
++
++ switch (r)
++ {
++ case bfd_reloc_overflow:
++ r = info->callbacks->reloc_overflow
++ (info, name, howto->name, (bfd_vma) 0,
++ input_bfd, input_section, rel->r_offset);
++ break;
++
++ case bfd_reloc_undefined:
++ r = info->callbacks->undefined_symbol
++ (info, name, input_bfd, input_section, rel->r_offset, TRUE);
++ break;
++
++ case bfd_reloc_outofrange:
++ if (msg == NULL)
++ msg = _("relocation out of range");
++ break;
++
++ case bfd_reloc_notsupported:
++ if (msg == NULL)
++ msg = _("unsupported relocation");
++ break;
++
++ case bfd_reloc_dangerous:
++ if (msg == NULL)
++ msg = _("dangerous relocation");
++ break;
++
++ default:
++ if (msg == NULL)
++ msg = _("unknown error");
++ break;
++ }
++
++ if (msg)
++ {
++ r = info->callbacks->warning
++ (info, msg, name, input_bfd, input_section, rel->r_offset);
++ return linker_force_make_executable;
++ }
++ }
++ }
++ return TRUE;
++}
++
++
++
++/* Handle an NIOS2 specific section when reading an object file. This
++ is called when elfcode.h finds a section with an unknown type.
++ FIXME: We need to handle the SHF_NIOS2_GPREL flag */
++
++static bfd_boolean
++nios2_elf32_section_from_shdr (bfd *abfd,
++ Elf_Internal_Shdr *hdr, const char *name)
++{
++ asection *newsect;
++
++ /* NG - I'm keeping this code commented out at the moment
++ in case we add a .mdebug section */
++
++ /*
++ switch (hdr->sh_type)
++ {
++ case SHT_NIOS2_DEBUG:
++ if (strcmp (name, ".mdebug") != 0)
++ return FALSE;
++ break;
++ default:
++ return FALSE;
++ }
++ */
++
++ if (!_bfd_elf_make_section_from_shdr (abfd, hdr, name))
++ return FALSE;
++
++ newsect = hdr->bfd_section;
++
++ /* ditto */
++ /*
++ if (hdr->sh_type == SHT_NIOS2_DEBUG)
++ {
++ if (! bfd_set_section_flags (abfd, newsect,
++ (bfd_get_section_flags (abfd, newsect)
++ | SEC_DEBUGGING)))
++ return FALSE;
++ }
++ */
++ return TRUE;
++}
++
++/* Convert NIOS2 specific section flags to bfd internal section flags. */
++
++static bfd_boolean
++nios2_elf32_section_flags (flagword *flags, Elf_Internal_Shdr *hdr)
++{
++ if (hdr->sh_flags & SHF_NIOS2_GPREL)
++ *flags |= SEC_SMALL_DATA;
++
++ return TRUE;
++}
++
++/* Set the correct type for an NIOS2 ELF section. We do this by the
++ section name, which is a hack, but ought to work. */
++
++static bfd_boolean
++nios2_elf32_fake_sections (bfd *abfd ATTRIBUTE_UNUSED,
++ Elf_Internal_Shdr *hdr, asection *sec)
++{
++ register const char *name;
++
++ name = bfd_get_section_name (abfd, sec);
++
++ if (strcmp (name, ".mdebug") == 0)
++ {
++ /* we don't yet have an .mdebug section, but I'm leaving this here
++ in case we ever do
++ hdr->sh_type = SHT_NIOS2_DEBUG;
++
++ if ((abfd->flags & DYNAMIC) != 0 )
++ hdr->sh_entsize = 0;
++ else
++ hdr->sh_entsize = 1;
++ */
++ }
++ else if ((sec->flags & SEC_SMALL_DATA)
++ || strcmp (name, ".sdata") == 0
++ || strcmp (name, ".sbss") == 0
++ || strcmp (name, ".lit4") == 0 || strcmp (name, ".lit8") == 0)
++ hdr->sh_flags |= SHF_NIOS2_GPREL;
++
++ return TRUE;
++}
++
++/* Look through the relocs for a section during the first phase.
++ Since we don't do .gots or .plts, we just need to consider the
++ virtual table relocs for gc. */
++
++static bfd_boolean
++nios2_elf32_check_relocs (bfd *abfd, struct bfd_link_info *info,
++ asection *sec, const Elf_Internal_Rela *relocs)
++{
++ Elf_Internal_Shdr *symtab_hdr;
++ struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
++ const Elf_Internal_Rela *rel;
++ const Elf_Internal_Rela *rel_end;
++
++ if (info->relocatable)
++ return TRUE;
++
++ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
++ sym_hashes = elf_sym_hashes (abfd);
++ sym_hashes_end =
++ sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
++ if (!elf_bad_symtab (abfd))
++ sym_hashes_end -= symtab_hdr->sh_info;
++
++ rel_end = relocs + sec->reloc_count;
++ for (rel = relocs; rel < rel_end; rel++)
++ {
++ struct elf_link_hash_entry *h;
++ unsigned long r_symndx;
++
++ r_symndx = ELF32_R_SYM (rel->r_info);
++ if (r_symndx < symtab_hdr->sh_info)
++ h = NULL;
++ else
++ h = sym_hashes[r_symndx - symtab_hdr->sh_info];
++
++ switch (ELF32_R_TYPE (rel->r_info))
++ {
++ /* This relocation describes the C++ object vtable hierarchy.
++ Reconstruct it for later use during GC. */
++ case R_NIOS2_GNU_VTINHERIT:
++ if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
++ return FALSE;
++ break;
++
++ /* This relocation describes which C++ vtable entries are actually
++ used. Record for later use during GC. */
++ case R_NIOS2_GNU_VTENTRY:
++ if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
++ return FALSE;
++ break;
++ }
++ }
++
++ return TRUE;
++}
++
++
++/* Return the section that should be marked against GC for a given
++ relocation. */
++
++asection *
++nios2_elf32_gc_mark_hook (asection *sec,
++ struct bfd_link_info *info ATTRIBUTE_UNUSED,
++ Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
++ Elf_Internal_Sym *sym)
++{
++ if (h != NULL)
++ {
++ switch (ELF32_R_TYPE (rel->r_info))
++ {
++ case R_NIOS2_GNU_VTINHERIT:
++ case R_NIOS2_GNU_VTENTRY:
++ break;
++
++ default:
++ switch (h->root.type)
++ {
++ case bfd_link_hash_defined:
++ case bfd_link_hash_defweak:
++ return h->root.u.def.section;
++
++ case bfd_link_hash_common:
++ return h->root.u.c.p->section;
++
++ default:
++ break;
++ }
++ }
++ }
++ else
++ return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
++
++ return NULL;
++}
++
++/*
++ NG ??? I'm marking the sections as standalone ie. I'm linking for
++ standalone embedded applications, not for UNIX System V or any other
++ OS/ABI - this may need to change when we deal with embedded PIC or
++ dynamic linking
++*/
++
++static void
++nios2_elf32_post_process_headers (bfd *abfd,
++ struct bfd_link_info *link_info ATTRIBUTE_UNUSED)
++{
++ Elf_Internal_Ehdr *i_ehdrp; /* Elf file header, internal form */
++
++ i_ehdrp = elf_elfheader (abfd);
++ i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_STANDALONE;
++}
++
++#define ELF_ARCH bfd_arch_nios2
++#define ELF_MACHINE_CODE EM_ALTERA_NIOS2
++
++/* for now we just make this 1, as we have no MMU in New Jersey */
++
++#define ELF_MAXPAGESIZE 1
++
++/* relocation table lookup macros */
++
++#define bfd_elf32_bfd_reloc_type_lookup nios2_elf32_bfd_reloc_type_lookup
++
++/* JUMP_TABLE_LINK macros */
++
++#define bfd_elf32_bfd_relax_section nios2_elf32_relax_section
++
++/* elf_info_to_howto (using RELA relocations) */
++
++#define elf_info_to_howto nios2_elf32_info_to_howto
++
++/* elf backend functions */
++
++#define elf_backend_can_gc_sections 1
++
++#define elf_backend_relocate_section nios2_elf32_relocate_section
++#define elf_backend_section_from_shdr nios2_elf32_section_from_shdr
++#define elf_backend_section_flags nios2_elf32_section_flags
++#define elf_backend_fake_sections nios2_elf32_fake_sections
++#define elf_backend_post_process_headers nios2_elf32_post_process_headers
++#define elf_backend_check_relocs nios2_elf32_check_relocs
++
++#define elf_backend_gc_mark_hook nios2_elf32_gc_mark_hook
++
++
++
++/* Support for SGI-ish mips targets. */
++#define TARGET_LITTLE_SYM bfd_elf32_littlenios2_vec
++#define TARGET_LITTLE_NAME "elf32-littlenios2"
++//#define TARGET_BIG_SYM bfd_elf32_bignios2_vec
++//#define TARGET_BIG_NAME "elf32-bignios2"
++
++#include "elf32-target.h"
+--- binutils-2.15/bfd/libbfd.h 2004-02-12 00:23:20.000000000 +0100
++++ binutils-2.15-nios2/bfd/libbfd.h 2005-05-17 12:20:13.000000000 +0200
+@@ -652,9 +652,11 @@ extern bfd_boolean _bfd_sh_align_load_sp
+ #endif
+ /* Extracted from init.c. */
+ /* Extracted from libbfd.c. */
+-bfd_boolean bfd_write_bigendian_4byte_int (bfd *, unsigned int);
++bfd_boolean
++bfd_write_bigendian_4byte_int PARAMS ((bfd *, unsigned int));
+
+-unsigned int bfd_log2 (bfd_vma x);
++unsigned int
++bfd_log2 PARAMS ((bfd_vma x));
+
+ /* Extracted from bfdio.c. */
+ /* Extracted from bfdwin.c. */
+@@ -673,13 +675,17 @@ extern bfd *bfd_last_cache;
+ ((x)==bfd_last_cache? \
+ (FILE*) (bfd_last_cache->iostream): \
+ bfd_cache_lookup_worker(x))
+-bfd_boolean bfd_cache_init (bfd *abfd);
++bfd_boolean
++bfd_cache_init PARAMS ((bfd *abfd));
+
+-bfd_boolean bfd_cache_close (bfd *abfd);
++bfd_boolean
++bfd_cache_close PARAMS ((bfd *abfd));
+
+-FILE* bfd_open_file (bfd *abfd);
++FILE*
++bfd_open_file PARAMS ((bfd *abfd));
+
+-FILE *bfd_cache_lookup_worker (bfd *abfd);
++FILE *
++bfd_cache_lookup_worker PARAMS ((bfd *abfd));
+
+ /* Extracted from reloc.c. */
+ #ifdef _BFD_MAKE_TABLE_bfd_reloc_code_real
+@@ -1504,6 +1510,21 @@ static const char *const bfd_reloc_code_
+ "BFD_RELOC_MSP430_16",
+ "BFD_RELOC_MSP430_16_PCREL_BYTE",
+ "BFD_RELOC_MSP430_16_BYTE",
++ "BFD_RELOC_NIOS2_S16",
++ "BFD_RELOC_NIOS2_U16",
++ "BFD_RELOC_NIOS2_CALL26",
++ "BFD_RELOC_NIOS2_IMM5",
++ "BFD_RELOC_NIOS2_CACHE_OPX",
++ "BFD_RELOC_NIOS2_IMM6",
++ "BFD_RELOC_NIOS2_IMM8",
++ "BFD_RELOC_NIOS2_HI16",
++ "BFD_RELOC_NIOS2_LO16",
++ "BFD_RELOC_NIOS2_HIADJ16",
++ "BFD_RELOC_NIOS2_GPREL",
++ "BFD_RELOC_NIOS2_UJMP",
++ "BFD_RELOC_NIOS2_CJMP",
++ "BFD_RELOC_NIOS2_CALLR",
++ "BFD_RELOC_NIOS2_ALIGN",
+ "BFD_RELOC_IQ2000_OFFSET_16",
+ "BFD_RELOC_IQ2000_OFFSET_21",
+ "BFD_RELOC_IQ2000_UHI16",
+@@ -1521,40 +1542,41 @@ static const char *const bfd_reloc_code_
+ };
+ #endif
+
+-reloc_howto_type *bfd_default_reloc_type_lookup
+- (bfd *abfd, bfd_reloc_code_real_type code);
++reloc_howto_type *
++bfd_default_reloc_type_lookup PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
+
+-bfd_boolean bfd_generic_relax_section
+- (bfd *abfd,
++bfd_boolean
++bfd_generic_relax_section PARAMS ((bfd *abfd,
+ asection *section,
+ struct bfd_link_info *,
+- bfd_boolean *);
++ bfd_boolean *));
+
+-bfd_boolean bfd_generic_gc_sections
+- (bfd *, struct bfd_link_info *);
++bfd_boolean
++bfd_generic_gc_sections PARAMS ((bfd *, struct bfd_link_info *));
+
+-bfd_boolean bfd_generic_merge_sections
+- (bfd *, struct bfd_link_info *);
++bfd_boolean
++bfd_generic_merge_sections PARAMS ((bfd *, struct bfd_link_info *));
+
+-bfd_byte *bfd_generic_get_relocated_section_contents
+- (bfd *abfd,
++bfd_byte *
++bfd_generic_get_relocated_section_contents PARAMS ((bfd *abfd,
+ struct bfd_link_info *link_info,
+ struct bfd_link_order *link_order,
+ bfd_byte *data,
+ bfd_boolean relocatable,
+- asymbol **symbols);
++ asymbol **symbols));
+
+ /* Extracted from archures.c. */
+ extern const bfd_arch_info_type bfd_default_arch_struct;
+-bfd_boolean bfd_default_set_arch_mach
+- (bfd *abfd, enum bfd_architecture arch, unsigned long mach);
++bfd_boolean
++bfd_default_set_arch_mach PARAMS ((bfd *abfd, enum bfd_architecture arch, unsigned long mach));
+
+-const bfd_arch_info_type *bfd_default_compatible
+- (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
++const bfd_arch_info_type *
++bfd_default_compatible PARAMS ((const bfd_arch_info_type *a, const bfd_arch_info_type *b));
+
+-bfd_boolean bfd_default_scan
+- (const struct bfd_arch_info *info, const char *string);
++bfd_boolean
++bfd_default_scan PARAMS ((const struct bfd_arch_info *info, const char *string));
+
+ /* Extracted from elf.c. */
+-struct elf_internal_shdr *bfd_elf_find_section (bfd *abfd, char *name);
++struct elf_internal_shdr *
++bfd_elf_find_section PARAMS ((bfd *abfd, char *name));
+
+--- binutils-2.15/bfd/reloc.c 2004-01-21 12:17:53.000000000 +0100
++++ binutils-2.15-nios2/bfd/reloc.c 2005-05-17 12:20:13.000000000 +0200
+@@ -3943,6 +3943,39 @@ ENUMDOC
+ msp430 specific relocation codes
+
+ ENUM
++ BFD_RELOC_NIOS2_S16
++ENUMX
++ BFD_RELOC_NIOS2_U16
++ENUMX
++ BFD_RELOC_NIOS2_CALL26
++ENUMX
++ BFD_RELOC_NIOS2_IMM5
++ENUMX
++ BFD_RELOC_NIOS2_CACHE_OPX
++ENUMX
++ BFD_RELOC_NIOS2_IMM6
++ENUMX
++ BFD_RELOC_NIOS2_IMM8
++ENUMX
++ BFD_RELOC_NIOS2_HI16
++ENUMX
++ BFD_RELOC_NIOS2_LO16
++ENUMX
++ BFD_RELOC_NIOS2_HIADJ16
++ENUMX
++ BFD_RELOC_NIOS2_GPREL
++ENUMX
++ BFD_RELOC_NIOS2_UJMP
++ENUMX
++ BFD_RELOC_NIOS2_CJMP
++ENUMX
++ BFD_RELOC_NIOS2_CALLR
++ENUMX
++ BFD_RELOC_NIOS2_ALIGN
++ENUMDOC
++ Relocations used by the Altera New Jersey core
++
++ENUM
+ BFD_RELOC_IQ2000_OFFSET_16
+ ENUMX
+ BFD_RELOC_IQ2000_OFFSET_21
+--- binutils-2.15/bfd/srec.c 2003-11-30 19:40:41.000000000 +0100
++++ binutils-2.15-nios2/bfd/srec.c 2005-05-17 12:20:13.000000000 +0200
+@@ -1009,9 +1009,14 @@ srec_write_header (abfd)
+ {
+ unsigned int len = strlen (abfd->filename);
+
+- /* I'll put an arbitrary 40 char limit on header size. */
+- if (len > 40)
+- len = 40;
++ /* validate Chunk for header */
++ if (Chunk == 0)
++ Chunk = 1;
++ else if (Chunk > MAXCHUNK - 2) /* S0 has 2 address bytes */
++ Chunk = MAXCHUNK - 2;
++
++ if (len > Chunk)
++ len = Chunk;
+
+ return srec_write_record (abfd, 0, (bfd_vma) 0,
+ abfd->filename, abfd->filename + len);
+--- binutils-2.15/bfd/targets.c 2004-05-17 21:36:04.000000000 +0200
++++ binutils-2.15-nios2/bfd/targets.c 2005-05-17 12:20:13.000000000 +0200
+@@ -559,6 +559,7 @@ extern const bfd_target bfd_elf32_nbigmi
+ extern const bfd_target bfd_elf32_nlittlemips_vec;
+ extern const bfd_target bfd_elf32_ntradbigmips_vec;
+ extern const bfd_target bfd_elf32_ntradlittlemips_vec;
++extern const bfd_target bfd_elf32_littlenios2_vec;
+ extern const bfd_target bfd_elf32_openrisc_vec;
+ extern const bfd_target bfd_elf32_or32_big_vec;
+ extern const bfd_target bfd_elf32_pj_vec;
+@@ -746,6 +747,7 @@ extern const bfd_target sco5_core_vec;
+ extern const bfd_target trad_core_vec;
+
+ extern const bfd_target bfd_elf32_am33lin_vec;
++extern const bfd_target bfd_elf32_littlenios2_vec;
+ static const bfd_target * const _bfd_target_vector[] = {
+
+ #ifdef SELECT_VECS
+@@ -854,6 +856,7 @@ static const bfd_target * const _bfd_tar
+ &bfd_elf32_ntradbigmips_vec,
+ &bfd_elf32_ntradlittlemips_vec,
+ #endif
++ &bfd_elf32_littlenios2_vec,
+ &bfd_elf32_openrisc_vec,
+ &bfd_elf32_or32_big_vec,
+ &bfd_elf32_pj_vec,
+--- binutils-2.15/binutils/nios2_binutils_xfail.lst 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/binutils/nios2_binutils_xfail.lst 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1 @@
++No xfails
+--- binutils-2.15/binutils/readelf.c 2004-05-17 21:35:52.000000000 +0200
++++ binutils-2.15-nios2/binutils/readelf.c 2005-05-17 12:20:13.000000000 +0200
+@@ -110,6 +110,8 @@
+
+ #include "aout/ar.h"
+
++#include "elf/nios2.h"
++
+ #include "bucomm.h"
+ #include "getopt.h"
+ #include "libiberty.h"
+@@ -668,6 +670,7 @@ guess_is_rela (unsigned long e_machine)
+ case EM_XTENSA:
+ case EM_XTENSA_OLD:
+ case EM_M32R:
++ case EM_ALTERA_NIOS2:
+ return TRUE;
+
+ case EM_MMA:
+@@ -1166,6 +1169,10 @@ dump_relocations (FILE *file,
+ case EM_XTENSA:
+ rtype = elf_xtensa_reloc_type (type);
+ break;
++
++ case EM_ALTERA_NIOS2:
++ rtype = elf_nios2_reloc_type (type);
++ break;
+ }
+
+ if (rtype == NULL)
+@@ -1649,6 +1656,7 @@ get_machine_name (unsigned e_machine)
+ case EM_IQ2000: return "Vitesse IQ2000";
+ case EM_XTENSA_OLD:
+ case EM_XTENSA: return "Tensilica Xtensa Processor";
++ case EM_ALTERA_NIOS2: return "Altera Nios II";
+ default:
+ sprintf (buff, _("<unknown>: %x"), e_machine);
+ return buff;
+--- binutils-2.15/binutils/testsuite/binutils-all/bintest.s 1999-05-03 09:29:11.000000000 +0200
++++ binutils-2.15-nios2/binutils/testsuite/binutils-all/bintest.s 2005-05-17 12:20:13.000000000 +0200
+@@ -1,5 +1,8 @@
+ .globl text_symbol
+ .text
++ # this is needed to get the readelf -s, -S and -r tests to work
++ # with nios2 as it has relaxation on by default
++ .set norelax
+ text_symbol:
+ static_text_symbol:
+ .long 1
+--- binutils-2.15/binutils-2.15_copied 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/binutils-2.15_copied 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1 @@
++timestamp
+--- binutils-2.15/binutils-2.15_untarred 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/binutils-2.15_untarred 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1 @@
++timestamp
+--- binutils-2.15/configure 2004-05-17 21:36:20.000000000 +0200
++++ binutils-2.15-nios2/configure 2005-05-17 12:20:13.000000000 +0200
+@@ -1434,6 +1434,10 @@ case "${target}" in
+ mips*-*-*)
+ noconfigdirs="$noconfigdirs gprof ${libgcj}"
+ ;;
++ nios2-*-*)
++ skipdirs=`echo " ${skipdirs} " | sed -e 's/ gprof / /'`
++ noconfigdirs="$noconfigdirs"
++ ;;
+ romp-*-*)
+ noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes target-libgloss ${libgcj}"
+ ;;
+--- binutils-2.15/configure.in 2004-05-17 21:40:54.000000000 +0200
++++ binutils-2.15-nios2/configure.in 2005-05-17 12:20:13.000000000 +0200
+@@ -18,6 +18,7 @@
+ ##############################################################################
+ ### WARNING: this file contains embedded tabs. Do not run untabify on this file.
+
++
+ AC_INIT(move-if-change)
+ AC_PREREQ(2.13)
+ AC_CANONICAL_SYSTEM
+@@ -667,6 +668,10 @@ case "${target}" in
+ mips*-*-*)
+ noconfigdirs="$noconfigdirs gprof ${libgcj}"
+ ;;
++ nios2-*-*)
++ skipdirs=`echo " ${skipdirs} " | sed -e 's/ gprof / /'`
++ noconfigdirs="$noconfigdirs"
++ ;;
+ romp-*-*)
+ noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes target-libgloss ${libgcj}"
+ ;;
+--- binutils-2.15/gas/Makefile.in 2004-05-17 21:36:07.000000000 +0200
++++ binutils-2.15-nios2/gas/Makefile.in 2005-05-17 12:20:13.000000000 +0200
+@@ -299,6 +299,7 @@ CPU_TYPES = \
+ mn10200 \
+ mn10300 \
+ msp430 \
++ nios2 \
+ ns32k \
+ openrisc \
+ or32 \
+@@ -493,6 +494,7 @@ TARGET_CPU_CFILES = \
+ config/tc-mn10200.c \
+ config/tc-mn10300.c \
+ config/tc-msp430.c \
++ config/tc-nios2.c \
+ config/tc-ns32k.c \
+ config/tc-openrisc.c \
+ config/tc-or32.c \
+@@ -545,6 +547,7 @@ TARGET_CPU_HFILES = \
+ config/tc-mn10200.h \
+ config/tc-mn10300.h \
+ config/tc-msp430.h \
++ config/tc-nios2.h \
+ config/tc-ns32k.h \
+ config/tc-openrisc.h \
+ config/tc-or32.h \
+@@ -1171,6 +1174,13 @@ DEPTC_msp430_elf = $(INCDIR)/symcat.h $(
+ subsegs.h $(INCDIR)/obstack.h $(INCDIR)/opcode/msp430.h \
+ $(INCDIR)/safe-ctype.h
+
++DEPTC_nios2_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
++ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
++ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-nios2.h \
++ subsegs.h $(INCDIR)/obstack.h $(INCDIR)/safe-ctype.h \
++ $(INCDIR)/opcode/nios2.h itbl-ops.h dwarf2dbg.h $(INCDIR)/elf/nios2.h \
++ $(INCDIR)/elf/reloc-macros.h
++
+ DEPTC_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
+ $(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
+ $(INCDIR)/opcode/ns32k.h $(INCDIR)/obstack.h
+@@ -1824,6 +1834,12 @@ DEPOBJ_msp430_elf = $(INCDIR)/symcat.h $
+ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
+ struc-symbol.h dwarf2dbg.h $(INCDIR)/aout/aout64.h
+
++DEPOBJ_nios2_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \
++ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
++ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-nios2.h \
++ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
++ $(INCDIR)/elf/nios2.h $(INCDIR)/elf/reloc-macros.h
++
+ DEPOBJ_ns32k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \
+ $(srcdir)/config/tc-ns32k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \
+ $(INCDIR)/aout/aout64.h $(INCDIR)/obstack.h
+@@ -2349,6 +2365,10 @@ DEP_msp430_elf = $(srcdir)/config/obj-el
+ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
+ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-msp430.h
+
++DEP_nios2_elf = $(srcdir)/config/obj-elf.h $(INCDIR)/symcat.h \
++ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \
++ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-nios2.h
++
+ DEP_ns32k_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-ns32k.h \
+ $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
+
+--- binutils-2.15/gas/config/obj-elf.c 2004-05-17 21:36:08.000000000 +0200
++++ binutils-2.15-nios2/gas/config/obj-elf.c 2005-05-17 12:20:13.000000000 +0200
+@@ -53,6 +53,10 @@
+ #include "elf/i370.h"
+ #endif
+
++#ifdef TC_NIOS2
++#include "elf/nios2.h"
++#endif
++
+ static void obj_elf_line (int);
+ static void obj_elf_size (int);
+ static void obj_elf_type (int);
+--- binutils-2.15/gas/config/tc-nios2.c 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/config/tc-nios2.c 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,2996 @@
++/* tc-nios2.c -- assemble code for a New Jersey processor.
++
++ Copyright (C) 2003
++ by Nigel Gray (ngray@altera.com).
++
++
++ This file is part of GAS.
++
++ GAS is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 2, or (at your option)
++ any later version.
++
++ GAS is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with GAS; see the file COPYING. If not, write to the Free
++ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
++ 02111-1307, USA. */
++
++
++#include <stdio.h>
++#include <limits.h>
++#include <string.h>
++#include <stdlib.h>
++#include "as.h"
++#include "opcode/nios2.h"
++#include "elf/nios2.h"
++#include "tc-nios2.h"
++#include "bfd.h"
++#include "dwarf2dbg.h"
++#include "subsegs.h"
++#include "safe-ctype.h"
++
++#ifndef OBJ_ELF
++ /* we are not supporting any other target
++ so we throw a compile time error */
++OBJ_ELF not defined
++#endif
++ typedef enum
++{
++ relax_section = 0,
++ relax_none,
++ relax_all
++}
++relax_optionT;
++
++
++/* struct contains all assembler options set with .set */
++struct
++{
++ /*
++ .set noat -> noat = 1 allows assembly code to use at without warning
++ and macro expansions will generate a warning.
++ .set at -> noat = 0, assembly code using at will warn
++ macro expansions will not generate warnings
++ */
++ bfd_boolean noat;
++
++ /*
++ .set nobreak -> nobreak = 1 allows assembly code to use ba,bt without warning
++ .set break -> nobreak = 0, assembly code using ba,bt will warn
++ */
++ bfd_boolean nobreak;
++
++ /*
++ .cmd line option -relax-all allows all branches and calls to be replaced
++ with longer versions
++ -no-relax inhibits branch/call conversion
++ default value is relax_section, which relaxes branches within a section
++ */
++ relax_optionT relax;
++
++}
++nios2_as_options =
++{
++FALSE, FALSE, relax_section};
++
++
++typedef struct nios2_insn_reloc
++{
++ /* any expression in the instruction is parsed into
++ this field which is passed to fix_new_exp() to
++ generate a fixup */
++ expressionS reloc_expression;
++
++ /* the type of the relocation to be applied */
++ bfd_reloc_code_real_type reloc_type;
++
++ /* pc relative */
++ unsigned int reloc_pcrel;
++
++ /* the next relocation to be applied to the instruction */
++ struct nios2_insn_reloc *reloc_next;
++}
++nios2_insn_relocS;
++
++
++/* ------------------------------------------------------------------
++ This struct is used by the functions in tc-nios2.c to assemble an
++ instruction
++ ------------------------------------------------------------------*/
++
++typedef struct nios2_insn_info
++{
++ /* assembled instruction */
++ unsigned long insn_code;
++ /* ptr to the relevant bit of the opcode table */
++ const struct nios2_opcode *insn_nios2_opcode;
++ /* after parsing ptrs to the tokens in the instruction fill this array
++ it is terminated with a null pointer ( hence the first +1
++ The second +1 is because in some parts of the code the opcode
++ is not counted as a token, but still placed in this array*/
++ const char *insn_tokens[NIOS2_MAX_INSN_TOKENS + 1 + 1];
++
++ /* this holds information used to generate fixups
++ and eventually relocations if it is not null */
++ nios2_insn_relocS *insn_reloc;
++}
++nios2_insn_infoS;
++
++
++/*
++ This struct associates an argument assemble function with
++ an argument syntax string. Used by the assembler to find out
++ how to parse and assemble a set of instruction operands and return the instruction
++ field values
++*/
++
++typedef struct nios2_arg_info
++{
++ const char *args;
++ void (*assemble_args_func) (nios2_insn_infoS * insn_info);
++}
++nios2_arg_infoS;
++
++/*
++ This struct is used to convert New Jersey pseudo-ops into the
++ corresponding real op
++ */
++typedef struct nios2_ps_insn_info
++{
++ const char *pseudo_insn;
++ const char *insn;
++ const char *arg_modifier;
++ void (*arg_modifer_func) (const char *arg, char **parsedArgs, int numArg,
++ int startIndex);
++ int num;
++ int index;
++}
++nios2_ps_insn_infoS;
++
++
++
++/* function prototypes */
++static void NIOS2_CHECK_ASSEMBLY (unsigned int opcode,
++ const char *exp_opcode);
++static void s_nios2_sdata (int);
++void nios2_assemble_args_dst (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_tsi (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_tsu (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_o (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_m (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_s (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_tis (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_dc (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_cs (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_ldst (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_none (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_dsj (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_is (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_sto (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_d (nios2_insn_infoS * insn_info);
++void nios2_assemble_args_b (nios2_insn_infoS * insn_info);
++
++nios2_insn_relocS *nios2_insn_reloc_new (bfd_reloc_code_real_type reloc_type,
++ unsigned int pcrel);
++void nios2_insn_reloc_destroy (nios2_insn_relocS * reloc);
++unsigned long nios2_assemble_expression (const char *exprstr,
++ nios2_insn_infoS * insn,
++ nios2_insn_relocS * prev_reloc,
++ bfd_reloc_code_real_type reloc_type,
++ unsigned int pcrel);
++char *nios2_consume_separator (char *argStr, const char *separator);
++char *nios2_consume_arg (char *argStr, const char *argType);
++void nios2_parse_args (char *argStr, const char *parseStr, char **parsedArgs);
++
++void nios2_modify_arg (const char *modifier, char **parsedArgs, int unused,
++ int index);
++void nios2_append_arg (const char *append, char **parsedArgs, int numAppend,
++ int startIndex);
++void nios2_insert_arg (const char *insert, char **parsedArgs, int numInsert,
++ int startIndex);
++void nios2_swap_args (const char *unused, char **parsedArgs, int index_1,
++ int index_2);
++void nios2_negate_arg (const char *modifier ATTRIBUTE_UNUSED,
++ char **parsedArgs, int unused ATTRIBUTE_UNUSED,
++ int index);
++void nios2_translate_pseudo_insn (nios2_insn_infoS * insn);
++valueT md_chars_to_number (char *buf, int n);
++void md_number_to_imm (char *buf, valueT val, int n);
++void md_number_to_disp (char *buf, valueT val, int n);
++void md_number_to_field (char *buf, valueT val, int n);
++static void nios2_align (int log_size, const char *pfill, symbolS * sym);
++static void s_nios2_ucons (int nbytes);
++static void s_nios2_set (int equiv);
++static void s_nios2_align (int ignore);
++static void s_nios2_text (int);
++static void s_nios2_data (int);
++static void s_nios2_section (int);
++static bfd_boolean nios2_coproc_reg (const char *reg_name);
++static void output_insn (void);
++static void output_ubranch (void);
++static void output_cbranch (void);
++static void output_call (void);
++static void output_movia (void);
++
++
++bfd_boolean nios2_check_overflow (valueT fixup, reloc_howto_type * howto);
++
++/* The known current alignment of the current section. */
++static int nios2_current_align;
++static segT nios2_current_align_seg;
++
++/* The last seen label in the current section. This is used to auto-align
++ labels preceeding instructions. */
++static symbolS *nios2_last_label;
++
++
++static int nios2_auto_align_on = 1;
++
++/* This array holds the chars that always start a comment. If the
++ pre-processor is disabled, these aren't very useful */
++const char comment_chars[] = "#";
++
++/* This array holds the chars that only start a comment at the beginning of
++ a line. If the line seems to have the form '# 123 filename'
++ .line and .file directives will appear in the pre-processed output */
++/* Note that input_file.c hand checks for '#' at the beginning of the
++ first line of the input file. This is because the compiler outputs
++ #NO_APP at the beginning of its output. */
++/* Also note that C style comments are always supported. */
++const char line_comment_chars[] = "#";
++
++/* This array holds machine specific line separator characters. */
++const char line_separator_chars[] = ";";
++
++/* Chars that can be used to separate mant from exp in floating point nums */
++const char EXP_CHARS[] = "eE";
++
++/* Chars that mean this number is a floating point constant */
++/* As in 0f12.456 */
++/* or 0d1.2345e12 */
++const char FLT_CHARS[] = "rRsSfFdDxXpP";
++
++/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
++ changed in read.c . Ideally it shouldn't have to know about it at all,
++ but nothing is ideal around here.
++ */
++
++/* handle of the OPCODE hash table */
++static struct hash_control *nios2_opcode_hash = NULL;
++
++/* handle of the Register hash table */
++static struct hash_control *nios2_reg_hash = NULL;
++
++/* handle of the parse args hash table */
++static struct hash_control *nios2_arg_hash = NULL;
++
++/* pseudo-op hash table */
++static struct hash_control *nios2_ps_hash = NULL;
++
++/* mode of the assembler */
++typedef enum
++{
++ NIOS2_MODE_ASSEMBLE, // ordinary operation
++ NIOS2_MODE_TEST // hidden mode used for self testing
++}
++NIOS2_MODE;
++
++static NIOS2_MODE nios2_mode = NIOS2_MODE_ASSEMBLE;
++
++/* this function is used to in self-checking mode
++ to check the assembled instruction
++ opcode should be the assembled opcode, and exp_opcode
++ the parsed string representing the expected opcode */
++void
++NIOS2_CHECK_ASSEMBLY (unsigned int opcode, const char *exp_opcode)
++{
++ if (nios2_mode == NIOS2_MODE_TEST)
++ {
++ if ((exp_opcode) == NULL)
++ {
++ as_bad (_("expecting opcode string in self test mode"));
++ }
++ else if ((opcode) != strtoul ((exp_opcode), NULL, 16))
++ {
++ as_bad (_("assembly 0x%08x, expected %s"), (opcode), (exp_opcode));
++ }
++ }
++}
++
++/* Machine-dependent command-line options */
++
++const char *md_shortopts = "r";
++
++struct option md_longopts[] = {
++#define OPTION_RELAX_ALL (OPTION_MD_BASE + 0)
++ {"relax-all", no_argument, NULL, OPTION_RELAX_ALL},
++#define OPTION_NORELAX (OPTION_MD_BASE + 1)
++ {"no-relax", no_argument, NULL, OPTION_NORELAX},
++#define OPTION_RELAX_SECTION (OPTION_MD_BASE + 2)
++ {"relax-section", no_argument, NULL, OPTION_RELAX_SECTION}
++};
++
++size_t md_longopts_size = sizeof (md_longopts);
++
++/* Machine dependent pseudo-ops
++ These are actually assembler directives
++ format of each entry is
++
++ { "directive", handler_func, param }
++*/
++const pseudo_typeS md_pseudo_table[] = {
++ {"align", s_nios2_align, 0},
++ {"text", s_nios2_text, 0},
++ {"data", s_nios2_data, 0},
++ {"section", s_nios2_section, 0},
++ {"section.s", s_nios2_section, 0},
++ {"sect", s_nios2_section, 0},
++ {"sect.s", s_nios2_section, 0},
++ /* .dword and .half are included for
++ compatibility with MIPS */
++ {"dword", cons, 8},
++ {"half", cons, 2},
++ /* NIOS2 native word size is 4 bytes, so we override
++ the GAS default of 2 */
++ {"word", cons, 4},
++ /* explicitly unaligned directives */
++ {"2byte", s_nios2_ucons, 2},
++ {"4byte", s_nios2_ucons, 4},
++ {"8byte", s_nios2_ucons, 8},
++ {"16byte", s_nios2_ucons, 16},
++#ifdef OBJ_ELF
++ {"sdata", s_nios2_sdata, 0},
++#endif
++ {"set", s_nios2_set, 0},
++ {NULL, NULL, 0}
++};
++
++#define BYTE_F 32764
++#define BYTE_B -32768
++#define ABS (long)0xffffffff /* special value to indicate non-pc relative jmp */
++
++#define UBRANCH 1
++#define UJMP 2
++#define CBRANCH 3
++#define CJMP 4
++
++
++#define RELAX_MAX_SIZE(type) nios2_relax_table[nios2_relax_table[type].rlx_more].rlx_length
++#define RELAX_SIZE(type) nios2_relax_table[type].rlx_length
++#define RELAX_SUBSTATE(type) type
++
++/* machine dependent relaxations */
++struct relax_type nios2_relax_table[] = {
++ /* first entry unused (ends relaxation sequence) */
++ {1, 1, 0, 0},
++ /* unconditional branch */
++ {BYTE_F, BYTE_B, 4, 2}, /* br label (label is in range) */
++ /* unconditional jmp */
++ {ABS, ABS, 12, 0}, /* movhi at, %hi(label) ; ori at, %lo(label) ; jmp at */
++ /* conditional branch */
++ {BYTE_F, BYTE_B, 4, 4}, /* br{cond} label (label is in range) */
++ /* conditional jmp */
++ {ABS, ABS, 16, 0}, /* br{opp_cond} skip ; movhi at, %hi(label) ; ori at, %lo(label) ; jmp at ; skip: } */
++};
++
++
++/* this is just the generic relax_frag function but
++ amended to include absolute jmps in the relax table
++ */
++
++long
++nios2_relax_frag (segT segment, fragS * fragP, long stretch)
++{
++ const relax_typeS *this_type;
++ const relax_typeS *start_type;
++ relax_substateT next_state;
++ relax_substateT this_state;
++ long growth;
++ offsetT aim;
++ addressT target;
++ addressT address;
++ symbolS *symbolP;
++ const relax_typeS *table;
++
++ target = fragP->fr_offset;
++ address = fragP->fr_address;
++ table = nios2_relax_table;
++ this_state = fragP->fr_subtype;
++ start_type = this_type = table + this_state;
++ symbolP = fragP->fr_symbol;
++
++ if (symbolP)
++ {
++ fragS *sym_frag;
++
++ sym_frag = symbol_get_frag (symbolP);
++
++#ifndef DIFF_EXPR_OK
++#if !defined (MANY_SEGMENTS) && !defined (BFD_ASSEMBLER)
++ know ((S_GET_SEGMENT (symbolP) == SEG_ABSOLUTE)
++ || (S_GET_SEGMENT (symbolP) == SEG_DATA)
++ || (S_GET_SEGMENT (symbolP) == SEG_BSS)
++ || (S_GET_SEGMENT (symbolP) == SEG_TEXT));
++#endif
++ know (sym_frag != NULL);
++#endif
++ know (!(S_GET_SEGMENT (symbolP) == absolute_section)
++ || sym_frag == &zero_address_frag);
++ target += S_GET_VALUE (symbolP);
++
++ /* If frag has yet to be reached on this pass,
++ assume it will move by STRETCH just as we did.
++ If this is not so, it will be because some frag
++ between grows, and that will force another pass. */
++
++ if (stretch != 0
++ && sym_frag->relax_marker != fragP->relax_marker
++ && S_GET_SEGMENT (symbolP) == segment)
++ {
++ target += stretch;
++ }
++ }
++
++
++ /* NG we subtract 4 because all pc relative branches are
++ from the next instruction */
++ aim = target - address - fragP->fr_fix - 4;
++
++ if (aim < 0)
++ {
++ /* Look backwards. */
++ for (next_state = this_type->rlx_more; next_state;)
++ {
++ if (aim >= this_type->rlx_backward
++ || this_type->rlx_backward == ABS)
++ next_state = 0;
++ else
++ {
++ /* Grow to next state. */
++ this_state = next_state;
++ this_type = table + this_state;
++ next_state = this_type->rlx_more;
++ }
++ }
++ }
++ else
++ {
++ /* Look forwards. */
++
++ for (next_state = this_type->rlx_more; next_state;)
++ {
++ if (aim <= this_type->rlx_forward || this_type->rlx_forward == ABS)
++ next_state = 0;
++ else
++ {
++ /* Grow to next state. */
++ this_state = next_state;
++ this_type = table + this_state;
++ next_state = this_type->rlx_more;
++ }
++ }
++ }
++
++
++ growth = this_type->rlx_length - start_type->rlx_length;
++
++ if (growth != 0)
++ fragP->fr_subtype = this_state;
++
++ return growth;
++}
++
++/*--------------------------------------------------------------------------------
++ The next table associates pointers to functions which parse the arguments to an
++ instruction and fill in the relevant fields of the instruction
++ --------------------------------------------------------------------------------*/
++
++const nios2_arg_infoS nios2_arg_info_structs[] = {
++ /* args assemble_args_func */
++ {"d,s,t", nios2_assemble_args_dst},
++ {"d,s,t,E", nios2_assemble_args_dst},
++ {"t,s,i", nios2_assemble_args_tsi},
++ {"t,s,i,E", nios2_assemble_args_tsi},
++ {"t,s,u", nios2_assemble_args_tsu},
++ {"t,s,u,E", nios2_assemble_args_tsu},
++ {"s,t,o", nios2_assemble_args_sto},
++ {"s,t,o,E", nios2_assemble_args_sto},
++ {"o", nios2_assemble_args_o},
++ {"o,E", nios2_assemble_args_o},
++ {"s", nios2_assemble_args_s},
++ {"s,E", nios2_assemble_args_s},
++ {"", nios2_assemble_args_none},
++ {"E", nios2_assemble_args_none},
++ {"i(s)", nios2_assemble_args_is},
++ {"i(s)E", nios2_assemble_args_is},
++ {"m", nios2_assemble_args_m},
++ {"m,E", nios2_assemble_args_m},
++ {"t,i(s)", nios2_assemble_args_tis},
++ {"t,i(s)E", nios2_assemble_args_tis},
++ {"d,c", nios2_assemble_args_dc},
++ {"d,c,E", nios2_assemble_args_dc},
++ {"c,s", nios2_assemble_args_cs},
++ {"c,s,E", nios2_assemble_args_cs},
++ {"l,d,s,t", nios2_assemble_args_ldst},
++ {"l,d,s,t,E", nios2_assemble_args_ldst},
++ {"d,s,j", nios2_assemble_args_dsj},
++ {"d,s,j,E", nios2_assemble_args_dsj},
++ {"d", nios2_assemble_args_d},
++ {"d,E", nios2_assemble_args_d},
++ {"b", nios2_assemble_args_b},
++ {"b,E", nios2_assemble_args_b}
++};
++
++#define NIOS2_NUM_ARGS \
++ ((sizeof(nios2_arg_info_structs)/sizeof(nios2_arg_info_structs[0])))
++const int nios2_num_arg_info_structs = NIOS2_NUM_ARGS;
++
++
++const nios2_ps_insn_infoS nios2_ps_insn_info_structs[] = {
++ /* pseudo-op real-op arg arg_modifier_func num index */
++ {"mov", "add", "zero", nios2_append_arg, 1, 3},
++ {"movi", "addi", "zero", nios2_insert_arg, 1, 2},
++ {"movhi", "orhi", "zero", nios2_insert_arg, 1, 2},
++ {"movui", "ori", "zero", nios2_insert_arg, 1, 2},
++ {"movia", "orhi", "zero", nios2_insert_arg, 1, 2},
++ {"nop", "add", "zero", nios2_append_arg, 3, 1},
++ {"bgt", "blt", "", nios2_swap_args, 1, 2},
++ {"bgtu", "bltu", "", nios2_swap_args, 1, 2},
++ {"ble", "bge", "", nios2_swap_args, 1, 2},
++ {"bleu", "bgeu", "", nios2_swap_args, 1, 2},
++ {"cmpgt", "cmplt", "", nios2_swap_args, 2, 3},
++ {"cmpgtu", "cmpltu", "", nios2_swap_args, 2, 3},
++ {"cmple", "cmpge", "", nios2_swap_args, 2, 3},
++ {"cmpleu", "cmpgeu", "", nios2_swap_args, 2, 3},
++ {"cmpgti", "cmpgei", "+1", nios2_modify_arg, 0, 3},
++ {"cmpgtui", "cmpgeui", "+1", nios2_modify_arg, 0, 3},
++ {"cmplei", "cmplti", "+1", nios2_modify_arg, 0, 3},
++ {"cmpleui", "cmpltui", "+1", nios2_modify_arg, 0, 3},
++ {"subi", "addi", "", nios2_negate_arg, 0, 3}
++ /* add further pseudo-ops here */
++};
++
++#define NIOS2_NUM_PSEUDO_INSNS \
++ ((sizeof(nios2_ps_insn_info_structs)/sizeof(nios2_ps_insn_info_structs[0])))
++const int nios2_num_ps_insn_info_structs = NIOS2_NUM_PSEUDO_INSNS;
++
++/* special relocation directive strings */
++
++struct nios2_special_relocS
++{
++ const char *string;
++ bfd_reloc_code_real_type reloc_type;
++};
++
++struct nios2_special_relocS nios2_special_reloc[] = {
++ {"%hiadj", BFD_RELOC_NIOS2_HIADJ16},
++ {"%hi", BFD_RELOC_NIOS2_HI16},
++ {"%lo", BFD_RELOC_NIOS2_LO16},
++ {"%gprel", BFD_RELOC_NIOS2_GPREL}
++};
++
++#define NIOS2_NUM_SPECIAL_RELOCS \
++ (sizeof(nios2_special_reloc)/sizeof(nios2_special_reloc[0]))
++const int nios2_num_special_relocs = NIOS2_NUM_SPECIAL_RELOCS;
++
++/*
++ The function nios2_modify_arg appends the string modifier to the string contained
++ in the argument at index in the array parsedArgs[]
++*/
++void
++nios2_modify_arg (const char *modifier,
++ char **parsedArgs, int unused ATTRIBUTE_UNUSED, int index)
++{
++ assert (index < NIOS2_MAX_INSN_TOKENS);
++
++/*
++ we can't just strcat here because strcat will free the memory pointed to by the first
++ argument and allocate new memory - but at this stage, parsedArgs[index] may point into
++ the middle of a block of allocated memory, so trying to free it will cause a seg fault.
++
++ */
++ char *tmp = parsedArgs[index];
++ parsedArgs[index] =
++ (char *) malloc (strlen (parsedArgs[index]) + strlen (modifier) + 1);
++ strcpy (parsedArgs[index], tmp);
++ strcat (parsedArgs[index], modifier);
++}
++
++
++void
++nios2_negate_arg (const char *modifier ATTRIBUTE_UNUSED,
++ char **parsedArgs, int unused ATTRIBUTE_UNUSED, int index)
++{
++ char *tmp = parsedArgs[index];
++ parsedArgs[index] =
++ (char *) malloc (strlen ("~(") + strlen (parsedArgs[index]) +
++ strlen (")+1") + 1);
++
++ strcpy (parsedArgs[index], "~(");
++ strcat (parsedArgs[index], tmp);
++ strcat (parsedArgs[index], ")+1");
++}
++
++/*
++ The function nios2_swap_args swaps the pointers at indices index_1 and
++ index_2 in the array parsedArgs[] - this is used for operand swapping
++ for comparison operations
++ */
++void
++nios2_swap_args (const char *unused ATTRIBUTE_UNUSED,
++ char **parsedArgs, int index_1, int index_2)
++{
++ char *tmp;
++ assert (index_1 < NIOS2_MAX_INSN_TOKENS && index_2 < NIOS2_MAX_INSN_TOKENS);
++ tmp = parsedArgs[index_1];
++ parsedArgs[index_1] = parsedArgs[index_2];
++ parsedArgs[index_2] = tmp;
++}
++
++/*
++ This function appends the string append to the array of strings in
++ parsedArgs numAppend times starting at index startIndex in the array
++*/
++void
++nios2_append_arg (const char *append, char **parsedArgs, int numAppend,
++ int startIndex)
++{
++ int i, count;
++ char *tmp;
++
++ assert ((startIndex + numAppend) < NIOS2_MAX_INSN_TOKENS);
++ i = startIndex;
++ count = numAppend;
++
++ if (nios2_mode == NIOS2_MODE_TEST)
++ tmp = parsedArgs[startIndex];
++ else
++ tmp = NULL;
++
++ while (count > 0)
++ {
++ parsedArgs[i] = (char *) append;
++ ++i;
++ --count;
++ }
++
++ assert (i == (startIndex + numAppend));
++ parsedArgs[i] = tmp;
++ parsedArgs[i + 1] = NULL;
++}
++
++/* This function inserts the string insert numInsert times in the array parsedArgs,
++ starting at the index startIndex
++ */
++void
++nios2_insert_arg (const char *insert, char **parsedArgs, int numInsert,
++ int startIndex)
++{
++ int i, count, from, to;
++
++ assert ((startIndex + numInsert) < NIOS2_MAX_INSN_TOKENS);
++
++ to = startIndex + numInsert;
++ from = startIndex;
++
++ /* move the existing arguments up to create space */
++ i = NIOS2_MAX_INSN_TOKENS;
++ while ((i - numInsert) >= startIndex)
++ {
++ parsedArgs[i] = parsedArgs[i - numInsert];
++ --i;
++ }
++
++ i = startIndex;
++ count = numInsert;
++ while (count > 0)
++ {
++ parsedArgs[i] = (char *) insert;
++ ++i;
++ --count;
++ }
++}
++
++/*
++ This function swaps the pseudo-op for a real op
++ FIXME - only works for 1-to-1 correspondence
++ */
++void
++nios2_translate_pseudo_insn (nios2_insn_infoS * insn)
++{
++
++ nios2_ps_insn_infoS *ps_insn;
++
++ /* find which real insn the pseudo-op transates to and
++ switch the insn_info ptr to point to it */
++ ps_insn =
++ (nios2_ps_insn_infoS *) hash_find (nios2_ps_hash,
++ insn->insn_nios2_opcode->name);
++
++ if (ps_insn != NULL)
++ {
++ insn->insn_nios2_opcode =
++ (struct nios2_opcode *) hash_find (nios2_opcode_hash, ps_insn->insn);
++ insn->insn_tokens[0] = insn->insn_nios2_opcode->name;
++ // modify the args so they work with the real insn
++ ps_insn->arg_modifer_func (ps_insn->arg_modifier,
++ (char **) insn->insn_tokens, ps_insn->num,
++ ps_insn->index);
++ }
++ else
++ {
++ // we cannot recover from this
++ as_fatal (_("unrecognized pseudo-instruction %s"),
++ ps_insn->pseudo_insn);
++ }
++}
++
++/********************************************************************
++ The following functions are called by machine-independent parts of
++ the assembler
++ ********************************************************************/
++
++/*
++ Function : void md_parse_option
++ (char** option_ptr, int* argc_ptr, char*** argv_ptr)
++
++ Description :
++
++ */
++int
++md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
++{
++ switch (c)
++ {
++ case 'r':
++ /* hidden option for self-test mode */
++ nios2_mode = NIOS2_MODE_TEST;
++ break;
++ case OPTION_RELAX_ALL:
++ nios2_as_options.relax = relax_all;
++ break;
++ case OPTION_NORELAX:
++ nios2_as_options.relax = relax_none;
++ break;
++ case OPTION_RELAX_SECTION:
++ nios2_as_options.relax = relax_section;
++ break;
++ default:
++ return 0;
++ break;
++ }
++
++ return 1;
++}
++
++/*
++ Function : md_show_usage(FILE* stream)
++
++ Description : machine-dependent usage message
++*/
++void
++md_show_usage (FILE * stream)
++{
++ fprintf (stream, "\
++ NIOS2 options:\n\
++ -relax-all replace all branch and call instructions with jmp and callr sequences\n\
++ -relax-section replace identified out of range branches with jmp sequences (default)\n\
++ -no-relax do not replace any branches or calls\n");
++}
++
++/*
++ Function : void md_begin()
++
++ Description :
++ This function is called once, at assembler startup time.
++ It should set up all the tables, etc. that the MD part of the
++ assembler will need.
++*/
++void
++md_begin ()
++{
++ int i;
++ const char *inserted;
++
++ /* create and fill a hashtable for the New Jersey opcodes, registers and arguments */
++ nios2_opcode_hash = hash_new ();
++ nios2_reg_hash = hash_new ();
++ nios2_arg_hash = hash_new ();
++ nios2_ps_hash = hash_new ();
++
++ for (i = 0; i < NUMOPCODES; ++i)
++ {
++ inserted =
++ hash_insert (nios2_opcode_hash, nios2_opcodes[i].name,
++ (PTR) & nios2_opcodes[i]);
++ if (inserted != NULL)
++ {
++ fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
++ nios2_opcodes[i].name, inserted);
++ /* Probably a memory allocation problem? Give up now. */
++ as_fatal (_("Broken assembler. No assembly attempted."));
++ }
++ }
++
++ for (i = 0; i < nios2_num_regs; ++i)
++ {
++ inserted =
++ hash_insert (nios2_reg_hash, nios2_regs[i].name,
++ (PTR) & nios2_regs[i]);
++ if (inserted != NULL)
++ {
++ fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
++ nios2_regs[i].name, inserted);
++ /* Probably a memory allocation problem? Give up now. */
++ as_fatal (_("Broken assembler. No assembly attempted."));
++ }
++
++ }
++
++ for (i = 0; i < nios2_num_arg_info_structs; ++i)
++ {
++ inserted =
++ hash_insert (nios2_arg_hash, nios2_arg_info_structs[i].args,
++ (PTR) & nios2_arg_info_structs[i]);
++ if (inserted != NULL)
++ {
++ fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
++ nios2_arg_info_structs[i].args, inserted);
++ /* Probably a memory allocation problem? Give up now. */
++ as_fatal (_("Broken assembler. No assembly attempted."));
++ }
++ }
++
++ for (i = 0; i < nios2_num_ps_insn_info_structs; ++i)
++ {
++ inserted =
++ hash_insert (nios2_ps_hash, nios2_ps_insn_info_structs[i].pseudo_insn,
++ (PTR) & nios2_ps_insn_info_structs[i]);
++ if (inserted != NULL)
++ {
++ fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
++ nios2_ps_insn_info_structs[i].pseudo_insn, inserted);
++ /* Probably a memory allocation problem? Give up now. */
++ as_fatal (_("Broken assembler. No assembly attempted."));
++ }
++ }
++
++ /* assembler option defaults */
++ nios2_as_options.noat = FALSE;
++ nios2_as_options.nobreak = FALSE;
++
++ /* debug information is incompatible with relaxation */
++ if (debug_type != DEBUG_UNSPECIFIED)
++ {
++ nios2_as_options.relax = relax_none;
++ }
++
++ /* initialize the alignment data */
++ nios2_current_align_seg = now_seg;
++ nios2_last_label = NULL;
++ nios2_current_align = 0;
++}
++
++
++
++
++/* made this global to avoid changing one function prototype */
++nios2_insn_infoS insn;
++
++/*
++ Function: void md_assemble(char* op_str)
++
++ Description: assembles a single line of Nios II assembly
++ language
++ */
++void
++md_assemble (char *op_str)
++{
++ char *argstr;
++ char *op_strdup;
++ nios2_arg_infoS *arg_info;
++ unsigned long saved_pinfo = 0;
++
++ /* make sure we are aligned on a 4-byte boundary */
++ if (nios2_current_align < 2)
++ nios2_align (2, NULL, nios2_last_label);
++ else if (nios2_current_align > 2)
++ nios2_current_align = 2;
++ nios2_last_label = NULL;
++
++
++ /* we don't want to clobber to op_str
++ because we want to be able to use it in messages */
++ op_strdup = strdup (op_str);
++
++ insn.insn_tokens[0] = strtok (op_strdup, " ");
++ argstr = strtok (NULL, "");
++
++ /* assemble the opcode */
++ insn.insn_nios2_opcode =
++ (struct nios2_opcode *) hash_find (nios2_opcode_hash,
++ insn.insn_tokens[0]);
++ insn.insn_reloc = NULL;
++
++ if (insn.insn_nios2_opcode != NULL)
++ {
++ /* set the opcode for the instruction */
++ insn.insn_code = insn.insn_nios2_opcode->match;
++
++ /* parse the arguments pointed to by argstr */
++ if (nios2_mode == NIOS2_MODE_ASSEMBLE)
++ {
++ nios2_parse_args (argstr, insn.insn_nios2_opcode->args,
++ (char **) &insn.insn_tokens[1]);
++ }
++ else
++ {
++ nios2_parse_args (argstr, insn.insn_nios2_opcode->args_test,
++ (char **) &insn.insn_tokens[1]);
++ }
++
++ /* we need to preserve the MOVIA macro as this is clobbered by translate_pseudo_insn */
++ if (insn.insn_nios2_opcode->pinfo == NIOS2_INSN_MACRO_MOVIA)
++ {
++ saved_pinfo = NIOS2_INSN_MACRO_MOVIA;
++ }
++ /* if the instruction is an pseudo-instruction, we want to replace it with its
++ real equivalent, and then continue */
++ if ((insn.insn_nios2_opcode->pinfo & NIOS2_INSN_MACRO) ==
++ NIOS2_INSN_MACRO)
++ {
++ nios2_translate_pseudo_insn (&insn);
++ }
++
++ /* find the assemble function, and call it */
++ arg_info =
++ (nios2_arg_infoS *) hash_find (nios2_arg_hash,
++ insn.insn_nios2_opcode->args);
++ if (arg_info != NULL)
++ {
++ arg_info->assemble_args_func (&insn);
++
++ if (nios2_as_options.relax != relax_none
++ && insn.insn_nios2_opcode->pinfo & NIOS2_INSN_UBRANCH)
++ output_ubranch ();
++ else if (nios2_as_options.relax != relax_none
++ && insn.insn_nios2_opcode->pinfo & NIOS2_INSN_CBRANCH)
++ output_cbranch ();
++ else if (nios2_as_options.relax == relax_all
++ && insn.insn_nios2_opcode->pinfo & NIOS2_INSN_CALL)
++ output_call ();
++ else if (saved_pinfo == NIOS2_INSN_MACRO_MOVIA)
++ output_movia ();
++ else
++ output_insn ();
++ }
++ else
++ {
++ /* the assembler is broken */
++ fprintf (stderr,
++ _("internal error: %s is not a valid argument syntax\n"),
++ insn.insn_nios2_opcode->args);
++ /* Probably a memory allocation problem? Give up now. */
++ as_fatal (_("Broken assembler. No assembly attempted."));
++ }
++ }
++ else
++ {
++ /* unrecognised instruction - error */
++ as_bad (_("unrecognised instruction %s"), insn.insn_tokens[0]);
++ }
++}
++
++/* output a normal instruction */
++static void
++output_insn ()
++{
++ char *f;
++ nios2_insn_relocS *reloc;
++
++ f = frag_more (4);
++ /* this allocates enough space for the instruction
++ and puts it in the current frag */
++ md_number_to_chars (f, insn.insn_code, 4);
++ /* emit debug info */
++ dwarf2_emit_insn (4);
++ /* create any fixups */
++ reloc = insn.insn_reloc;
++ while (reloc != NULL)
++ {
++ /* this creates any fixups to be acted on later */
++ fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
++ &reloc->reloc_expression, reloc->reloc_pcrel,
++ reloc->reloc_type);
++ reloc = reloc->reloc_next;
++ }
++}
++
++/* output an unconditional branch */
++static void
++output_ubranch ()
++{
++ char *f;
++ nios2_insn_relocS *reloc;
++ symbolS *symp;
++ offsetT offset;
++
++ reloc = insn.insn_reloc;
++
++ /* if the reloc is NULL, there was an error assembling the branch */
++ if (reloc != NULL)
++ {
++
++ symp = reloc->reloc_expression.X_add_symbol;
++ offset = reloc->reloc_expression.X_add_number;
++
++ /* we must tag debug info here since we can't do it after
++ calling frag_var */
++ dwarf2_emit_insn (4);
++
++ /* we create a machine dependent frag which can grow
++ to accommodate the largest possible instruction sequence
++ this may generate */
++ f = frag_var (rs_machine_dependent,
++ RELAX_MAX_SIZE (UBRANCH),
++ RELAX_SIZE (UBRANCH),
++ RELAX_SUBSTATE (UBRANCH), symp, offset, NULL);
++
++ md_number_to_chars (f, insn.insn_code, 4);
++
++ /* we leave fixup generation to md_convert_frag */
++ }
++}
++
++/* output a conditional branch */
++static void
++output_cbranch ()
++{
++ char *f;
++ nios2_insn_relocS *reloc;
++ symbolS *symp;
++ offsetT offset;
++
++ reloc = insn.insn_reloc;
++
++ /* if the reloc is NULL, there was an error assembling the branch */
++ if (reloc != NULL)
++ {
++
++ symp = reloc->reloc_expression.X_add_symbol;
++ offset = reloc->reloc_expression.X_add_number;
++
++ /* we must tag debug info here since we can't do it after
++ calling frag_var */
++ dwarf2_emit_insn (4);
++
++ /* we create a machine dependent frag which can grow
++ to accommodate the largest possible instruction sequence
++ this may generate */
++ f = frag_var (rs_machine_dependent,
++ RELAX_MAX_SIZE (CBRANCH),
++ RELAX_SIZE (CBRANCH),
++ RELAX_SUBSTATE (CBRANCH), symp, offset, NULL);
++
++ md_number_to_chars (f, insn.insn_code, 4);
++
++
++ /* we leave fixup generation to md_convert_frag */
++ }
++}
++
++/* Output a call sequence. Since calls are not pc-relative for NIOS2,
++ but are page-relative, we cannot tell at any stage in assembly
++ whether a call will be out of range since a section may be linked
++ at any address. So if we are relaxing, we convert all call instructions
++ to long call sequences, and rely on the linker to relax them back to
++ short calls */
++static void
++output_call ()
++{
++ char *f;
++ nios2_insn_relocS *reloc;
++ f = frag_more (12);
++ /* this allocates enough space for the instruction
++ and puts it in the current frag */
++ reloc = insn.insn_reloc;
++
++ /* if the reloc is NULL, there was an error assembling the branch */
++ if (reloc != NULL)
++ {
++ md_number_to_chars (f, OP_MATCH_ORHI | 0x00400000, 4);
++ dwarf2_emit_insn (4);
++ md_number_to_chars (f + 4, OP_MATCH_ORI | 0x08400000, 4);
++ dwarf2_emit_insn (4);
++ md_number_to_chars (f + 8, OP_MATCH_CALLR | 0x08000000, 4);
++ dwarf2_emit_insn (4);
++ fix_new (frag_now, f - frag_now->fr_literal, 4,
++ reloc->reloc_expression.X_add_symbol,
++ reloc->reloc_expression.X_add_number, 0,
++ BFD_RELOC_NIOS2_CALLR);
++
++
++ }
++}
++
++/* output a movhi/addi pair for the movia pseudo-op */
++static void
++output_movia ()
++{
++ char *f;
++ nios2_insn_relocS *reloc;
++ f = frag_more (8);
++ unsigned long reg_index = GET_INSN_FIELD (IRT, insn.insn_code);
++
++ /* this allocates enough space for the instruction
++ and puts it in the current frag */
++ reloc = insn.insn_reloc;
++
++ /* if the reloc is NULL, there was an error assembling the movia */
++ if (reloc != NULL)
++ {
++ md_number_to_chars (f, insn.insn_code, 4);
++ dwarf2_emit_insn (4);
++ md_number_to_chars (f + 4,
++ OP_MATCH_ADDI | (reg_index << OP_SH_IRT) |
++ (reg_index << OP_SH_IRS), 4);
++ dwarf2_emit_insn (4);
++ fix_new (frag_now, f - frag_now->fr_literal, 4,
++ reloc->reloc_expression.X_add_symbol,
++ reloc->reloc_expression.X_add_number, 0,
++ BFD_RELOC_NIOS2_HIADJ16);
++ fix_new (frag_now, f + 4 - frag_now->fr_literal, 4,
++ reloc->reloc_expression.X_add_symbol,
++ reloc->reloc_expression.X_add_number, 0, BFD_RELOC_NIOS2_LO16);
++
++ }
++}
++
++/*
++ Function md_chars_to_number takes the sequence of
++ bytes in bug and returns the corresponding value
++ in an int. n must be 1, 2 or 4.
++ */
++valueT
++md_chars_to_number (char *buf, int n)
++{
++ // this assumes little endian format
++ int i;
++ valueT val;
++
++ assert (n == 1 || n == 2 || n == 4);
++
++ val = 0;
++ for (i = 0; i < n; ++i)
++ {
++ val = val | ((buf[i] & 0xff) << 8 * i);
++ }
++ return val;
++}
++
++
++/*
++ Function : void md_number_to_chars(char *buf, valueT val, int n)
++
++ Description : this function turns a C long int, short int or char
++ into the series of bytes that represent the number
++ on the target machine
++ */
++void
++md_number_to_chars (char *buf, valueT val, int n)
++{
++ /* this assumes little endian format */
++ int i;
++ assert (n == 1 || n == 2 || n == 4);
++ for (i = 0; i < n; ++i)
++ {
++ buf[i] = val & 0xFF;
++ val >>= 8;
++ }
++}
++
++/*
++ Function : void md_number_to_imm(char *buf, valueT val, int n)
++
++ Description : this function is identical to md_number_to_chars
++ */
++void
++md_number_to_imm (char *buf, valueT val, int n)
++{
++ md_number_to_chars (buf, val, n);
++}
++
++/*
++ Function : void md_number_to_disp(char *buf, valueT val, int n)
++
++ Description : this function is identical to md_number_to_chars
++ */
++void
++md_number_to_disp (char *buf, valueT val, int n)
++{
++ md_number_to_chars (buf, val, n);
++}
++
++/*
++ Function : void md_number_to_field(char *buf, valueT val, int n)
++
++ Description : this function is identical to md_number_to_chars
++ */
++void
++md_number_to_field (char *buf, valueT val, int n)
++{
++ md_number_to_chars (buf, val, n);
++}
++
++/*
++
++ Function : char * md_atof(int type, char *litP,int *sizeP)
++
++ Description :
++ Turn a string in input_line_pointer into a floating point constant
++ of type TYPE, and store the appropriate bytes in *LITP. The number
++ of LITTLENUMS emitted is stored in *SIZEP. An error message is
++ returned, or NULL on OK.
++
++ */
++
++char *
++md_atof (int type, char *litP, int *sizeP)
++{
++ int prec;
++ LITTLENUM_TYPE words[4];
++ char *t;
++ int i;
++
++ switch (type)
++ {
++ case 'f':
++ prec = 2;
++ break;
++ case 'd':
++ prec = 4;
++ break;
++ default:
++ *sizeP = 0;
++ return _("bad call to md_atof");
++ }
++
++ t = atof_ieee (input_line_pointer, type, words);
++ if (t)
++ input_line_pointer = t;
++
++ *sizeP = prec * 2;
++
++ /* little endian target */
++ for (i = prec - 1; i >= 0; i--)
++ {
++ md_number_to_chars (litP, (valueT) words[i], 2);
++ litP += 2;
++ }
++
++ return NULL;
++}
++
++
++
++int md_short_jump_size;
++int md_long_jump_size;
++
++void
++md_create_short_jump (char *result_ptr ATTRIBUTE_UNUSED,
++ addressT from_addr ATTRIBUTE_UNUSED,
++ addressT to_addr ATTRIBUTE_UNUSED,
++ fragS * frag ATTRIBUTE_UNUSED,
++ symbolS * to_symbol ATTRIBUTE_UNUSED)
++{
++ abort ();
++}
++
++void
++md_create_long_jump (char *ptr ATTRIBUTE_UNUSED,
++ addressT from_addr ATTRIBUTE_UNUSED,
++ addressT to_addr ATTRIBUTE_UNUSED,
++ fragS * frag ATTRIBUTE_UNUSED,
++ symbolS * to_symbol ATTRIBUTE_UNUSED)
++{
++ abort ();
++}
++
++int
++md_estimate_size_before_relax (fragS * fragp, segT segment ATTRIBUTE_UNUSED)
++{
++ /* we only support ELF targets */
++
++ switch (nios2_as_options.relax)
++ {
++ case relax_none:
++ case relax_section:
++ break;
++ case relax_all:
++ /* The NIOS2 linker performs relaxation so the assembler
++ always assumes the worst case, so that the linker can
++ replace with a better case if possible - this way, linker
++ relaxation can never cause a short branch to be out of range
++ */
++ while (nios2_relax_table[fragp->fr_subtype].rlx_more != 0)
++ fragp->fr_subtype = nios2_relax_table[fragp->fr_subtype].rlx_more;
++ break;
++ default:
++ abort ();
++ break;
++ }
++
++ /* return the estimated size of the frag */
++ return nios2_relax_table[fragp->fr_subtype].rlx_length;
++}
++
++
++void
++md_convert_frag (bfd * headers ATTRIBUTE_UNUSED, segT seg ATTRIBUTE_UNUSED,
++ fragS * fragp)
++{
++ unsigned char *buffer = fragp->fr_literal + fragp->fr_fix;
++ relax_substateT subtype = fragp->fr_subtype;
++ unsigned int growth = RELAX_SIZE (subtype);
++ unsigned int br_opcode, br_op_a, br_op_b;
++
++ switch (subtype)
++ {
++ case UBRANCH:
++ /* we just need to generate the fixup for the symbol and offset */
++ fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset, 1,
++ BFD_RELOC_16_PCREL);
++ break;
++ case UJMP:
++ /* replace ubranch at fr_fix with :
++ movhi at, %hi(symbol+offset)
++ ori at, %lo(symbol+offset)
++ jmp at
++ */
++ md_number_to_chars (buffer, OP_MATCH_ORHI | 0x00400000, 4);
++ md_number_to_chars (buffer + 4, OP_MATCH_ORI | 0x08400000, 4);
++ md_number_to_chars (buffer + 8, OP_MATCH_JMP | 0x08000000, 4);
++ fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset, 0,
++ BFD_RELOC_NIOS2_UJMP);
++ break;
++ case CBRANCH:
++ /* we just need to generate the fixup for the symbol and offset */
++ fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset, 1,
++ BFD_RELOC_16_PCREL);
++ break;
++ case CJMP:
++ /* replace cbranch at fr_fix with :
++ b(opposite condition) r, s, skip
++ movhi at, %hi(symbol+offset)
++ ori at, %lo(symbol+offset)
++ jmp at
++ skip:
++ ...
++ */
++ br_opcode = md_chars_to_number (buffer, 4);
++
++ switch (br_opcode & OP_MASK_OP)
++ {
++ case OP_MATCH_BEQ:
++ br_opcode =
++ (br_opcode & ~OP_MASK_OP) | OP_MATCH_BNE | (12 << OP_SH_IMM16);
++ break;
++ case OP_MATCH_BNE:
++ br_opcode =
++ (br_opcode & ~OP_MASK_OP) | OP_MATCH_BEQ | (12 << OP_SH_IMM16);
++ break;
++ case OP_MATCH_BGE:
++ case OP_MATCH_BGEU:
++ case OP_MATCH_BLT:
++ case OP_MATCH_BLTU:
++ /* swap the operands */
++ br_op_a = (br_opcode & OP_MASK_RRT) << 5;
++ br_op_b = (br_opcode & OP_MASK_RRS) >> 5;
++ br_opcode =
++ (br_opcode & ~(OP_MASK_RRS | OP_MASK_RRT)) | br_op_a | br_op_b |
++ (12 << OP_SH_IMM16);
++ break;
++ default:
++ as_bad_where (fragp->fr_file, fragp->fr_line,
++ _("expecting conditional branch for relaxation\n"));
++ abort ();
++ }
++
++ md_number_to_chars (buffer, br_opcode, 4);
++ md_number_to_chars (buffer + 4, OP_MATCH_ORHI | 0x00400000, 4);
++ md_number_to_chars (buffer + 8, OP_MATCH_ORI | 0x08400000, 4);
++ md_number_to_chars (buffer + 12, OP_MATCH_JMP | 0x08000000, 4);
++ fix_new (fragp, fragp->fr_fix + 4, 4, fragp->fr_symbol,
++ fragp->fr_offset, 0, BFD_RELOC_NIOS2_CJMP);
++ break;
++ default:
++ as_bad_where (fragp->fr_file, fragp->fr_line,
++ _("can't relax instruction\n"));
++ abort ();
++ break;
++ }
++
++ fragp->fr_fix += growth;
++}
++
++
++/* round up section size */
++valueT
++md_section_align (asection * seg ATTRIBUTE_UNUSED, valueT size)
++{
++ /* I think byte alignment is fine here */
++ return size;
++}
++
++
++int
++nios2_force_relocation (fixS * fixp)
++{
++ if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
++ || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
++ || fixp->fx_r_type == BFD_RELOC_NIOS2_ALIGN)
++ return 1;
++
++ return 0;
++}
++
++/* nios2_fix_adjustable is called to see whether a reloc against a defined symbol
++ should be converted into a reloc against a section. */
++
++int
++nios2_fix_adjustable (fixS * fixp)
++{
++#ifdef OBJ_ELF
++ /* Prevent all adjustments to global symbols. */
++ if (OUTPUT_FLAVOR == bfd_target_elf_flavour
++ && (S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
++ return 0;
++#endif
++ if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
++ || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
++ return 0;
++
++ return 1;
++}
++
++/*
++ nios2_frob_symbol is called in adjust_reloc_syms through the macro
++ tc_frob_symbol - it is used to remove *ABS* references from the
++ symbol table
++ */
++int
++nios2_frob_symbol (symbolS * symp)
++{
++ if ((OUTPUT_FLAVOR == bfd_target_elf_flavour
++ && (symp) == section_symbol (absolute_section))
++ || !S_IS_DEFINED (symp))
++ return 1;
++ else
++ return 0;
++}
++
++/*
++ The function tc_gen_reloc creates a relocation structure for the
++ fixup fixp, and returns a pointer to it. This structure is passed
++ to bfd_install_relocation so that it can be written to the object
++ file for linking
++*/
++arelent *
++tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp)
++{
++ arelent *reloc;
++ reloc = (arelent *) xmalloc (sizeof (arelent));
++ reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
++ *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
++
++ reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
++ reloc->addend = fixp->fx_addnumber;
++ reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
++ if (reloc->howto == NULL)
++ {
++ as_bad_where (fixp->fx_file, fixp->fx_line,
++ _("can't represent relocation type %s"),
++ bfd_get_reloc_code_name (fixp->fx_r_type));
++
++ /* Set howto to a garbage value so that we can keep going. */
++ reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
++ assert (reloc->howto != NULL);
++ }
++ return reloc;
++}
++
++long
++md_pcrel_from (fixS * fixP ATTRIBUTE_UNUSED)
++{
++ return 0;
++}
++
++
++/* Apply a fixup to the object file. */
++void
++md_apply_fix3 (fixS * fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
++{
++ const struct nios2_opcode *opcode;
++ enum overflow_type overflow_msg_type;
++ bfd_boolean overflowed = FALSE;
++ valueT fixup = 0;
++
++ /* assert that the fixup is one we can handle */
++ assert (fixP != NULL && valP != NULL &&
++ (fixP->fx_r_type == BFD_RELOC_8 ||
++ fixP->fx_r_type == BFD_RELOC_16 ||
++ fixP->fx_r_type == BFD_RELOC_32 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_S16 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_U16 ||
++ fixP->fx_r_type == BFD_RELOC_16_PCREL ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_IMM5 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_CACHE_OPX ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_IMM6 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_IMM8 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_HI16 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_LO16 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_HIADJ16 ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_GPREL ||
++ fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT ||
++ fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_UJMP ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_CJMP ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_CALLR ||
++ fixP->fx_r_type == BFD_RELOC_NIOS2_ALIGN
++ // add other relocs here as we generate them
++ ));
++
++
++ /* The value passed in valP can be the value of a fully
++ resolved expression, or it can be the value of a partially
++ resolved expression. In the former case, both fixP->fx_addsy
++ and fixP->fx_subsy are NULL, and fixP->fx_offset == *valP, and
++ we can fix up the instruction that fixP relates to.
++ In the latter case, one or both of fixP->fx_addsy and
++ fixP->fx_subsy are not NULL, and fixP->fx_offset may or may not
++ equal *valP. We don't need to check for fixP->fx_subsy being null
++ because the generic part of the assembler generates an error if
++ it is not an absolute symbol */
++
++ if (fixP->fx_addsy != NULL)
++ {
++ fixP->fx_addnumber = fixP->fx_offset;
++ fixP->fx_done = 0;
++ }
++ else
++ {
++ valueT value;
++
++ char *buf;
++ reloc_howto_type *howto;
++ howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
++
++ if (howto == NULL)
++ {
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _("relocation is not supported"));
++ }
++ else
++ {
++ fixup += *valP;
++
++ /* If this is a pc-relative relocation, we need to
++ subtract the current offset within the object file
++ FIXME : for some reason fixP->fx_pcrel isn't 1 when it should be
++ so I'm using the howto structure instead to determine this */
++ if (howto->pc_relative == 1)
++ fixup = fixup - (fixP->fx_frag->fr_address + fixP->fx_where + 4);
++
++
++
++ /* Get the instruction to be fixed up */
++ buf = fixP->fx_frag->fr_literal + fixP->fx_where;
++ value = md_chars_to_number (buf, 4);
++
++ /* What opcode is the instruction? This will determine
++ whether we check for overflow in immediate values
++ and what error message we get */
++ opcode = nios2_find_opcode_hash (value);
++ overflow_msg_type = opcode->overflow_msg;
++
++ overflowed = nios2_check_overflow (fixup, howto);
++
++
++ if (overflowed)
++ {
++ unsigned int range_min;
++ unsigned int range_max;
++ unsigned int address;
++ switch (overflow_msg_type)
++ {
++ case call_target_overflow:
++ range_min =
++ ((fixP->fx_frag->fr_address +
++ fixP->fx_where) & 0xf0000000);
++ range_max = range_min + 0x0fffffff;
++ address = fixup | range_min;
++
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _(overflow_msgs[call_target_overflow]),
++ address, range_min, range_max);
++ break;
++ case branch_target_overflow:
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _(overflow_msgs[branch_target_overflow]),
++ fixup, BYTE_B, BYTE_F);
++ break;
++ case address_offset_overflow:
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _(overflow_msgs[address_offset_overflow]),
++ opcode->name, fixup, -32768, 32767);
++ break;
++ case signed_immed16_overflow:
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _(overflow_msgs[signed_immed16_overflow]),
++ fixup, -32768, 32767);
++ break;
++ case unsigned_immed16_overflow:
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _(overflow_msgs[unsigned_immed16_overflow]),
++ fixup, 0, 65535);
++ break;
++ case unsigned_immed5_overflow:
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _(overflow_msgs[unsigned_immed5_overflow]),
++ fixup, 0, 31);
++ break;
++ case custom_opcode_overflow:
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _(overflow_msgs[custom_opcode_overflow]),
++ fixup, 0, 255);
++ break;
++ default:
++ as_bad_where (fixP->fx_file, fixP->fx_line,
++ _
++ ("unspecified overflow in immediate argument"));
++ break;
++ }
++ }
++
++
++ /* apply the rightshift */
++ (signed) fixup >>= howto->rightshift;
++
++ /* truncate the fixup to right size */
++ switch (fixP->fx_r_type)
++ {
++ case BFD_RELOC_NIOS2_HI16:
++ fixup = (fixup >> 16) & 0xFFFF;
++ break;
++ case BFD_RELOC_NIOS2_LO16:
++ fixup = fixup & 0xFFFF;
++ break;
++ case BFD_RELOC_NIOS2_HIADJ16:
++ fixup = ((fixup >> 16) & 0xFFFF) + ((fixup >> 15) & 0x01);
++ break;
++ default:
++ fixup =
++ (fixup << (32 - howto->bitsize)) >> (32 - howto->bitsize);
++ break;
++ }
++
++ /* fixup the instruction */
++ value = (value & ~howto->dst_mask) | (fixup << howto->bitpos);
++ md_number_to_chars (buf, value, 4);
++ }
++
++ fixP->fx_done = 1;
++ }
++
++ if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
++ {
++ fixP->fx_done = 0;
++ if (fixP->fx_addsy
++ && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy))
++ S_SET_WEAK (fixP->fx_addsy);
++ }
++ else if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
++ {
++ fixP->fx_done = 0;
++ }
++}
++
++bfd_boolean
++nios2_check_overflow (valueT fixup, reloc_howto_type * howto)
++{
++ /* apply the rightshift before checking for overflow */
++ (signed) fixup >>= howto->rightshift;
++
++ /* check for overflow - return TRUE if overflow, FALSE if not */
++ switch (howto->complain_on_overflow)
++ {
++ case complain_overflow_dont:
++ break;
++ case complain_overflow_bitfield:
++ if ((fixup >> howto->bitsize) != 0)
++ return TRUE;
++ break;
++ case complain_overflow_signed:
++ if ((fixup & 0x80000000) > 0)
++ {
++ /* check for negative overflow */
++ if ((signed) fixup < ((signed) 0x80000000 >> howto->bitsize))
++ return TRUE;
++ }
++ else
++ {
++ /* check for positive overflow */
++ if (fixup >= ((unsigned) 1 << (howto->bitsize - 1)))
++ return TRUE;
++ }
++ break;
++ case complain_overflow_unsigned:
++ if ((fixup >> howto->bitsize) != 0)
++ return TRUE;
++ break;
++ default:
++ as_bad (_("error checking for overflow - broken assembler"));
++ break;
++ }
++
++ return FALSE;
++}
++
++/*
++ Function : void md_end()
++ Description : Called just before the assembler exits
++ */
++void
++md_end ()
++{
++ /* FIXME - not yet implemented */
++}
++
++
++/*
++ Creates a new nios2_insn_relocS and returns a pointer to it
++*/
++nios2_insn_relocS *
++nios2_insn_reloc_new (bfd_reloc_code_real_type reloc_type, unsigned int pcrel)
++{
++ nios2_insn_relocS *retval;
++ retval = (nios2_insn_relocS *) malloc (sizeof (nios2_insn_relocS));
++ if (retval == NULL)
++ {
++ as_bad (_("can't create relocation"));
++ abort ();
++ }
++
++ /* fill out the fields with default values */
++ retval->reloc_next = NULL;
++ retval->reloc_type = reloc_type;
++ retval->reloc_pcrel = pcrel;
++ return retval;
++}
++
++/*
++ Frees up memory previously allocated by nios2_insn_reloc_new()
++ */
++void
++nios2_insn_reloc_destroy (nios2_insn_relocS * reloc)
++{
++ assert (reloc != NULL);
++ free (reloc);
++}
++
++/*
++ Function : nios2_assemble_expression(char* exprstr)
++
++ Description : The various nios2_assemble_* functions call this
++ function to generate an expression from a
++ string representing an expression
++ It then tries to evaluate the expression, and
++ if it can, returns its value.
++ If not, it creates a new nios2_insn_relocS
++ and stores the expression and reloc_type
++ for future use
++ */
++unsigned long
++nios2_assemble_expression (const char *exprstr,
++ nios2_insn_infoS * insn,
++ nios2_insn_relocS * prev_reloc,
++ bfd_reloc_code_real_type reloc_type,
++ unsigned int pcrel)
++{
++ nios2_insn_relocS *reloc;
++ char *saved_line_ptr;
++ unsigned short value;
++ int i;
++
++ assert (exprstr != NULL);
++ assert (insn != NULL);
++
++ /* check for %gprel, %hi, %lo or %hiadj
++ change the relocation type
++ and advance the ptr to the start of
++ the expression proper */
++ for (i = 0; i < nios2_num_special_relocs; i++)
++ {
++ if (strstr (exprstr, nios2_special_reloc[i].string) != NULL)
++ {
++ reloc_type = nios2_special_reloc[i].reloc_type;
++ exprstr += strlen (nios2_special_reloc[i].string) + 1;
++ break;
++ }
++ }
++
++ /* we potentially have a relocation */
++ reloc = nios2_insn_reloc_new (reloc_type, pcrel);
++ if (prev_reloc != NULL)
++ prev_reloc->reloc_next = reloc;
++ else
++ insn->insn_reloc = reloc;
++
++ /* parse the expression string */
++ saved_line_ptr = input_line_pointer;
++ input_line_pointer = (char *) exprstr;
++ expression (&reloc->reloc_expression);
++ input_line_pointer = saved_line_ptr;
++
++ /* this is redundant as the fixup will put this into
++ the instruction, but it is included here so that
++ self-test mode (-r) works */
++ value = 0;
++ if (nios2_mode == NIOS2_MODE_TEST)
++ {
++ if (reloc->reloc_expression.X_op == O_constant)
++ value = reloc->reloc_expression.X_add_number;
++ }
++
++ return (unsigned long) value;
++}
++
++/*
++ The function consume_separate takes a pointer into a string
++ of instruction tokens (args) and a pointer into a string representing
++ the expected sequence of tokens and separators. It finds the first
++ instance of the character pointed to by separator in argStr, and
++ returns a pointer to the next element of argStr, which is the
++ following token in the sequence.
++ */
++char *
++nios2_consume_separator (char *argStr, const char *separator)
++{
++ char *argPtr;
++
++ /* if we have a opcode reg, expr(reg) type instruction, and
++ * we are separating the expr from the (reg), we find the last
++ * (, just in case the expression has brackets */
++
++ if (*separator == '(')
++ argPtr = strrchr (argStr, *separator);
++ else
++ argPtr = strchr (argStr, *separator);
++
++ if (argPtr != NULL)
++ *argPtr++ = 0;
++ else
++ as_bad (_("expecting %c near %s"), *separator, argStr);
++ return argPtr;
++}
++
++/*
++ The function consume_arg takes a pointer into a string
++ of instruction tokens (args) and a pointer into a string
++ representing the expected sequence of tokens and separators.
++ It checks whether the first argument in argStr is of the
++ expected type, throwing an error if it is not, and returns
++ the pointer argStr.
++ */
++char *
++nios2_consume_arg (char *argStr, const char *argType)
++{
++ char *temp;
++ int regno = -1;
++
++ switch (*argType)
++ {
++ case 'c':
++ if (strncmp (argStr, "ctl", strlen ("ctl")) != 0
++ && strncmp (argStr, "status", strlen ("status")) != 0
++ && strncmp (argStr, "estatus", strlen ("estatus")) != 0
++ && strncmp (argStr, "bstatus", strlen ("bstatus")) != 0
++ && strncmp (argStr, "ienable", strlen ("ienable")) != 0
++ && strncmp (argStr, "ipending", strlen ("ipending")) != 0)
++ {
++ as_bad (_("expecting control register"));
++ }
++ break;
++ case 'd':
++ case 's':
++ case 't':
++
++ /* we check to make sure we don't have a control register */
++ if (strncmp (argStr, "ctl", strlen ("ctl")) == 0
++ || strncmp (argStr, "status", strlen ("status")) == 0
++ || strncmp (argStr, "estatus", strlen ("estatus")) == 0
++ || strncmp (argStr, "bstatus", strlen ("bstatus")) == 0
++ || strncmp (argStr, "ienable", strlen ("ienable")) == 0
++ || strncmp (argStr, "ipending", strlen ("ipending")) == 0)
++ {
++ as_bad (_("illegal use of control register"));
++ }
++
++ /* and whether coprocessor registers are valid here */
++ if (nios2_coproc_reg (argStr)
++ && insn.insn_nios2_opcode->match != OP_MATCH_CUSTOM)
++ {
++ as_bad (_("illegal use of coprocessor register\n"));
++ }
++
++
++ /* extract a register number if the register is of the
++ form r[0-9]+, if it is a normal register, set
++ regno to its number (0-31), else set regno to -1 */
++ if (argStr[0] == 'r' && ISDIGIT (argStr[1]))
++ {
++ char *p = argStr;
++
++ ++p;
++ regno = 0;
++ do
++ {
++ regno *= 10;
++ regno += *p - '0';
++ ++p;
++ }
++ while (ISDIGIT (*p));
++ }
++ else
++ {
++ regno = -1;
++ }
++
++ /* and whether we are using at */
++ if (!nios2_as_options.noat
++ && (regno == 1
++ || strncmp (argStr, "at", strlen ("at")) == 0))
++ {
++ as_warn (_("Register at (r1) can sometimes be corrupted by assembler optimizations.\n"
++ "Use .set noat to turn off those optimizations (and this warning)."));
++ }
++
++ /* and whether we are using oci registers */
++ if (!nios2_as_options.nobreak
++ && (regno == 25
++ || strncmp (argStr, "bt", strlen ("bt")) == 0))
++ {
++ as_warn (_("The debugger will corrupt bt (r25). If you don't need to debug this\n"
++ "code then use .set nobreak to turn off this warning."));
++ }
++
++ if (!nios2_as_options.nobreak
++ && (regno == 30
++ || strncmp (argStr, "ba", strlen ("ba")) == 0))
++ {
++ as_warn (_("The debugger will corrupt ba (r30). If you don't need to debug this\n"
++ "code then use .set nobreak to turn off this warning."));
++ }
++ break;
++ case 'i':
++ case 'u':
++ if (*argStr == '%')
++ {
++ if (strstr (argStr, "%hi(") || strstr (argStr, "%lo(")
++ || strstr (argStr, "%hiadj(") || strstr (argStr, "%gprel("))
++ {
++ // we zap the brackets because we don't want them confused with separators
++ temp = strchr (argStr, '(');
++ if (temp != NULL)
++ *temp = ' ';
++ temp = strchr (argStr, ')');
++ if (temp != NULL)
++ *temp = ' ';
++ }
++ else
++ {
++ as_bad (_("badly formed expression near %s"), argStr);
++ }
++ }
++ break;
++ case 'm':
++ case 'j':
++ case 'k':
++ case 'l':
++ case 'b':
++ /* we can't have %hi, %lo or %hiadj here */
++ if (*argStr == '%')
++ as_bad (_("badly formed expression near %s"), argStr);
++ break;
++ default:
++ break;
++ }
++ return argStr;
++}
++
++/*
++ The principal argument parsing function which takes a string
++ representing the instruction arguments, and extracts the argument
++ tokens
++ */
++void
++nios2_parse_args (char *argStr, const char *parseStr, char **parsedArgs)
++{
++ char *p;
++ char *end = NULL;
++ int i;
++ p = argStr;
++ i = 0;
++ bfd_boolean terminate = FALSE;
++
++ /* This rest of this function is it too fragile and it mostly works,
++ therefore special case this one */
++ if (*parseStr == 0 && argStr != 0)
++ {
++ as_bad (_("too many arguments"));
++ parsedArgs[0] = NULL;
++ return;
++ }
++
++
++ while (p != NULL && !terminate && i < NIOS2_MAX_INSN_TOKENS)
++ {
++ parsedArgs[i] = nios2_consume_arg (p, parseStr);
++ ++parseStr;
++ if (*parseStr != '\0')
++ {
++ p = nios2_consume_separator (p, parseStr);
++ ++parseStr;
++ }
++ else
++ {
++ /* check that the argument string has no trailing arguments */
++ /* if we've got a %lo etc relocation, we've zapped the brackets with spaces */
++ if (strstr (p, "%lo") == p || strstr (p, "%hi") == p
++ || strstr (p, "%hiadj") == p || strstr (p, "%gprel") == p)
++ end = strpbrk (p, ",");
++ else
++ end = strpbrk (p, " ,");
++
++ if (end != NULL)
++ as_bad (_("too many arguments"));
++ }
++
++ if (*parseStr == '\0' || (p != NULL && *p == '\0'))
++ {
++ terminate = TRUE;
++ }
++ ++i;
++ }
++
++ parsedArgs[i] = NULL;
++
++ if (*parseStr != '\0' && insn.insn_nios2_opcode->match != OP_MATCH_BREAK)
++ as_bad (_("missing argument"));
++
++}
++
++
++/* checks whether the register name is a coprocessor
++ register - returns TRUE if it is, FALSE otherwise */
++
++static bfd_boolean
++nios2_coproc_reg (const char *reg_name)
++{
++ assert (reg_name != NULL);
++
++/* check that we do have a valid register name and that it is a
++ * coprocessor register
++ * it must begin with c, not be a control register, and be a valid
++ * register name */
++
++ if (strncmp (reg_name, "c", 1) == 0 &&
++ strncmp (reg_name, "ctl", strlen ("ctl")) != 0 &&
++ hash_find (nios2_reg_hash, reg_name) != NULL)
++ return TRUE;
++ else
++ return FALSE;
++}
++
++
++/*********************************************************************
++ Argument assemble functions
++
++ Description : All take an instruction argument string, and a pointer
++ to an instruction opcode. Upon return the insn_opcode
++ has the relevant fields filled in to represent the arg
++ string. The return value is NULL if successful, or
++ an error message if an error was detected
++ *********************************************************************/
++
++/* assembles register arguments "dst, src1, src2" */
++void
++nios2_assemble_args_dst (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *dst, *src1, *src2;
++
++ if (insn_info->insn_tokens[1] != NULL &&
++ insn_info->insn_tokens[2] != NULL && insn_info->insn_tokens[3] != NULL)
++ {
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++ src1 =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++ src2 =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[3]);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (RRD, insn_info->insn_code, dst->index);
++
++ if (src1 == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (RRS, insn_info->insn_code, src1->index);
++
++ if (src2 == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[3]);
++ else
++ SET_INSN_FIELD (RRT, insn_info->insn_code, src2->index);
++
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[4]);
++ }
++}
++
++
++/* assembles arguments successfully parsed by nios2_parse_args_tsi */
++void
++nios2_assemble_args_tsi (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *dst, *src1;
++ unsigned int src2;
++
++ if (insn_info->insn_tokens[1] != NULL &&
++ insn_info->insn_tokens[2] != NULL && insn_info->insn_tokens[3] != NULL)
++ {
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++ src1 =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++ src2 =
++ nios2_assemble_expression (insn_info->insn_tokens[3], insn_info,
++ insn_info->insn_reloc, BFD_RELOC_NIOS2_S16,
++ 0);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (IRT, insn_info->insn_code, dst->index);
++
++ if (src1 == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (IRS, insn_info->insn_code, src1->index);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, src2);
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[4]);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, 0);
++ }
++}
++
++
++/* assembles args successfully parsed by nios2_parse_args_tsu */
++void
++nios2_assemble_args_tsu (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *dst, *src1;
++ unsigned int src2;
++
++ if (insn_info->insn_tokens[1] != NULL &&
++ insn_info->insn_tokens[2] != NULL && insn_info->insn_tokens[3] != NULL)
++ {
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++ src1 =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++ src2 =
++ nios2_assemble_expression (insn_info->insn_tokens[3], insn_info,
++ insn_info->insn_reloc, BFD_RELOC_NIOS2_U16,
++ 0);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (IRT, insn_info->insn_code, dst->index);
++
++ if (src1 == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (IRS, insn_info->insn_code, src1->index);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, src2);
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[4]);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, 0);
++ }
++}
++
++
++/* assembles args successfully parsed by nios2_parse_args_sti */
++void
++nios2_assemble_args_sto (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *dst, *src1;
++ unsigned int src2;
++
++ if (insn_info->insn_tokens[1] != NULL &&
++ insn_info->insn_tokens[2] != NULL && insn_info->insn_tokens[3] != NULL)
++ {
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++ src1 =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++ src2 =
++ nios2_assemble_expression (insn_info->insn_tokens[3], insn_info,
++ insn_info->insn_reloc, BFD_RELOC_16_PCREL,
++ 1);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (IRS, insn_info->insn_code, dst->index);
++
++ if (src1 == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (IRT, insn_info->insn_code, src1->index);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, src2);
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[4]);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, 0);
++ }
++}
++
++
++void
++nios2_assemble_args_o (nios2_insn_infoS * insn_info)
++{
++ unsigned long immed;
++
++ if (insn_info->insn_tokens[1] != NULL)
++ {
++ immed =
++ nios2_assemble_expression (insn_info->insn_tokens[1], insn_info,
++ insn_info->insn_reloc, BFD_RELOC_16_PCREL,
++ 1);
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, immed);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[2]);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, 0);
++ }
++}
++
++
++void
++nios2_assemble_args_is (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *addr_src;
++ unsigned long immed;
++
++ if (insn_info->insn_tokens[1] != NULL && insn_info->insn_tokens[2] != NULL)
++ {
++ addr_src =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++
++ immed =
++ nios2_assemble_expression (insn_info->insn_tokens[1], insn_info,
++ insn_info->insn_reloc, BFD_RELOC_NIOS2_S16,
++ 0);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, immed);
++
++ if (addr_src == NULL)
++ as_bad (_("unknown base register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (RRS, insn_info->insn_code, addr_src->index);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[3]);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, 0);
++ }
++}
++
++
++void
++nios2_assemble_args_m (nios2_insn_infoS * insn_info)
++{
++ unsigned long immed;
++ if (insn_info->insn_tokens[1] != NULL)
++ {
++ immed =
++ nios2_assemble_expression (insn_info->insn_tokens[1], insn_info,
++ insn_info->insn_reloc,
++ BFD_RELOC_NIOS2_CALL26, 0);
++
++ SET_INSN_FIELD (IMM26, insn_info->insn_code, immed);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[2]);
++
++ SET_INSN_FIELD (IMM26, insn_info->insn_code, 0);
++ }
++}
++
++
++void
++nios2_assemble_args_s (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *src;
++
++ if (insn_info->insn_tokens[1] != NULL)
++ {
++ src =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++
++ if (src == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (RRS, insn_info->insn_code, src->index);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[2]);
++ }
++}
++
++
++void
++nios2_assemble_args_tis (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *addr_src, *dst;
++ unsigned long immed;
++
++ if (insn_info->insn_tokens[1] != NULL &&
++ insn_info->insn_tokens[2] != NULL && insn_info->insn_tokens[3] != NULL)
++ {
++
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++ addr_src =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[3]);
++ immed =
++ nios2_assemble_expression (insn_info->insn_tokens[2], insn_info,
++ insn_info->insn_reloc, BFD_RELOC_NIOS2_S16,
++ 0);
++
++
++ if (addr_src == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[3]);
++ else
++ SET_INSN_FIELD (RRS, insn_info->insn_code, addr_src->index);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (RRT, insn_info->insn_code, dst->index);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, immed);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[4]);
++
++ SET_INSN_FIELD (IMM16, insn_info->insn_code, 0);
++ }
++}
++
++
++/* assemble rdctl dst, ctl */
++void
++nios2_assemble_args_dc (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *dst, *ctl;
++
++ if (insn_info->insn_tokens[1] != NULL && insn_info->insn_tokens[2] != NULL)
++ {
++ ctl =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++
++ if (ctl == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (RCTL, insn_info->insn_code, ctl->index);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (RRD, insn_info->insn_code, dst->index);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[3]);
++ }
++}
++
++
++/* assemble wrctl ctl, src */
++void
++nios2_assemble_args_cs (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *src, *ctl;
++
++ if (insn_info->insn_tokens[1] != NULL && insn_info->insn_tokens[2] != NULL)
++ {
++ ctl =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++ src =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++
++ if (ctl == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else if (ctl->index == 4)
++ as_bad (_("ipending control register (ctl4) is read-only\n"));
++ else
++ SET_INSN_FIELD (RCTL, insn_info->insn_code, ctl->index);
++
++ if (src == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (RRS, insn_info->insn_code, src->index);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[3]);
++ }
++}
++
++
++
++void
++nios2_assemble_args_ldst (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *dst, *src1, *src2;
++ unsigned long custom_n;
++
++ if (insn_info->insn_tokens[1] != NULL &&
++ insn_info->insn_tokens[2] != NULL &&
++ insn_info->insn_tokens[3] != NULL && insn_info->insn_tokens[4] != NULL)
++ {
++#if 0 /* ??? Unused/half commented out code */
++ char *end_p;
++ /* custom_n = nios2_strtoul(insn_info->insn_tokens[1], &end_p); */
++#endif
++ custom_n =
++ nios2_assemble_expression (insn_info->insn_tokens[1], insn_info,
++ insn_info->insn_reloc,
++ BFD_RELOC_NIOS2_IMM8, 0);
++
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++ src1 =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[3]);
++ src2 =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[4]);
++
++ SET_INSN_FIELD (CUSTOM_N, insn_info->insn_code, custom_n);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (RRD, insn_info->insn_code, dst->index);
++
++ if (src1 == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[3]);
++ else
++ SET_INSN_FIELD (RRS, insn_info->insn_code, src1->index);
++
++ if (src2 == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[4]);
++ else
++ SET_INSN_FIELD (RRT, insn_info->insn_code, src2->index);
++
++ /* set or clear the bits to indicate whether coprocessor registers are used */
++ if (nios2_coproc_reg (insn_info->insn_tokens[2]))
++ SET_INSN_FIELD (CUSTOM_C, insn_info->insn_code, 0);
++ else
++ SET_INSN_FIELD (CUSTOM_C, insn_info->insn_code, 1);
++
++ if (nios2_coproc_reg (insn_info->insn_tokens[3]))
++ SET_INSN_FIELD (CUSTOM_A, insn_info->insn_code, 0);
++ else
++ SET_INSN_FIELD (CUSTOM_A, insn_info->insn_code, 1);
++
++ if (nios2_coproc_reg (insn_info->insn_tokens[4]))
++ SET_INSN_FIELD (CUSTOM_B, insn_info->insn_code, 0);
++ else
++ SET_INSN_FIELD (CUSTOM_B, insn_info->insn_code, 1);
++
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[5]);
++ }
++}
++
++
++void
++nios2_assemble_args_none (nios2_insn_infoS * insn_info ATTRIBUTE_UNUSED)
++{
++ // nothing to do
++}
++
++
++void
++nios2_assemble_args_dsj (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *dst, *src1;
++ unsigned int src2;
++
++ if (insn_info->insn_tokens[1] != NULL &&
++ insn_info->insn_tokens[2] != NULL && insn_info->insn_tokens[3] != NULL)
++ {
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++ src1 =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[2]);
++
++ // a 5-bit constant expression
++ src2 =
++ nios2_assemble_expression (insn_info->insn_tokens[3], insn_info,
++ insn_info->insn_reloc,
++ BFD_RELOC_NIOS2_IMM5, 0);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (RRD, insn_info->insn_code, dst->index);
++
++ if (src1 == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[2]);
++ else
++ SET_INSN_FIELD (RRS, insn_info->insn_code, src1->index);
++
++ SET_INSN_FIELD (IMM5, insn_info->insn_code, src2);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[4]);
++
++ SET_INSN_FIELD (IMM5, insn_info->insn_code, 0);
++ }
++}
++
++
++/* assembles register arguments "dst" */
++void
++nios2_assemble_args_d (nios2_insn_infoS * insn_info)
++{
++ struct nios2_reg *dst;
++
++ if (insn_info->insn_tokens[1] != NULL)
++ {
++ dst =
++ (struct nios2_reg *) hash_find (nios2_reg_hash,
++ insn_info->insn_tokens[1]);
++
++ if (dst == NULL)
++ as_bad (_("unknown register %s"), insn_info->insn_tokens[1]);
++ else
++ SET_INSN_FIELD (RRD, insn_info->insn_code, dst->index);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[2]);
++ }
++}
++
++/* assemble break op */
++void
++nios2_assemble_args_b (nios2_insn_infoS * insn_info)
++{
++ unsigned int imm5 = 0;
++
++ if (insn_info->insn_tokens[1] != NULL)
++ {
++ // a 5-bit constant expression
++ imm5 =
++ nios2_assemble_expression (insn_info->insn_tokens[1], insn_info,
++ insn_info->insn_reloc,
++ BFD_RELOC_NIOS2_IMM5, 0);
++
++ SET_INSN_FIELD (TRAP_IMM5, insn_info->insn_code, imm5);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[2]);
++ }
++
++ SET_INSN_FIELD (TRAP_IMM5, insn_info->insn_code, imm5);
++
++ NIOS2_CHECK_ASSEMBLY (insn_info->insn_code, insn_info->insn_tokens[2]);
++}
++
++/* Machine-dependent assembler directive handling follows */
++
++/*
++ .set sets assembler options eg noat/at and is also used
++ to set symbol values (.equ, .equiv )
++*/
++void
++s_nios2_set (int equiv)
++{
++ char *directive = input_line_pointer;
++ char delim = get_symbol_end ();
++ char *endline;
++ endline = input_line_pointer;
++ *endline = delim;
++
++ /* we only want to handle ".set XXX" if the
++ user has tried ".set XXX, YYY" they are not
++ trying a directive. This prevents
++ us from polluting the name space */
++
++ SKIP_WHITESPACE ();
++
++ if (is_end_of_line[(unsigned char) *input_line_pointer])
++ {
++ bfd_boolean done = FALSE;
++ *endline = 0;
++
++ if (!strcmp (directive, "noat"))
++ {
++ done = TRUE;
++ nios2_as_options.noat = TRUE;
++ }
++
++ if (!strcmp (directive, "at"))
++ {
++ done = TRUE;
++ nios2_as_options.noat = FALSE;
++ }
++
++ if (!strcmp (directive, "nobreak"))
++ {
++ done = TRUE;
++ nios2_as_options.nobreak = TRUE;
++ }
++
++ if (!strcmp (directive, "break"))
++ {
++ done = TRUE;
++ nios2_as_options.nobreak = FALSE;
++ }
++
++ if (!strcmp (directive, "norelax"))
++ {
++ done = TRUE;
++ nios2_as_options.relax = relax_none;
++ }
++ else if (!strcmp (directive, "relaxsection"))
++ {
++ done = TRUE;
++ nios2_as_options.relax = relax_section;
++ }
++ else if (!strcmp (directive, "relaxall"))
++ {
++ done = TRUE;
++ nios2_as_options.relax = relax_all;
++ }
++
++
++ if (done)
++ {
++ *endline = delim;
++ demand_empty_rest_of_line ();
++ return;
++ }
++ }
++
++
++ /* If we fall through to here, either we have ".set XXX, YYY"
++ or we have ".set XXX" where XXX is unknown or we have
++ a syntax error */
++ input_line_pointer = directive;
++ *endline = delim;
++ s_set (equiv);
++}
++
++/* nop fill pattern for text section */
++static char const nop[4] = { 0x3a, 0x88, 0x01, 0x00 };
++
++/* nios2_frob_label() is called when after a label is recognized. */
++
++void
++nios2_frob_label (symbolS * lab)
++{
++ /* Update the label's address with the current output pointer. */
++ symbol_set_frag (lab, frag_now);
++ S_SET_VALUE (lab, (valueT) frag_now_fix ());
++
++ /* Record this label for future adjustment after we find out what
++ kind of data it references, and the required alignment therewith. */
++ nios2_last_label = lab;
++}
++
++
++
++/* Hook into cons for auto-alignment. */
++
++void
++nios2_cons_align (int size)
++{
++ int log_size;
++ const char *pfill = NULL;
++
++ log_size = 0;
++ while ((size >>= 1) != 0)
++ ++log_size;
++
++ if (subseg_text_p (now_seg))
++ {
++ pfill = (const char *) &nop;
++ }
++ else
++ pfill = NULL;
++
++ if (nios2_auto_align_on)
++ nios2_align (log_size, pfill, NULL);
++
++ nios2_last_label = NULL;
++}
++
++static void
++s_nios2_sdata (int ignore ATTRIBUTE_UNUSED)
++{
++ int temp;
++
++ temp = get_absolute_expression ();
++ subseg_new (".sdata", 0);
++ demand_empty_rest_of_line ();
++}
++
++/* Map 's' to SHF_NIOS2_GPREL. */
++/* this is from the Alpha code tc-alpha.c */
++int
++nios2_elf_section_letter (int letter, char **ptr_msg)
++{
++ if (letter == 's')
++ return SHF_NIOS2_GPREL;
++
++ *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
++ return 0;
++}
++
++/* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
++/* this is from the Alpha code tc-alpha.c */
++flagword
++nios2_elf_section_flags (flagword flags, int attr, int type ATTRIBUTE_UNUSED)
++{
++ if (attr & SHF_NIOS2_GPREL)
++ flags |= SEC_SMALL_DATA;
++ return flags;
++}
++
++/* explicitly unaligned cons */
++
++static void
++s_nios2_ucons (int nbytes)
++{
++ int hold;
++ hold = nios2_auto_align_on;
++ nios2_auto_align_on = 0;
++ cons (nbytes);
++ nios2_auto_align_on = hold;
++}
++
++/* Handles all machine-dependent alignment needs */
++static void
++nios2_align (int log_size, const char *pfill, symbolS * label)
++{
++ int align;
++ long max_alignment = 15;
++
++ /* The front end is prone to changing segments out from under us
++ temporarily when -g is in effect. */
++ int switched_seg_p = (nios2_current_align_seg != now_seg);
++
++ align = log_size;
++ if (align > max_alignment)
++ {
++ align = max_alignment;
++ as_bad (_("Alignment too large: %d. assumed"), align);
++ }
++ else if (align < 0)
++ {
++ as_warn (_("Alignment negative: 0 assumed"));
++ align = 0;
++ }
++
++ if (align != 0)
++ {
++ if (subseg_text_p (now_seg) && align >= 2)
++ {
++ /* First, make sure we're on a four-byte boundary, in case
++ someone has been putting .byte values the text section. */
++ if (nios2_current_align < 2 || switched_seg_p)
++ frag_align (2, 0, 0);
++
++ /* now fill in the alignment pattern */
++ if (pfill != NULL)
++ frag_align_pattern (align, pfill, sizeof nop, 0);
++ else
++ frag_align (align, 0, 0);
++ }
++ else
++ {
++ frag_align (align, 0, 0);
++ }
++
++ if (!switched_seg_p)
++ nios2_current_align = align;
++
++ /* If the last label was in a different section we can't align it */
++ if (label != NULL && !switched_seg_p)
++ {
++ symbolS *sym;
++ int label_seen = FALSE;
++ struct frag *old_frag;
++ valueT old_value;
++ valueT new_value;
++
++ assert (S_GET_SEGMENT (label) == now_seg);
++
++ old_frag = symbol_get_frag (label);
++ old_value = S_GET_VALUE (label);
++ new_value = (valueT) frag_now_fix ();
++
++ /* It is possible to have more than one label at a particular
++ address, especially if debugging is enabled, so we must
++ take care to adjust all the labels at this address in this
++ fragment. To save time we search from the end of the symbol
++ list, backwards, since the symbols we are interested in are
++ almost certainly the ones that were most recently added.
++ Also to save time we stop searching once we have seen at least
++ one matching label, and we encounter a label that is no longer
++ in the target fragment. Note, this search is guaranteed to
++ find at least one match when sym == label, so no special case
++ code is necessary. */
++ for (sym = symbol_lastP; sym != NULL; sym = symbol_previous (sym))
++ {
++ if (symbol_get_frag (sym) == old_frag
++ && S_GET_VALUE (sym) == old_value)
++ {
++ label_seen = TRUE;
++ symbol_set_frag (sym, frag_now);
++ S_SET_VALUE (sym, new_value);
++ }
++ else if (label_seen && symbol_get_frag (sym) != old_frag)
++ break;
++ }
++ }
++ record_alignment (now_seg, align);
++ }
++}
++
++/* This is called from HANDLE_ALIGN in tc-nios2.h. */
++
++void
++nios2_handle_align (fragS * fragp)
++{
++ /* If we are expecting to relax in the linker, then we must output a relocation
++ * to tell the linker we are aligning code */
++ if (nios2_as_options.relax == relax_all
++ && (fragp->fr_type == rs_align
++ || fragp->fr_type == rs_align_code)
++ && fragp->fr_address + fragp->fr_fix > 0
++ && fragp->fr_offset > 1 && now_seg != bss_section)
++ fix_new (fragp, fragp->fr_fix, 4, &abs_symbol, fragp->fr_offset, 0,
++ BFD_RELOC_NIOS2_ALIGN);
++
++}
++
++/* Handle the .align pseudo-op. This aligns to a power of two. It
++ also adjusts any current instruction label. We treat this the same
++ way the MIPS port does: .align 0 turns off auto alignment. */
++
++static void
++s_nios2_align (int ignore ATTRIBUTE_UNUSED)
++{
++ int align;
++ char fill;
++ const char *pfill = NULL;
++ long max_alignment = 15;
++
++
++ align = get_absolute_expression ();
++ if (align > max_alignment)
++ {
++ align = max_alignment;
++ as_bad (_("Alignment too large: %d. assumed"), align);
++ }
++ else if (align < 0)
++ {
++ as_warn (_("Alignment negative: 0 assumed"));
++ align = 0;
++ }
++
++ if (*input_line_pointer == ',')
++ {
++ input_line_pointer++;
++ fill = get_absolute_expression ();
++ pfill = (const char *) &fill;
++ }
++ else if (subseg_text_p (now_seg))
++ {
++ pfill = (const char *) &nop;
++ }
++ else
++ {
++ pfill = NULL;
++ nios2_last_label = NULL;
++ }
++
++ if (align != 0)
++ {
++ nios2_auto_align_on = 1;
++ nios2_align (align, pfill, nios2_last_label);
++ nios2_last_label = NULL;
++ }
++ else
++ {
++ nios2_auto_align_on = 0;
++ }
++
++ demand_empty_rest_of_line ();
++}
++
++
++/* Handle the .text pseudo-op. This is like the usual one, but it
++ clears the saved last label and resets known alignment. */
++
++static void
++s_nios2_text (int i)
++{
++ s_text (i);
++ nios2_last_label = NULL;
++ nios2_current_align = 0;
++ nios2_current_align_seg = now_seg;
++}
++
++/* Handle the .data pseudo-op. This is like the usual one, but it
++ clears the saved last label and resets known alignment. */
++
++static void
++s_nios2_data (int i)
++{
++ s_data (i);
++ nios2_last_label = NULL;
++ nios2_current_align = 0;
++ nios2_current_align_seg = now_seg;
++}
++
++/* Handle the .section pseudo-op. This is like the usual one, but it
++ clears the saved last label and resets known alignment. */
++
++static void
++s_nios2_section (int ignore)
++{
++ obj_elf_section (ignore);
++ nios2_last_label = NULL;
++ nios2_current_align = 0;
++ nios2_current_align_seg = now_seg;
++}
+--- binutils-2.15/gas/config/tc-nios2.h 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/config/tc-nios2.h 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,98 @@
++/* tc-nios2.h -- header file for tc-nios2.c.
++
++ Copyright (C) 2003
++ by Nigel Gray (ngray@altera.com).
++
++ This file is part of GAS.
++
++ GAS is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 2, or (at your option)
++ any later version.
++
++ GAS is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with GAS; see the file COPYING. If not, write to the Free
++ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
++ 02111-1307, USA. */
++
++#ifndef TC_NIOS2
++#define TC_NIOS2
++
++
++#define TARGET_BYTES_BIG_ENDIAN 0
++
++#ifdef OBJ_ELF
++#define TARGET_FORMAT "elf32-littlenios2"
++#define TARGET_ARCH bfd_arch_nios2
++#endif
++
++/* An NIOS2 instruction consists of tokens and separator characters
++// the tokens are things like the instruction name (add, or jmp etc),
++// the register indices ($5, $7 etc), and constant expressions. The
++// separator characters are commas, brackets and space.
++// The instruction name is always separated from other tokens by a space
++// The maximum number of tokens in an instruction is 5 (the instruction name,
++// 3 arguments, and a 4th string representing the expected instructin opcode
++// after assembly. The latter is only used when the assemble is running in
++// self test mode, otherwise its presence will generate an error. */
++#define NIOS2_MAX_INSN_TOKENS 6
++
++/* There are no machine-specific operands so we #define this to nothing */
++#define md_operand(x)
++
++/* NG this may need to change when we look at implementing symbols */
++#define md_undefined_symbol(name) (0)
++
++/* function prototypes exported to rest of GAS */
++extern void md_assemble (char *op_str);
++extern void md_end (void);
++extern void md_begin (void);
++
++#define TC_FORCE_RELOCATION(fixp) nios2_force_relocation (fixp)
++extern int nios2_force_relocation (struct fix *);
++
++#define tc_fix_adjustable(fixp) nios2_fix_adjustable (fixp)
++extern int nios2_fix_adjustable (struct fix *);
++
++#define tc_frob_label(lab) nios2_frob_label(lab)
++extern void nios2_frob_label (symbolS *);
++
++#define tc_frob_symbol(symp, punt) punt = nios2_frob_symbol(symp) ? 1 : punt
++extern int nios2_frob_symbol (symbolS * symp);
++
++#define md_cons_align(nbytes) nios2_cons_align (nbytes)
++extern void nios2_cons_align (int);
++
++extern void md_convert_frag (bfd * headers, segT sec, fragS * fragP);
++
++/* When relaxing, we need to generate relocations for alignment
++ directives. */
++#define HANDLE_ALIGN(frag) nios2_handle_align (frag)
++extern void nios2_handle_align (fragS *);
++
++
++#define md_relax_frag nios2_relax_frag
++extern long nios2_relax_frag
++ (segT segment, fragS * fragP, long stretch);
++
++#ifdef OBJ_ELF
++#define ELF_TC_SPECIAL_SECTIONS \
++ { ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_NIOS2_GPREL }, \
++ { ".sbss", SHT_NOBITS, SHF_ALLOC + SHF_WRITE + SHF_NIOS2_GPREL }, \
++ { ".lit4", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_NIOS2_GPREL }, \
++ { ".lit8", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE + SHF_NIOS2_GPREL },
++
++/* Processor specific section directives */
++#define md_elf_section_letter nios2_elf_section_letter
++extern int nios2_elf_section_letter (int, char **);
++#define md_elf_section_flags nios2_elf_section_flags
++extern flagword nios2_elf_section_flags (flagword, int, int);
++#endif
++
++
++#endif // TC_NIOS2
+--- binutils-2.15/gas/configure 2004-05-17 21:36:07.000000000 +0200
++++ binutils-2.15-nios2/gas/configure 2005-05-17 12:20:13.000000000 +0200
+@@ -4173,6 +4173,7 @@ for this_target in $target $canon_target
+ m8*) cpu_type=m88k ;;
+ mips*el) cpu_type=mips endian=little ;;
+ mips*) cpu_type=mips endian=big ;;
++ nios2*|nios2*) cpu_type=nios2 ;;
+ or32*) cpu_type=or32 endian=big ;;
+ pjl*) cpu_type=pj endian=little ;;
+ pj*) cpu_type=pj endian=big ;;
+@@ -4439,6 +4440,7 @@ echo "$as_me: error: Unknown vendor for
+ mn10200-*-*) fmt=elf ;;
+ mn10300-*-*) fmt=elf ;;
+ msp430-*-*) fmt=elf ;;
++ nios2-*-*) fmt=elf ;;
+ openrisc-*-*) fmt=elf ;;
+ or32-*-rtems*) fmt=elf ;;
+ or32-*-coff) fmt=coff ;;
+@@ -4589,7 +4591,7 @@ _ACEOF
+ fi
+
+ case ${cpu_type}-${fmt} in
+- alpha*-* | arm-* | i386-* | ia64*-* | mips-* | ns32k-* \
++ alpha*-* | arm-* | i386-* | ia64*-* | mips-* | nios2-* | ns32k-* \
+ | pdp11-* | ppc-* | sparc-* | strongarm-* | xscale-* \
+ | *-elf | *-ecoff | *-som)
+ bfd_gas=yes ;;
+--- binutils-2.15/gas/configure.in 2004-05-17 21:36:07.000000000 +0200
++++ binutils-2.15-nios2/gas/configure.in 2005-05-17 12:20:13.000000000 +0200
+@@ -143,6 +143,7 @@ changequote([,])dnl
+ m8*) cpu_type=m88k ;;
+ mips*el) cpu_type=mips endian=little ;;
+ mips*) cpu_type=mips endian=big ;;
++ nios2*|nios2*) cpu_type=nios2 ;;
+ or32*) cpu_type=or32 endian=big ;;
+ pjl*) cpu_type=pj endian=little ;;
+ pj*) cpu_type=pj endian=big ;;
+@@ -400,6 +401,7 @@ changequote([,])dnl
+ mn10200-*-*) fmt=elf ;;
+ mn10300-*-*) fmt=elf ;;
+ msp430-*-*) fmt=elf ;;
++ nios2-*-*) fmt=elf ;;
+ openrisc-*-*) fmt=elf ;;
+ or32-*-rtems*) fmt=elf ;;
+ or32-*-coff) fmt=coff ;;
+@@ -539,7 +541,7 @@ changequote([,])dnl
+ fi
+
+ case ${cpu_type}-${fmt} in
+- alpha*-* | arm-* | i386-* | ia64*-* | mips-* | ns32k-* \
++ alpha*-* | arm-* | i386-* | ia64*-* | mips-* | nios2-* | ns32k-* \
+ | pdp11-* | ppc-* | sparc-* | strongarm-* | xscale-* \
+ | *-elf | *-ecoff | *-som)
+ bfd_gas=yes ;;
+--- binutils-2.15/gas/doc/Makefile.am 2004-01-05 23:16:05.000000000 +0100
++++ binutils-2.15-nios2/gas/doc/Makefile.am 2005-05-17 12:20:13.000000000 +0200
+@@ -24,6 +24,7 @@ asconfig.texi: $(CONFIG).texi
+ || cp $(srcdir)/$(CONFIG).texi ./asconfig.texi
+
+ CPU_DOCS = \
++ c-nios2.texi \
+ c-a29k.texi \
+ c-alpha.texi \
+ c-arc.texi \
+--- binutils-2.15/gas/doc/Makefile.in 2004-05-17 21:36:11.000000000 +0200
++++ binutils-2.15-nios2/gas/doc/Makefile.in 2005-05-17 12:20:13.000000000 +0200
+@@ -213,6 +213,7 @@ POD2MAN = pod2man --center="GNU Developm
+ man_MANS = as.1
+ info_TEXINFOS = as.texinfo
+ CPU_DOCS = \
++ c-nios2.texi \
+ c-a29k.texi \
+ c-alpha.texi \
+ c-arc.texi \
+--- binutils-2.15/gas/doc/all.texi 2003-04-01 17:50:30.000000000 +0200
++++ binutils-2.15-nios2/gas/doc/all.texi 2005-05-17 12:20:13.000000000 +0200
+@@ -26,6 +26,7 @@
+
+ @c CPUs of interest
+ @c ================
++@set NIOSII
+ @set A29K
+ @set ALPHA
+ @set ARC
+--- binutils-2.15/gas/doc/as.texinfo 2004-01-09 03:34:04.000000000 +0100
++++ binutils-2.15-nios2/gas/doc/as.texinfo 2005-05-17 12:20:13.000000000 +0200
+@@ -238,6 +238,15 @@ gcc(1), ld(1), and the Info entries for
+ @c
+ @c Target dependent options are listed below. Keep the list sorted.
+ @c Add an empty line for separation.
++
++
++@ifset NIOSII
++@emph{Target Altera Nios II options:}
++ [@b{-relax-all}]
++ [@b{-relax-section}]
++ [@b{-no-relax}]
++@end ifset
++
+ @ifset A29K
+ @c am29k has no machine-dependent assembler options
+ @end ifset
+@@ -577,6 +586,21 @@ Standard input, or source files to assem
+
+ @end table
+
++@ifset NIOSII
++The following options are available when @value{AS} is configured for
++an Altera Nios II processor.
++
++@table @gcctabopt
++@item -relax-all
++Replace all branch and call instructions with @code{jmp} and @code{callr} sequences
++@item -relax-section
++Replace identified out of range branches with @code{jmp} sequences (default)
++@item -no-relax
++Do not replace any branches or calls
++@end table
++@end ifset
++
++
+ @ifset ARC
+ The following options are available when @value{AS} is configured for
+ an ARC processor.
+@@ -2035,6 +2059,9 @@ This means you may not nest these commen
+ @cindex line comment character
+ Anything from the @dfn{line comment} character to the next newline
+ is considered a comment and is ignored. The line comment character is
++@ifset NIOSII
++@samp{#} for the Altera Nios II family;
++@end ifset
+ @ifset A29K
+ @samp{;} for the AMD 29K family;
+ @end ifset
+@@ -3876,7 +3903,7 @@ is already a multiple of 8, no change is
+ first expression is the alignment request in words.
+
+ For other systems, including the i386 using a.out format, and the arm and
+-strongarm, it is the
++strongarm, and the Altera Nios II, it is the
+ number of low-order zero bits the location counter must have after
+ advancement. For example @samp{.align 3} advances the location
+ counter until it a multiple of 8. If the location counter is already a
+@@ -5864,6 +5891,9 @@ include details on any machine's instruc
+ subject, see the hardware manufacturer's manual.
+
+ @menu
++@ifset NIOSII
++* NiosII-Dependent:: Altera Nios II Dependent Features
++@end ifset
+ @ifset A29K
+ * AMD29K-Dependent:: AMD 29K Dependent Features
+ @end ifset
+@@ -5974,6 +6004,11 @@ subject, see the hardware manufacturer's
+ @c node and sectioning commands; hence the repetition of @chapter BLAH
+ @c in both conditional blocks.
+
++
++@ifset NIOSII
++@include c-nios2.texi
++@end ifset
++
+ @ifset A29K
+ @include c-a29k.texi
+ @end ifset
+--- binutils-2.15/gas/doc/c-nios2.texi 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/doc/c-nios2.texi 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,214 @@
++@c Copyright 2004
++@c This is part of the GAS manual.
++@c For copying conditions, see the file as.texinfo.
++@ifset GENERIC
++@page
++@node NiosII-Dependent
++@chapter Altera Nios II Dependent Features
++@end ifset
++@ifclear GENERIC
++@node Machine Dependencies
++@chapter ltera Nios II Dependent Features
++@end ifclear
++
++@cindex Altera Nios II support
++@cindex Nios support
++@cindex Nios II support
++@menu
++* Nios II Options:: Options
++* Nios II Syntax:: Syntax
++* Nios II Relocations:: Relocations
++* Nios II Directives:: Nios II Machine Directives
++* Nios II Opcodes:: Opcodes
++@end menu
++
++@node Nios II Options
++@section Options
++@cindex Nios II options
++@cindex options for Nios II
++
++@table @code
++
++@cindex @code{relax-all} command line option, Nios II
++@item -relax-all
++Replace all branch and call instructions with @code{jmp} and @code{callr} sequences
++
++@cindex @code{relax-section} command line option, Nios II
++@item -relax-section
++Replace identified out of range branches with @code{jmp} sequences (default)
++
++@cindex @code{no-relax} command line option, Nios II
++@item -no-relax
++Do not replace any branches or calls
++
++@end table
++
++
++@node Nios II Syntax
++@section Syntax
++@menu
++* Nios II Chars:: Special Characters
++@end menu
++
++
++@node Nios II Chars
++@subsection Special Characters
++
++@cindex line comment character, Nios II
++@cindex Nios II line comment character
++@samp{#} is the line comment character.
++
++@cindex line separator character, Nios II
++@cindex Nios II line separator character
++@samp{;} is the line separator character.
++
++
++@node Nios II Relocations
++@section Nios II Machine Relocations
++
++@cindex machine relocations, Nios II
++@cindex Nios II machine relocations
++
++@table @code
++@cindex @code{hiadj} directive, Nios II
++@item %hiadj(@var{expression})
++Extract the upper 16-bits of @var{expression} and add
++one if the 15th bit is set.
++
++The value of %hiadj is:
++((@var{expression} >> 16) & 0xffff) + ((@var{expression} >> 15) & 0x01).
++
++The intention of the @code{%hiadj} relocation is to be used with
++an @code{addi}, @code{ld} or @code{st} instructions
++along with a @code{%lo}.
++
++@smallexample
++movhi r2, %hiadj(symbol)
++addi r2, r2, %lo(symbol)
++@end smallexample
++
++@cindex @code{hi} directive, Nios II
++@item %hi(@var{expression})
++Extract the upper 16-bits of @var{expression}.
++
++
++@cindex @code{lo} directive, Nios II
++@item %lo(@var{expression})
++Extract the lower 16-bits of @var{expression}.
++
++
++@cindex @code{gprel} directive, Nios II
++@item %gprel(@var{expression})
++Subtract the value of the symbol @code{_gp} from
++@var{expression}.
++
++The intention of the @code{%gprel} relocation is
++to have a fast small area of memory which only
++takes a 16-bit immediate to access.
++
++@smallexample
++ .section .sdata
++fastint:
++ .int 123
++ .section .text
++ ldw r4, %gprel(fastint)(gp)
++@end smallexample
++
++
++@end table
++
++
++@node Nios II Directives
++@section Nios II Machine Directives
++
++@cindex machine directives, Nios II
++@cindex Nios II machine directives
++
++@table @code
++
++@cindex @code{align} directive, Nios II
++@item .align @var{expression} [, @var{expression}]
++This is the generic @var{.align} directive, however
++this aligns to a power of two.
++
++@cindex @code{half} directive, Nios II
++@item .half @var{expression}
++Create an aligned constant 2-bytes in size
++
++@cindex @code{word} directive, Nios II
++@item .word @var{expression}
++Create an aligned constant 4-bytes in size
++
++@cindex @code{dword} directive, Nios II
++@item .dword @var{expression}
++Create an aligned constant 8-bytes in size
++
++@cindex @code{2byte} directive, Nios II
++@item .2byte @var{expression}
++Create an un-aligned constant 2-bytes in size
++
++@cindex @code{4byte} directive, Nios II
++@item .4byte @var{expression}
++Create an un-aligned constant 4-bytes in size
++
++@cindex @code{8byte} directive, Nios II
++@item .8byte @var{expression}
++Create an un-aligned constant 8-bytes in size
++
++@cindex @code{16byte} directive, Nios II
++@item .16byte @var{expression}
++Create an un-aligned constant 16-bytes in size
++
++@cindex @code{set noat} directive, Nios II
++@item .set noat
++Allows assembly code to use @code{at} register without
++warning and macro or relaxation expansions will
++generate a warning.
++
++@cindex @code{set at} directive, Nios II
++@item .set at
++Assembly code using @code{at} register will generate
++warnings, and macro expansion and relaxation will be
++enabled.
++
++@cindex @code{set nobreak} directive, Nios II
++@item .set nobreak
++Allows assembly code to use @code{ba}, @code{bt},
++registers without warning.
++
++@cindex @code{set break} directive, Nios II
++@item .set break
++Turns warnings back on for using @code{ba}, @code{bt}
++registers.
++
++@cindex @code{set norelax} directive, Nios II
++@item .set norelax
++Do not replace any branches or calls.
++
++@cindex @code{set relaxsection} directive, Nios II
++@item .set relaxsection
++Replace identified out of range branches with
++@code{jmp} sequences (default).
++
++@cindex @code{set relaxall} directive, Nios II
++@item .set relaxsection
++Replace all branch and call instructions with
++@code{jmp} and @code{callr} sequences.
++
++@cindex @code{set} directive, Nios II
++@item .set @dots{}
++All other @code{.set} are the normal use.
++
++@end table
++
++@node Nios II Opcodes
++@section Opcodes
++
++@cindex Nios II opcodes
++@cindex opcodes for Nios II
++@code{@value{AS}} implements all the standard Nios II opcodes. No
++additional pseudo-instructions are needed on this family.
++
++For information on the Nios II machine instruction set, see the @cite{Nios II
++User's Manual}
++
+--- binutils-2.15/gas/testsuite/gas/macros/irp.s 1999-06-10 15:48:35.000000000 +0200
++++ binutils-2.15-nios2/gas/testsuite/gas/macros/irp.s 2005-05-17 12:20:13.000000000 +0200
+@@ -1,3 +1,4 @@
++ .set norelax
+ .irp param,1,2,3
+ .long foo\param
+ .endr
+--- binutils-2.15/gas/testsuite/gas/macros/rept.s 1999-06-10 15:48:39.000000000 +0200
++++ binutils-2.15-nios2/gas/testsuite/gas/macros/rept.s 2005-05-17 12:20:13.000000000 +0200
+@@ -1,3 +1,4 @@
++ .set norelax
+ .rept 3
+ .long foo1
+ .endr
+--- binutils-2.15/gas/testsuite/gas/macros/test2.s 2004-02-06 17:00:21.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/macros/test2.s 2005-05-17 12:20:13.000000000 +0200
+@@ -1,3 +1,4 @@
++ .set norelax
+ .macro m arg1 arg2 arg3
+ .long \arg1
+ .ifc ,\arg2\arg3
+--- binutils-2.15/gas/testsuite/gas/macros/test3.s 1999-06-10 15:48:44.000000000 +0200
++++ binutils-2.15-nios2/gas/testsuite/gas/macros/test3.s 2005-05-17 12:20:13.000000000 +0200
+@@ -1,3 +1,4 @@
++ .set norelax
+ .macro m arg1 arg2
+ \arg1
+ .exitm
+--- binutils-2.15/gas/testsuite/gas/nios2/add.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/add.d 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,16 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 add
++
++# Test the add instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> add r4,r4,r4
++0+0004 <[^>]*> addi r4,r4,32767
++0+0008 <[^>]*> addi r4,r4,-32768
++0+000c <[^>]*> addi r4,r4,0
++0+0010 <[^>]*> addi r4,r4,-1
++0+0014 <[^>]*> addi r4,r4,-1
++0+0018 <[^>]*> addi r4,r4,13398
++0+001c <[^>]*> nop
+--- binutils-2.15/gas/testsuite/gas/nios2/add.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/add.s 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,13 @@
++# Source file used to test the add and addi instructions.
++
++foo:
++ add r4,r4,r4
++ addi r4,r4,0x7fff
++ addi r4,r4,-0x8000
++ addi r4,r4,0x0
++ addi r4,r4,-0x01
++ subi r4,r4,0x01
++ addi r4,r4,0x3456
++
++# should disassemble to add r0,0,r0
++ nop
+--- binutils-2.15/gas/testsuite/gas/nios2/align_fill.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/align_fill.d 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,23 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 align_fill
++
++# Test the and macro.
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> addi sp,sp,-8
++0+0004 <[^>]*> stw fp,4\(sp\)
++0+0008 <[^>]*> mov fp,sp
++0+000c <[^>]*> mov r3,zero
++0+0010 <[^>]*> nop
++0+0014 <[^>]*> nop
++0+0018 <[^>]*> nop
++0+001c <[^>]*> nop
++0+0020 <[^>]*> addi r3,r3,1
++0+0024 <[^>]*> cmplti r2,r3,100
++0+0028 <[^>]*> bne r2,zero,0+0020 <[^>*]*>
++0+002c <[^>]*> ldw fp,4\(sp\)
++0+0030 <[^>]*> addi sp,sp,8
++0+0034 <[^>]*> ret
++ ...
+--- binutils-2.15/gas/testsuite/gas/nios2/align_fill.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/align_fill.s 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,20 @@
++ .file "a.c"
++ .section .text
++ .align 3
++ .global x
++ .type x, @function
++x:
++ addi sp, sp, -8
++ stw fp, 4(sp)
++ mov fp, sp
++ mov r3, zero
++ .align 5
++.L6:
++ addi r3, r3, 1
++ cmplti r2, r3, 100
++ bne r2, zero, .L6
++ ldw fp, 4(sp)
++ addi sp, sp, 8
++ ret
++ .size x, .-x
++ .ident "GCC: (GNU) 3.3.3 (Altera Nios II 1.0 b302)"
+--- binutils-2.15/gas/testsuite/gas/nios2/align_text.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/align_text.d 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,22 @@
++#objdump: -dr
++#name: NIOS2 align_test
++
++# Test alignment in text sections.
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++00000000 <label-0x20>:
++ 0: 00000000 call 0 <label-0x20>
++ 4: 0001883a nop
++ 8: 0001883a nop
++ c: 0001883a nop
++ 10: 0001883a nop
++ 14: 0001883a nop
++ 18: 0001883a nop
++ 1c: 0001883a nop
++
++00000020 <label>:
++ 20: 0001883a nop
++00000024 <label2>:
++ ...
+\ No newline at end of file
+--- binutils-2.15/gas/testsuite/gas/nios2/align_text.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/align_text.s 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,15 @@
++ .asciz "" # empty string
++ .align 2
++
++ nop
++ nop
++ label:
++ .align 5
++ nop
++ label2:
++ .section mysection
++ .align 2
++
++
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/and.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/and.d 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,17 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 and
++
++# Test the and macro.
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> and r4,r4,r4
++0+0004 <[^>]*> andi r4,r4,32767
++0+0008 <[^>]*> andi r4,r4,32768
++0+000c <[^>]*> andi r4,r4,65535
++0+0010 <[^>]*> andi r4,r4,0
++0+0014 <[^>]*> andhi r4,r4,32767
++0+0018 <[^>]*> andhi r4,r4,32768
++0+001c <[^>]*> andhi r4,r4,65535
++0+0020 <[^>]*> andhi r4,r4,0
+--- binutils-2.15/gas/testsuite/gas/nios2/and.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/and.s 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,13 @@
++# Source file used to test the and, andhi and andi instructions
++
++foo:
++ and r4,r4,r4
++ andi r4,r4,0x7fff
++ andi r4,r4,0x8000
++ andi r4,r4,0xffff
++ andi r4,r4,0x0
++ andhi r4,r4,0x7fff
++ andhi r4,r4,0x8000
++ andhi r4,r4,0xffff
++ andhi r4,r4,0x0
++
+\ No newline at end of file
+--- binutils-2.15/gas/testsuite/gas/nios2/blt.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/blt.d 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1 @@
++This file is obsolete
+\ No newline at end of file
+--- binutils-2.15/gas/testsuite/gas/nios2/blt.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/blt.s 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1 @@
++This file is obsolete
+\ No newline at end of file
+--- binutils-2.15/gas/testsuite/gas/nios2/branch.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/branch.d 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,16 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 branch
++
++# Test the branch instructions.
++dump.o: file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> beq r4,r5,00000000 <text_label>
++0+0004 <[^>]*> bge r4,r5,00000000 <text_label>
++0+0008 <[^>]*> bgeu r4,r5,00000000 <text_label>
++0+000c <[^>]*> blt r4,r5,00000000 <text_label>
++0+0010 <[^>]*> bltu r4,r5,00000000 <text_label>
++0+0014 <[^>]*> bne r4,r5,00000000 <text_label>
++0+0018 <[^>]*> br 0000001c <text_label\+0x1c>
++[ ]*18: R_NIOS2_PCREL16 external_label
++
+--- binutils-2.15/gas/testsuite/gas/nios2/branch.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/branch.s 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,15 @@
++# Source file used to test the beq macro.
++ .globl text_label
++ .text
++.set norelax
++text_label:
++ beq r4,r5,text_label
++ bge r4,r5,text_label
++ bgeu r4,r5,text_label
++ blt r4,r5,text_label
++ bltu r4,r5,text_label
++ bne r4,r5,text_label
++
++# Branch to an external label.
++ br external_label
++
+--- binutils-2.15/gas/testsuite/gas/nios2/break.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/break.d 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,12 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 break
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> break 0
++0+0004 <[^>]*> break 0
++0+0008 <[^>]*> break 31
++0+000c <[^>]*> break 14
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/break.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/break.s 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,8 @@
++# Source file used to test the 20-bit break instructions
++foo:
++ break
++ break 0
++ break 31
++ break 14
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/bret.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/bret.d 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,8 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 bret
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> bret
++
+--- binutils-2.15/gas/testsuite/gas/nios2/bret.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/bret.s 2005-05-17 12:20:13.000000000 +0200
+@@ -0,0 +1,5 @@
++# Source file used to test the bret instructions
++foo:
++ bret
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/cache.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/cache.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,17 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 cache
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> flushd -32768\(r6\)
++0+0004 <[^>]*> flushd 32767\(r6\)
++0+0008 <[^>]*> flushd 0\(r6\)
++0+000c <[^>]*> flushd -1\(r6\)
++0+0010 <[^>]*> flushd 0\(r6\)
++[ ]*10: R_NIOS2_S16 .text
++0+0014 <[^>]*> flushd 0\(r6\)
++[ ]*14: R_NIOS2_S16 external
++0+0018 <[^>]*> flushi r2
++0+001c <[^>]*> flushp
++
+--- binutils-2.15/gas/testsuite/gas/nios2/cache.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/cache.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,21 @@
++# Source file used to test the cache instruction
++foo:
++ flushd -0x8000(r6)
++ flushd 0x7fff(r6)
++ flushd 0x0(r6)
++ flushd -0x0001(r6)
++
++# use symbol for offset
++ flushd foo(r6)
++
++# use external symbol
++ .global external
++ flushd external(r6)
++
++# flushi
++ flushi r2
++
++#flushp
++ flushp
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/call.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/call.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,11 @@
++# objdump: -dr --prefix-addresses
++#name: NIOS2 call
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> call 00000000 <foo>
++[ ]*0: R_NIOS2_CALL26 .text\+0xc
++0+0004 <[^>]*> callr r10
++0+0008 <[^>]*> call 00000000 <foo>
++[ ]*8: R_NIOS2_CALL26 external
+--- binutils-2.15/gas/testsuite/gas/nios2/call.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/call.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,13 @@
++# Source file used to test the call and callr instructions
++.text
++.set norelax
++foo:
++ call func1
++ callr r10
++# use external symbol
++ .global external
++ call external
++func1:
++
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/cmp.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/cmp.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,24 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 cmp
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> cmpeq r11,r2,r3
++0+0004 <[^>]*> cmpge r11,r2,r3
++0+0008 <[^>]*> cmpgeu r11,r2,r3
++0+000c <[^>]*> cmplt r11,r2,r3
++0+0010 <[^>]*> cmpltu r11,r2,r3
++0+0014 <[^>]*> cmpne r11,r2,r3
++0+0018 <[^>]*> cmpgei r11,r2,0
++[ ]*18: R_NIOS2_S16 value
++0+001c <[^>]*> cmpgeui r11,r2,0
++[ ]*1c: R_NIOS2_U16 value\+0x200
++0+0020 <[^>]*> cmplti r11,r2,0
++[ ]*20: R_NIOS2_S16 value
++0+0024 <[^>]*> cmpltui r11,r2,0
++[ ]*24: R_NIOS2_U16 value\+0x200
++0+0028 <[^>]*> cmpgei r11,r2,32767
++0+002c <[^>]*> cmpgeui r11,r2,32768
++0+0030 <[^>]*> cmplti r11,r2,-32768
++0+0034 <[^>]*> cmpltui r11,r2,65535
+\ No newline at end of file
+--- binutils-2.15/gas/testsuite/gas/nios2/cmp.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/cmp.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,22 @@
++# Source file used to test the compare instructions
++foo:
++ cmpeq r11,r2,r3
++ cmpge r11,r2,r3
++ cmpgeu r11,r2,r3
++ cmplt r11,r2,r3
++ cmpltu r11,r2,r3
++ cmpne r11,r2,r3
++# test that cmp generates relocations correctly
++ cmpgei r11,r2,value
++ cmpgeui r11,r2,value+0x200
++ cmplti r11,r2,value
++ cmpltui r11,r2,value+0x200
++
++ cmpgei r11,r2,0x7fff
++ cmpgeui r11,r2,0x8000
++ cmplti r11,r2,-0x8000
++ cmpltui r11,r2,0xFFFF
++.global value
++
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/comments.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/comments.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,26 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 comments
++
++# Test the add instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> br 0000001c <start>
++0+0004 <[^>]*> br 00000008 <abort>
++0+0008 <[^>]*> movui r3,0
++0+000c <[^>]*> movui r2,1
++0+0010 <[^>]*> movui r3,0
++0+0014 <[^>]*> movui r2,0
++0+0018 <[^>]*> br 00000044 <exit>
++0+001c <[^>]*> addi r2,r2,-4
++0+0020 <[^>]*> movui r11,1
++0+0024 <[^>]*> movui r5,0
++0+0028 <[^>]*> movui r6,0
++0+002c <[^>]*> br 00000030 <ldst>
++0+0030 <[^>]*> movui r2,61452
++0+0034 <[^>]*> movui r20,64206
++0+0038 <[^>]*> stw r20,0\(r2\)
++0+003c <[^>]*> ldw r21,0\(r2\)
++0+0040 <[^>]*> br 00000010 <end>
++0+0044 <[^>]*> br 00000044 <exit>
+--- binutils-2.15/gas/testsuite/gas/nios2/comments.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/comments.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,28 @@
++.set norelax
++_main: br start
++trap:
++ br abort
++.globl _main
++abort: movui r3, 0x0
++ movui r2, 0x1
++
++end: movui r3, 0x0
++ movui r2, 0x0
++ br exit
++
++start:
++ addi r2, r2, -4 # test for ve numbers
++ movui r11, 0x1
++ ori r5, r0, %lo(0x0) # r5 = 0x0
++ ori r6, r0, %lo(0x0) # r6 = 0x0
++ br ldst
++
++ldst:
++ movui r2, 0xF00C
++ movui r20, 0xFACE
++ stw r20,(r2)
++ ldw r21, (r2)
++ br end
++
++
++exit: br exit
+--- binutils-2.15/gas/testsuite/gas/nios2/complex.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/complex.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,12 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 complex
++
++# Test complex expression parsing
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> ldw r2,-1\(r3\)
++0+0004 <[^>]*> ldw r2,1\(r3\)
++0+0008 <[^>]*> ldw r2,0\(r3\)
++ 8: R_NIOS2_S16 stack_top\+0xffffffff
+--- binutils-2.15/gas/testsuite/gas/nios2/complex.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/complex.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,5 @@
++foo:
++ ldw r2, (2-3)(r3)
++ ldw r2, 2 + (2-3)(r3)
++ ldw r2, 2 + (stack_top-3)(r3)
++
+--- binutils-2.15/gas/testsuite/gas/nios2/ctl.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ctl.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,20 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 ctl
++
++# Test the ctl instructions
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> rdctl r8,ctl31
++0+0004 <[^>]*> rdctl r8,ctl30
++0+0008 <[^>]*> rdctl r8,ctl29
++0+000c <[^>]*> rdctl r8,status
++0+0010 <[^>]*> rdctl r8,bstatus
++0+0014 <[^>]*> rdctl r8,estatus
++0+0018 <[^>]*> wrctl ctl31,r8
++0+001c <[^>]*> wrctl ctl30,r8
++0+0020 <[^>]*> wrctl ctl29,r8
++0+0024 <[^>]*> wrctl status,r8
++0+0028 <[^>]*> wrctl bstatus,r8
++0+002c <[^>]*> wrctl estatus,r8
+--- binutils-2.15/gas/testsuite/gas/nios2/ctl.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ctl.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,18 @@
++# Source file used to test the nor instruction
++
++foo:
++ rdctl r8,ctl31
++ rdctl r8,ctl30
++ rdctl r8,ctl29
++ rdctl r8,status
++ rdctl r8,bstatus
++ rdctl r8,estatus
++ wrctl ctl31,r8
++ wrctl ctl30,r8
++ wrctl ctl29,r8
++ wrctl status,r8
++ wrctl bstatus,r8
++ wrctl estatus,r8
++
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/custom.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/custom.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,13 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 custom
++
++# Test the custom instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> custom 0,r11,r2,r3
++0+0004 <[^>]*> custom 255,r11,r2,r3
++0+0008 <[^>]*> custom 150,c1,r2,r3
++0+000c <[^>]*> custom 24,c1,c2,r3
++0+0010 <[^>]*> custom 56,c1,c2,c3
+--- binutils-2.15/gas/testsuite/gas/nios2/custom.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/custom.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8 @@
++# test progam for assembling user instructions
++
++foo:
++ custom 0, r11, r2, r3
++ custom 255, r11, r2, r3
++ custom 150, c1, r2, r3
++ custom 0x18, c1, c2, r3
++ custom 070, c1, c2, c3
+--- binutils-2.15/gas/testsuite/gas/nios2/etbt.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/etbt.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 etbt
++
++# Test the et, bt registers
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> add et,bt,r6
++0+0004 <[^>]*> add et,bt,r6
+--- binutils-2.15/gas/testsuite/gas/nios2/etbt.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/etbt.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,4 @@
++.set nobreak
++foo:
++ add r24, r25, r6
++ add et, bt, r6
+--- binutils-2.15/gas/testsuite/gas/nios2/hilo_symbol.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/hilo_symbol.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,3 @@
++.global long_symbol
++.set long_symbol, 0xDEADBEEF
++
+--- binutils-2.15/gas/testsuite/gas/nios2/illegal.l 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/illegal.l 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,14 @@
++.*illegal.s: Assembler messages:
++.*illegal.s:5: Error: unknown register r56
++.*illegal.s:8: Error: expecting \( near 0x1000
++.*illegal.s:8: Error: missing argument
++.*illegal.s:9: Error: expecting \) near r5
++.*illegal.s:10: Error: expecting \( near 0x1000r5\)
++.*illegal.s:10: Error: missing argument
++.*illegal.s:11: Error: expecting \( near 0x1000,r5
++.*illegal.s:11: Error: missing argument
++.*illegal.s:12: Error: unknown register 0x1000
++.*illegal.s:14: Error: unrecognised instruction fop
++.*illegal.s:16: Error: too many arguments
++.*illegal.s:17: Error: too many arguments
++.*illegal.s:17: Error: unknown register r2,r4
+--- binutils-2.15/gas/testsuite/gas/nios2/illegal.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/illegal.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,17 @@
++# Source file used to test illegal operands.
++
++foo:
++# Illegal registers
++ add r3,r4,r56
++ add r4,r0,r2
++# Illegal syntax
++ ldw r4,0x1000
++ ldw r4,0x1000(r5
++ ldw r4,0x1000r5)
++ ldw r4,0x1000,r5
++ ldw r4,(0x1000)r5
++# Illegal opcodes
++ fop r3,r4,r5
++# Extra operands
++ nop Crapola
++ add r2, r2, r2, r4
+--- binutils-2.15/gas/testsuite/gas/nios2/imm5_symbol.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/imm5_symbol.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,4 @@
++.global imm5
++.text
++.byte imm5
++.set imm5, 31
+--- binutils-2.15/gas/testsuite/gas/nios2/jmp.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/jmp.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 jmp
++
++# Test the jmp instruction.
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> jmp bt
++
+--- binutils-2.15/gas/testsuite/gas/nios2/jmp.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/jmp.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,6 @@
++# Source file used to test the jmp instruction.
++.text
++.set nobreak
++foo:
++ jmp r25
++
+--- binutils-2.15/gas/testsuite/gas/nios2/ldb.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ldb.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,196 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 ldb
++
++# Test the ld instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> ldb r4,0\(zero\)
++0+0004 <[^>]*> ldb r4,4\(zero\)
++0+0008 <[^>]*> ldb r4,32764\(zero\)
++0+000c <[^>]*> ldb r4,-32768\(zero\)
++0+0010 <[^>]*> ldb r4,0\(r5\)
++0+0014 <[^>]*> ldb r4,4\(r5\)
++0+0018 <[^>]*> ldb r4,32764\(r5\)
++0+001c <[^>]*> ldb r4,-32768\(r5\)
++0+0020 <[^>]*> ldb r4,0\(zero\)
++[ ]*20: R_NIOS2_S16 .data
++0+0024 <[^>]*> ldb r4,0\(zero\)
++[ ]*24: R_NIOS2_S16 big_external_data_label
++0+0028 <[^>]*> ldb r4,0\(zero\)
++[ ]*28: R_NIOS2_S16 small_external_data_label
++0+002c <[^>]*> ldb r4,0\(zero\)
++[ ]*2c: R_NIOS2_S16 big_external_common
++0+0030 <[^>]*> ldb r4,0\(zero\)
++[ ]*30: R_NIOS2_S16 small_external_common
++0+0034 <[^>]*> ldb r4,0\(zero\)
++[ ]*34: R_NIOS2_S16 .bss
++0+0038 <[^>]*> ldb r4,0\(zero\)
++[ ]*38: R_NIOS2_S16 .bss\+0x4000
++0+003c <[^>]*> ldb r4,0\(zero\)
++[ ]*3c: R_NIOS2_S16 .data\+0x4
++0+0040 <[^>]*> ldb r4,0\(zero\)
++[ ]*40: R_NIOS2_S16 big_external_data_label\+0x4
++0+0044 <[^>]*> ldb r4,0\(zero\)
++[ ]*44: R_NIOS2_S16 small_external_data_label\+0x4
++0+0048 <[^>]*> ldb r4,0\(zero\)
++[ ]*48: R_NIOS2_S16 big_external_common\+0x4
++0+004c <[^>]*> ldb r4,0\(zero\)
++[ ]*4c: R_NIOS2_S16 small_external_common\+0x4
++0+0050 <[^>]*> ldb r4,0\(zero\)
++[ ]*50: R_NIOS2_S16 .bss\+0x4
++0+0054 <[^>]*> ldb r4,0\(zero\)
++[ ]*54: R_NIOS2_S16 .bss\+0x4004
++0+0058 <[^>]*> ldb r4,0\(zero\)
++[ ]*58: R_NIOS2_S16 .data\+0xffff8000
++0+005c <[^>]*> ldb r4,0\(zero\)
++[ ]*5c: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0060 <[^>]*> ldb r4,0\(zero\)
++[ ]*60: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0064 <[^>]*> ldb r4,0\(zero\)
++[ ]*64: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0068 <[^>]*> ldb r4,0\(zero\)
++[ ]*68: R_NIOS2_S16 small_external_common\+0xffff8000
++0+006c <[^>]*> ldb r4,0\(zero\)
++[ ]*6c: R_NIOS2_S16 .bss\+0xffff8000
++0+0070 <[^>]*> ldb r4,0\(zero\)
++[ ]*70: R_NIOS2_S16 .bss\+0xffffc000
++0+0074 <[^>]*> ldb r4,0\(zero\)
++[ ]*74: R_NIOS2_S16 .data\+0x10000
++0+0078 <[^>]*> ldb r4,0\(r5\)
++[ ]*78: R_NIOS2_S16 .data
++0+007c <[^>]*> ldb r4,0\(r5\)
++[ ]*7c: R_NIOS2_S16 big_external_data_label
++0+0080 <[^>]*> ldb r4,0\(r5\)
++[ ]*80: R_NIOS2_S16 small_external_data_label
++0+0084 <[^>]*> ldb r4,0\(r5\)
++[ ]*84: R_NIOS2_S16 big_external_common
++0+0088 <[^>]*> ldb r4,0\(r5\)
++[ ]*88: R_NIOS2_S16 small_external_common
++0+008c <[^>]*> ldb r4,0\(r5\)
++[ ]*8c: R_NIOS2_S16 .bss
++0+0090 <[^>]*> ldb r4,0\(r5\)
++[ ]*90: R_NIOS2_S16 .bss\+0x4000
++0+0094 <[^>]*> ldb r4,0\(r5\)
++[ ]*94: R_NIOS2_S16 .data\+0x4
++0+0098 <[^>]*> ldb r4,0\(r5\)
++[ ]*98: R_NIOS2_S16 big_external_data_label\+0x4
++0+009c <[^>]*> ldb r4,0\(r5\)
++[ ]*9c: R_NIOS2_S16 small_external_data_label\+0x4
++0+00a0 <[^>]*> ldb r4,0\(r5\)
++[ ]*a0: R_NIOS2_S16 big_external_common\+0x4
++0+00a4 <[^>]*> ldb r4,0\(r5\)
++[ ]*a4: R_NIOS2_S16 small_external_common\+0x4
++0+00a8 <[^>]*> ldb r4,0\(r5\)
++[ ]*a8: R_NIOS2_S16 .bss\+0x4
++0+00ac <[^>]*> ldb r4,0\(r5\)
++[ ]*ac: R_NIOS2_S16 .bss\+0x4004
++0+00b0 <[^>]*> ldb r4,0\(r5\)
++[ ]*b0: R_NIOS2_S16 .data\+0xffff8000
++0+00b4 <[^>]*> ldb r4,0\(r5\)
++[ ]*b4: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+00b8 <[^>]*> ldb r4,0\(r5\)
++[ ]*b8: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+00bc <[^>]*> ldb r4,0\(r5\)
++[ ]*bc: R_NIOS2_S16 big_external_common\+0xffff8000
++0+00c0 <[^>]*> ldb r4,0\(r5\)
++[ ]*c0: R_NIOS2_S16 small_external_common\+0xffff8000
++0+00c4 <[^>]*> ldb r4,0\(r5\)
++[ ]*c4: R_NIOS2_S16 .bss\+0xffff8000
++0+00c8 <[^>]*> ldb r4,0\(r5\)
++[ ]*c8: R_NIOS2_S16 .bss\+0xffffc000
++0+00cc <[^>]*> ldbio r4,0\(zero\)
++0+00d0 <[^>]*> ldbio r4,4\(zero\)
++0+00d4 <[^>]*> ldbio r4,32764\(zero\)
++0+00d8 <[^>]*> ldbio r4,-32768\(zero\)
++0+00dc <[^>]*> ldbio r4,0\(r5\)
++0+00e0 <[^>]*> ldbio r4,4\(r5\)
++0+00e4 <[^>]*> ldbio r4,32764\(r5\)
++0+00e8 <[^>]*> ldbio r4,-32768\(r5\)
++0+00ec <[^>]*> ldbio r4,0\(zero\)
++[ ]*ec: R_NIOS2_S16 .data
++0+00f0 <[^>]*> ldbio r4,0\(zero\)
++[ ]*f0: R_NIOS2_S16 big_external_data_label
++0+00f4 <[^>]*> ldbio r4,0\(zero\)
++[ ]*f4: R_NIOS2_S16 small_external_data_label
++0+00f8 <[^>]*> ldbio r4,0\(zero\)
++[ ]*f8: R_NIOS2_S16 big_external_common
++0+00fc <[^>]*> ldbio r4,0\(zero\)
++[ ]*fc: R_NIOS2_S16 small_external_common
++0+0100 <[^>]*> ldbio r4,0\(zero\)
++[ ]*100: R_NIOS2_S16 .bss
++0+0104 <[^>]*> ldbio r4,0\(zero\)
++[ ]*104: R_NIOS2_S16 .bss\+0x4000
++0+0108 <[^>]*> ldbio r4,0\(zero\)
++[ ]*108: R_NIOS2_S16 .data\+0x4
++0+010c <[^>]*> ldbio r4,0\(zero\)
++[ ]*10c: R_NIOS2_S16 big_external_data_label\+0x4
++0+0110 <[^>]*> ldbio r4,0\(zero\)
++[ ]*110: R_NIOS2_S16 small_external_data_label\+0x4
++0+0114 <[^>]*> ldbio r4,0\(zero\)
++[ ]*114: R_NIOS2_S16 big_external_common\+0x4
++0+0118 <[^>]*> ldbio r4,0\(zero\)
++[ ]*118: R_NIOS2_S16 small_external_common\+0x4
++0+011c <[^>]*> ldbio r4,0\(zero\)
++[ ]*11c: R_NIOS2_S16 .bss\+0x4
++0+0120 <[^>]*> ldbio r4,0\(zero\)
++[ ]*120: R_NIOS2_S16 .bss\+0x4004
++0+0124 <[^>]*> ldbio r4,0\(zero\)
++[ ]*124: R_NIOS2_S16 .data\+0xffff8000
++0+0128 <[^>]*> ldbio r4,0\(zero\)
++[ ]*128: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+012c <[^>]*> ldbio r4,0\(zero\)
++[ ]*12c: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0130 <[^>]*> ldbio r4,0\(zero\)
++[ ]*130: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0134 <[^>]*> ldbio r4,0\(zero\)
++[ ]*134: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0138 <[^>]*> ldbio r4,0\(zero\)
++[ ]*138: R_NIOS2_S16 .bss\+0xffff8000
++0+013c <[^>]*> ldbio r4,0\(zero\)
++[ ]*13c: R_NIOS2_S16 .bss\+0xffffc000
++0+0140 <[^>]*> ldbio r4,0\(zero\)
++[ ]*140: R_NIOS2_S16 .data\+0x10000
++0+0144 <[^>]*> ldbio r4,0\(r5\)
++[ ]*144: R_NIOS2_S16 .data
++0+0148 <[^>]*> ldbio r4,0\(r5\)
++[ ]*148: R_NIOS2_S16 big_external_data_label
++0+014c <[^>]*> ldbio r4,0\(r5\)
++[ ]*14c: R_NIOS2_S16 small_external_data_label
++0+0150 <[^>]*> ldbio r4,0\(r5\)
++[ ]*150: R_NIOS2_S16 big_external_common
++0+0154 <[^>]*> ldbio r4,0\(r5\)
++[ ]*154: R_NIOS2_S16 small_external_common
++0+0158 <[^>]*> ldbio r4,0\(r5\)
++[ ]*158: R_NIOS2_S16 .bss
++0+015c <[^>]*> ldbio r4,0\(r5\)
++[ ]*15c: R_NIOS2_S16 .bss\+0x4000
++0+0160 <[^>]*> ldbio r4,0\(r5\)
++[ ]*160: R_NIOS2_S16 .data\+0x4
++0+0164 <[^>]*> ldbio r4,0\(r5\)
++[ ]*164: R_NIOS2_S16 big_external_data_label\+0x4
++0+0168 <[^>]*> ldbio r4,0\(r5\)
++[ ]*168: R_NIOS2_S16 small_external_data_label\+0x4
++0+016c <[^>]*> ldbio r4,0\(r5\)
++[ ]*16c: R_NIOS2_S16 big_external_common\+0x4
++0+0170 <[^>]*> ldbio r4,0\(r5\)
++[ ]*170: R_NIOS2_S16 small_external_common\+0x4
++0+0174 <[^>]*> ldbio r4,0\(r5\)
++[ ]*174: R_NIOS2_S16 .bss\+0x4
++0+0178 <[^>]*> ldbio r4,0\(r5\)
++[ ]*178: R_NIOS2_S16 .bss\+0x4004
++0+017c <[^>]*> ldbio r4,0\(r5\)
++[ ]*17c: R_NIOS2_S16 .data\+0xffff8000
++0+0180 <[^>]*> ldbio r4,0\(r5\)
++[ ]*180: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0184 <[^>]*> ldbio r4,0\(r5\)
++[ ]*184: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0188 <[^>]*> ldbio r4,0\(r5\)
++[ ]*188: R_NIOS2_S16 big_external_common\+0xffff8000
++0+018c <[^>]*> ldbio r4,0\(r5\)
++[ ]*18c: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0190 <[^>]*> ldbio r4,0\(r5\)
++[ ]*190: R_NIOS2_S16 .bss\+0xffff8000
++0+0194 <[^>]*> ldbio r4,0\(r5\)
++[ ]*194: R_NIOS2_S16 .bss\+0xffffc000
+--- binutils-2.15/gas/testsuite/gas/nios2/ldb.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ldb.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,117 @@
++ .data
++data_label:
++ .extern big_external_data_label,0x4000
++ .extern small_external_data_label,4
++ .comm big_external_common,0x4000
++ .comm small_external_common,4
++ .lcomm big_local_common,0x4000
++ .lcomm small_local_common,4
++
++# the small symbols should have space allocated in the sbss section
++# but this is not yet supported in the assembler, so space is allocated
++# in the .bss section and the relocations are not gp-relative. this will
++# be updated when gp-relative relocations are added
++ .text
++ ldb r4,0(r0)
++ ldb r4,4(r0)
++ ldb r4,0x7ffc(r0)
++ ldb r4,-0x8000(r0)
++ ldb r4,0(r5)
++ ldb r4,4(r5)
++ ldb r4,0x7ffc(r5)
++ ldb r4,-0x8000(r5)
++ ldb r4,data_label(r0)
++ ldb r4,big_external_data_label(r0)
++ ldb r4,small_external_data_label(r0)
++ ldb r4,big_external_common(r0)
++ ldb r4,small_external_common(r0)
++ ldb r4,big_local_common(r0)
++ ldb r4,small_local_common(r0)
++ ldb r4,data_label+4(r0)
++ ldb r4,big_external_data_label+4(r0)
++ ldb r4,small_external_data_label+4(r0)
++ ldb r4,big_external_common+4(r0)
++ ldb r4,small_external_common+4(r0)
++ ldb r4,big_local_common+4(r0)
++ ldb r4,small_local_common+4(r0)
++ ldb r4,data_label-0x8000(r0)
++ ldb r4,big_external_data_label-0x8000(r0)
++ ldb r4,small_external_data_label-0x8000(r0)
++ ldb r4,big_external_common-0x8000(r0)
++ ldb r4,small_external_common-0x8000(r0)
++ ldb r4,big_local_common-0x8000(r0)
++ ldb r4,small_local_common-0x8000(r0)
++ ldb r4,data_label+0x10000(r0)
++ ldb r4,data_label(r5)
++ ldb r4,big_external_data_label(r5)
++ ldb r4,small_external_data_label(r5)
++ ldb r4,big_external_common(r5)
++ ldb r4,small_external_common(r5)
++ ldb r4,big_local_common(r5)
++ ldb r4,small_local_common(r5)
++ ldb r4,data_label+4(r5)
++ ldb r4,big_external_data_label+4(r5)
++ ldb r4,small_external_data_label+4(r5)
++ ldb r4,big_external_common+4(r5)
++ ldb r4,small_external_common+4(r5)
++ ldb r4,big_local_common+4(r5)
++ ldb r4,small_local_common+4(r5)
++ ldb r4,data_label-0x8000(r5)
++ ldb r4,big_external_data_label-0x8000(r5)
++ ldb r4,small_external_data_label-0x8000(r5)
++ ldb r4,big_external_common-0x8000(r5)
++ ldb r4,small_external_common-0x8000(r5)
++ ldb r4,big_local_common-0x8000(r5)
++ ldb r4,small_local_common-0x8000(r5)
++
++ ldbio r4,0(r0)
++ ldbio r4,4(r0)
++ ldbio r4,0x7ffc(r0)
++ ldbio r4,-0x8000(r0)
++ ldbio r4,0(r5)
++ ldbio r4,4(r5)
++ ldbio r4,0x7ffc(r5)
++ ldbio r4,-0x8000(r5)
++ ldbio r4,data_label(r0)
++ ldbio r4,big_external_data_label(r0)
++ ldbio r4,small_external_data_label(r0)
++ ldbio r4,big_external_common(r0)
++ ldbio r4,small_external_common(r0)
++ ldbio r4,big_local_common(r0)
++ ldbio r4,small_local_common(r0)
++ ldbio r4,data_label+4(r0)
++ ldbio r4,big_external_data_label+4(r0)
++ ldbio r4,small_external_data_label+4(r0)
++ ldbio r4,big_external_common+4(r0)
++ ldbio r4,small_external_common+4(r0)
++ ldbio r4,big_local_common+4(r0)
++ ldbio r4,small_local_common+4(r0)
++ ldbio r4,data_label-0x8000(r0)
++ ldbio r4,big_external_data_label-0x8000(r0)
++ ldbio r4,small_external_data_label-0x8000(r0)
++ ldbio r4,big_external_common-0x8000(r0)
++ ldbio r4,small_external_common-0x8000(r0)
++ ldbio r4,big_local_common-0x8000(r0)
++ ldbio r4,small_local_common-0x8000(r0)
++ ldbio r4,data_label+0x10000(r0)
++ ldbio r4,data_label(r5)
++ ldbio r4,big_external_data_label(r5)
++ ldbio r4,small_external_data_label(r5)
++ ldbio r4,big_external_common(r5)
++ ldbio r4,small_external_common(r5)
++ ldbio r4,big_local_common(r5)
++ ldbio r4,small_local_common(r5)
++ ldbio r4,data_label+4(r5)
++ ldbio r4,big_external_data_label+4(r5)
++ ldbio r4,small_external_data_label+4(r5)
++ ldbio r4,big_external_common+4(r5)
++ ldbio r4,small_external_common+4(r5)
++ ldbio r4,big_local_common+4(r5)
++ ldbio r4,small_local_common+4(r5)
++ ldbio r4,data_label-0x8000(r5)
++ ldbio r4,big_external_data_label-0x8000(r5)
++ ldbio r4,small_external_data_label-0x8000(r5)
++ ldbio r4,big_external_common-0x8000(r5)
++ ldbio r4,small_external_common-0x8000(r5)
++ ldbio r4,big_local_common-0x8000(r5)
++ ldbio r4,small_local_common-0x8000(r5)
+--- binutils-2.15/gas/testsuite/gas/nios2/ldh.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ldh.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,196 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 ldh
++
++# Test the ld instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> ldh r4,0\(zero\)
++0+0004 <[^>]*> ldh r4,4\(zero\)
++0+0008 <[^>]*> ldh r4,32764\(zero\)
++0+000c <[^>]*> ldh r4,-32768\(zero\)
++0+0010 <[^>]*> ldh r4,0\(r5\)
++0+0014 <[^>]*> ldh r4,4\(r5\)
++0+0018 <[^>]*> ldh r4,32764\(r5\)
++0+001c <[^>]*> ldh r4,-32768\(r5\)
++0+0020 <[^>]*> ldh r4,0\(zero\)
++[ ]*20: R_NIOS2_S16 .data
++0+0024 <[^>]*> ldh r4,0\(zero\)
++[ ]*24: R_NIOS2_S16 big_external_data_label
++0+0028 <[^>]*> ldh r4,0\(zero\)
++[ ]*28: R_NIOS2_S16 small_external_data_label
++0+002c <[^>]*> ldh r4,0\(zero\)
++[ ]*2c: R_NIOS2_S16 big_external_common
++0+0030 <[^>]*> ldh r4,0\(zero\)
++[ ]*30: R_NIOS2_S16 small_external_common
++0+0034 <[^>]*> ldh r4,0\(zero\)
++[ ]*34: R_NIOS2_S16 .bss
++0+0038 <[^>]*> ldh r4,0\(zero\)
++[ ]*38: R_NIOS2_S16 .bss\+0x4000
++0+003c <[^>]*> ldh r4,0\(zero\)
++[ ]*3c: R_NIOS2_S16 .data\+0x4
++0+0040 <[^>]*> ldh r4,0\(zero\)
++[ ]*40: R_NIOS2_S16 big_external_data_label\+0x4
++0+0044 <[^>]*> ldh r4,0\(zero\)
++[ ]*44: R_NIOS2_S16 small_external_data_label\+0x4
++0+0048 <[^>]*> ldh r4,0\(zero\)
++[ ]*48: R_NIOS2_S16 big_external_common\+0x4
++0+004c <[^>]*> ldh r4,0\(zero\)
++[ ]*4c: R_NIOS2_S16 small_external_common\+0x4
++0+0050 <[^>]*> ldh r4,0\(zero\)
++[ ]*50: R_NIOS2_S16 .bss\+0x4
++0+0054 <[^>]*> ldh r4,0\(zero\)
++[ ]*54: R_NIOS2_S16 .bss\+0x4004
++0+0058 <[^>]*> ldh r4,0\(zero\)
++[ ]*58: R_NIOS2_S16 .data\+0xffff8000
++0+005c <[^>]*> ldh r4,0\(zero\)
++[ ]*5c: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0060 <[^>]*> ldh r4,0\(zero\)
++[ ]*60: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0064 <[^>]*> ldh r4,0\(zero\)
++[ ]*64: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0068 <[^>]*> ldh r4,0\(zero\)
++[ ]*68: R_NIOS2_S16 small_external_common\+0xffff8000
++0+006c <[^>]*> ldh r4,0\(zero\)
++[ ]*6c: R_NIOS2_S16 .bss\+0xffff8000
++0+0070 <[^>]*> ldh r4,0\(zero\)
++[ ]*70: R_NIOS2_S16 .bss\+0xffffc000
++0+0074 <[^>]*> ldh r4,0\(zero\)
++[ ]*74: R_NIOS2_S16 .data\+0x10000
++0+0078 <[^>]*> ldh r4,0\(r5\)
++[ ]*78: R_NIOS2_S16 .data
++0+007c <[^>]*> ldh r4,0\(r5\)
++[ ]*7c: R_NIOS2_S16 big_external_data_label
++0+0080 <[^>]*> ldh r4,0\(r5\)
++[ ]*80: R_NIOS2_S16 small_external_data_label
++0+0084 <[^>]*> ldh r4,0\(r5\)
++[ ]*84: R_NIOS2_S16 big_external_common
++0+0088 <[^>]*> ldh r4,0\(r5\)
++[ ]*88: R_NIOS2_S16 small_external_common
++0+008c <[^>]*> ldh r4,0\(r5\)
++[ ]*8c: R_NIOS2_S16 .bss
++0+0090 <[^>]*> ldh r4,0\(r5\)
++[ ]*90: R_NIOS2_S16 .bss\+0x4000
++0+0094 <[^>]*> ldh r4,0\(r5\)
++[ ]*94: R_NIOS2_S16 .data\+0x4
++0+0098 <[^>]*> ldh r4,0\(r5\)
++[ ]*98: R_NIOS2_S16 big_external_data_label\+0x4
++0+009c <[^>]*> ldh r4,0\(r5\)
++[ ]*9c: R_NIOS2_S16 small_external_data_label\+0x4
++0+00a0 <[^>]*> ldh r4,0\(r5\)
++[ ]*a0: R_NIOS2_S16 big_external_common\+0x4
++0+00a4 <[^>]*> ldh r4,0\(r5\)
++[ ]*a4: R_NIOS2_S16 small_external_common\+0x4
++0+00a8 <[^>]*> ldh r4,0\(r5\)
++[ ]*a8: R_NIOS2_S16 .bss\+0x4
++0+00ac <[^>]*> ldh r4,0\(r5\)
++[ ]*ac: R_NIOS2_S16 .bss\+0x4004
++0+00b0 <[^>]*> ldh r4,0\(r5\)
++[ ]*b0: R_NIOS2_S16 .data\+0xffff8000
++0+00b4 <[^>]*> ldh r4,0\(r5\)
++[ ]*b4: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+00b8 <[^>]*> ldh r4,0\(r5\)
++[ ]*b8: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+00bc <[^>]*> ldh r4,0\(r5\)
++[ ]*bc: R_NIOS2_S16 big_external_common\+0xffff8000
++0+00c0 <[^>]*> ldh r4,0\(r5\)
++[ ]*c0: R_NIOS2_S16 small_external_common\+0xffff8000
++0+00c4 <[^>]*> ldh r4,0\(r5\)
++[ ]*c4: R_NIOS2_S16 .bss\+0xffff8000
++0+00c8 <[^>]*> ldh r4,0\(r5\)
++[ ]*c8: R_NIOS2_S16 .bss\+0xffffc000
++0+00cc <[^>]*> ldhio r4,0\(zero\)
++0+00d0 <[^>]*> ldhio r4,4\(zero\)
++0+00d4 <[^>]*> ldhio r4,32764\(zero\)
++0+00d8 <[^>]*> ldhio r4,-32768\(zero\)
++0+00dc <[^>]*> ldhio r4,0\(r5\)
++0+00e0 <[^>]*> ldhio r4,4\(r5\)
++0+00e4 <[^>]*> ldhio r4,32764\(r5\)
++0+00e8 <[^>]*> ldhio r4,-32768\(r5\)
++0+00ec <[^>]*> ldhio r4,0\(zero\)
++[ ]*ec: R_NIOS2_S16 .data
++0+00f0 <[^>]*> ldhio r4,0\(zero\)
++[ ]*f0: R_NIOS2_S16 big_external_data_label
++0+00f4 <[^>]*> ldhio r4,0\(zero\)
++[ ]*f4: R_NIOS2_S16 small_external_data_label
++0+00f8 <[^>]*> ldhio r4,0\(zero\)
++[ ]*f8: R_NIOS2_S16 big_external_common
++0+00fc <[^>]*> ldhio r4,0\(zero\)
++[ ]*fc: R_NIOS2_S16 small_external_common
++0+0100 <[^>]*> ldhio r4,0\(zero\)
++[ ]*100: R_NIOS2_S16 .bss
++0+0104 <[^>]*> ldhio r4,0\(zero\)
++[ ]*104: R_NIOS2_S16 .bss\+0x4000
++0+0108 <[^>]*> ldhio r4,0\(zero\)
++[ ]*108: R_NIOS2_S16 .data\+0x4
++0+010c <[^>]*> ldhio r4,0\(zero\)
++[ ]*10c: R_NIOS2_S16 big_external_data_label\+0x4
++0+0110 <[^>]*> ldhio r4,0\(zero\)
++[ ]*110: R_NIOS2_S16 small_external_data_label\+0x4
++0+0114 <[^>]*> ldhio r4,0\(zero\)
++[ ]*114: R_NIOS2_S16 big_external_common\+0x4
++0+0118 <[^>]*> ldhio r4,0\(zero\)
++[ ]*118: R_NIOS2_S16 small_external_common\+0x4
++0+011c <[^>]*> ldhio r4,0\(zero\)
++[ ]*11c: R_NIOS2_S16 .bss\+0x4
++0+0120 <[^>]*> ldhio r4,0\(zero\)
++[ ]*120: R_NIOS2_S16 .bss\+0x4004
++0+0124 <[^>]*> ldhio r4,0\(zero\)
++[ ]*124: R_NIOS2_S16 .data\+0xffff8000
++0+0128 <[^>]*> ldhio r4,0\(zero\)
++[ ]*128: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+012c <[^>]*> ldhio r4,0\(zero\)
++[ ]*12c: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0130 <[^>]*> ldhio r4,0\(zero\)
++[ ]*130: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0134 <[^>]*> ldhio r4,0\(zero\)
++[ ]*134: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0138 <[^>]*> ldhio r4,0\(zero\)
++[ ]*138: R_NIOS2_S16 .bss\+0xffff8000
++0+013c <[^>]*> ldhio r4,0\(zero\)
++[ ]*13c: R_NIOS2_S16 .bss\+0xffffc000
++0+0140 <[^>]*> ldhio r4,0\(zero\)
++[ ]*140: R_NIOS2_S16 .data\+0x10000
++0+0144 <[^>]*> ldhio r4,0\(r5\)
++[ ]*144: R_NIOS2_S16 .data
++0+0148 <[^>]*> ldhio r4,0\(r5\)
++[ ]*148: R_NIOS2_S16 big_external_data_label
++0+014c <[^>]*> ldhio r4,0\(r5\)
++[ ]*14c: R_NIOS2_S16 small_external_data_label
++0+0150 <[^>]*> ldhio r4,0\(r5\)
++[ ]*150: R_NIOS2_S16 big_external_common
++0+0154 <[^>]*> ldhio r4,0\(r5\)
++[ ]*154: R_NIOS2_S16 small_external_common
++0+0158 <[^>]*> ldhio r4,0\(r5\)
++[ ]*158: R_NIOS2_S16 .bss
++0+015c <[^>]*> ldhio r4,0\(r5\)
++[ ]*15c: R_NIOS2_S16 .bss\+0x4000
++0+0160 <[^>]*> ldhio r4,0\(r5\)
++[ ]*160: R_NIOS2_S16 .data\+0x4
++0+0164 <[^>]*> ldhio r4,0\(r5\)
++[ ]*164: R_NIOS2_S16 big_external_data_label\+0x4
++0+0168 <[^>]*> ldhio r4,0\(r5\)
++[ ]*168: R_NIOS2_S16 small_external_data_label\+0x4
++0+016c <[^>]*> ldhio r4,0\(r5\)
++[ ]*16c: R_NIOS2_S16 big_external_common\+0x4
++0+0170 <[^>]*> ldhio r4,0\(r5\)
++[ ]*170: R_NIOS2_S16 small_external_common\+0x4
++0+0174 <[^>]*> ldhio r4,0\(r5\)
++[ ]*174: R_NIOS2_S16 .bss\+0x4
++0+0178 <[^>]*> ldhio r4,0\(r5\)
++[ ]*178: R_NIOS2_S16 .bss\+0x4004
++0+017c <[^>]*> ldhio r4,0\(r5\)
++[ ]*17c: R_NIOS2_S16 .data\+0xffff8000
++0+0180 <[^>]*> ldhio r4,0\(r5\)
++[ ]*180: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0184 <[^>]*> ldhio r4,0\(r5\)
++[ ]*184: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0188 <[^>]*> ldhio r4,0\(r5\)
++[ ]*188: R_NIOS2_S16 big_external_common\+0xffff8000
++0+018c <[^>]*> ldhio r4,0\(r5\)
++[ ]*18c: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0190 <[^>]*> ldhio r4,0\(r5\)
++[ ]*190: R_NIOS2_S16 .bss\+0xffff8000
++0+0194 <[^>]*> ldhio r4,0\(r5\)
++[ ]*194: R_NIOS2_S16 .bss\+0xffffc000
+--- binutils-2.15/gas/testsuite/gas/nios2/ldh.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ldh.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,117 @@
++ .data
++data_label:
++ .extern big_external_data_label,0x4000
++ .extern small_external_data_label,4
++ .comm big_external_common,0x4000
++ .comm small_external_common,4
++ .lcomm big_local_common,0x4000
++ .lcomm small_local_common,4
++
++# the small symbols should have space allocated in the sbss section
++# but this is not yet supported in the assembler, so space is allocated
++# in the .bss section and the relocations are not gp-relative. this will
++# be updated when gp-relative relocations are added
++ .text
++ ldh r4,0(r0)
++ ldh r4,4(r0)
++ ldh r4,0x7ffc(r0)
++ ldh r4,-0x8000(r0)
++ ldh r4,0(r5)
++ ldh r4,4(r5)
++ ldh r4,0x7ffc(r5)
++ ldh r4,-0x8000(r5)
++ ldh r4,data_label(r0)
++ ldh r4,big_external_data_label(r0)
++ ldh r4,small_external_data_label(r0)
++ ldh r4,big_external_common(r0)
++ ldh r4,small_external_common(r0)
++ ldh r4,big_local_common(r0)
++ ldh r4,small_local_common(r0)
++ ldh r4,data_label+4(r0)
++ ldh r4,big_external_data_label+4(r0)
++ ldh r4,small_external_data_label+4(r0)
++ ldh r4,big_external_common+4(r0)
++ ldh r4,small_external_common+4(r0)
++ ldh r4,big_local_common+4(r0)
++ ldh r4,small_local_common+4(r0)
++ ldh r4,data_label-0x8000(r0)
++ ldh r4,big_external_data_label-0x8000(r0)
++ ldh r4,small_external_data_label-0x8000(r0)
++ ldh r4,big_external_common-0x8000(r0)
++ ldh r4,small_external_common-0x8000(r0)
++ ldh r4,big_local_common-0x8000(r0)
++ ldh r4,small_local_common-0x8000(r0)
++ ldh r4,data_label+0x10000(r0)
++ ldh r4,data_label(r5)
++ ldh r4,big_external_data_label(r5)
++ ldh r4,small_external_data_label(r5)
++ ldh r4,big_external_common(r5)
++ ldh r4,small_external_common(r5)
++ ldh r4,big_local_common(r5)
++ ldh r4,small_local_common(r5)
++ ldh r4,data_label+4(r5)
++ ldh r4,big_external_data_label+4(r5)
++ ldh r4,small_external_data_label+4(r5)
++ ldh r4,big_external_common+4(r5)
++ ldh r4,small_external_common+4(r5)
++ ldh r4,big_local_common+4(r5)
++ ldh r4,small_local_common+4(r5)
++ ldh r4,data_label-0x8000(r5)
++ ldh r4,big_external_data_label-0x8000(r5)
++ ldh r4,small_external_data_label-0x8000(r5)
++ ldh r4,big_external_common-0x8000(r5)
++ ldh r4,small_external_common-0x8000(r5)
++ ldh r4,big_local_common-0x8000(r5)
++ ldh r4,small_local_common-0x8000(r5)
++
++ ldhio r4,0(r0)
++ ldhio r4,4(r0)
++ ldhio r4,0x7ffc(r0)
++ ldhio r4,-0x8000(r0)
++ ldhio r4,0(r5)
++ ldhio r4,4(r5)
++ ldhio r4,0x7ffc(r5)
++ ldhio r4,-0x8000(r5)
++ ldhio r4,data_label(r0)
++ ldhio r4,big_external_data_label(r0)
++ ldhio r4,small_external_data_label(r0)
++ ldhio r4,big_external_common(r0)
++ ldhio r4,small_external_common(r0)
++ ldhio r4,big_local_common(r0)
++ ldhio r4,small_local_common(r0)
++ ldhio r4,data_label+4(r0)
++ ldhio r4,big_external_data_label+4(r0)
++ ldhio r4,small_external_data_label+4(r0)
++ ldhio r4,big_external_common+4(r0)
++ ldhio r4,small_external_common+4(r0)
++ ldhio r4,big_local_common+4(r0)
++ ldhio r4,small_local_common+4(r0)
++ ldhio r4,data_label-0x8000(r0)
++ ldhio r4,big_external_data_label-0x8000(r0)
++ ldhio r4,small_external_data_label-0x8000(r0)
++ ldhio r4,big_external_common-0x8000(r0)
++ ldhio r4,small_external_common-0x8000(r0)
++ ldhio r4,big_local_common-0x8000(r0)
++ ldhio r4,small_local_common-0x8000(r0)
++ ldhio r4,data_label+0x10000(r0)
++ ldhio r4,data_label(r5)
++ ldhio r4,big_external_data_label(r5)
++ ldhio r4,small_external_data_label(r5)
++ ldhio r4,big_external_common(r5)
++ ldhio r4,small_external_common(r5)
++ ldhio r4,big_local_common(r5)
++ ldhio r4,small_local_common(r5)
++ ldhio r4,data_label+4(r5)
++ ldhio r4,big_external_data_label+4(r5)
++ ldhio r4,small_external_data_label+4(r5)
++ ldhio r4,big_external_common+4(r5)
++ ldhio r4,small_external_common+4(r5)
++ ldhio r4,big_local_common+4(r5)
++ ldhio r4,small_local_common+4(r5)
++ ldhio r4,data_label-0x8000(r5)
++ ldhio r4,big_external_data_label-0x8000(r5)
++ ldhio r4,small_external_data_label-0x8000(r5)
++ ldhio r4,big_external_common-0x8000(r5)
++ ldhio r4,small_external_common-0x8000(r5)
++ ldhio r4,big_local_common-0x8000(r5)
++ ldhio r4,small_local_common-0x8000(r5)
+--- binutils-2.15/gas/testsuite/gas/nios2/ldw.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ldw.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,196 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 ldw
++
++# Test the ld instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> ldw r4,0\(zero\)
++0+0004 <[^>]*> ldw r4,4\(zero\)
++0+0008 <[^>]*> ldw r4,32764\(zero\)
++0+000c <[^>]*> ldw r4,-32768\(zero\)
++0+0010 <[^>]*> ldw r4,0\(r5\)
++0+0014 <[^>]*> ldw r4,4\(r5\)
++0+0018 <[^>]*> ldw r4,32764\(r5\)
++0+001c <[^>]*> ldw r4,-32768\(r5\)
++0+0020 <[^>]*> ldw r4,0\(zero\)
++[ ]*20: R_NIOS2_S16 .data
++0+0024 <[^>]*> ldw r4,0\(zero\)
++[ ]*24: R_NIOS2_S16 big_external_data_label
++0+0028 <[^>]*> ldw r4,0\(zero\)
++[ ]*28: R_NIOS2_S16 small_external_data_label
++0+002c <[^>]*> ldw r4,0\(zero\)
++[ ]*2c: R_NIOS2_S16 big_external_common
++0+0030 <[^>]*> ldw r4,0\(zero\)
++[ ]*30: R_NIOS2_S16 small_external_common
++0+0034 <[^>]*> ldw r4,0\(zero\)
++[ ]*34: R_NIOS2_S16 .bss
++0+0038 <[^>]*> ldw r4,0\(zero\)
++[ ]*38: R_NIOS2_S16 .bss\+0x4000
++0+003c <[^>]*> ldw r4,0\(zero\)
++[ ]*3c: R_NIOS2_S16 .data\+0x4
++0+0040 <[^>]*> ldw r4,0\(zero\)
++[ ]*40: R_NIOS2_S16 big_external_data_label\+0x4
++0+0044 <[^>]*> ldw r4,0\(zero\)
++[ ]*44: R_NIOS2_S16 small_external_data_label\+0x4
++0+0048 <[^>]*> ldw r4,0\(zero\)
++[ ]*48: R_NIOS2_S16 big_external_common\+0x4
++0+004c <[^>]*> ldw r4,0\(zero\)
++[ ]*4c: R_NIOS2_S16 small_external_common\+0x4
++0+0050 <[^>]*> ldw r4,0\(zero\)
++[ ]*50: R_NIOS2_S16 .bss\+0x4
++0+0054 <[^>]*> ldw r4,0\(zero\)
++[ ]*54: R_NIOS2_S16 .bss\+0x4004
++0+0058 <[^>]*> ldw r4,0\(zero\)
++[ ]*58: R_NIOS2_S16 .data\+0xffff8000
++0+005c <[^>]*> ldw r4,0\(zero\)
++[ ]*5c: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0060 <[^>]*> ldw r4,0\(zero\)
++[ ]*60: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0064 <[^>]*> ldw r4,0\(zero\)
++[ ]*64: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0068 <[^>]*> ldw r4,0\(zero\)
++[ ]*68: R_NIOS2_S16 small_external_common\+0xffff8000
++0+006c <[^>]*> ldw r4,0\(zero\)
++[ ]*6c: R_NIOS2_S16 .bss\+0xffff8000
++0+0070 <[^>]*> ldw r4,0\(zero\)
++[ ]*70: R_NIOS2_S16 .bss\+0xffffc000
++0+0074 <[^>]*> ldw r4,0\(zero\)
++[ ]*74: R_NIOS2_S16 .data\+0x10000
++0+0078 <[^>]*> ldw r4,0\(r5\)
++[ ]*78: R_NIOS2_S16 .data
++0+007c <[^>]*> ldw r4,0\(r5\)
++[ ]*7c: R_NIOS2_S16 big_external_data_label
++0+0080 <[^>]*> ldw r4,0\(r5\)
++[ ]*80: R_NIOS2_S16 small_external_data_label
++0+0084 <[^>]*> ldw r4,0\(r5\)
++[ ]*84: R_NIOS2_S16 big_external_common
++0+0088 <[^>]*> ldw r4,0\(r5\)
++[ ]*88: R_NIOS2_S16 small_external_common
++0+008c <[^>]*> ldw r4,0\(r5\)
++[ ]*8c: R_NIOS2_S16 .bss
++0+0090 <[^>]*> ldw r4,0\(r5\)
++[ ]*90: R_NIOS2_S16 .bss\+0x4000
++0+0094 <[^>]*> ldw r4,0\(r5\)
++[ ]*94: R_NIOS2_S16 .data\+0x4
++0+0098 <[^>]*> ldw r4,0\(r5\)
++[ ]*98: R_NIOS2_S16 big_external_data_label\+0x4
++0+009c <[^>]*> ldw r4,0\(r5\)
++[ ]*9c: R_NIOS2_S16 small_external_data_label\+0x4
++0+00a0 <[^>]*> ldw r4,0\(r5\)
++[ ]*a0: R_NIOS2_S16 big_external_common\+0x4
++0+00a4 <[^>]*> ldw r4,0\(r5\)
++[ ]*a4: R_NIOS2_S16 small_external_common\+0x4
++0+00a8 <[^>]*> ldw r4,0\(r5\)
++[ ]*a8: R_NIOS2_S16 .bss\+0x4
++0+00ac <[^>]*> ldw r4,0\(r5\)
++[ ]*ac: R_NIOS2_S16 .bss\+0x4004
++0+00b0 <[^>]*> ldw r4,0\(r5\)
++[ ]*b0: R_NIOS2_S16 .data\+0xffff8000
++0+00b4 <[^>]*> ldw r4,0\(r5\)
++[ ]*b4: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+00b8 <[^>]*> ldw r4,0\(r5\)
++[ ]*b8: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+00bc <[^>]*> ldw r4,0\(r5\)
++[ ]*bc: R_NIOS2_S16 big_external_common\+0xffff8000
++0+00c0 <[^>]*> ldw r4,0\(r5\)
++[ ]*c0: R_NIOS2_S16 small_external_common\+0xffff8000
++0+00c4 <[^>]*> ldw r4,0\(r5\)
++[ ]*c4: R_NIOS2_S16 .bss\+0xffff8000
++0+00c8 <[^>]*> ldw r4,0\(r5\)
++[ ]*c8: R_NIOS2_S16 .bss\+0xffffc000
++0+00cc <[^>]*> ldwio r4,0\(zero\)
++0+00d0 <[^>]*> ldwio r4,4\(zero\)
++0+00d4 <[^>]*> ldwio r4,32764\(zero\)
++0+00d8 <[^>]*> ldwio r4,-32768\(zero\)
++0+00dc <[^>]*> ldwio r4,0\(r5\)
++0+00e0 <[^>]*> ldwio r4,4\(r5\)
++0+00e4 <[^>]*> ldwio r4,32764\(r5\)
++0+00e8 <[^>]*> ldwio r4,-32768\(r5\)
++0+00ec <[^>]*> ldwio r4,0\(zero\)
++[ ]*ec: R_NIOS2_S16 .data
++0+00f0 <[^>]*> ldwio r4,0\(zero\)
++[ ]*f0: R_NIOS2_S16 big_external_data_label
++0+00f4 <[^>]*> ldwio r4,0\(zero\)
++[ ]*f4: R_NIOS2_S16 small_external_data_label
++0+00f8 <[^>]*> ldwio r4,0\(zero\)
++[ ]*f8: R_NIOS2_S16 big_external_common
++0+00fc <[^>]*> ldwio r4,0\(zero\)
++[ ]*fc: R_NIOS2_S16 small_external_common
++0+0100 <[^>]*> ldwio r4,0\(zero\)
++[ ]*100: R_NIOS2_S16 .bss
++0+0104 <[^>]*> ldwio r4,0\(zero\)
++[ ]*104: R_NIOS2_S16 .bss\+0x4000
++0+0108 <[^>]*> ldwio r4,0\(zero\)
++[ ]*108: R_NIOS2_S16 .data\+0x4
++0+010c <[^>]*> ldwio r4,0\(zero\)
++[ ]*10c: R_NIOS2_S16 big_external_data_label\+0x4
++0+0110 <[^>]*> ldwio r4,0\(zero\)
++[ ]*110: R_NIOS2_S16 small_external_data_label\+0x4
++0+0114 <[^>]*> ldwio r4,0\(zero\)
++[ ]*114: R_NIOS2_S16 big_external_common\+0x4
++0+0118 <[^>]*> ldwio r4,0\(zero\)
++[ ]*118: R_NIOS2_S16 small_external_common\+0x4
++0+011c <[^>]*> ldwio r4,0\(zero\)
++[ ]*11c: R_NIOS2_S16 .bss\+0x4
++0+0120 <[^>]*> ldwio r4,0\(zero\)
++[ ]*120: R_NIOS2_S16 .bss\+0x4004
++0+0124 <[^>]*> ldwio r4,0\(zero\)
++[ ]*124: R_NIOS2_S16 .data\+0xffff8000
++0+0128 <[^>]*> ldwio r4,0\(zero\)
++[ ]*128: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+012c <[^>]*> ldwio r4,0\(zero\)
++[ ]*12c: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0130 <[^>]*> ldwio r4,0\(zero\)
++[ ]*130: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0134 <[^>]*> ldwio r4,0\(zero\)
++[ ]*134: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0138 <[^>]*> ldwio r4,0\(zero\)
++[ ]*138: R_NIOS2_S16 .bss\+0xffff8000
++0+013c <[^>]*> ldwio r4,0\(zero\)
++[ ]*13c: R_NIOS2_S16 .bss\+0xffffc000
++0+0140 <[^>]*> ldwio r4,0\(zero\)
++[ ]*140: R_NIOS2_S16 .data\+0x10000
++0+0144 <[^>]*> ldwio r4,0\(r5\)
++[ ]*144: R_NIOS2_S16 .data
++0+0148 <[^>]*> ldwio r4,0\(r5\)
++[ ]*148: R_NIOS2_S16 big_external_data_label
++0+014c <[^>]*> ldwio r4,0\(r5\)
++[ ]*14c: R_NIOS2_S16 small_external_data_label
++0+0150 <[^>]*> ldwio r4,0\(r5\)
++[ ]*150: R_NIOS2_S16 big_external_common
++0+0154 <[^>]*> ldwio r4,0\(r5\)
++[ ]*154: R_NIOS2_S16 small_external_common
++0+0158 <[^>]*> ldwio r4,0\(r5\)
++[ ]*158: R_NIOS2_S16 .bss
++0+015c <[^>]*> ldwio r4,0\(r5\)
++[ ]*15c: R_NIOS2_S16 .bss\+0x4000
++0+0160 <[^>]*> ldwio r4,0\(r5\)
++[ ]*160: R_NIOS2_S16 .data\+0x4
++0+0164 <[^>]*> ldwio r4,0\(r5\)
++[ ]*164: R_NIOS2_S16 big_external_data_label\+0x4
++0+0168 <[^>]*> ldwio r4,0\(r5\)
++[ ]*168: R_NIOS2_S16 small_external_data_label\+0x4
++0+016c <[^>]*> ldwio r4,0\(r5\)
++[ ]*16c: R_NIOS2_S16 big_external_common\+0x4
++0+0170 <[^>]*> ldwio r4,0\(r5\)
++[ ]*170: R_NIOS2_S16 small_external_common\+0x4
++0+0174 <[^>]*> ldwio r4,0\(r5\)
++[ ]*174: R_NIOS2_S16 .bss\+0x4
++0+0178 <[^>]*> ldwio r4,0\(r5\)
++[ ]*178: R_NIOS2_S16 .bss\+0x4004
++0+017c <[^>]*> ldwio r4,0\(r5\)
++[ ]*17c: R_NIOS2_S16 .data\+0xffff8000
++0+0180 <[^>]*> ldwio r4,0\(r5\)
++[ ]*180: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0184 <[^>]*> ldwio r4,0\(r5\)
++[ ]*184: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0188 <[^>]*> ldwio r4,0\(r5\)
++[ ]*188: R_NIOS2_S16 big_external_common\+0xffff8000
++0+018c <[^>]*> ldwio r4,0\(r5\)
++[ ]*18c: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0190 <[^>]*> ldwio r4,0\(r5\)
++[ ]*190: R_NIOS2_S16 .bss\+0xffff8000
++0+0194 <[^>]*> ldwio r4,0\(r5\)
++[ ]*194: R_NIOS2_S16 .bss\+0xffffc000
+--- binutils-2.15/gas/testsuite/gas/nios2/ldw.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ldw.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,117 @@
++ .data
++data_label:
++ .extern big_external_data_label,0x4000
++ .extern small_external_data_label,4
++ .comm big_external_common,0x4000
++ .comm small_external_common,4
++ .lcomm big_local_common,0x4000
++ .lcomm small_local_common,4
++
++# the small symbols should have space allocated in the sbss section
++# but this is not yet supported in the assembler, so space is allocated
++# in the .bss section and the relocations are not gp-relative. this will
++# be updated when gp-relative relocations are added
++ .text
++ ldw r4,0(r0)
++ ldw r4,4(r0)
++ ldw r4,0x7ffc(r0)
++ ldw r4,-0x8000(r0)
++ ldw r4,0(r5)
++ ldw r4,4(r5)
++ ldw r4,0x7ffc(r5)
++ ldw r4,-0x8000(r5)
++ ldw r4,data_label(r0)
++ ldw r4,big_external_data_label(r0)
++ ldw r4,small_external_data_label(r0)
++ ldw r4,big_external_common(r0)
++ ldw r4,small_external_common(r0)
++ ldw r4,big_local_common(r0)
++ ldw r4,small_local_common(r0)
++ ldw r4,data_label+4(r0)
++ ldw r4,big_external_data_label+4(r0)
++ ldw r4,small_external_data_label+4(r0)
++ ldw r4,big_external_common+4(r0)
++ ldw r4,small_external_common+4(r0)
++ ldw r4,big_local_common+4(r0)
++ ldw r4,small_local_common+4(r0)
++ ldw r4,data_label-0x8000(r0)
++ ldw r4,big_external_data_label-0x8000(r0)
++ ldw r4,small_external_data_label-0x8000(r0)
++ ldw r4,big_external_common-0x8000(r0)
++ ldw r4,small_external_common-0x8000(r0)
++ ldw r4,big_local_common-0x8000(r0)
++ ldw r4,small_local_common-0x8000(r0)
++ ldw r4,data_label+0x10000(r0)
++ ldw r4,data_label(r5)
++ ldw r4,big_external_data_label(r5)
++ ldw r4,small_external_data_label(r5)
++ ldw r4,big_external_common(r5)
++ ldw r4,small_external_common(r5)
++ ldw r4,big_local_common(r5)
++ ldw r4,small_local_common(r5)
++ ldw r4,data_label+4(r5)
++ ldw r4,big_external_data_label+4(r5)
++ ldw r4,small_external_data_label+4(r5)
++ ldw r4,big_external_common+4(r5)
++ ldw r4,small_external_common+4(r5)
++ ldw r4,big_local_common+4(r5)
++ ldw r4,small_local_common+4(r5)
++ ldw r4,data_label-0x8000(r5)
++ ldw r4,big_external_data_label-0x8000(r5)
++ ldw r4,small_external_data_label-0x8000(r5)
++ ldw r4,big_external_common-0x8000(r5)
++ ldw r4,small_external_common-0x8000(r5)
++ ldw r4,big_local_common-0x8000(r5)
++ ldw r4,small_local_common-0x8000(r5)
++
++ ldwio r4,0(r0)
++ ldwio r4,4(r0)
++ ldwio r4,0x7ffc(r0)
++ ldwio r4,-0x8000(r0)
++ ldwio r4,0(r5)
++ ldwio r4,4(r5)
++ ldwio r4,0x7ffc(r5)
++ ldwio r4,-0x8000(r5)
++ ldwio r4,data_label(r0)
++ ldwio r4,big_external_data_label(r0)
++ ldwio r4,small_external_data_label(r0)
++ ldwio r4,big_external_common(r0)
++ ldwio r4,small_external_common(r0)
++ ldwio r4,big_local_common(r0)
++ ldwio r4,small_local_common(r0)
++ ldwio r4,data_label+4(r0)
++ ldwio r4,big_external_data_label+4(r0)
++ ldwio r4,small_external_data_label+4(r0)
++ ldwio r4,big_external_common+4(r0)
++ ldwio r4,small_external_common+4(r0)
++ ldwio r4,big_local_common+4(r0)
++ ldwio r4,small_local_common+4(r0)
++ ldwio r4,data_label-0x8000(r0)
++ ldwio r4,big_external_data_label-0x8000(r0)
++ ldwio r4,small_external_data_label-0x8000(r0)
++ ldwio r4,big_external_common-0x8000(r0)
++ ldwio r4,small_external_common-0x8000(r0)
++ ldwio r4,big_local_common-0x8000(r0)
++ ldwio r4,small_local_common-0x8000(r0)
++ ldwio r4,data_label+0x10000(r0)
++ ldwio r4,data_label(r5)
++ ldwio r4,big_external_data_label(r5)
++ ldwio r4,small_external_data_label(r5)
++ ldwio r4,big_external_common(r5)
++ ldwio r4,small_external_common(r5)
++ ldwio r4,big_local_common(r5)
++ ldwio r4,small_local_common(r5)
++ ldwio r4,data_label+4(r5)
++ ldwio r4,big_external_data_label+4(r5)
++ ldwio r4,small_external_data_label+4(r5)
++ ldwio r4,big_external_common+4(r5)
++ ldwio r4,small_external_common+4(r5)
++ ldwio r4,big_local_common+4(r5)
++ ldwio r4,small_local_common+4(r5)
++ ldwio r4,data_label-0x8000(r5)
++ ldwio r4,big_external_data_label-0x8000(r5)
++ ldwio r4,small_external_data_label-0x8000(r5)
++ ldwio r4,big_external_common-0x8000(r5)
++ ldwio r4,small_external_common-0x8000(r5)
++ ldwio r4,big_local_common-0x8000(r5)
++ ldwio r4,small_local_common-0x8000(r5)
+--- binutils-2.15/gas/testsuite/gas/nios2/lineseparator.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/lineseparator.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 lineseparator
++
++# Test the add instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0x0+0000 mov r5,r4
++0x0+0004 mov r4,r5
+--- binutils-2.15/gas/testsuite/gas/nios2/lineseparator.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/lineseparator.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,4 @@
++mov r5, r4 ; mov r4, r5
++
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/link1.lds 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/link1.lds 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,11 @@
++/* Simple script for testing relaxation */
++
++OUTPUT_FORMAT("elf32-littlenios2", "elf32-littlenios2", "elf32-littlenios2")
++OUTPUT_ARCH(nios2)
++ENTRY(_start)
++SECTIONS
++{
++ _start = .;
++ text2 0 : { *(text2) }
++ text1 0x8000 : { *(text1) }
++}
+--- binutils-2.15/gas/testsuite/gas/nios2/link2.lds 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/link2.lds 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,11 @@
++/* Simple script for testing relaxation */
++
++OUTPUT_FORMAT("elf32-littlenios2", "elf32-littlenios2", "elf32-littlenios2")
++OUTPUT_ARCH(nios2)
++ENTRY(_start)
++SECTIONS
++{
++ _start = .;
++ text1 0 : { *(text1) }
++ text2 0x80000000 : { *(text2) }
++}
+--- binutils-2.15/gas/testsuite/gas/nios2/link3.lds 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/link3.lds 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,11 @@
++/* Simple script for testing relaxation */
++
++OUTPUT_FORMAT("elf32-littlenios2", "elf32-littlenios2", "elf32-littlenios2")
++OUTPUT_ARCH(nios2)
++ENTRY(_start)
++SECTIONS
++{
++ _start = .;
++ text1 0 : { *(text1) }
++ text2 0x08000000 : { *(text2) }
++}
+--- binutils-2.15/gas/testsuite/gas/nios2/mov.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/mov.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,11 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 mov
++
++# Test the mov instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> movz \$4,\$5,\$6
++0+0004 <[^>]*> movnz \$4,\$5,\$6
++
+--- binutils-2.15/gas/testsuite/gas/nios2/mov.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/mov.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,5 @@
++# Source file used to test the movz and movnz instructions
++
++foo:
++ movz $4,$5,$6
++ movnz $4,$5,$6
+--- binutils-2.15/gas/testsuite/gas/nios2/movi.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/movi.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,13 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 movi
++
++# Test implicit conversion of movi/movhi etc
++.*: file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> movi r2,32
++0+0004 <[^>]*> movhi r2,8192
++0+0008 <[^>]*> movhi r2,65535
++0+000c <[^>]*> orhi r2,r5,65535
++0+0010 <[^>]*> xorhi r2,r10,65535
++0+0014 <[^>]*> andhi r2,r15,65535
+--- binutils-2.15/gas/testsuite/gas/nios2/movi.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/movi.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,21 @@
++# Source file used to test silent conversion of
++# movi to orhi etc
++
++foo:
++# this doesn't get converted
++movi r2, 0x20
++
++# this does
++movi r2, 0x20000000
++
++# addi should convert only if the source register is r0
++addi r2, r0, 0xffff0000
++# but we can't test for non-conversion because the value would
++# be out of range
++
++# logical ops should convert for any register
++ori r2, r5, 0xffff0000
++xori r2, r10, 0xffff0000
++andi r2, r15, 0xffff0000
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/movia.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/movia.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,18 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 movia
++
++# Test the movia instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> movhi r2,32897
++0+0004 <[^>]*> addi r2,r2,-32640
++0+0008 <[^>]*> movhi r3,0
++ 8: R_NIOS2_HIADJ16 sym\+0x80000000
++0+000c <[^>]*> addi r3,r3,0
++ c: R_NIOS2_LO16 sym\+0x80000000
++0+0010 <[^>]*> movhi r4,0
++ 10: R_NIOS2_HIADJ16 sym\+0x80000001
++0+0014 <[^>]*> addi r4,r4,0
++ 14: R_NIOS2_LO16 sym\+0x80000001
+--- binutils-2.15/gas/testsuite/gas/nios2/movia.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/movia.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,6 @@
++# Test program for movia reg, immed32 macro
++
++foo:
++ movia r2, 0x80808080
++ movia r3, sym + 0x80000000
++ movia r4, sym - 0x7fffffff
+--- binutils-2.15/gas/testsuite/gas/nios2/mul.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/mul.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,19 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 mul
++
++# Test the mul macro.
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> mul r4,r5,r6
++0+0004 <[^>]*> muli r4,r5,0
++0+0008 <[^>]*> muli r4,r5,1
++0+000c <[^>]*> muli r4,r5,-32768
++0+0010 <[^>]*> muli r4,r5,32767
++0+0014 <[^>]*> muli r4,r5,0
++[ ]*14: R_NIOS2_S16 undefined_symbol
++0+0018 <[^>]*> muli r4,r5,16448
++0+001c <[^>]*> mulxss r4,r5,r6
++0+0020 <[^>]*> mulxsu r4,r5,r6
++0+0024 <[^>]*> mulxuu r4,r5,r6
+--- binutils-2.15/gas/testsuite/gas/nios2/mul.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/mul.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,15 @@
++# Source file used to test the mul macro.
++
++foo:
++ mul r4,r5,r6
++ muli r4,r5,0
++ muli r4,r5,1
++ muli r4,r5,-0x8000
++ muli r4,r5,0x7fff
++ muli r4,r5,undefined_symbol
++ muli r4,r5,defined_symbol
++ mulxss r4,r5,r6
++ mulxsu r4,r5,r6
++ mulxuu r4,r5,r6
++.data
++.set defined_symbol, 0x4040
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-merged_strings.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-merged_strings.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,17 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 reloc against merged strings
++
++# Test the merged duplicate strings
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> addi r2,r2,32
++0+0004 <[^>]*> addi r3,r3,63
++0+0008 <[^>]*> addi r4,r4,70
++0+000c <[^>]*> call 00000000 <func1>
++0+0010 <[^>]*> addi r2,r2,101
++0+0014 <[^>]*> addi r3,r3,63
++0+0018 <[^>]*> addi r4,r4,132
++0+001c <[^>]*> call 00000000 <func1>
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-merged_strings.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-merged_strings.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,21 @@
++ .section .rodata.str1.1,"aMS",@progbits,1
++.LC0:
++ .string "DHRYSTONE PROGRAM, 1'ST STRING"
++.LC1:
++ .string "COMMON"
++.LC2:
++ .string "DHRYSTONE PROGRAM, 2'ND STRING"
++
++ .section .text
++ .align 3
++ .global func1
++ .type func1, @function
++func1:
++ #movhi $2, %hiadj(.LC0)
++ addi r2, r2, .LC0
++ #movhi $3, %hiadj(.LC1)
++ addi r3, r3, .LC1
++ #movhi $4, %hiadj(.LC2)
++ addi r4, r4, .LC2
++ .size func1, .-func1
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-bfd-reloc-xx.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-bfd-reloc-xx.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8 @@
++#objdump: -s
++#name: NIOS2 R_NIOS2_BFD_RELOC_XX
++
++# Test the branch instructions.
++.*: +file format elf32-littlenios2
++
++Contents of section .text:
++ 0000 fa00cefa efbeadde facefaef beadde00 ................
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-bfd-reloc-xx.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-bfd-reloc-xx.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,9 @@
++# Test for New Jersey 32-bit, 16 and 8-bit relocations
++
++.global byte_sym
++.global short_sym
++.global long_sym
++
++.set byte_sym, 0xFA
++.set short_sym, 0xFACE
++.set long_sym, 0xDEADBEEF
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-cache-opx.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-cache-opx.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 R_NIOS2_CACHE_OPX
++
++# Test the cache opx relocation
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> cache 0x1f,0x1000\(\$1\)
++0+0004 <[^>]*> Address 0x4 is out of bounds.
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-cache-opx.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-cache-opx.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,6 @@
++# Test the imm5 relocation
++
++.text
++ cache imm5, 0x1000($1)
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-call26.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-call26.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,76 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 nios2-reloc-r-nios2-call26
++
++# Test the branch instructions.
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++[ ]*\.\.\.
++[ ]*0: R_NIOS2_CALL26 .text\+0x100
++[ ]*4: R_NIOS2_CALL26 globalfunc
++0+0008 <[^>]*> nop
++0+000c <[^>]*> nop
++0+0010 <[^>]*> nop
++0+0014 <[^>]*> nop
++0+0018 <[^>]*> nop
++0+001c <[^>]*> nop
++0+0020 <[^>]*> nop
++0+0024 <[^>]*> nop
++0+0028 <[^>]*> nop
++0+002c <[^>]*> nop
++0+0030 <[^>]*> nop
++0+0034 <[^>]*> nop
++0+0038 <[^>]*> nop
++0+003c <[^>]*> nop
++0+0040 <[^>]*> nop
++0+0044 <[^>]*> nop
++0+0048 <[^>]*> nop
++0+004c <[^>]*> nop
++0+0050 <[^>]*> nop
++0+0054 <[^>]*> nop
++0+0058 <[^>]*> nop
++0+005c <[^>]*> nop
++0+0060 <[^>]*> nop
++0+0064 <[^>]*> nop
++0+0068 <[^>]*> nop
++0+006c <[^>]*> nop
++0+0070 <[^>]*> nop
++0+0074 <[^>]*> nop
++0+0078 <[^>]*> nop
++0+007c <[^>]*> nop
++0+0080 <[^>]*> nop
++0+0084 <[^>]*> nop
++0+0088 <[^>]*> nop
++0+008c <[^>]*> nop
++0+0090 <[^>]*> nop
++0+0094 <[^>]*> nop
++0+0098 <[^>]*> nop
++0+009c <[^>]*> nop
++0+00a0 <[^>]*> nop
++0+00a4 <[^>]*> nop
++0+00a8 <[^>]*> nop
++0+00ac <[^>]*> nop
++0+00b0 <[^>]*> nop
++0+00b4 <[^>]*> nop
++0+00b8 <[^>]*> nop
++0+00bc <[^>]*> nop
++0+00c0 <[^>]*> nop
++0+00c4 <[^>]*> nop
++0+00c8 <[^>]*> nop
++0+00cc <[^>]*> nop
++0+00d0 <[^>]*> nop
++0+00d4 <[^>]*> nop
++0+00d8 <[^>]*> nop
++0+00dc <[^>]*> nop
++0+00e0 <[^>]*> nop
++0+00e4 <[^>]*> nop
++0+00e8 <[^>]*> nop
++0+00ec <[^>]*> nop
++0+00f0 <[^>]*> nop
++0+00f4 <[^>]*> nop
++0+00f8 <[^>]*> nop
++0+00fc <[^>]*> nop
++0+0100 <[^>]*> nop
++ ...
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-call26.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-call26.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,12 @@
++# Test for New Jersey 32-bit relocations
++
++.global globalfunc
++.text
++.set norelax
++start:
++ call localfunc
++ call globalfunc
++
++.align 8
++localfunc:
++ nop
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-gprel.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-gprel.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,15 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 gp-relative relocations
++
++# Test the %gprel macro.
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> movui gp,32784
++0+0004 <[^>]*> ldw at,-32756\(gp\)
++0+0008 <[^>]*> ldw r2,-32752\(gp\)
++0+000c <[^>]*> ldb r3,-32748\(gp\)
++0+0010 <[^>]*> ldw at,-32744\(gp\)
++0+0014 <[^>]*> ldw r2,-32740\(gp\)
++0+0018 <[^>]*> ldb r3,-32736\(gp\)
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-gprel.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-gprel.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,24 @@
++.sdata
++sym1:
++.long 0xdead
++sym2:
++.long 0xbeef
++sym3:
++.byte 0x7f
++
++.section sdata1, "s"
++sym4:
++.long 0xdead
++sym5:
++.long 0xbeef
++sym6:
++.byte 0x7f
++
++.text
++ movui gp, _gp
++ ldw r1, %gprel(sym1)(gp)
++ ldw r2, %gprel(sym2)(gp)
++ ldb r3, %gprel(sym3)(gp)
++ ldw r1, %gprel(sym4)(gp)
++ ldw r2, %gprel(sym5)(gp)
++ ldb r3, %gprel(sym6)(gp)
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-hilo16.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-hilo16.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 R_NIOS2_HI16,LO16,HIADJ16
++
++# Test the %hi, %lo and %hiadi relocations
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> addi at,at,-8531
++0+0004 <[^>]*> addi at,at,-16657
++0+0008 <[^>]*> addi at,at,-8530
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-hilo16.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-hilo16.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,6 @@
++# Test the %hi, lo and %hiadj relocations
++
++.text
++ addi r1, r1, %hi(long_symbol)
++ addi r1, r1, %lo(long_symbol)
++ addi r1, r1, %hiadj(long_symbol)
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-imm5.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-imm5.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 R_NIOS2_IMM5
++
++# Test the branch instructions.
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> roli at,at,31
++0+0004 <.[^>]*> Address 0x4 is out of bounds.
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-imm5.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-imm5.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,6 @@
++# Test the imm5 relocation
++
++.text
++ roli r1, r1, imm5
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-pcrel16.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-pcrel16.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,12 @@
++#objdump: -s
++#name: NIOS2 R_NIOS2_PCREL16
++
++# Test the relative branch relocations.
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++
++0+0000 <[^>]*> br 00000008 <ext_label>
++0+0004 <[^>]*> br 00000018 <__bss_start\+0x8>
++0+0008 <[^>]*> nop
++0+000c <[^>]*> nop
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-pcrel16.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-pcrel16.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,6 @@
++# Test for pc-relative relocations
++.set norelax
++.text
++ br ext_label
++ br ext_label + 16
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-s.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-s.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8 @@
++
++a.exe: file format elf32-littlenios2
++
++Contents of section .text:
++ 0000 04004408 04006008 c4ff5f08 44004808 ..D...`..._.D.H.
++ 0010 44004008 D.@.
++Contents of section .data:
++Contents of section .sbss:
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-s16.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-s16.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,9 @@
++#objdump: -s
++#name: NIOS2 R_NIOS2_S16
++
++# Test the signed 16-bit relocations.
++.*: +file format elf32-littlenios2
++
++Contents of section .text:
++ 0000 04004408 04006008 c4ff5f08 44004808 ..D...`..._.D.H.
++ 0010 44004008 D.@.
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-s16.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-s16.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,13 @@
++# Test for New Jersey 32-bit, 16 and 8-bit relocations
++
++.set some_other_sym, 0x1000
++.text
++# signed 16-bit relocation
++ addi r1, r1, some_sym
++ addi r1, r1, min
++ addi r1, r1, max
++ addi r1, r1, some_sym + some_other_sym + 1
++ addi r1, r1, some_sym - some_other_sym + 1
++
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-u16.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-u16.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,9 @@
++#objdump: -s
++#name: NIOS2 R_NIOS2_U16
++
++# Test the unsigned 16-bit relocations.
++.*: +file format elf32-littlenios2
++
++Contents of section .text:
++ 0000 0c004408 0c004008 ccff7f08 4c004808 ..D...@.....L.H.
++ 0010 4c004008 L.@.
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-u16.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2-reloc-r-nios2-u16.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,13 @@
++# Test for New Jersey 32-bit, 16 and 8-bit relocations
++
++.set some_other_sym, 0x1000
++.text
++# signed 16-bit relocation
++ andi r1, r1, some_sym
++ andi r1, r1, min
++ andi r1, r1, max
++ andi r1, r1, some_sym + some_other_sym + 1
++ andi r1, r1, some_sym - some_other_sym + 1
++
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/nios2.exp 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nios2.exp 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,200 @@
++#
++# Some generic New Jersey tests
++#
++
++# "LOSE" marks information about tests which fail at a particular point
++# in time, but which are not XFAILed. Either they used to pass
++# and indicate either regressions or the need to tweak the tests to keep
++# up the with code, or they are new tests and it is unknown whether or not
++# they should pass as-is for the given object formats.
++
++if ![info exists LD] then {
++ set LD [findfile $base_dir/../../ld/ld-new]
++}
++
++proc run_list_test { name } {
++ global srcdir subdir
++ set testname "NIOS2 $name"
++ set file $srcdir/$subdir/$name
++ gas_run ${name}.s "" ">&dump.out"
++ if { [regexp_diff "dump.out" "${file}.l"] } then {
++ fail $testname
++ verbose "output is [file_contents "dump.out"]" 2
++ return
++ }
++ pass $testname
++}
++
++proc ld_run { obj0 obj1 opts } {
++ global LD
++ global comp_output
++ global srcdir
++ global subdir
++ global host_triplet
++
++ verbose "Executing $srcdir/lib/run $LD $obj0 $obj1 $opts"
++ catch "exec $srcdir/lib/run $LD $obj0 $obj1 $opts" comp_output
++ set comp_output [prune_warnings $comp_output]
++ verbose "output was $comp_output"
++ return [list $comp_output ""];
++}
++
++proc objdump_run { prog opts redir } {
++ global OBJDUMP
++ global comp_output
++ global srcdir
++ global subdir
++ global host_triplet
++
++ verbose "Executing $srcdir/lib/run $OBJDUMP -s $prog"
++ catch "exec $srcdir/lib/run $OBJDUMP $opts $prog $redir" comp_output
++ set comp_output [prune_warnings $comp_output]
++ verbose "output was $comp_output"
++ return [list $comp_output ""];
++}
++
++proc run_reloc_test { name other objdump_opts} {
++ global LD OBJDUMP AS
++ global srcdir subdir
++ set testname "NIOS2 $name"
++ set file $srcdir/$subdir/$name
++ set file1 $srcdir/$subdir/$other
++ gas_run ${name}.s "-o ${name}.o" ""
++ gas_run ${other}.s "-o ${other}.o" ""
++ ld_run ${name}.o ${other}.o "-o ${name}.exe"
++ objdump_run ${name}.exe ${objdump_opts} ">&dump.out"
++ if { [regexp_diff "dump.out" "${file}.d"] } then {
++ fail $testname
++ verbose "output is [file_contents "dump.out"]" 2
++ return
++ }
++ pass $testname
++}
++
++proc run_gpreloc_test { name objdump_opts} {
++ global LD OBJDUMP AS
++ global srcdir subdir
++ set testname "NIOS2 $name"
++ set file $srcdir/$subdir/$name
++ gas_run ${name}.s "-o ${name}.o" ""
++ ld_run ${name}.o "" "-o ${name}.exe"
++ objdump_run ${name}.exe ${objdump_opts} ">&dump.out"
++ if { [regexp_diff "dump.out" "${file}.d"] } then {
++ fail $testname
++ verbose "output is [file_contents "dump.out"]" 2
++ return
++ }
++ pass $testname
++}
++
++proc run_relax_test { name asm_opts link_opts objdump_opts} {
++ global LD OBJDUMP AS
++ global srcdir subdir
++ set testname "NIOS2 $name"
++ set file $srcdir/$subdir/$name
++ gas_run ${name}.s "-o ${name}.o" ${asm_opts}
++ ld_run ${name}.o "" "-o ${name}.exe -T${srcdir}/${subdir}/${link_opts} --relax"
++ objdump_run ${name}.exe ${objdump_opts} ">&dump.out"
++ if { [regexp_diff "dump.out" "${file}.d"] } then {
++ fail $testname
++ verbose "output is [file_contents "dump.out"]" 2
++ return
++ }
++ pass $testname
++}
++
++proc run_relax_section_test { name asm_opts objdump_opts} {
++ global LD OBJDUMP AS
++ global srcdir subdir
++ set testname "NIOS2 $name"
++ set file $srcdir/$subdir/$name
++ gas_run ${name}.s "-o ${name}.o" ${asm_opts}
++ ld_run ${name}.o "" "-o ${name}.exe"
++ objdump_run ${name}.exe ${objdump_opts} ">&dump.out"
++ if { [regexp_diff "dump.out" "${file}.d"] } then {
++ fail $testname
++ verbose "output is [file_contents "dump.out"]" 2
++ return
++ }
++ pass $testname
++}
++
++if { [istarget nios2-*-elf] } then {
++ set elf 1
++
++ run_dump_test "add"
++ run_dump_test "and"
++ run_dump_test "align_fill"
++ run_dump_test "align_text"
++
++ run_dump_test "branch"
++
++
++ run_dump_test "break"
++ run_dump_test "bret"
++ run_dump_test "cache"
++
++ run_dump_test "call"
++
++
++ run_dump_test "cmp"
++
++
++ run_dump_test "jmp"
++ run_dump_test "ldw"
++ run_dump_test "ldh"
++ run_dump_test "ldb"
++
++
++ run_dump_test "mul"
++
++ run_dump_test "nor"
++ run_dump_test "or"
++
++ run_dump_test "ctl"
++ run_dump_test "ret"
++ run_dump_test "rotate"
++
++ run_dump_test "stw"
++ run_dump_test "sth"
++ run_dump_test "stb"
++
++ run_dump_test "sub"
++ run_dump_test "sync"
++ run_dump_test "trap"
++ run_dump_test "tret"
++
++ run_dump_test "custom"
++ run_dump_test "xor"
++ run_dump_test "movia"
++
++ run_dump_test "complex"
++ run_dump_test "comments"
++ run_dump_test "etbt"
++ run_dump_test "lineseparator"
++ run_dump_test "movi"
++
++ run_list_test "illegal"
++ run_list_test "warn_nobreak"
++ run_list_test "warn_noat"
++
++
++# now lets make sure that the assembler generates all the relocations
++# that it should correctly, and that the linker links them correctly
++
++ run_reloc_test "nios2-reloc-r-nios2-bfd-reloc-xx" "reloc_symbols" "-s"
++ run_reloc_test "nios2-reloc-r-nios2-s16" "s16_symbol" "-s"
++ run_reloc_test "nios2-reloc-r-nios2-u16" "u16_symbol" "-s"
++ run_reloc_test "nios2-reloc-r-nios2-pcrel16" "pcrel_label" "-dr --prefix-addresses"
++ run_reloc_test "nios2-reloc-r-nios2-hilo16" "hilo_symbol" "-dr --prefix-addresses"
++ run_dump_test "nios2-reloc-r-nios2-call26"
++ run_reloc_test "nios2-reloc-r-nios2-imm5" "imm5_symbol" "-dr --prefix-addresses"
++ run_reloc_test "nios2-reloc-merged_strings" "str2" "-dr --prefix-addresses"
++ run_gpreloc_test "nios2-reloc-r-nios2-gprel" "-dr --prefix-addresses"
++
++# relaxation tests
++ run_relax_test "relax_ujmp" "-relax-all" "link1.lds" "-dr --prefix-addresses"
++ run_relax_test "relax_cjmp" "-relax-all" "link1.lds" "-dr --prefix-addresses"
++ run_relax_test "relax_callr" "-relax-all" "link3.lds" "-dr --prefix-addresses"
++ run_relax_section_test "relax_section" "-relax-section" "-dr --prefix-addresses"
++}
+--- binutils-2.15/gas/testsuite/gas/nios2/nor.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nor.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,9 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 nor
++
++# Test the nor instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> nor r6,r8,r10
+--- binutils-2.15/gas/testsuite/gas/nios2/nor.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/nor.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,5 @@
++# Source file used to test the nor instruction
++
++foo:
++ nor r6,r8,r10
++
+--- binutils-2.15/gas/testsuite/gas/nios2/or.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/or.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,11 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 or
++
++# Test the nor instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> or r6,r8,r10
++0+0004 <[^>]*> orhi r6,r7,65535
++0+0008 <[^>]*> ori r6,r7,65535
+--- binutils-2.15/gas/testsuite/gas/nios2/or.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/or.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,7 @@
++# Source file used to test the nor instruction
++
++foo:
++ or r6,r8,r10
++ orhi r6,r7,0xffff
++ ori r6,r7,0xffff
++
+--- binutils-2.15/gas/testsuite/gas/nios2/pcrel_label.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/pcrel_label.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,5 @@
++.text
++ext_label:
++ nop
++ nop
++.global ext_label
+--- binutils-2.15/gas/testsuite/gas/nios2/relax_callr.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/relax_callr.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,22 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 relax_callr
++# Test relaxation of callr
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section text1:
++00000000 <[^>]*> call 08000000 <func>
++00000004 <[^>]*> nop
++00000008 <[^>]*> nop
++0000000c <[^>]*> call 0800001c <func1>
++00000010 <[^>]*> nop
++00000014 <[^>]*> nop
++Disassembly of section text2:
++08000000 <[^>]*> nop
++08000004 <[^>]*> br 0800001c <func1>
++08000008 <[^>]*> nop
++0800000c <[^>]*> nop
++08000010 <[^>]*> nop
++08000014 <[^>]*> nop
++08000018 <[^>]*> nop
++0800001c <[^>]*> nop
+--- binutils-2.15/gas/testsuite/gas/nios2/relax_callr.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/relax_callr.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,17 @@
++# relaxation test for callr
++
++.globl text1
++.section text1, "ax", @progbits
++
++ call func
++ call func1
++
++.section text2, "ax", @progbits
++func:
++ nop
++ br func1
++ nop
++ nop
++ nop
++func1:
++ nop
+--- binutils-2.15/gas/testsuite/gas/nios2/relax_cjmp.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/relax_cjmp.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8227 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 relax_cjmp
++
++# Test relaxation of conditional jumps
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section text2:
++00000000 <[^>]*> bge r2,r3,00008000 <[^>]*>
++00000004 <[^>]*> nop
++00000008 <[^>]*> nop
++0000000c <[^>]*> nop
++00000010 <[^>]*> blt r3,r2,00000020 <[^>]*>
++00000014 <[^>]*> movhi at,1
++00000018 <[^>]*> ori at,at,36
++0000001c <[^>]*> jmp at
++00000020 <[^>]*> bge r3,r2,00000038 <[^>]*>
++00000024 <[^>]*> nop
++00000028 <[^>]*> nop
++0000002c <[^>]*> nop
++00000030 <[^>]*> nop
++00000034 <[^>]*> nop
++00000038 <[^>]*> nop
++Disassembly of section text1:
++00008000 <[^>]*> beq r2,r3,00010000 <[^>]*>
++00008004 <[^>]*> nop
++00008008 <[^>]*> nop
++0000800c <[^>]*> nop
++00008010 <[^>]*> bne r2,r3,00008020 <[^>]*>
++00008014 <[^>]*> movhi at,1
++00008018 <[^>]*> ori at,at,36
++0000801c <[^>]*> jmp at
++00008020 <[^>]*> nop
++00008024 <[^>]*> nop
++00008028 <[^>]*> nop
++0000802c <[^>]*> nop
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++0000f820 <[^>]*> nop
++0000f824 <[^>]*> nop
++0000f828 <[^>]*> nop
++0000f82c <[^>]*> nop
++0000f830 <[^>]*> nop
++0000f834 <[^>]*> nop
++0000f838 <[^>]*> nop
++0000f83c <[^>]*> nop
++0000f840 <[^>]*> nop
++0000f844 <[^>]*> nop
++0000f848 <[^>]*> nop
++0000f84c <[^>]*> nop
++0000f850 <[^>]*> nop
++0000f854 <[^>]*> nop
++0000f858 <[^>]*> nop
++0000f85c <[^>]*> nop
++0000f860 <[^>]*> nop
++0000f864 <[^>]*> nop
++0000f868 <[^>]*> nop
++0000f86c <[^>]*> nop
++0000f870 <[^>]*> nop
++0000f874 <[^>]*> nop
++0000f878 <[^>]*> nop
++0000f87c <[^>]*> nop
++0000f880 <[^>]*> nop
++0000f884 <[^>]*> nop
++0000f888 <[^>]*> nop
++0000f88c <[^>]*> nop
++0000f890 <[^>]*> nop
++0000f894 <[^>]*> nop
++0000f898 <[^>]*> nop
++0000f89c <[^>]*> nop
++0000f8a0 <[^>]*> nop
++0000f8a4 <[^>]*> nop
++0000f8a8 <[^>]*> nop
++0000f8ac <[^>]*> nop
++0000f8b0 <[^>]*> nop
++0000f8b4 <[^>]*> nop
++0000f8b8 <[^>]*> nop
++0000f8bc <[^>]*> nop
++0000f8c0 <[^>]*> nop
++0000f8c4 <[^>]*> nop
++0000f8c8 <[^>]*> nop
++0000f8cc <[^>]*> nop
++0000f8d0 <[^>]*> nop
++0000f8d4 <[^>]*> nop
++0000f8d8 <[^>]*> nop
++0000f8dc <[^>]*> nop
++0000f8e0 <[^>]*> nop
++0000f8e4 <[^>]*> nop
++0000f8e8 <[^>]*> nop
++0000f8ec <[^>]*> nop
++0000f8f0 <[^>]*> nop
++0000f8f4 <[^>]*> nop
++0000f8f8 <[^>]*> nop
++0000f8fc <[^>]*> nop
++0000f900 <[^>]*> nop
++0000f904 <[^>]*> nop
++0000f908 <[^>]*> nop
++0000f90c <[^>]*> nop
++0000f910 <[^>]*> nop
++0000f914 <[^>]*> nop
++0000f918 <[^>]*> nop
++0000f91c <[^>]*> nop
++0000f920 <[^>]*> nop
++0000f924 <[^>]*> nop
++0000f928 <[^>]*> nop
++0000f92c <[^>]*> nop
++0000f930 <[^>]*> nop
++0000f934 <[^>]*> nop
++0000f938 <[^>]*> nop
++0000f93c <[^>]*> nop
++0000f940 <[^>]*> nop
++0000f944 <[^>]*> nop
++0000f948 <[^>]*> nop
++0000f94c <[^>]*> nop
++0000f950 <[^>]*> nop
++0000f954 <[^>]*> nop
++0000f958 <[^>]*> nop
++0000f95c <[^>]*> nop
++0000f960 <[^>]*> nop
++0000f964 <[^>]*> nop
++0000f968 <[^>]*> nop
++0000f96c <[^>]*> nop
++0000f970 <[^>]*> nop
++0000f974 <[^>]*> nop
++0000f978 <[^>]*> nop
++0000f97c <[^>]*> nop
++0000f980 <[^>]*> nop
++0000f984 <[^>]*> nop
++0000f988 <[^>]*> nop
++0000f98c <[^>]*> nop
++0000f990 <[^>]*> nop
++0000f994 <[^>]*> nop
++0000f998 <[^>]*> nop
++0000f99c <[^>]*> nop
++0000f9a0 <[^>]*> nop
++0000f9a4 <[^>]*> nop
++0000f9a8 <[^>]*> nop
++0000f9ac <[^>]*> nop
++0000f9b0 <[^>]*> nop
++0000f9b4 <[^>]*> nop
++0000f9b8 <[^>]*> nop
++0000f9bc <[^>]*> nop
++0000f9c0 <[^>]*> nop
++0000f9c4 <[^>]*> nop
++0000f9c8 <[^>]*> nop
++0000f9cc <[^>]*> nop
++0000f9d0 <[^>]*> nop
++0000f9d4 <[^>]*> nop
++0000f9d8 <[^>]*> nop
++0000f9dc <[^>]*> nop
++0000f9e0 <[^>]*> nop
++0000f9e4 <[^>]*> nop
++0000f9e8 <[^>]*> nop
++0000f9ec <[^>]*> nop
++0000f9f0 <[^>]*> nop
++0000f9f4 <[^>]*> nop
++0000f9f8 <[^>]*> nop
++0000f9fc <[^>]*> nop
++0000fa00 <[^>]*> nop
++0000fa04 <[^>]*> nop
++0000fa08 <[^>]*> nop
++0000fa0c <[^>]*> nop
++0000fa10 <[^>]*> nop
++0000fa14 <[^>]*> nop
++0000fa18 <[^>]*> nop
++0000fa1c <[^>]*> nop
++0000fa20 <[^>]*> nop
++0000fa24 <[^>]*> nop
++0000fa28 <[^>]*> nop
++0000fa2c <[^>]*> nop
++0000fa30 <[^>]*> nop
++0000fa34 <[^>]*> nop
++0000fa38 <[^>]*> nop
++0000fa3c <[^>]*> nop
++0000fa40 <[^>]*> nop
++0000fa44 <[^>]*> nop
++0000fa48 <[^>]*> nop
++0000fa4c <[^>]*> nop
++0000fa50 <[^>]*> nop
++0000fa54 <[^>]*> nop
++0000fa58 <[^>]*> nop
++0000fa5c <[^>]*> nop
++0000fa60 <[^>]*> nop
++0000fa64 <[^>]*> nop
++0000fa68 <[^>]*> nop
++0000fa6c <[^>]*> nop
++0000fa70 <[^>]*> nop
++0000fa74 <[^>]*> nop
++0000fa78 <[^>]*> nop
++0000fa7c <[^>]*> nop
++0000fa80 <[^>]*> nop
++0000fa84 <[^>]*> nop
++0000fa88 <[^>]*> nop
++0000fa8c <[^>]*> nop
++0000fa90 <[^>]*> nop
++0000fa94 <[^>]*> nop
++0000fa98 <[^>]*> nop
++0000fa9c <[^>]*> nop
++0000faa0 <[^>]*> nop
++0000faa4 <[^>]*> nop
++0000faa8 <[^>]*> nop
++0000faac <[^>]*> nop
++0000fab0 <[^>]*> nop
++0000fab4 <[^>]*> nop
++0000fab8 <[^>]*> nop
++0000fabc <[^>]*> nop
++0000fac0 <[^>]*> nop
++0000fac4 <[^>]*> nop
++0000fac8 <[^>]*> nop
++0000facc <[^>]*> nop
++0000fad0 <[^>]*> nop
++0000fad4 <[^>]*> nop
++0000fad8 <[^>]*> nop
++0000fadc <[^>]*> nop
++0000fae0 <[^>]*> nop
++0000fae4 <[^>]*> nop
++0000fae8 <[^>]*> nop
++0000faec <[^>]*> nop
++0000faf0 <[^>]*> nop
++0000faf4 <[^>]*> nop
++0000faf8 <[^>]*> nop
++0000fafc <[^>]*> nop
++0000fb00 <[^>]*> nop
++0000fb04 <[^>]*> nop
++0000fb08 <[^>]*> nop
++0000fb0c <[^>]*> nop
++0000fb10 <[^>]*> nop
++0000fb14 <[^>]*> nop
++0000fb18 <[^>]*> nop
++0000fb1c <[^>]*> nop
++0000fb20 <[^>]*> nop
++0000fb24 <[^>]*> nop
++0000fb28 <[^>]*> nop
++0000fb2c <[^>]*> nop
++0000fb30 <[^>]*> nop
++0000fb34 <[^>]*> nop
++0000fb38 <[^>]*> nop
++0000fb3c <[^>]*> nop
++0000fb40 <[^>]*> nop
++0000fb44 <[^>]*> nop
++0000fb48 <[^>]*> nop
++0000fb4c <[^>]*> nop
++0000fb50 <[^>]*> nop
++0000fb54 <[^>]*> nop
++0000fb58 <[^>]*> nop
++0000fb5c <[^>]*> nop
++0000fb60 <[^>]*> nop
++0000fb64 <[^>]*> nop
++0000fb68 <[^>]*> nop
++0000fb6c <[^>]*> nop
++0000fb70 <[^>]*> nop
++0000fb74 <[^>]*> nop
++0000fb78 <[^>]*> nop
++0000fb7c <[^>]*> nop
++0000fb80 <[^>]*> nop
++0000fb84 <[^>]*> nop
++0000fb88 <[^>]*> nop
++0000fb8c <[^>]*> nop
++0000fb90 <[^>]*> nop
++0000fb94 <[^>]*> nop
++0000fb98 <[^>]*> nop
++0000fb9c <[^>]*> nop
++0000fba0 <[^>]*> nop
++0000fba4 <[^>]*> nop
++0000fba8 <[^>]*> nop
++0000fbac <[^>]*> nop
++0000fbb0 <[^>]*> nop
++0000fbb4 <[^>]*> nop
++0000fbb8 <[^>]*> nop
++0000fbbc <[^>]*> nop
++0000fbc0 <[^>]*> nop
++0000fbc4 <[^>]*> nop
++0000fbc8 <[^>]*> nop
++0000fbcc <[^>]*> nop
++0000fbd0 <[^>]*> nop
++0000fbd4 <[^>]*> nop
++0000fbd8 <[^>]*> nop
++0000fbdc <[^>]*> nop
++0000fbe0 <[^>]*> nop
++0000fbe4 <[^>]*> nop
++0000fbe8 <[^>]*> nop
++0000fbec <[^>]*> nop
++0000fbf0 <[^>]*> nop
++0000fbf4 <[^>]*> nop
++0000fbf8 <[^>]*> nop
++0000fbfc <[^>]*> nop
++0000fc00 <[^>]*> nop
++0000fc04 <[^>]*> nop
++0000fc08 <[^>]*> nop
++0000fc0c <[^>]*> nop
++0000fc10 <[^>]*> nop
++0000fc14 <[^>]*> nop
++0000fc18 <[^>]*> nop
++0000fc1c <[^>]*> nop
++0000fc20 <[^>]*> nop
++0000fc24 <[^>]*> nop
++0000fc28 <[^>]*> nop
++0000fc2c <[^>]*> nop
++0000fc30 <[^>]*> nop
++0000fc34 <[^>]*> nop
++0000fc38 <[^>]*> nop
++0000fc3c <[^>]*> nop
++0000fc40 <[^>]*> nop
++0000fc44 <[^>]*> nop
++0000fc48 <[^>]*> nop
++0000fc4c <[^>]*> nop
++0000fc50 <[^>]*> nop
++0000fc54 <[^>]*> nop
++0000fc58 <[^>]*> nop
++0000fc5c <[^>]*> nop
++0000fc60 <[^>]*> nop
++0000fc64 <[^>]*> nop
++0000fc68 <[^>]*> nop
++0000fc6c <[^>]*> nop
++0000fc70 <[^>]*> nop
++0000fc74 <[^>]*> nop
++0000fc78 <[^>]*> nop
++0000fc7c <[^>]*> nop
++0000fc80 <[^>]*> nop
++0000fc84 <[^>]*> nop
++0000fc88 <[^>]*> nop
++0000fc8c <[^>]*> nop
++0000fc90 <[^>]*> nop
++0000fc94 <[^>]*> nop
++0000fc98 <[^>]*> nop
++0000fc9c <[^>]*> nop
++0000fca0 <[^>]*> nop
++0000fca4 <[^>]*> nop
++0000fca8 <[^>]*> nop
++0000fcac <[^>]*> nop
++0000fcb0 <[^>]*> nop
++0000fcb4 <[^>]*> nop
++0000fcb8 <[^>]*> nop
++0000fcbc <[^>]*> nop
++0000fcc0 <[^>]*> nop
++0000fcc4 <[^>]*> nop
++0000fcc8 <[^>]*> nop
++0000fccc <[^>]*> nop
++0000fcd0 <[^>]*> nop
++0000fcd4 <[^>]*> nop
++0000fcd8 <[^>]*> nop
++0000fcdc <[^>]*> nop
++0000fce0 <[^>]*> nop
++0000fce4 <[^>]*> nop
++0000fce8 <[^>]*> nop
++0000fcec <[^>]*> nop
++0000fcf0 <[^>]*> nop
++0000fcf4 <[^>]*> nop
++0000fcf8 <[^>]*> nop
++0000fcfc <[^>]*> nop
++0000fd00 <[^>]*> nop
++0000fd04 <[^>]*> nop
++0000fd08 <[^>]*> nop
++0000fd0c <[^>]*> nop
++0000fd10 <[^>]*> nop
++0000fd14 <[^>]*> nop
++0000fd18 <[^>]*> nop
++0000fd1c <[^>]*> nop
++0000fd20 <[^>]*> nop
++0000fd24 <[^>]*> nop
++0000fd28 <[^>]*> nop
++0000fd2c <[^>]*> nop
++0000fd30 <[^>]*> nop
++0000fd34 <[^>]*> nop
++0000fd38 <[^>]*> nop
++0000fd3c <[^>]*> nop
++0000fd40 <[^>]*> nop
++0000fd44 <[^>]*> nop
++0000fd48 <[^>]*> nop
++0000fd4c <[^>]*> nop
++0000fd50 <[^>]*> nop
++0000fd54 <[^>]*> nop
++0000fd58 <[^>]*> nop
++0000fd5c <[^>]*> nop
++0000fd60 <[^>]*> nop
++0000fd64 <[^>]*> nop
++0000fd68 <[^>]*> nop
++0000fd6c <[^>]*> nop
++0000fd70 <[^>]*> nop
++0000fd74 <[^>]*> nop
++0000fd78 <[^>]*> nop
++0000fd7c <[^>]*> nop
++0000fd80 <[^>]*> nop
++0000fd84 <[^>]*> nop
++0000fd88 <[^>]*> nop
++0000fd8c <[^>]*> nop
++0000fd90 <[^>]*> nop
++0000fd94 <[^>]*> nop
++0000fd98 <[^>]*> nop
++0000fd9c <[^>]*> nop
++0000fda0 <[^>]*> nop
++0000fda4 <[^>]*> nop
++0000fda8 <[^>]*> nop
++0000fdac <[^>]*> nop
++0000fdb0 <[^>]*> nop
++0000fdb4 <[^>]*> nop
++0000fdb8 <[^>]*> nop
++0000fdbc <[^>]*> nop
++0000fdc0 <[^>]*> nop
++0000fdc4 <[^>]*> nop
++0000fdc8 <[^>]*> nop
++0000fdcc <[^>]*> nop
++0000fdd0 <[^>]*> nop
++0000fdd4 <[^>]*> nop
++0000fdd8 <[^>]*> nop
++0000fddc <[^>]*> nop
++0000fde0 <[^>]*> nop
++0000fde4 <[^>]*> nop
++0000fde8 <[^>]*> nop
++0000fdec <[^>]*> nop
++0000fdf0 <[^>]*> nop
++0000fdf4 <[^>]*> nop
++0000fdf8 <[^>]*> nop
++0000fdfc <[^>]*> nop
++0000fe00 <[^>]*> nop
++0000fe04 <[^>]*> nop
++0000fe08 <[^>]*> nop
++0000fe0c <[^>]*> nop
++0000fe10 <[^>]*> nop
++0000fe14 <[^>]*> nop
++0000fe18 <[^>]*> nop
++0000fe1c <[^>]*> nop
++0000fe20 <[^>]*> nop
++0000fe24 <[^>]*> nop
++0000fe28 <[^>]*> nop
++0000fe2c <[^>]*> nop
++0000fe30 <[^>]*> nop
++0000fe34 <[^>]*> nop
++0000fe38 <[^>]*> nop
++0000fe3c <[^>]*> nop
++0000fe40 <[^>]*> nop
++0000fe44 <[^>]*> nop
++0000fe48 <[^>]*> nop
++0000fe4c <[^>]*> nop
++0000fe50 <[^>]*> nop
++0000fe54 <[^>]*> nop
++0000fe58 <[^>]*> nop
++0000fe5c <[^>]*> nop
++0000fe60 <[^>]*> nop
++0000fe64 <[^>]*> nop
++0000fe68 <[^>]*> nop
++0000fe6c <[^>]*> nop
++0000fe70 <[^>]*> nop
++0000fe74 <[^>]*> nop
++0000fe78 <[^>]*> nop
++0000fe7c <[^>]*> nop
++0000fe80 <[^>]*> nop
++0000fe84 <[^>]*> nop
++0000fe88 <[^>]*> nop
++0000fe8c <[^>]*> nop
++0000fe90 <[^>]*> nop
++0000fe94 <[^>]*> nop
++0000fe98 <[^>]*> nop
++0000fe9c <[^>]*> nop
++0000fea0 <[^>]*> nop
++0000fea4 <[^>]*> nop
++0000fea8 <[^>]*> nop
++0000feac <[^>]*> nop
++0000feb0 <[^>]*> nop
++0000feb4 <[^>]*> nop
++0000feb8 <[^>]*> nop
++0000febc <[^>]*> nop
++0000fec0 <[^>]*> nop
++0000fec4 <[^>]*> nop
++0000fec8 <[^>]*> nop
++0000fecc <[^>]*> nop
++0000fed0 <[^>]*> nop
++0000fed4 <[^>]*> nop
++0000fed8 <[^>]*> nop
++0000fedc <[^>]*> nop
++0000fee0 <[^>]*> nop
++0000fee4 <[^>]*> nop
++0000fee8 <[^>]*> nop
++0000feec <[^>]*> nop
++0000fef0 <[^>]*> nop
++0000fef4 <[^>]*> nop
++0000fef8 <[^>]*> nop
++0000fefc <[^>]*> nop
++0000ff00 <[^>]*> nop
++0000ff04 <[^>]*> nop
++0000ff08 <[^>]*> nop
++0000ff0c <[^>]*> nop
++0000ff10 <[^>]*> nop
++0000ff14 <[^>]*> nop
++0000ff18 <[^>]*> nop
++0000ff1c <[^>]*> nop
++0000ff20 <[^>]*> nop
++0000ff24 <[^>]*> nop
++0000ff28 <[^>]*> nop
++0000ff2c <[^>]*> nop
++0000ff30 <[^>]*> nop
++0000ff34 <[^>]*> nop
++0000ff38 <[^>]*> nop
++0000ff3c <[^>]*> nop
++0000ff40 <[^>]*> nop
++0000ff44 <[^>]*> nop
++0000ff48 <[^>]*> nop
++0000ff4c <[^>]*> nop
++0000ff50 <[^>]*> nop
++0000ff54 <[^>]*> nop
++0000ff58 <[^>]*> nop
++0000ff5c <[^>]*> nop
++0000ff60 <[^>]*> nop
++0000ff64 <[^>]*> nop
++0000ff68 <[^>]*> nop
++0000ff6c <[^>]*> nop
++0000ff70 <[^>]*> nop
++0000ff74 <[^>]*> nop
++0000ff78 <[^>]*> nop
++0000ff7c <[^>]*> nop
++0000ff80 <[^>]*> nop
++0000ff84 <[^>]*> nop
++0000ff88 <[^>]*> nop
++0000ff8c <[^>]*> nop
++0000ff90 <[^>]*> nop
++0000ff94 <[^>]*> nop
++0000ff98 <[^>]*> nop
++0000ff9c <[^>]*> nop
++0000ffa0 <[^>]*> nop
++0000ffa4 <[^>]*> nop
++0000ffa8 <[^>]*> nop
++0000ffac <[^>]*> nop
++0000ffb0 <[^>]*> nop
++0000ffb4 <[^>]*> nop
++0000ffb8 <[^>]*> nop
++0000ffbc <[^>]*> nop
++0000ffc0 <[^>]*> nop
++0000ffc4 <[^>]*> nop
++0000ffc8 <[^>]*> nop
++0000ffcc <[^>]*> nop
++0000ffd0 <[^>]*> nop
++0000ffd4 <[^>]*> nop
++0000ffd8 <[^>]*> nop
++0000ffdc <[^>]*> nop
++0000ffe0 <[^>]*> nop
++0000ffe4 <[^>]*> nop
++0000ffe8 <[^>]*> nop
++0000ffec <[^>]*> nop
++0000fff0 <[^>]*> nop
++0000fff4 <[^>]*> nop
++0000fff8 <[^>]*> nop
++0000fffc <[^>]*> nop
++00010000 <[^>]*> bne r2,r3,00010024 <[^>]*>
++00010004 <[^>]*> nop
++00010008 <[^>]*> nop
++0001000c <[^>]*> nop
++00010010 <[^>]*> nop
++00010014 <[^>]*> nop
++00010018 <[^>]*> nop
++0001001c <[^>]*> nop
++00010020 <[^>]*> nop
++00010024 <[^>]*> nop
++ ...
+--- binutils-2.15/gas/testsuite/gas/nios2/relax_cjmp.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/relax_cjmp.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,37 @@
++# relaxing unconditional jumps
++
++.globl text1
++.section text1, "ax", @progbits
++
++ beq r2, r3, on_border
++ beq r2, r3, out_of_range
++ nop
++ nop
++
++
++.align 15
++ #nop
++ #nop
++ #nop
++on_border:
++ bne r2, r3, in_range
++ nop
++ nop
++ nop
++ nop
++ nop
++out_of_range:
++in_range:
++ nop
++
++.globl text2
++.section text2, "ax", @progbits
++
++ bge r2, r3, text1
++ blt r2, r3, out_of_range
++ ble r2, r3, sym
++ nop
++ nop
++sym:
++ nop
++
+--- binutils-2.15/gas/testsuite/gas/nios2/relax_section.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/relax_section.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8206 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 relax_section
++
++# Test relaxation of section
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> bne r2,r3,00000010 <in_range-0xc>
++0+0004 <[^>]*> movhi at,0
++0+0008 <[^>]*> ori at,at,32780
++0+000c <[^>]*> jmp at
++0+0010 <[^>]*> bne r2,r3,0000001c <in_range>
++0+0014 <[^>]*> nop
++0+0018 <[^>]*> nop
++0+001c <[^>]*> nop
++0+0020 <[^>]*> nop
++0+0024 <[^>]*> nop
++0+0028 <[^>]*> nop
++0+002c <[^>]*> nop
++0+0030 <[^>]*> nop
++0+0034 <[^>]*> nop
++0+0038 <[^>]*> nop
++0+003c <[^>]*> nop
++0+0040 <[^>]*> nop
++0+0044 <[^>]*> nop
++0+0048 <[^>]*> nop
++0+004c <[^>]*> nop
++0+0050 <[^>]*> nop
++0+0054 <[^>]*> nop
++0+0058 <[^>]*> nop
++0+005c <[^>]*> nop
++0+0060 <[^>]*> nop
++0+0064 <[^>]*> nop
++0+0068 <[^>]*> nop
++0+006c <[^>]*> nop
++0+0070 <[^>]*> nop
++0+0074 <[^>]*> nop
++0+0078 <[^>]*> nop
++0+007c <[^>]*> nop
++0+0080 <[^>]*> nop
++0+0084 <[^>]*> nop
++0+0088 <[^>]*> nop
++0+008c <[^>]*> nop
++0+0090 <[^>]*> nop
++0+0094 <[^>]*> nop
++0+0098 <[^>]*> nop
++0+009c <[^>]*> nop
++0+00a0 <[^>]*> nop
++0+00a4 <[^>]*> nop
++0+00a8 <[^>]*> nop
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++0+7f1c <[^>]*> nop
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++0+7f24 <[^>]*> nop
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++0+7f2c <[^>]*> nop
++0+7f30 <[^>]*> nop
++0+7f34 <[^>]*> nop
++0+7f38 <[^>]*> nop
++0+7f3c <[^>]*> nop
++0+7f40 <[^>]*> nop
++0+7f44 <[^>]*> nop
++0+7f48 <[^>]*> nop
++0+7f4c <[^>]*> nop
++0+7f50 <[^>]*> nop
++0+7f54 <[^>]*> nop
++0+7f58 <[^>]*> nop
++0+7f5c <[^>]*> nop
++0+7f60 <[^>]*> nop
++0+7f64 <[^>]*> nop
++0+7f68 <[^>]*> nop
++0+7f6c <[^>]*> nop
++0+7f70 <[^>]*> nop
++0+7f74 <[^>]*> nop
++0+7f78 <[^>]*> nop
++0+7f7c <[^>]*> nop
++0+7f80 <[^>]*> nop
++0+7f84 <[^>]*> nop
++0+7f88 <[^>]*> nop
++0+7f8c <[^>]*> nop
++0+7f90 <[^>]*> nop
++0+7f94 <[^>]*> nop
++0+7f98 <[^>]*> nop
++0+7f9c <[^>]*> nop
++0+7fa0 <[^>]*> nop
++0+7fa4 <[^>]*> nop
++0+7fa8 <[^>]*> nop
++0+7fac <[^>]*> nop
++0+7fb0 <[^>]*> nop
++0+7fb4 <[^>]*> nop
++0+7fb8 <[^>]*> nop
++0+7fbc <[^>]*> nop
++0+7fc0 <[^>]*> nop
++0+7fc4 <[^>]*> nop
++0+7fc8 <[^>]*> nop
++0+7fcc <[^>]*> nop
++0+7fd0 <[^>]*> nop
++0+7fd4 <[^>]*> nop
++0+7fd8 <[^>]*> nop
++0+7fdc <[^>]*> nop
++0+7fe0 <[^>]*> nop
++0+7fe4 <[^>]*> nop
++0+7fe8 <[^>]*> nop
++0+7fec <[^>]*> nop
++0+7ff0 <[^>]*> nop
++0+7ff4 <[^>]*> nop
++0+7ff8 <[^>]*> nop
++0+7ffc <[^>]*> nop
++0+8000 <[^>]*> movhi at,0
++0+8004 <[^>]*> ori at,at,0
++0+8008 <[^>]*> jmp at
++0+800c <out_of_range> nop
++ ...
++
+--- binutils-2.15/gas/testsuite/gas/nios2/relax_section.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/relax_section.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++ beq r2, r3, out_of_range
++ bne r2, r3, in_range
++ nop
++ nop
++in_range:
++ nop
++.align 15
++ br 0
++out_of_range:
++ nop
+--- binutils-2.15/gas/testsuite/gas/nios2/relax_ujmp.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/relax_ujmp.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8221 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 relax_ujmp
++
++# Test relaxation of unconditional jumps
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section text2:
++00000000 <[^>]*> br 00008000 <[^>]*>
++00000004 <[^>]*> nop
++00000008 <[^>]*> nop
++0000000c <[^>]*> movhi at,1
++00000010 <[^>]*> ori at,at,24
++00000014 <[^>]*> jmp at
++00000018 <[^>]*> br 0000002c <[^>]*>
++0000001c <[^>]*> nop
++00000020 <[^>]*> nop
++00000024 <[^>]*> nop
++00000028 <[^>]*> nop
++0000002c <[^>]*> nop
++Disassembly of section text1:
++00008000 <[^>]*> br 00010000 <[^>]*>
++00008004 <[^>]*> nop
++00008008 <[^>]*> nop
++0000800c <[^>]*> movhi at,1
++00008010 <[^>]*> ori at,at,24
++00008014 <[^>]*> jmp at
++00008018 <[^>]*> nop
++0000801c <[^>]*> nop
++00008020 <[^>]*> nop
++00008024 <[^>]*> nop
++00008028 <[^>]*> nop
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++00008058 <[^>]*> nop
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++00008064 <[^>]*> nop
++00008068 <[^>]*> nop
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++00008070 <[^>]*> nop
++00008074 <[^>]*> nop
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++0000807c <[^>]*> nop
++00008080 <[^>]*> nop
++00008084 <[^>]*> nop
++00008088 <[^>]*> nop
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++000080bc <[^>]*> nop
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++000080c8 <[^>]*> nop
++000080cc <[^>]*> nop
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++000080dc <[^>]*> nop
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++000080ec <[^>]*> nop
++000080f0 <[^>]*> nop
++000080f4 <[^>]*> nop
++000080f8 <[^>]*> nop
++000080fc <[^>]*> nop
++00008100 <[^>]*> nop
++00008104 <[^>]*> nop
++00008108 <[^>]*> nop
++0000810c <[^>]*> nop
++00008110 <[^>]*> nop
++00008114 <[^>]*> nop
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++00008120 <[^>]*> nop
++00008124 <[^>]*> nop
++00008128 <[^>]*> nop
++0000812c <[^>]*> nop
++00008130 <[^>]*> nop
++00008134 <[^>]*> nop
++00008138 <[^>]*> nop
++0000813c <[^>]*> nop
++00008140 <[^>]*> nop
++00008144 <[^>]*> nop
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++0000814c <[^>]*> nop
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++00008154 <[^>]*> nop
++00008158 <[^>]*> nop
++0000815c <[^>]*> nop
++00008160 <[^>]*> nop
++00008164 <[^>]*> nop
++00008168 <[^>]*> nop
++0000816c <[^>]*> nop
++00008170 <[^>]*> nop
++00008174 <[^>]*> nop
++00008178 <[^>]*> nop
++0000817c <[^>]*> nop
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++00008184 <[^>]*> nop
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++0000818c <[^>]*> nop
++00008190 <[^>]*> nop
++00008194 <[^>]*> nop
++00008198 <[^>]*> nop
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++000081a0 <[^>]*> nop
++000081a4 <[^>]*> nop
++000081a8 <[^>]*> nop
++000081ac <[^>]*> nop
++000081b0 <[^>]*> nop
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++00008200 <[^>]*> nop
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++00008234 <[^>]*> nop
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++00008240 <[^>]*> nop
++00008244 <[^>]*> nop
++00008248 <[^>]*> nop
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++00008254 <[^>]*> nop
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++000082ec <[^>]*> nop
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++00008320 <[^>]*> nop
++00008324 <[^>]*> nop
++00008328 <[^>]*> nop
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++0000fc38 <[^>]*> nop
++0000fc3c <[^>]*> nop
++0000fc40 <[^>]*> nop
++0000fc44 <[^>]*> nop
++0000fc48 <[^>]*> nop
++0000fc4c <[^>]*> nop
++0000fc50 <[^>]*> nop
++0000fc54 <[^>]*> nop
++0000fc58 <[^>]*> nop
++0000fc5c <[^>]*> nop
++0000fc60 <[^>]*> nop
++0000fc64 <[^>]*> nop
++0000fc68 <[^>]*> nop
++0000fc6c <[^>]*> nop
++0000fc70 <[^>]*> nop
++0000fc74 <[^>]*> nop
++0000fc78 <[^>]*> nop
++0000fc7c <[^>]*> nop
++0000fc80 <[^>]*> nop
++0000fc84 <[^>]*> nop
++0000fc88 <[^>]*> nop
++0000fc8c <[^>]*> nop
++0000fc90 <[^>]*> nop
++0000fc94 <[^>]*> nop
++0000fc98 <[^>]*> nop
++0000fc9c <[^>]*> nop
++0000fca0 <[^>]*> nop
++0000fca4 <[^>]*> nop
++0000fca8 <[^>]*> nop
++0000fcac <[^>]*> nop
++0000fcb0 <[^>]*> nop
++0000fcb4 <[^>]*> nop
++0000fcb8 <[^>]*> nop
++0000fcbc <[^>]*> nop
++0000fcc0 <[^>]*> nop
++0000fcc4 <[^>]*> nop
++0000fcc8 <[^>]*> nop
++0000fccc <[^>]*> nop
++0000fcd0 <[^>]*> nop
++0000fcd4 <[^>]*> nop
++0000fcd8 <[^>]*> nop
++0000fcdc <[^>]*> nop
++0000fce0 <[^>]*> nop
++0000fce4 <[^>]*> nop
++0000fce8 <[^>]*> nop
++0000fcec <[^>]*> nop
++0000fcf0 <[^>]*> nop
++0000fcf4 <[^>]*> nop
++0000fcf8 <[^>]*> nop
++0000fcfc <[^>]*> nop
++0000fd00 <[^>]*> nop
++0000fd04 <[^>]*> nop
++0000fd08 <[^>]*> nop
++0000fd0c <[^>]*> nop
++0000fd10 <[^>]*> nop
++0000fd14 <[^>]*> nop
++0000fd18 <[^>]*> nop
++0000fd1c <[^>]*> nop
++0000fd20 <[^>]*> nop
++0000fd24 <[^>]*> nop
++0000fd28 <[^>]*> nop
++0000fd2c <[^>]*> nop
++0000fd30 <[^>]*> nop
++0000fd34 <[^>]*> nop
++0000fd38 <[^>]*> nop
++0000fd3c <[^>]*> nop
++0000fd40 <[^>]*> nop
++0000fd44 <[^>]*> nop
++0000fd48 <[^>]*> nop
++0000fd4c <[^>]*> nop
++0000fd50 <[^>]*> nop
++0000fd54 <[^>]*> nop
++0000fd58 <[^>]*> nop
++0000fd5c <[^>]*> nop
++0000fd60 <[^>]*> nop
++0000fd64 <[^>]*> nop
++0000fd68 <[^>]*> nop
++0000fd6c <[^>]*> nop
++0000fd70 <[^>]*> nop
++0000fd74 <[^>]*> nop
++0000fd78 <[^>]*> nop
++0000fd7c <[^>]*> nop
++0000fd80 <[^>]*> nop
++0000fd84 <[^>]*> nop
++0000fd88 <[^>]*> nop
++0000fd8c <[^>]*> nop
++0000fd90 <[^>]*> nop
++0000fd94 <[^>]*> nop
++0000fd98 <[^>]*> nop
++0000fd9c <[^>]*> nop
++0000fda0 <[^>]*> nop
++0000fda4 <[^>]*> nop
++0000fda8 <[^>]*> nop
++0000fdac <[^>]*> nop
++0000fdb0 <[^>]*> nop
++0000fdb4 <[^>]*> nop
++0000fdb8 <[^>]*> nop
++0000fdbc <[^>]*> nop
++0000fdc0 <[^>]*> nop
++0000fdc4 <[^>]*> nop
++0000fdc8 <[^>]*> nop
++0000fdcc <[^>]*> nop
++0000fdd0 <[^>]*> nop
++0000fdd4 <[^>]*> nop
++0000fdd8 <[^>]*> nop
++0000fddc <[^>]*> nop
++0000fde0 <[^>]*> nop
++0000fde4 <[^>]*> nop
++0000fde8 <[^>]*> nop
++0000fdec <[^>]*> nop
++0000fdf0 <[^>]*> nop
++0000fdf4 <[^>]*> nop
++0000fdf8 <[^>]*> nop
++0000fdfc <[^>]*> nop
++0000fe00 <[^>]*> nop
++0000fe04 <[^>]*> nop
++0000fe08 <[^>]*> nop
++0000fe0c <[^>]*> nop
++0000fe10 <[^>]*> nop
++0000fe14 <[^>]*> nop
++0000fe18 <[^>]*> nop
++0000fe1c <[^>]*> nop
++0000fe20 <[^>]*> nop
++0000fe24 <[^>]*> nop
++0000fe28 <[^>]*> nop
++0000fe2c <[^>]*> nop
++0000fe30 <[^>]*> nop
++0000fe34 <[^>]*> nop
++0000fe38 <[^>]*> nop
++0000fe3c <[^>]*> nop
++0000fe40 <[^>]*> nop
++0000fe44 <[^>]*> nop
++0000fe48 <[^>]*> nop
++0000fe4c <[^>]*> nop
++0000fe50 <[^>]*> nop
++0000fe54 <[^>]*> nop
++0000fe58 <[^>]*> nop
++0000fe5c <[^>]*> nop
++0000fe60 <[^>]*> nop
++0000fe64 <[^>]*> nop
++0000fe68 <[^>]*> nop
++0000fe6c <[^>]*> nop
++0000fe70 <[^>]*> nop
++0000fe74 <[^>]*> nop
++0000fe78 <[^>]*> nop
++0000fe7c <[^>]*> nop
++0000fe80 <[^>]*> nop
++0000fe84 <[^>]*> nop
++0000fe88 <[^>]*> nop
++0000fe8c <[^>]*> nop
++0000fe90 <[^>]*> nop
++0000fe94 <[^>]*> nop
++0000fe98 <[^>]*> nop
++0000fe9c <[^>]*> nop
++0000fea0 <[^>]*> nop
++0000fea4 <[^>]*> nop
++0000fea8 <[^>]*> nop
++0000feac <[^>]*> nop
++0000feb0 <[^>]*> nop
++0000feb4 <[^>]*> nop
++0000feb8 <[^>]*> nop
++0000febc <[^>]*> nop
++0000fec0 <[^>]*> nop
++0000fec4 <[^>]*> nop
++0000fec8 <[^>]*> nop
++0000fecc <[^>]*> nop
++0000fed0 <[^>]*> nop
++0000fed4 <[^>]*> nop
++0000fed8 <[^>]*> nop
++0000fedc <[^>]*> nop
++0000fee0 <[^>]*> nop
++0000fee4 <[^>]*> nop
++0000fee8 <[^>]*> nop
++0000feec <[^>]*> nop
++0000fef0 <[^>]*> nop
++0000fef4 <[^>]*> nop
++0000fef8 <[^>]*> nop
++0000fefc <[^>]*> nop
++0000ff00 <[^>]*> nop
++0000ff04 <[^>]*> nop
++0000ff08 <[^>]*> nop
++0000ff0c <[^>]*> nop
++0000ff10 <[^>]*> nop
++0000ff14 <[^>]*> nop
++0000ff18 <[^>]*> nop
++0000ff1c <[^>]*> nop
++0000ff20 <[^>]*> nop
++0000ff24 <[^>]*> nop
++0000ff28 <[^>]*> nop
++0000ff2c <[^>]*> nop
++0000ff30 <[^>]*> nop
++0000ff34 <[^>]*> nop
++0000ff38 <[^>]*> nop
++0000ff3c <[^>]*> nop
++0000ff40 <[^>]*> nop
++0000ff44 <[^>]*> nop
++0000ff48 <[^>]*> nop
++0000ff4c <[^>]*> nop
++0000ff50 <[^>]*> nop
++0000ff54 <[^>]*> nop
++0000ff58 <[^>]*> nop
++0000ff5c <[^>]*> nop
++0000ff60 <[^>]*> nop
++0000ff64 <[^>]*> nop
++0000ff68 <[^>]*> nop
++0000ff6c <[^>]*> nop
++0000ff70 <[^>]*> nop
++0000ff74 <[^>]*> nop
++0000ff78 <[^>]*> nop
++0000ff7c <[^>]*> nop
++0000ff80 <[^>]*> nop
++0000ff84 <[^>]*> nop
++0000ff88 <[^>]*> nop
++0000ff8c <[^>]*> nop
++0000ff90 <[^>]*> nop
++0000ff94 <[^>]*> nop
++0000ff98 <[^>]*> nop
++0000ff9c <[^>]*> nop
++0000ffa0 <[^>]*> nop
++0000ffa4 <[^>]*> nop
++0000ffa8 <[^>]*> nop
++0000ffac <[^>]*> nop
++0000ffb0 <[^>]*> nop
++0000ffb4 <[^>]*> nop
++0000ffb8 <[^>]*> nop
++0000ffbc <[^>]*> nop
++0000ffc0 <[^>]*> nop
++0000ffc4 <[^>]*> nop
++0000ffc8 <[^>]*> nop
++0000ffcc <[^>]*> nop
++0000ffd0 <[^>]*> nop
++0000ffd4 <[^>]*> nop
++0000ffd8 <[^>]*> nop
++0000ffdc <[^>]*> nop
++0000ffe0 <[^>]*> nop
++0000ffe4 <[^>]*> nop
++0000ffe8 <[^>]*> nop
++0000ffec <[^>]*> nop
++0000fff0 <[^>]*> nop
++0000fff4 <[^>]*> nop
++0000fff8 <[^>]*> nop
++0000fffc <[^>]*> nop
++00010000 <[^>]*> br 00010018 <[^>]*>
++00010004 <[^>]*> nop
++00010008 <[^>]*> nop
++0001000c <[^>]*> nop
++00010010 <[^>]*> nop
++00010014 <[^>]*> nop
++00010018 <[^>]*> nop
++ ...
+--- binutils-2.15/gas/testsuite/gas/nios2/relax_ujmp.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/relax_ujmp.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,37 @@
++# relaxing unconditional jumps
++
++.globl text1
++.section text1, "ax", @progbits
++
++ br on_border
++ br out_of_range
++ nop
++ nop
++
++
++.align 15
++# nop
++# nop
++on_border:
++ br in_range
++ nop
++ nop
++ nop
++out_of_range:
++in_range:
++ nop
++
++.globl text2
++.section text2, "ax", @progbits
++
++ br text1
++ br out_of_range
++ br sym
++ nop
++ nop
++sym:
++ nop
++
++
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/reloc_symbols.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/reloc_symbols.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,21 @@
++.text
++# byte aligned
++.align 0
++.byte byte_sym
++
++# short aligned
++.align 1
++.short short_sym
++
++# word aligned
++.align 2
++.long long_sym
++
++# now lets try some unaligned words and halfwords
++.byte byte_sym
++.2byte short_sym
++.4byte long_sym
++
++#.align 2
++#nop
++
+--- binutils-2.15/gas/testsuite/gas/nios2/ret.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ret.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 ret
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> ret
++
+--- binutils-2.15/gas/testsuite/gas/nios2/ret.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/ret.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,5 @@
++# Source file used to test the ret instructions
++foo:
++ ret
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/rol.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/rol.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,40 @@
++#objdump: -dr --prefix-addresses -mmips:3000
++#as: -march=r3000 -mtune=r3000
++#name: MIPS R3000 rol
++
++# Test the rol and ror macros.
++
++.*: +file format .*mips.*
++
++Disassembly of section .text:
++0+0000 <[^>]*> negu at,a1
++0+0004 <[^>]*> srlv at,a0,at
++0+0008 <[^>]*> sllv a0,a0,a1
++0+000c <[^>]*> or a0,a0,at
++0+0010 <[^>]*> negu at,a2
++0+0014 <[^>]*> srlv at,a1,at
++0+0018 <[^>]*> sllv a0,a1,a2
++0+001c <[^>]*> or a0,a0,at
++0+0020 <[^>]*> sll at,a0,0x1
++0+0024 <[^>]*> srl a0,a0,0x1f
++0+0028 <[^>]*> or a0,a0,at
++0+002c <[^>]*> sll at,a1,0x1
++0+0030 <[^>]*> srl a0,a1,0x1f
++0+0034 <[^>]*> or a0,a0,at
++0+0038 <[^>]*> srl a0,a1,0x0
++0+003c <[^>]*> negu at,a1
++0+0040 <[^>]*> sllv at,a0,at
++0+0044 <[^>]*> srlv a0,a0,a1
++0+0048 <[^>]*> or a0,a0,at
++0+004c <[^>]*> negu at,a2
++0+0050 <[^>]*> sllv at,a1,at
++0+0054 <[^>]*> srlv a0,a1,a2
++0+0058 <[^>]*> or a0,a0,at
++0+005c <[^>]*> srl at,a0,0x1
++0+0060 <[^>]*> sll a0,a0,0x1f
++0+0064 <[^>]*> or a0,a0,at
++0+0068 <[^>]*> srl at,a1,0x1
++0+006c <[^>]*> sll a0,a1,0x1f
++0+0070 <[^>]*> or a0,a0,at
++0+0074 <[^>]*> srl a0,a1,0x0
++ ...
+--- binutils-2.15/gas/testsuite/gas/nios2/rol.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/rol.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,15 @@
++# Source file used to test the rol and ror macros.
++
++foo:
++ rol $4,$5
++ rol $4,$5,$6
++ rol $4,1
++ rol $4,$5,1
++ rol $4,$5,0
++
++ ror $4,$5
++ ror $4,$5,$6
++ ror $4,1
++ ror $4,$5,1
++ ror $4,$5,0
++ .space 8
+--- binutils-2.15/gas/testsuite/gas/nios2/rotate.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/rotate.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,17 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 rotate
++
++# Test the and macro.
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> rol r4,r4,r4
++0+0004 <[^>]*> roli r4,r4,31
++0+0008 <[^>]*> ror r4,r4,r4
++0+000c <[^>]*> sll r4,r4,r4
++0+0010 <[^>]*> slli r4,r4,24
++0+0014 <[^>]*> sra r4,r4,r4
++0+0018 <[^>]*> srai r4,r4,10
++0+001c <[^>]*> srl r4,r4,r4
++0+0020 <[^>]*> srli r4,r4,5
+--- binutils-2.15/gas/testsuite/gas/nios2/rotate.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/rotate.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,13 @@
++# test New Jersey rotate instructions
++
++.text
++foo:
++ rol r4,r4,r4
++ roli r4,r4,31
++ ror r4,r4,r4
++ sll r4,r4,r4
++ slli r4,r4,24
++ sra r4,r4,r4
++ srai r4,r4,10
++ srl r4,r4,r4
++ srli r4,r4,5
+--- binutils-2.15/gas/testsuite/gas/nios2/s16_symbol.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/s16_symbol.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++.global some_sym
++.global some_other_sym
++.global min
++.global max
++
++.set max, 0x7fff
++.set min, -0x8000
++.set some_sym, 0x1000
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/stb.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/stb.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,196 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 stb
++
++# Test the ld instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> stb r4,0\(zero\)
++0+0004 <[^>]*> stb r4,4\(zero\)
++0+0008 <[^>]*> stb r4,32764\(zero\)
++0+000c <[^>]*> stb r4,-32768\(zero\)
++0+0010 <[^>]*> stb r4,0\(r5\)
++0+0014 <[^>]*> stb r4,4\(r5\)
++0+0018 <[^>]*> stb r4,32764\(r5\)
++0+001c <[^>]*> stb r4,-32768\(r5\)
++0+0020 <[^>]*> stb r4,0\(zero\)
++[ ]*20: R_NIOS2_S16 .data
++0+0024 <[^>]*> stb r4,0\(zero\)
++[ ]*24: R_NIOS2_S16 big_external_data_label
++0+0028 <[^>]*> stb r4,0\(zero\)
++[ ]*28: R_NIOS2_S16 small_external_data_label
++0+002c <[^>]*> stb r4,0\(zero\)
++[ ]*2c: R_NIOS2_S16 big_external_common
++0+0030 <[^>]*> stb r4,0\(zero\)
++[ ]*30: R_NIOS2_S16 small_external_common
++0+0034 <[^>]*> stb r4,0\(zero\)
++[ ]*34: R_NIOS2_S16 .bss
++0+0038 <[^>]*> stb r4,0\(zero\)
++[ ]*38: R_NIOS2_S16 .bss\+0x4000
++0+003c <[^>]*> stb r4,0\(zero\)
++[ ]*3c: R_NIOS2_S16 .data\+0x4
++0+0040 <[^>]*> stb r4,0\(zero\)
++[ ]*40: R_NIOS2_S16 big_external_data_label\+0x4
++0+0044 <[^>]*> stb r4,0\(zero\)
++[ ]*44: R_NIOS2_S16 small_external_data_label\+0x4
++0+0048 <[^>]*> stb r4,0\(zero\)
++[ ]*48: R_NIOS2_S16 big_external_common\+0x4
++0+004c <[^>]*> stb r4,0\(zero\)
++[ ]*4c: R_NIOS2_S16 small_external_common\+0x4
++0+0050 <[^>]*> stb r4,0\(zero\)
++[ ]*50: R_NIOS2_S16 .bss\+0x4
++0+0054 <[^>]*> stb r4,0\(zero\)
++[ ]*54: R_NIOS2_S16 .bss\+0x4004
++0+0058 <[^>]*> stb r4,0\(zero\)
++[ ]*58: R_NIOS2_S16 .data\+0xffff8000
++0+005c <[^>]*> stb r4,0\(zero\)
++[ ]*5c: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0060 <[^>]*> stb r4,0\(zero\)
++[ ]*60: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0064 <[^>]*> stb r4,0\(zero\)
++[ ]*64: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0068 <[^>]*> stb r4,0\(zero\)
++[ ]*68: R_NIOS2_S16 small_external_common\+0xffff8000
++0+006c <[^>]*> stb r4,0\(zero\)
++[ ]*6c: R_NIOS2_S16 .bss\+0xffff8000
++0+0070 <[^>]*> stb r4,0\(zero\)
++[ ]*70: R_NIOS2_S16 .bss\+0xffffc000
++0+0074 <[^>]*> stb r4,0\(zero\)
++[ ]*74: R_NIOS2_S16 .data\+0x10000
++0+0078 <[^>]*> stb r4,0\(r5\)
++[ ]*78: R_NIOS2_S16 .data
++0+007c <[^>]*> stb r4,0\(r5\)
++[ ]*7c: R_NIOS2_S16 big_external_data_label
++0+0080 <[^>]*> stb r4,0\(r5\)
++[ ]*80: R_NIOS2_S16 small_external_data_label
++0+0084 <[^>]*> stb r4,0\(r5\)
++[ ]*84: R_NIOS2_S16 big_external_common
++0+0088 <[^>]*> stb r4,0\(r5\)
++[ ]*88: R_NIOS2_S16 small_external_common
++0+008c <[^>]*> stb r4,0\(r5\)
++[ ]*8c: R_NIOS2_S16 .bss
++0+0090 <[^>]*> stb r4,0\(r5\)
++[ ]*90: R_NIOS2_S16 .bss\+0x4000
++0+0094 <[^>]*> stb r4,0\(r5\)
++[ ]*94: R_NIOS2_S16 .data\+0x4
++0+0098 <[^>]*> stb r4,0\(r5\)
++[ ]*98: R_NIOS2_S16 big_external_data_label\+0x4
++0+009c <[^>]*> stb r4,0\(r5\)
++[ ]*9c: R_NIOS2_S16 small_external_data_label\+0x4
++0+00a0 <[^>]*> stb r4,0\(r5\)
++[ ]*a0: R_NIOS2_S16 big_external_common\+0x4
++0+00a4 <[^>]*> stb r4,0\(r5\)
++[ ]*a4: R_NIOS2_S16 small_external_common\+0x4
++0+00a8 <[^>]*> stb r4,0\(r5\)
++[ ]*a8: R_NIOS2_S16 .bss\+0x4
++0+00ac <[^>]*> stb r4,0\(r5\)
++[ ]*ac: R_NIOS2_S16 .bss\+0x4004
++0+00b0 <[^>]*> stb r4,0\(r5\)
++[ ]*b0: R_NIOS2_S16 .data\+0xffff8000
++0+00b4 <[^>]*> stb r4,0\(r5\)
++[ ]*b4: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+00b8 <[^>]*> stb r4,0\(r5\)
++[ ]*b8: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+00bc <[^>]*> stb r4,0\(r5\)
++[ ]*bc: R_NIOS2_S16 big_external_common\+0xffff8000
++0+00c0 <[^>]*> stb r4,0\(r5\)
++[ ]*c0: R_NIOS2_S16 small_external_common\+0xffff8000
++0+00c4 <[^>]*> stb r4,0\(r5\)
++[ ]*c4: R_NIOS2_S16 .bss\+0xffff8000
++0+00c8 <[^>]*> stb r4,0\(r5\)
++[ ]*c8: R_NIOS2_S16 .bss\+0xffffc000
++0+00cc <[^>]*> stbio r4,0\(zero\)
++0+00d0 <[^>]*> stbio r4,4\(zero\)
++0+00d4 <[^>]*> stbio r4,32764\(zero\)
++0+00d8 <[^>]*> stbio r4,-32768\(zero\)
++0+00dc <[^>]*> stbio r4,0\(r5\)
++0+00e0 <[^>]*> stbio r4,4\(r5\)
++0+00e4 <[^>]*> stbio r4,32764\(r5\)
++0+00e8 <[^>]*> stbio r4,-32768\(r5\)
++0+00ec <[^>]*> stbio r4,0\(zero\)
++[ ]*ec: R_NIOS2_S16 .data
++0+00f0 <[^>]*> stbio r4,0\(zero\)
++[ ]*f0: R_NIOS2_S16 big_external_data_label
++0+00f4 <[^>]*> stbio r4,0\(zero\)
++[ ]*f4: R_NIOS2_S16 small_external_data_label
++0+00f8 <[^>]*> stbio r4,0\(zero\)
++[ ]*f8: R_NIOS2_S16 big_external_common
++0+00fc <[^>]*> stbio r4,0\(zero\)
++[ ]*fc: R_NIOS2_S16 small_external_common
++0+0100 <[^>]*> stbio r4,0\(zero\)
++[ ]*100: R_NIOS2_S16 .bss
++0+0104 <[^>]*> stbio r4,0\(zero\)
++[ ]*104: R_NIOS2_S16 .bss\+0x4000
++0+0108 <[^>]*> stbio r4,0\(zero\)
++[ ]*108: R_NIOS2_S16 .data\+0x4
++0+010c <[^>]*> stbio r4,0\(zero\)
++[ ]*10c: R_NIOS2_S16 big_external_data_label\+0x4
++0+0110 <[^>]*> stbio r4,0\(zero\)
++[ ]*110: R_NIOS2_S16 small_external_data_label\+0x4
++0+0114 <[^>]*> stbio r4,0\(zero\)
++[ ]*114: R_NIOS2_S16 big_external_common\+0x4
++0+0118 <[^>]*> stbio r4,0\(zero\)
++[ ]*118: R_NIOS2_S16 small_external_common\+0x4
++0+011c <[^>]*> stbio r4,0\(zero\)
++[ ]*11c: R_NIOS2_S16 .bss\+0x4
++0+0120 <[^>]*> stbio r4,0\(zero\)
++[ ]*120: R_NIOS2_S16 .bss\+0x4004
++0+0124 <[^>]*> stbio r4,0\(zero\)
++[ ]*124: R_NIOS2_S16 .data\+0xffff8000
++0+0128 <[^>]*> stbio r4,0\(zero\)
++[ ]*128: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+012c <[^>]*> stbio r4,0\(zero\)
++[ ]*12c: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0130 <[^>]*> stbio r4,0\(zero\)
++[ ]*130: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0134 <[^>]*> stbio r4,0\(zero\)
++[ ]*134: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0138 <[^>]*> stbio r4,0\(zero\)
++[ ]*138: R_NIOS2_S16 .bss\+0xffff8000
++0+013c <[^>]*> stbio r4,0\(zero\)
++[ ]*13c: R_NIOS2_S16 .bss\+0xffffc000
++0+0140 <[^>]*> stbio r4,0\(zero\)
++[ ]*140: R_NIOS2_S16 .data\+0x10000
++0+0144 <[^>]*> stbio r4,0\(r5\)
++[ ]*144: R_NIOS2_S16 .data
++0+0148 <[^>]*> stbio r4,0\(r5\)
++[ ]*148: R_NIOS2_S16 big_external_data_label
++0+014c <[^>]*> stbio r4,0\(r5\)
++[ ]*14c: R_NIOS2_S16 small_external_data_label
++0+0150 <[^>]*> stbio r4,0\(r5\)
++[ ]*150: R_NIOS2_S16 big_external_common
++0+0154 <[^>]*> stbio r4,0\(r5\)
++[ ]*154: R_NIOS2_S16 small_external_common
++0+0158 <[^>]*> stbio r4,0\(r5\)
++[ ]*158: R_NIOS2_S16 .bss
++0+015c <[^>]*> stbio r4,0\(r5\)
++[ ]*15c: R_NIOS2_S16 .bss\+0x4000
++0+0160 <[^>]*> stbio r4,0\(r5\)
++[ ]*160: R_NIOS2_S16 .data\+0x4
++0+0164 <[^>]*> stbio r4,0\(r5\)
++[ ]*164: R_NIOS2_S16 big_external_data_label\+0x4
++0+0168 <[^>]*> stbio r4,0\(r5\)
++[ ]*168: R_NIOS2_S16 small_external_data_label\+0x4
++0+016c <[^>]*> stbio r4,0\(r5\)
++[ ]*16c: R_NIOS2_S16 big_external_common\+0x4
++0+0170 <[^>]*> stbio r4,0\(r5\)
++[ ]*170: R_NIOS2_S16 small_external_common\+0x4
++0+0174 <[^>]*> stbio r4,0\(r5\)
++[ ]*174: R_NIOS2_S16 .bss\+0x4
++0+0178 <[^>]*> stbio r4,0\(r5\)
++[ ]*178: R_NIOS2_S16 .bss\+0x4004
++0+017c <[^>]*> stbio r4,0\(r5\)
++[ ]*17c: R_NIOS2_S16 .data\+0xffff8000
++0+0180 <[^>]*> stbio r4,0\(r5\)
++[ ]*180: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0184 <[^>]*> stbio r4,0\(r5\)
++[ ]*184: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0188 <[^>]*> stbio r4,0\(r5\)
++[ ]*188: R_NIOS2_S16 big_external_common\+0xffff8000
++0+018c <[^>]*> stbio r4,0\(r5\)
++[ ]*18c: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0190 <[^>]*> stbio r4,0\(r5\)
++[ ]*190: R_NIOS2_S16 .bss\+0xffff8000
++0+0194 <[^>]*> stbio r4,0\(r5\)
++[ ]*194: R_NIOS2_S16 .bss\+0xffffc000
+--- binutils-2.15/gas/testsuite/gas/nios2/stb.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/stb.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,117 @@
++ .data
++data_label:
++ .extern big_external_data_label,0x4000
++ .extern small_external_data_label,4
++ .comm big_external_common,0x4000
++ .comm small_external_common,4
++ .lcomm big_local_common,0x4000
++ .lcomm small_local_common,4
++
++# the small symbols should have space allocated in the sbss section
++# but this is not yet supported in the assembler, so space is allocated
++# in the .bss section and the relocations are not gp-relative. this will
++# be updated when gp-relative relocations are added
++ .text
++ stb r4,0(r0)
++ stb r4,4(r0)
++ stb r4,0x7ffc(r0)
++ stb r4,-0x8000(r0)
++ stb r4,0(r5)
++ stb r4,4(r5)
++ stb r4,0x7ffc(r5)
++ stb r4,-0x8000(r5)
++ stb r4,data_label(r0)
++ stb r4,big_external_data_label(r0)
++ stb r4,small_external_data_label(r0)
++ stb r4,big_external_common(r0)
++ stb r4,small_external_common(r0)
++ stb r4,big_local_common(r0)
++ stb r4,small_local_common(r0)
++ stb r4,data_label+4(r0)
++ stb r4,big_external_data_label+4(r0)
++ stb r4,small_external_data_label+4(r0)
++ stb r4,big_external_common+4(r0)
++ stb r4,small_external_common+4(r0)
++ stb r4,big_local_common+4(r0)
++ stb r4,small_local_common+4(r0)
++ stb r4,data_label-0x8000(r0)
++ stb r4,big_external_data_label-0x8000(r0)
++ stb r4,small_external_data_label-0x8000(r0)
++ stb r4,big_external_common-0x8000(r0)
++ stb r4,small_external_common-0x8000(r0)
++ stb r4,big_local_common-0x8000(r0)
++ stb r4,small_local_common-0x8000(r0)
++ stb r4,data_label+0x10000(r0)
++ stb r4,data_label(r5)
++ stb r4,big_external_data_label(r5)
++ stb r4,small_external_data_label(r5)
++ stb r4,big_external_common(r5)
++ stb r4,small_external_common(r5)
++ stb r4,big_local_common(r5)
++ stb r4,small_local_common(r5)
++ stb r4,data_label+4(r5)
++ stb r4,big_external_data_label+4(r5)
++ stb r4,small_external_data_label+4(r5)
++ stb r4,big_external_common+4(r5)
++ stb r4,small_external_common+4(r5)
++ stb r4,big_local_common+4(r5)
++ stb r4,small_local_common+4(r5)
++ stb r4,data_label-0x8000(r5)
++ stb r4,big_external_data_label-0x8000(r5)
++ stb r4,small_external_data_label-0x8000(r5)
++ stb r4,big_external_common-0x8000(r5)
++ stb r4,small_external_common-0x8000(r5)
++ stb r4,big_local_common-0x8000(r5)
++ stb r4,small_local_common-0x8000(r5)
++
++ stbio r4,0(r0)
++ stbio r4,4(r0)
++ stbio r4,0x7ffc(r0)
++ stbio r4,-0x8000(r0)
++ stbio r4,0(r5)
++ stbio r4,4(r5)
++ stbio r4,0x7ffc(r5)
++ stbio r4,-0x8000(r5)
++ stbio r4,data_label(r0)
++ stbio r4,big_external_data_label(r0)
++ stbio r4,small_external_data_label(r0)
++ stbio r4,big_external_common(r0)
++ stbio r4,small_external_common(r0)
++ stbio r4,big_local_common(r0)
++ stbio r4,small_local_common(r0)
++ stbio r4,data_label+4(r0)
++ stbio r4,big_external_data_label+4(r0)
++ stbio r4,small_external_data_label+4(r0)
++ stbio r4,big_external_common+4(r0)
++ stbio r4,small_external_common+4(r0)
++ stbio r4,big_local_common+4(r0)
++ stbio r4,small_local_common+4(r0)
++ stbio r4,data_label-0x8000(r0)
++ stbio r4,big_external_data_label-0x8000(r0)
++ stbio r4,small_external_data_label-0x8000(r0)
++ stbio r4,big_external_common-0x8000(r0)
++ stbio r4,small_external_common-0x8000(r0)
++ stbio r4,big_local_common-0x8000(r0)
++ stbio r4,small_local_common-0x8000(r0)
++ stbio r4,data_label+0x10000(r0)
++ stbio r4,data_label(r5)
++ stbio r4,big_external_data_label(r5)
++ stbio r4,small_external_data_label(r5)
++ stbio r4,big_external_common(r5)
++ stbio r4,small_external_common(r5)
++ stbio r4,big_local_common(r5)
++ stbio r4,small_local_common(r5)
++ stbio r4,data_label+4(r5)
++ stbio r4,big_external_data_label+4(r5)
++ stbio r4,small_external_data_label+4(r5)
++ stbio r4,big_external_common+4(r5)
++ stbio r4,small_external_common+4(r5)
++ stbio r4,big_local_common+4(r5)
++ stbio r4,small_local_common+4(r5)
++ stbio r4,data_label-0x8000(r5)
++ stbio r4,big_external_data_label-0x8000(r5)
++ stbio r4,small_external_data_label-0x8000(r5)
++ stbio r4,big_external_common-0x8000(r5)
++ stbio r4,small_external_common-0x8000(r5)
++ stbio r4,big_local_common-0x8000(r5)
++ stbio r4,small_local_common-0x8000(r5)
+--- binutils-2.15/gas/testsuite/gas/nios2/sth.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/sth.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,196 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 sth
++
++# Test the ld instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> sth r4,0\(zero\)
++0+0004 <[^>]*> sth r4,4\(zero\)
++0+0008 <[^>]*> sth r4,32764\(zero\)
++0+000c <[^>]*> sth r4,-32768\(zero\)
++0+0010 <[^>]*> sth r4,0\(r5\)
++0+0014 <[^>]*> sth r4,4\(r5\)
++0+0018 <[^>]*> sth r4,32764\(r5\)
++0+001c <[^>]*> sth r4,-32768\(r5\)
++0+0020 <[^>]*> sth r4,0\(zero\)
++[ ]*20: R_NIOS2_S16 .data
++0+0024 <[^>]*> sth r4,0\(zero\)
++[ ]*24: R_NIOS2_S16 big_external_data_label
++0+0028 <[^>]*> sth r4,0\(zero\)
++[ ]*28: R_NIOS2_S16 small_external_data_label
++0+002c <[^>]*> sth r4,0\(zero\)
++[ ]*2c: R_NIOS2_S16 big_external_common
++0+0030 <[^>]*> sth r4,0\(zero\)
++[ ]*30: R_NIOS2_S16 small_external_common
++0+0034 <[^>]*> sth r4,0\(zero\)
++[ ]*34: R_NIOS2_S16 .bss
++0+0038 <[^>]*> sth r4,0\(zero\)
++[ ]*38: R_NIOS2_S16 .bss\+0x4000
++0+003c <[^>]*> sth r4,0\(zero\)
++[ ]*3c: R_NIOS2_S16 .data\+0x4
++0+0040 <[^>]*> sth r4,0\(zero\)
++[ ]*40: R_NIOS2_S16 big_external_data_label\+0x4
++0+0044 <[^>]*> sth r4,0\(zero\)
++[ ]*44: R_NIOS2_S16 small_external_data_label\+0x4
++0+0048 <[^>]*> sth r4,0\(zero\)
++[ ]*48: R_NIOS2_S16 big_external_common\+0x4
++0+004c <[^>]*> sth r4,0\(zero\)
++[ ]*4c: R_NIOS2_S16 small_external_common\+0x4
++0+0050 <[^>]*> sth r4,0\(zero\)
++[ ]*50: R_NIOS2_S16 .bss\+0x4
++0+0054 <[^>]*> sth r4,0\(zero\)
++[ ]*54: R_NIOS2_S16 .bss\+0x4004
++0+0058 <[^>]*> sth r4,0\(zero\)
++[ ]*58: R_NIOS2_S16 .data\+0xffff8000
++0+005c <[^>]*> sth r4,0\(zero\)
++[ ]*5c: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0060 <[^>]*> sth r4,0\(zero\)
++[ ]*60: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0064 <[^>]*> sth r4,0\(zero\)
++[ ]*64: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0068 <[^>]*> sth r4,0\(zero\)
++[ ]*68: R_NIOS2_S16 small_external_common\+0xffff8000
++0+006c <[^>]*> sth r4,0\(zero\)
++[ ]*6c: R_NIOS2_S16 .bss\+0xffff8000
++0+0070 <[^>]*> sth r4,0\(zero\)
++[ ]*70: R_NIOS2_S16 .bss\+0xffffc000
++0+0074 <[^>]*> sth r4,0\(zero\)
++[ ]*74: R_NIOS2_S16 .data\+0x10000
++0+0078 <[^>]*> sth r4,0\(r5\)
++[ ]*78: R_NIOS2_S16 .data
++0+007c <[^>]*> sth r4,0\(r5\)
++[ ]*7c: R_NIOS2_S16 big_external_data_label
++0+0080 <[^>]*> sth r4,0\(r5\)
++[ ]*80: R_NIOS2_S16 small_external_data_label
++0+0084 <[^>]*> sth r4,0\(r5\)
++[ ]*84: R_NIOS2_S16 big_external_common
++0+0088 <[^>]*> sth r4,0\(r5\)
++[ ]*88: R_NIOS2_S16 small_external_common
++0+008c <[^>]*> sth r4,0\(r5\)
++[ ]*8c: R_NIOS2_S16 .bss
++0+0090 <[^>]*> sth r4,0\(r5\)
++[ ]*90: R_NIOS2_S16 .bss\+0x4000
++0+0094 <[^>]*> sth r4,0\(r5\)
++[ ]*94: R_NIOS2_S16 .data\+0x4
++0+0098 <[^>]*> sth r4,0\(r5\)
++[ ]*98: R_NIOS2_S16 big_external_data_label\+0x4
++0+009c <[^>]*> sth r4,0\(r5\)
++[ ]*9c: R_NIOS2_S16 small_external_data_label\+0x4
++0+00a0 <[^>]*> sth r4,0\(r5\)
++[ ]*a0: R_NIOS2_S16 big_external_common\+0x4
++0+00a4 <[^>]*> sth r4,0\(r5\)
++[ ]*a4: R_NIOS2_S16 small_external_common\+0x4
++0+00a8 <[^>]*> sth r4,0\(r5\)
++[ ]*a8: R_NIOS2_S16 .bss\+0x4
++0+00ac <[^>]*> sth r4,0\(r5\)
++[ ]*ac: R_NIOS2_S16 .bss\+0x4004
++0+00b0 <[^>]*> sth r4,0\(r5\)
++[ ]*b0: R_NIOS2_S16 .data\+0xffff8000
++0+00b4 <[^>]*> sth r4,0\(r5\)
++[ ]*b4: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+00b8 <[^>]*> sth r4,0\(r5\)
++[ ]*b8: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+00bc <[^>]*> sth r4,0\(r5\)
++[ ]*bc: R_NIOS2_S16 big_external_common\+0xffff8000
++0+00c0 <[^>]*> sth r4,0\(r5\)
++[ ]*c0: R_NIOS2_S16 small_external_common\+0xffff8000
++0+00c4 <[^>]*> sth r4,0\(r5\)
++[ ]*c4: R_NIOS2_S16 .bss\+0xffff8000
++0+00c8 <[^>]*> sth r4,0\(r5\)
++[ ]*c8: R_NIOS2_S16 .bss\+0xffffc000
++0+00cc <[^>]*> sthio r4,0\(zero\)
++0+00d0 <[^>]*> sthio r4,4\(zero\)
++0+00d4 <[^>]*> sthio r4,32764\(zero\)
++0+00d8 <[^>]*> sthio r4,-32768\(zero\)
++0+00dc <[^>]*> sthio r4,0\(r5\)
++0+00e0 <[^>]*> sthio r4,4\(r5\)
++0+00e4 <[^>]*> sthio r4,32764\(r5\)
++0+00e8 <[^>]*> sthio r4,-32768\(r5\)
++0+00ec <[^>]*> sthio r4,0\(zero\)
++[ ]*ec: R_NIOS2_S16 .data
++0+00f0 <[^>]*> sthio r4,0\(zero\)
++[ ]*f0: R_NIOS2_S16 big_external_data_label
++0+00f4 <[^>]*> sthio r4,0\(zero\)
++[ ]*f4: R_NIOS2_S16 small_external_data_label
++0+00f8 <[^>]*> sthio r4,0\(zero\)
++[ ]*f8: R_NIOS2_S16 big_external_common
++0+00fc <[^>]*> sthio r4,0\(zero\)
++[ ]*fc: R_NIOS2_S16 small_external_common
++0+0100 <[^>]*> sthio r4,0\(zero\)
++[ ]*100: R_NIOS2_S16 .bss
++0+0104 <[^>]*> sthio r4,0\(zero\)
++[ ]*104: R_NIOS2_S16 .bss\+0x4000
++0+0108 <[^>]*> sthio r4,0\(zero\)
++[ ]*108: R_NIOS2_S16 .data\+0x4
++0+010c <[^>]*> sthio r4,0\(zero\)
++[ ]*10c: R_NIOS2_S16 big_external_data_label\+0x4
++0+0110 <[^>]*> sthio r4,0\(zero\)
++[ ]*110: R_NIOS2_S16 small_external_data_label\+0x4
++0+0114 <[^>]*> sthio r4,0\(zero\)
++[ ]*114: R_NIOS2_S16 big_external_common\+0x4
++0+0118 <[^>]*> sthio r4,0\(zero\)
++[ ]*118: R_NIOS2_S16 small_external_common\+0x4
++0+011c <[^>]*> sthio r4,0\(zero\)
++[ ]*11c: R_NIOS2_S16 .bss\+0x4
++0+0120 <[^>]*> sthio r4,0\(zero\)
++[ ]*120: R_NIOS2_S16 .bss\+0x4004
++0+0124 <[^>]*> sthio r4,0\(zero\)
++[ ]*124: R_NIOS2_S16 .data\+0xffff8000
++0+0128 <[^>]*> sthio r4,0\(zero\)
++[ ]*128: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+012c <[^>]*> sthio r4,0\(zero\)
++[ ]*12c: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0130 <[^>]*> sthio r4,0\(zero\)
++[ ]*130: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0134 <[^>]*> sthio r4,0\(zero\)
++[ ]*134: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0138 <[^>]*> sthio r4,0\(zero\)
++[ ]*138: R_NIOS2_S16 .bss\+0xffff8000
++0+013c <[^>]*> sthio r4,0\(zero\)
++[ ]*13c: R_NIOS2_S16 .bss\+0xffffc000
++0+0140 <[^>]*> sthio r4,0\(zero\)
++[ ]*140: R_NIOS2_S16 .data\+0x10000
++0+0144 <[^>]*> sthio r4,0\(r5\)
++[ ]*144: R_NIOS2_S16 .data
++0+0148 <[^>]*> sthio r4,0\(r5\)
++[ ]*148: R_NIOS2_S16 big_external_data_label
++0+014c <[^>]*> sthio r4,0\(r5\)
++[ ]*14c: R_NIOS2_S16 small_external_data_label
++0+0150 <[^>]*> sthio r4,0\(r5\)
++[ ]*150: R_NIOS2_S16 big_external_common
++0+0154 <[^>]*> sthio r4,0\(r5\)
++[ ]*154: R_NIOS2_S16 small_external_common
++0+0158 <[^>]*> sthio r4,0\(r5\)
++[ ]*158: R_NIOS2_S16 .bss
++0+015c <[^>]*> sthio r4,0\(r5\)
++[ ]*15c: R_NIOS2_S16 .bss\+0x4000
++0+0160 <[^>]*> sthio r4,0\(r5\)
++[ ]*160: R_NIOS2_S16 .data\+0x4
++0+0164 <[^>]*> sthio r4,0\(r5\)
++[ ]*164: R_NIOS2_S16 big_external_data_label\+0x4
++0+0168 <[^>]*> sthio r4,0\(r5\)
++[ ]*168: R_NIOS2_S16 small_external_data_label\+0x4
++0+016c <[^>]*> sthio r4,0\(r5\)
++[ ]*16c: R_NIOS2_S16 big_external_common\+0x4
++0+0170 <[^>]*> sthio r4,0\(r5\)
++[ ]*170: R_NIOS2_S16 small_external_common\+0x4
++0+0174 <[^>]*> sthio r4,0\(r5\)
++[ ]*174: R_NIOS2_S16 .bss\+0x4
++0+0178 <[^>]*> sthio r4,0\(r5\)
++[ ]*178: R_NIOS2_S16 .bss\+0x4004
++0+017c <[^>]*> sthio r4,0\(r5\)
++[ ]*17c: R_NIOS2_S16 .data\+0xffff8000
++0+0180 <[^>]*> sthio r4,0\(r5\)
++[ ]*180: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0184 <[^>]*> sthio r4,0\(r5\)
++[ ]*184: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0188 <[^>]*> sthio r4,0\(r5\)
++[ ]*188: R_NIOS2_S16 big_external_common\+0xffff8000
++0+018c <[^>]*> sthio r4,0\(r5\)
++[ ]*18c: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0190 <[^>]*> sthio r4,0\(r5\)
++[ ]*190: R_NIOS2_S16 .bss\+0xffff8000
++0+0194 <[^>]*> sthio r4,0\(r5\)
++[ ]*194: R_NIOS2_S16 .bss\+0xffffc000
+--- binutils-2.15/gas/testsuite/gas/nios2/sth.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/sth.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,117 @@
++ .data
++data_label:
++ .extern big_external_data_label,0x4000
++ .extern small_external_data_label,4
++ .comm big_external_common,0x4000
++ .comm small_external_common,4
++ .lcomm big_local_common,0x4000
++ .lcomm small_local_common,4
++
++# the small symbols should have space allocated in the sbss section
++# but this is not yet supported in the assembler, so space is allocated
++# in the .bss section and the relocations are not gp-relative. this will
++# be updated when gp-relative relocations are added
++ .text
++ sth r4,0(r0)
++ sth r4,4(r0)
++ sth r4,0x7ffc(r0)
++ sth r4,-0x8000(r0)
++ sth r4,0(r5)
++ sth r4,4(r5)
++ sth r4,0x7ffc(r5)
++ sth r4,-0x8000(r5)
++ sth r4,data_label(r0)
++ sth r4,big_external_data_label(r0)
++ sth r4,small_external_data_label(r0)
++ sth r4,big_external_common(r0)
++ sth r4,small_external_common(r0)
++ sth r4,big_local_common(r0)
++ sth r4,small_local_common(r0)
++ sth r4,data_label+4(r0)
++ sth r4,big_external_data_label+4(r0)
++ sth r4,small_external_data_label+4(r0)
++ sth r4,big_external_common+4(r0)
++ sth r4,small_external_common+4(r0)
++ sth r4,big_local_common+4(r0)
++ sth r4,small_local_common+4(r0)
++ sth r4,data_label-0x8000(r0)
++ sth r4,big_external_data_label-0x8000(r0)
++ sth r4,small_external_data_label-0x8000(r0)
++ sth r4,big_external_common-0x8000(r0)
++ sth r4,small_external_common-0x8000(r0)
++ sth r4,big_local_common-0x8000(r0)
++ sth r4,small_local_common-0x8000(r0)
++ sth r4,data_label+0x10000(r0)
++ sth r4,data_label(r5)
++ sth r4,big_external_data_label(r5)
++ sth r4,small_external_data_label(r5)
++ sth r4,big_external_common(r5)
++ sth r4,small_external_common(r5)
++ sth r4,big_local_common(r5)
++ sth r4,small_local_common(r5)
++ sth r4,data_label+4(r5)
++ sth r4,big_external_data_label+4(r5)
++ sth r4,small_external_data_label+4(r5)
++ sth r4,big_external_common+4(r5)
++ sth r4,small_external_common+4(r5)
++ sth r4,big_local_common+4(r5)
++ sth r4,small_local_common+4(r5)
++ sth r4,data_label-0x8000(r5)
++ sth r4,big_external_data_label-0x8000(r5)
++ sth r4,small_external_data_label-0x8000(r5)
++ sth r4,big_external_common-0x8000(r5)
++ sth r4,small_external_common-0x8000(r5)
++ sth r4,big_local_common-0x8000(r5)
++ sth r4,small_local_common-0x8000(r5)
++
++ sthio r4,0(r0)
++ sthio r4,4(r0)
++ sthio r4,0x7ffc(r0)
++ sthio r4,-0x8000(r0)
++ sthio r4,0(r5)
++ sthio r4,4(r5)
++ sthio r4,0x7ffc(r5)
++ sthio r4,-0x8000(r5)
++ sthio r4,data_label(r0)
++ sthio r4,big_external_data_label(r0)
++ sthio r4,small_external_data_label(r0)
++ sthio r4,big_external_common(r0)
++ sthio r4,small_external_common(r0)
++ sthio r4,big_local_common(r0)
++ sthio r4,small_local_common(r0)
++ sthio r4,data_label+4(r0)
++ sthio r4,big_external_data_label+4(r0)
++ sthio r4,small_external_data_label+4(r0)
++ sthio r4,big_external_common+4(r0)
++ sthio r4,small_external_common+4(r0)
++ sthio r4,big_local_common+4(r0)
++ sthio r4,small_local_common+4(r0)
++ sthio r4,data_label-0x8000(r0)
++ sthio r4,big_external_data_label-0x8000(r0)
++ sthio r4,small_external_data_label-0x8000(r0)
++ sthio r4,big_external_common-0x8000(r0)
++ sthio r4,small_external_common-0x8000(r0)
++ sthio r4,big_local_common-0x8000(r0)
++ sthio r4,small_local_common-0x8000(r0)
++ sthio r4,data_label+0x10000(r0)
++ sthio r4,data_label(r5)
++ sthio r4,big_external_data_label(r5)
++ sthio r4,small_external_data_label(r5)
++ sthio r4,big_external_common(r5)
++ sthio r4,small_external_common(r5)
++ sthio r4,big_local_common(r5)
++ sthio r4,small_local_common(r5)
++ sthio r4,data_label+4(r5)
++ sthio r4,big_external_data_label+4(r5)
++ sthio r4,small_external_data_label+4(r5)
++ sthio r4,big_external_common+4(r5)
++ sthio r4,small_external_common+4(r5)
++ sthio r4,big_local_common+4(r5)
++ sthio r4,small_local_common+4(r5)
++ sthio r4,data_label-0x8000(r5)
++ sthio r4,big_external_data_label-0x8000(r5)
++ sthio r4,small_external_data_label-0x8000(r5)
++ sthio r4,big_external_common-0x8000(r5)
++ sthio r4,small_external_common-0x8000(r5)
++ sthio r4,big_local_common-0x8000(r5)
++ sthio r4,small_local_common-0x8000(r5)
+--- binutils-2.15/gas/testsuite/gas/nios2/str2.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/str2.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,21 @@
++ .section .rodata.str1.1,"aMS",@progbits,1
++.LC0:
++ .string "DHRYSTONE PROGRAM, 3'RD STRING"
++.LC1:
++ .string "COMMON"
++.LC2:
++ .string "DHRYSTONE PROGRAM, 4'TH STRING"
++
++ .section .text
++ .align 3
++ .global func2
++ .type func2, @function
++func2:
++ #movhi r2, %hiadj(.LC0)
++ addi r2, r2, .LC0
++ #movhi r3, %hiadj(.LC1)
++ addi r3, r3, .LC1
++ #movhi r4, %hiadj(.LC2)
++ addi r4, r4, .LC2
++ .size func2, .-func2
++
+--- binutils-2.15/gas/testsuite/gas/nios2/stw.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/stw.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,196 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 stw
++
++# Test the ld instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> stw r4,0\(zero\)
++0+0004 <[^>]*> stw r4,4\(zero\)
++0+0008 <[^>]*> stw r4,32764\(zero\)
++0+000c <[^>]*> stw r4,-32768\(zero\)
++0+0010 <[^>]*> stw r4,0\(r5\)
++0+0014 <[^>]*> stw r4,4\(r5\)
++0+0018 <[^>]*> stw r4,32764\(r5\)
++0+001c <[^>]*> stw r4,-32768\(r5\)
++0+0020 <[^>]*> stw r4,0\(zero\)
++[ ]*20: R_NIOS2_S16 .data
++0+0024 <[^>]*> stw r4,0\(zero\)
++[ ]*24: R_NIOS2_S16 big_external_data_label
++0+0028 <[^>]*> stw r4,0\(zero\)
++[ ]*28: R_NIOS2_S16 small_external_data_label
++0+002c <[^>]*> stw r4,0\(zero\)
++[ ]*2c: R_NIOS2_S16 big_external_common
++0+0030 <[^>]*> stw r4,0\(zero\)
++[ ]*30: R_NIOS2_S16 small_external_common
++0+0034 <[^>]*> stw r4,0\(zero\)
++[ ]*34: R_NIOS2_S16 .bss
++0+0038 <[^>]*> stw r4,0\(zero\)
++[ ]*38: R_NIOS2_S16 .bss\+0x4000
++0+003c <[^>]*> stw r4,0\(zero\)
++[ ]*3c: R_NIOS2_S16 .data\+0x4
++0+0040 <[^>]*> stw r4,0\(zero\)
++[ ]*40: R_NIOS2_S16 big_external_data_label\+0x4
++0+0044 <[^>]*> stw r4,0\(zero\)
++[ ]*44: R_NIOS2_S16 small_external_data_label\+0x4
++0+0048 <[^>]*> stw r4,0\(zero\)
++[ ]*48: R_NIOS2_S16 big_external_common\+0x4
++0+004c <[^>]*> stw r4,0\(zero\)
++[ ]*4c: R_NIOS2_S16 small_external_common\+0x4
++0+0050 <[^>]*> stw r4,0\(zero\)
++[ ]*50: R_NIOS2_S16 .bss\+0x4
++0+0054 <[^>]*> stw r4,0\(zero\)
++[ ]*54: R_NIOS2_S16 .bss\+0x4004
++0+0058 <[^>]*> stw r4,0\(zero\)
++[ ]*58: R_NIOS2_S16 .data\+0xffff8000
++0+005c <[^>]*> stw r4,0\(zero\)
++[ ]*5c: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0060 <[^>]*> stw r4,0\(zero\)
++[ ]*60: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0064 <[^>]*> stw r4,0\(zero\)
++[ ]*64: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0068 <[^>]*> stw r4,0\(zero\)
++[ ]*68: R_NIOS2_S16 small_external_common\+0xffff8000
++0+006c <[^>]*> stw r4,0\(zero\)
++[ ]*6c: R_NIOS2_S16 .bss\+0xffff8000
++0+0070 <[^>]*> stw r4,0\(zero\)
++[ ]*70: R_NIOS2_S16 .bss\+0xffffc000
++0+0074 <[^>]*> stw r4,0\(zero\)
++[ ]*74: R_NIOS2_S16 .data\+0x10000
++0+0078 <[^>]*> stw r4,0\(r5\)
++[ ]*78: R_NIOS2_S16 .data
++0+007c <[^>]*> stw r4,0\(r5\)
++[ ]*7c: R_NIOS2_S16 big_external_data_label
++0+0080 <[^>]*> stw r4,0\(r5\)
++[ ]*80: R_NIOS2_S16 small_external_data_label
++0+0084 <[^>]*> stw r4,0\(r5\)
++[ ]*84: R_NIOS2_S16 big_external_common
++0+0088 <[^>]*> stw r4,0\(r5\)
++[ ]*88: R_NIOS2_S16 small_external_common
++0+008c <[^>]*> stw r4,0\(r5\)
++[ ]*8c: R_NIOS2_S16 .bss
++0+0090 <[^>]*> stw r4,0\(r5\)
++[ ]*90: R_NIOS2_S16 .bss\+0x4000
++0+0094 <[^>]*> stw r4,0\(r5\)
++[ ]*94: R_NIOS2_S16 .data\+0x4
++0+0098 <[^>]*> stw r4,0\(r5\)
++[ ]*98: R_NIOS2_S16 big_external_data_label\+0x4
++0+009c <[^>]*> stw r4,0\(r5\)
++[ ]*9c: R_NIOS2_S16 small_external_data_label\+0x4
++0+00a0 <[^>]*> stw r4,0\(r5\)
++[ ]*a0: R_NIOS2_S16 big_external_common\+0x4
++0+00a4 <[^>]*> stw r4,0\(r5\)
++[ ]*a4: R_NIOS2_S16 small_external_common\+0x4
++0+00a8 <[^>]*> stw r4,0\(r5\)
++[ ]*a8: R_NIOS2_S16 .bss\+0x4
++0+00ac <[^>]*> stw r4,0\(r5\)
++[ ]*ac: R_NIOS2_S16 .bss\+0x4004
++0+00b0 <[^>]*> stw r4,0\(r5\)
++[ ]*b0: R_NIOS2_S16 .data\+0xffff8000
++0+00b4 <[^>]*> stw r4,0\(r5\)
++[ ]*b4: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+00b8 <[^>]*> stw r4,0\(r5\)
++[ ]*b8: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+00bc <[^>]*> stw r4,0\(r5\)
++[ ]*bc: R_NIOS2_S16 big_external_common\+0xffff8000
++0+00c0 <[^>]*> stw r4,0\(r5\)
++[ ]*c0: R_NIOS2_S16 small_external_common\+0xffff8000
++0+00c4 <[^>]*> stw r4,0\(r5\)
++[ ]*c4: R_NIOS2_S16 .bss\+0xffff8000
++0+00c8 <[^>]*> stw r4,0\(r5\)
++[ ]*c8: R_NIOS2_S16 .bss\+0xffffc000
++0+00cc <[^>]*> stwio r4,0\(zero\)
++0+00d0 <[^>]*> stwio r4,4\(zero\)
++0+00d4 <[^>]*> stwio r4,32764\(zero\)
++0+00d8 <[^>]*> stwio r4,-32768\(zero\)
++0+00dc <[^>]*> stwio r4,0\(r5\)
++0+00e0 <[^>]*> stwio r4,4\(r5\)
++0+00e4 <[^>]*> stwio r4,32764\(r5\)
++0+00e8 <[^>]*> stwio r4,-32768\(r5\)
++0+00ec <[^>]*> stwio r4,0\(zero\)
++[ ]*ec: R_NIOS2_S16 .data
++0+00f0 <[^>]*> stwio r4,0\(zero\)
++[ ]*f0: R_NIOS2_S16 big_external_data_label
++0+00f4 <[^>]*> stwio r4,0\(zero\)
++[ ]*f4: R_NIOS2_S16 small_external_data_label
++0+00f8 <[^>]*> stwio r4,0\(zero\)
++[ ]*f8: R_NIOS2_S16 big_external_common
++0+00fc <[^>]*> stwio r4,0\(zero\)
++[ ]*fc: R_NIOS2_S16 small_external_common
++0+0100 <[^>]*> stwio r4,0\(zero\)
++[ ]*100: R_NIOS2_S16 .bss
++0+0104 <[^>]*> stwio r4,0\(zero\)
++[ ]*104: R_NIOS2_S16 .bss\+0x4000
++0+0108 <[^>]*> stwio r4,0\(zero\)
++[ ]*108: R_NIOS2_S16 .data\+0x4
++0+010c <[^>]*> stwio r4,0\(zero\)
++[ ]*10c: R_NIOS2_S16 big_external_data_label\+0x4
++0+0110 <[^>]*> stwio r4,0\(zero\)
++[ ]*110: R_NIOS2_S16 small_external_data_label\+0x4
++0+0114 <[^>]*> stwio r4,0\(zero\)
++[ ]*114: R_NIOS2_S16 big_external_common\+0x4
++0+0118 <[^>]*> stwio r4,0\(zero\)
++[ ]*118: R_NIOS2_S16 small_external_common\+0x4
++0+011c <[^>]*> stwio r4,0\(zero\)
++[ ]*11c: R_NIOS2_S16 .bss\+0x4
++0+0120 <[^>]*> stwio r4,0\(zero\)
++[ ]*120: R_NIOS2_S16 .bss\+0x4004
++0+0124 <[^>]*> stwio r4,0\(zero\)
++[ ]*124: R_NIOS2_S16 .data\+0xffff8000
++0+0128 <[^>]*> stwio r4,0\(zero\)
++[ ]*128: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+012c <[^>]*> stwio r4,0\(zero\)
++[ ]*12c: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0130 <[^>]*> stwio r4,0\(zero\)
++[ ]*130: R_NIOS2_S16 big_external_common\+0xffff8000
++0+0134 <[^>]*> stwio r4,0\(zero\)
++[ ]*134: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0138 <[^>]*> stwio r4,0\(zero\)
++[ ]*138: R_NIOS2_S16 .bss\+0xffff8000
++0+013c <[^>]*> stwio r4,0\(zero\)
++[ ]*13c: R_NIOS2_S16 .bss\+0xffffc000
++0+0140 <[^>]*> stwio r4,0\(zero\)
++[ ]*140: R_NIOS2_S16 .data\+0x10000
++0+0144 <[^>]*> stwio r4,0\(r5\)
++[ ]*144: R_NIOS2_S16 .data
++0+0148 <[^>]*> stwio r4,0\(r5\)
++[ ]*148: R_NIOS2_S16 big_external_data_label
++0+014c <[^>]*> stwio r4,0\(r5\)
++[ ]*14c: R_NIOS2_S16 small_external_data_label
++0+0150 <[^>]*> stwio r4,0\(r5\)
++[ ]*150: R_NIOS2_S16 big_external_common
++0+0154 <[^>]*> stwio r4,0\(r5\)
++[ ]*154: R_NIOS2_S16 small_external_common
++0+0158 <[^>]*> stwio r4,0\(r5\)
++[ ]*158: R_NIOS2_S16 .bss
++0+015c <[^>]*> stwio r4,0\(r5\)
++[ ]*15c: R_NIOS2_S16 .bss\+0x4000
++0+0160 <[^>]*> stwio r4,0\(r5\)
++[ ]*160: R_NIOS2_S16 .data\+0x4
++0+0164 <[^>]*> stwio r4,0\(r5\)
++[ ]*164: R_NIOS2_S16 big_external_data_label\+0x4
++0+0168 <[^>]*> stwio r4,0\(r5\)
++[ ]*168: R_NIOS2_S16 small_external_data_label\+0x4
++0+016c <[^>]*> stwio r4,0\(r5\)
++[ ]*16c: R_NIOS2_S16 big_external_common\+0x4
++0+0170 <[^>]*> stwio r4,0\(r5\)
++[ ]*170: R_NIOS2_S16 small_external_common\+0x4
++0+0174 <[^>]*> stwio r4,0\(r5\)
++[ ]*174: R_NIOS2_S16 .bss\+0x4
++0+0178 <[^>]*> stwio r4,0\(r5\)
++[ ]*178: R_NIOS2_S16 .bss\+0x4004
++0+017c <[^>]*> stwio r4,0\(r5\)
++[ ]*17c: R_NIOS2_S16 .data\+0xffff8000
++0+0180 <[^>]*> stwio r4,0\(r5\)
++[ ]*180: R_NIOS2_S16 big_external_data_label\+0xffff8000
++0+0184 <[^>]*> stwio r4,0\(r5\)
++[ ]*184: R_NIOS2_S16 small_external_data_label\+0xffff8000
++0+0188 <[^>]*> stwio r4,0\(r5\)
++[ ]*188: R_NIOS2_S16 big_external_common\+0xffff8000
++0+018c <[^>]*> stwio r4,0\(r5\)
++[ ]*18c: R_NIOS2_S16 small_external_common\+0xffff8000
++0+0190 <[^>]*> stwio r4,0\(r5\)
++[ ]*190: R_NIOS2_S16 .bss\+0xffff8000
++0+0194 <[^>]*> stwio r4,0\(r5\)
++[ ]*194: R_NIOS2_S16 .bss\+0xffffc000
+--- binutils-2.15/gas/testsuite/gas/nios2/stw.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/stw.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,117 @@
++ .data
++data_label:
++ .extern big_external_data_label,0x4000
++ .extern small_external_data_label,4
++ .comm big_external_common,0x4000
++ .comm small_external_common,4
++ .lcomm big_local_common,0x4000
++ .lcomm small_local_common,4
++
++# the small symbols should have space allocated in the sbss section
++# but this is not yet supported in the assembler, so space is allocated
++# in the .bss section and the relocations are not gp-relative. this will
++# be updated when gp-relative relocations are added
++ .text
++ stw r4,0(r0)
++ stw r4,4(r0)
++ stw r4,0x7ffc(r0)
++ stw r4,-0x8000(r0)
++ stw r4,0(r5)
++ stw r4,4(r5)
++ stw r4,0x7ffc(r5)
++ stw r4,-0x8000(r5)
++ stw r4,data_label(r0)
++ stw r4,big_external_data_label(r0)
++ stw r4,small_external_data_label(r0)
++ stw r4,big_external_common(r0)
++ stw r4,small_external_common(r0)
++ stw r4,big_local_common(r0)
++ stw r4,small_local_common(r0)
++ stw r4,data_label+4(r0)
++ stw r4,big_external_data_label+4(r0)
++ stw r4,small_external_data_label+4(r0)
++ stw r4,big_external_common+4(r0)
++ stw r4,small_external_common+4(r0)
++ stw r4,big_local_common+4(r0)
++ stw r4,small_local_common+4(r0)
++ stw r4,data_label-0x8000(r0)
++ stw r4,big_external_data_label-0x8000(r0)
++ stw r4,small_external_data_label-0x8000(r0)
++ stw r4,big_external_common-0x8000(r0)
++ stw r4,small_external_common-0x8000(r0)
++ stw r4,big_local_common-0x8000(r0)
++ stw r4,small_local_common-0x8000(r0)
++ stw r4,data_label+0x10000(r0)
++ stw r4,data_label(r5)
++ stw r4,big_external_data_label(r5)
++ stw r4,small_external_data_label(r5)
++ stw r4,big_external_common(r5)
++ stw r4,small_external_common(r5)
++ stw r4,big_local_common(r5)
++ stw r4,small_local_common(r5)
++ stw r4,data_label+4(r5)
++ stw r4,big_external_data_label+4(r5)
++ stw r4,small_external_data_label+4(r5)
++ stw r4,big_external_common+4(r5)
++ stw r4,small_external_common+4(r5)
++ stw r4,big_local_common+4(r5)
++ stw r4,small_local_common+4(r5)
++ stw r4,data_label-0x8000(r5)
++ stw r4,big_external_data_label-0x8000(r5)
++ stw r4,small_external_data_label-0x8000(r5)
++ stw r4,big_external_common-0x8000(r5)
++ stw r4,small_external_common-0x8000(r5)
++ stw r4,big_local_common-0x8000(r5)
++ stw r4,small_local_common-0x8000(r5)
++
++ stwio r4,0(r0)
++ stwio r4,4(r0)
++ stwio r4,0x7ffc(r0)
++ stwio r4,-0x8000(r0)
++ stwio r4,0(r5)
++ stwio r4,4(r5)
++ stwio r4,0x7ffc(r5)
++ stwio r4,-0x8000(r5)
++ stwio r4,data_label(r0)
++ stwio r4,big_external_data_label(r0)
++ stwio r4,small_external_data_label(r0)
++ stwio r4,big_external_common(r0)
++ stwio r4,small_external_common(r0)
++ stwio r4,big_local_common(r0)
++ stwio r4,small_local_common(r0)
++ stwio r4,data_label+4(r0)
++ stwio r4,big_external_data_label+4(r0)
++ stwio r4,small_external_data_label+4(r0)
++ stwio r4,big_external_common+4(r0)
++ stwio r4,small_external_common+4(r0)
++ stwio r4,big_local_common+4(r0)
++ stwio r4,small_local_common+4(r0)
++ stwio r4,data_label-0x8000(r0)
++ stwio r4,big_external_data_label-0x8000(r0)
++ stwio r4,small_external_data_label-0x8000(r0)
++ stwio r4,big_external_common-0x8000(r0)
++ stwio r4,small_external_common-0x8000(r0)
++ stwio r4,big_local_common-0x8000(r0)
++ stwio r4,small_local_common-0x8000(r0)
++ stwio r4,data_label+0x10000(r0)
++ stwio r4,data_label(r5)
++ stwio r4,big_external_data_label(r5)
++ stwio r4,small_external_data_label(r5)
++ stwio r4,big_external_common(r5)
++ stwio r4,small_external_common(r5)
++ stwio r4,big_local_common(r5)
++ stwio r4,small_local_common(r5)
++ stwio r4,data_label+4(r5)
++ stwio r4,big_external_data_label+4(r5)
++ stwio r4,small_external_data_label+4(r5)
++ stwio r4,big_external_common+4(r5)
++ stwio r4,small_external_common+4(r5)
++ stwio r4,big_local_common+4(r5)
++ stwio r4,small_local_common+4(r5)
++ stwio r4,data_label-0x8000(r5)
++ stwio r4,big_external_data_label-0x8000(r5)
++ stwio r4,small_external_data_label-0x8000(r5)
++ stwio r4,big_external_common-0x8000(r5)
++ stwio r4,small_external_common-0x8000(r5)
++ stwio r4,big_local_common-0x8000(r5)
++ stwio r4,small_local_common-0x8000(r5)
+--- binutils-2.15/gas/testsuite/gas/nios2/sub.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/sub.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,10 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 sub
++
++# Test the add instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> sub r4,r4,r4
++
+--- binutils-2.15/gas/testsuite/gas/nios2/sub.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/sub.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,4 @@
++# Source file used to test the add and addi instructions.
++
++foo:
++ sub r4,r4,r4
+--- binutils-2.15/gas/testsuite/gas/nios2/sync.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/sync.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 sync
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section \.text:
++0+0000 <foo> sync
++
+--- binutils-2.15/gas/testsuite/gas/nios2/sync.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/sync.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,5 @@
++# Source file used to test the sync instructions
++foo:
++ sync
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/trap.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/trap.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,7 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 trap
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> trap
+--- binutils-2.15/gas/testsuite/gas/nios2/trap.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/trap.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,3 @@
++# Source file used to test the ret instructions
++foo:
++ trap
+--- binutils-2.15/gas/testsuite/gas/nios2/tret.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/tret.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 tret
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> eret
++
+--- binutils-2.15/gas/testsuite/gas/nios2/tret.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/tret.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,5 @@
++# Source file used to test the ret instructions
++foo:
++ eret
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/u16_symbol.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/u16_symbol.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,9 @@
++.global some_sym
++.global min
++.global max
++
++.set max, 0xffff
++.set min, 0
++.set some_sym, 0x1000
++
++
+--- binutils-2.15/gas/testsuite/gas/nios2/warn_noat.l 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/warn_noat.l 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,5 @@
++.*warn_noat.s: Assembler messages:
++.*warn_noat.s:2: Warning: Register at \(r1\) can sometimes be corrupted by assembler optimizations.
++Use .set noat to turn off those optimizations \(and this warning\).
++.*warn_noat.s:8: Warning: Register at \(r1\) can sometimes be corrupted by assembler optimizations.
++Use .set noat to turn off those optimizations \(and this warning\).
+--- binutils-2.15/gas/testsuite/gas/nios2/warn_noat.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/warn_noat.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,8 @@
++.set noat, 2 # This should not cause warning for at to be turned off
++add at, r2, r2
++.set noat # this should turn the warnings off
++add at, r2, r2
++.set at, 3 # this should not turn the warnings on
++add at, r2, r2
++.set at # this should turn the warnings on
++add at, r2, r2
+--- binutils-2.15/gas/testsuite/gas/nios2/warn_nobreak.l 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/warn_nobreak.l 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,9 @@
++.*warn_nobreak.s: Assembler messages:
++.*warn_nobreak.s:2: Warning: The debugger will corrupt ba \(r30\). If you don't need to debug this
++code then use .set nobreak to turn off this warning.
++.*warn_nobreak.s:3: Warning: The debugger will corrupt bt \(r25\). If you don't need to debug this
++code then use .set nobreak to turn off this warning.
++.*warn_nobreak.s:11: Warning: The debugger will corrupt ba \(r30\). If you don't need to debug this
++code then use .set nobreak to turn off this warning.
++.*warn_nobreak.s:12: Warning: The debugger will corrupt bt \(r25\). If you don't need to debug this
++code then use .set nobreak to turn off this warning.
+--- binutils-2.15/gas/testsuite/gas/nios2/warn_nobreak.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/warn_nobreak.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,12 @@
++.set nobreak , 2 # This should not cause warning for ba, bt to be turned off
++add ba, r2, r2
++add bt, r2, r2
++.set nobreak # this should turn the warnings off
++add ba, r3, r4
++add bt, r3, r4
++.set break, 3 # this should not turn the warnings on
++add ba, r3, r4
++add bt, r3, r4
++.set break # this should turn the warnings on
++add ba, r3, r4
++add bt, r3, r4
+--- binutils-2.15/gas/testsuite/gas/nios2/xor.d 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/xor.d 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,11 @@
++#objdump: -dr --prefix-addresses
++#name: NIOS2 xor
++
++# Test the nor instruction
++
++.*: +file format elf32-littlenios2
++
++Disassembly of section .text:
++0+0000 <[^>]*> xor r6,r8,r10
++0+0004 <[^>]*> xorhi r6,r7,65535
++0+0008 <[^>]*> xori r6,r7,65535
+--- binutils-2.15/gas/testsuite/gas/nios2/xor.s 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/gas/nios2/xor.s 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,7 @@
++# Source file used to test the nor instruction
++
++foo:
++ xor r6,r8,r10
++ xorhi r6,r7,0xffff
++ xori r6,r7,0xffff
++
+--- binutils-2.15/gas/testsuite/nios2_as_xfail.lst 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/gas/testsuite/nios2_as_xfail.lst 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,4 @@
++FAIL: vtable inherit0
++FAIL: vtable entry1
++
++
+--- binutils-2.15/include/bfdlink.h 2004-05-17 21:36:06.000000000 +0200
++++ binutils-2.15-nios2/include/bfdlink.h 2005-05-17 12:20:14.000000000 +0200
+@@ -688,4 +688,14 @@ struct bfd_elf_version_tree
+ struct bfd_elf_version_expr *prev, const char *sym);
+ };
+
++/* NG - There seems to be no way of getting link_info from the linker into
++ * bfd so that functions which aren't passed it can use it, and I need
++ * it so that gprel relocations work properly when generating srecs. This isn't
++ * right, but it works, and for the amount of work...*/
++#define bfd_set_link_info _bfd_set_link_info
++extern void _bfd_set_link_info (struct bfd_link_info *info);
++
++#define bfd_set_force_make_executable _bfd_set_force_make_executable
++extern void _bfd_set_force_make_executable (bfd_boolean force);
++
+ #endif
+--- binutils-2.15/include/dis-asm.h 2003-11-14 16:12:43.000000000 +0100
++++ binutils-2.15-nios2/include/dis-asm.h 2005-05-17 12:20:14.000000000 +0200
+@@ -247,6 +247,7 @@ extern int print_insn_sh64 (bfd_vma, di
+ extern int print_insn_sh64x_media (bfd_vma, disassemble_info *);
+ extern int print_insn_frv (bfd_vma, disassemble_info *);
+ extern int print_insn_iq2000 (bfd_vma, disassemble_info *);
++extern int print_insn_nios2 (bfd_vma, disassemble_info *);
+
+ extern disassembler_ftype arc_get_disassembler (void *);
+ extern disassembler_ftype cris_get_disassembler (bfd *);
+--- binutils-2.15/include/elf/common.h 2004-01-29 03:41:18.000000000 +0100
++++ binutils-2.15-nios2/include/elf/common.h 2005-05-17 12:20:14.000000000 +0200
+@@ -182,6 +182,8 @@
+ #define EM_IP2K 101 /* Ubicom IP2022 micro controller */
+ #define EM_MSP430 105 /* TI msp430 micro controller */
+
++#define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
++
+ /* If it is necessary to assign new unofficial EM_* values, please pick large
+ random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
+ with official or non-GNU unofficial values.
+--- binutils-2.15/include/elf/nios2.h 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/include/elf/nios2.h 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,65 @@
++/* Altera New Jersey ELF support for BFD
++
++ Copyright (C) 2003
++ by Nigel Gray (ngray@altera.com).
++
++This file is part of BFD, the Binary File Descriptor library.
++
++This program is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2 of the License, or
++(at your option) any later version.
++
++This program is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; if not, write to the Free Software
++Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
++
++/* This file holds definitions specific to the Altera New Jersey ELF ABI. Note
++ that most of this is not actually implemented by BFD. */
++
++#ifndef _ELF_NIOS2_H
++#define _ELF_NIOS2_H
++
++#include "elf/reloc-macros.h"
++
++/* the order of these numbers must match the order in
++ the elf_nios2_howto_table_rel table for the lookup
++ function to work properly */
++
++START_RELOC_NUMBERS (elf_nios2_reloc_type)
++ RELOC_NUMBER (R_NIOS2_NONE, 0)
++ RELOC_NUMBER (R_NIOS2_S16, 1)
++ RELOC_NUMBER (R_NIOS2_U16, 2)
++ RELOC_NUMBER (R_NIOS2_PCREL16, 3)
++ RELOC_NUMBER (R_NIOS2_CALL26, 4)
++ RELOC_NUMBER (R_NIOS2_IMM5, 5)
++ RELOC_NUMBER (R_NIOS2_CACHE_OPX, 6)
++ RELOC_NUMBER (R_NIOS2_IMM6, 7)
++ RELOC_NUMBER (R_NIOS2_IMM8, 8)
++ RELOC_NUMBER (R_NIOS2_HI16, 9)
++ RELOC_NUMBER (R_NIOS2_LO16, 10)
++ RELOC_NUMBER (R_NIOS2_HIADJ16, 11)
++ RELOC_NUMBER (R_NIOS2_BFD_RELOC_32, 12)
++ RELOC_NUMBER (R_NIOS2_BFD_RELOC_16, 13)
++ RELOC_NUMBER (R_NIOS2_BFD_RELOC_8, 14)
++ RELOC_NUMBER (R_NIOS2_GPREL, 15)
++ RELOC_NUMBER (R_NIOS2_GNU_VTINHERIT, 16)
++ RELOC_NUMBER (R_NIOS2_GNU_VTENTRY, 17)
++ RELOC_NUMBER (R_NIOS2_UJMP, 18)
++ RELOC_NUMBER (R_NIOS2_CJMP, 19)
++ RELOC_NUMBER (R_NIOS2_CALLR, 20)
++ RELOC_NUMBER (R_NIOS2_ALIGN, 21)
++ RELOC_NUMBER (R_NIOS2_ILLEGAL, 22)
++END_RELOC_NUMBERS (R_NIOS2_maxext)
++
++/* Processor specific section flags */
++
++/* This is used to mark gp-relative sections */
++#define SHF_NIOS2_GPREL 0x10000000
++
++#endif //_ELF_NIOS2_H
+--- binutils-2.15/include/opcode/nios2-isa.h 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/include/opcode/nios2-isa.h 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,1453 @@
++/* This file is automatically generated by gen_isa.pl - do not edit */
++
++#ifndef _NIOS2_ISA_H_
++#define _NIOS2_ISA_H_
++
++/* OP instruction opcode values (index is OP field) */
++#define NUM_OP_INSTS 64
++extern const char* op_names[NUM_OP_INSTS];
++
++/* OPX instruction opcode values (index is OPX field) */
++#define NUM_OPX_INSTS 64
++extern const char* opx_names[NUM_OPX_INSTS];
++
++/* Constants for instruction fields and ISA */
++#define BRETADDR_REGNUM 30
++#define BSTATUS_REG_LSB 2
++#define BSTATUS_REG_MMU_LSB 0
++#define BSTATUS_REG_MMU_MSB 2
++#define BSTATUS_REG_MMU_SZ 3
++#define BSTATUS_REG_MMU_MASK 0x7
++#define BSTATUS_REG_NO_MMU_LSB 0
++#define BSTATUS_REG_NO_MMU_MSB 0
++#define BSTATUS_REG_NO_MMU_SZ 1
++#define BSTATUS_REG_NO_MMU_MASK 0x1
++#define BSTATUS_REG_REGNUM 2
++#define BSTATUS_REG_SZ 3
++#define BSTATUS_REG_MASK 0x7
++#define COMPARE_OP_EQ 0x0
++#define COMPARE_OP_GE 0x1
++#define COMPARE_OP_LSB 3
++#define COMPARE_OP_LT 0x2
++#define COMPARE_OP_MSB 4
++#define COMPARE_OP_NE 0x3
++#define COMPARE_OP_SZ 2
++#define COMPARE_OP_MASK 0x3
++#define CPUID_REG_LSB 0
++#define CPUID_REG_MSB 31
++#define CPUID_REG_REGNUM 5
++#define CPUID_REG_SZ 32
++#define CPUID_REG_MASK 0xffffffff
++#define DATAPATH_LOG2_SZ 5
++#define DATAPATH_LOG2_MASK 0x1f
++#define DATAPATH_LSB 0
++#define DATAPATH_MSB 31
++#define DATAPATH_SZ 32
++#define DATAPATH_MASK 0xffffffff
++#define EMPTY_HBREAK_IW 4040762
++#define EMPTY_INTR_IW 3926074
++#define EMPTY_NOP_IW 100410
++#define EMPTY_RET_IW 4160759866
++#define ERETADDR_REGNUM 29
++#define ESTATUS_REG_LSB 0
++#define ESTATUS_REG_MMU_LSB 0
++#define ESTATUS_REG_MMU_MSB 2
++#define ESTATUS_REG_MMU_SZ 3
++#define ESTATUS_REG_MMU_MASK 0x7
++#define ESTATUS_REG_MSB 2
++#define ESTATUS_REG_NO_MMU_LSB 0
++#define ESTATUS_REG_NO_MMU_MSB 0
++#define ESTATUS_REG_NO_MMU_SZ 1
++#define ESTATUS_REG_NO_MMU_MASK 0x1
++#define ESTATUS_REG_REGNUM 1
++#define ESTATUS_REG_SZ 3
++#define ESTATUS_REG_MASK 0x7
++#define FP_REGNUM 28
++#define GP_REGNUM 26
++#define IENABLE_REG_LSB 0
++#define IENABLE_REG_MSB 31
++#define IENABLE_REG_REGNUM 3
++#define IENABLE_REG_SZ 32
++#define IENABLE_REG_MASK 0xffffffff
++#define IPENDING_REG_LSB 0
++#define IPENDING_REG_MSB 31
++#define IPENDING_REG_REGNUM 4
++#define IPENDING_REG_SZ 32
++#define IPENDING_REG_MASK 0xffffffff
++#define IW_A_LSB 27
++#define IW_A_MSB 31
++#define IW_A_SZ 5
++#define IW_A_MASK 0x1f
++#define IW_B_LSB 22
++#define IW_B_MSB 26
++#define IW_B_SZ 5
++#define IW_B_MASK 0x1f
++#define IW_C_LSB 17
++#define IW_C_MSB 21
++#define IW_C_SZ 5
++#define IW_C_MASK 0x1f
++#define IW_CONTROL_REGNUM_BASE 0
++#define IW_CONTROL_REGNUM_LSB 6
++#define IW_CONTROL_REGNUM_MSB 9
++#define IW_CONTROL_REGNUM_SZ 4
++#define IW_CONTROL_REGNUM_MASK 0xf
++#define IW_CUSTOM_N_LSB 6
++#define IW_CUSTOM_N_MSB 13
++#define IW_CUSTOM_N_SZ 8
++#define IW_CUSTOM_N_MASK 0xff
++#define IW_CUSTOM_READRA_LSB 16
++#define IW_CUSTOM_READRA_MSB 16
++#define IW_CUSTOM_READRA_SZ 1
++#define IW_CUSTOM_READRA_MASK 0x1
++#define IW_CUSTOM_READRB_LSB 15
++#define IW_CUSTOM_READRB_MSB 15
++#define IW_CUSTOM_READRB_SZ 1
++#define IW_CUSTOM_READRB_MASK 0x1
++#define IW_CUSTOM_WRITERC_LSB 14
++#define IW_CUSTOM_WRITERC_MSB 14
++#define IW_CUSTOM_WRITERC_SZ 1
++#define IW_CUSTOM_WRITERC_MASK 0x1
++#define IW_IMM16_LSB 6
++#define IW_IMM16_MSB 21
++#define IW_IMM16_SZ 16
++#define IW_IMM16_MASK 0xffff
++#define IW_IMM26_LSB 6
++#define IW_IMM26_MSB 31
++#define IW_IMM26_SZ 26
++#define IW_IMM26_MASK 0x3ffffff
++#define IW_MEMSZ_BYTE 0x0
++#define IW_MEMSZ_HWORD 0x1
++#define IW_MEMSZ_LSB 3
++#define IW_MEMSZ_MSB 4
++#define IW_MEMSZ_SZ 2
++#define IW_MEMSZ_MASK 0x3
++#define IW_MEMSZ_WORD 0x2
++#define IW_MEMSZ_WORD_MSB 0x1
++#define IW_OP_LSB 0
++#define IW_OP_MSB 5
++#define IW_OP_SZ 6
++#define IW_OP_MASK 0x3f
++#define IW_OPX_LSB 11
++#define IW_OPX_MSB 16
++#define IW_OPX_SZ 6
++#define IW_OPX_MASK 0x3f
++#define IW_SHIFT_IMM5_LSB 6
++#define IW_SHIFT_IMM5_MSB 10
++#define IW_SHIFT_IMM5_SZ 5
++#define IW_SHIFT_IMM5_MASK 0x1f
++#define IW_SZ 32
++#define IW_MASK 0xffffffff
++#define IW_TRAP_BREAK_IMM5_LSB 6
++#define IW_TRAP_BREAK_IMM5_MSB 10
++#define IW_TRAP_BREAK_IMM5_SZ 5
++#define IW_TRAP_BREAK_IMM5_MASK 0x1f
++#define JMP_CALLR_VS_RET_IS_RET 0
++#define JMP_CALLR_VS_RET_OPX_BIT 3
++#define LOGIC_OP_AND 0x1
++#define LOGIC_OP_LSB 3
++#define LOGIC_OP_MSB 4
++#define LOGIC_OP_NOR 0x0
++#define LOGIC_OP_OR 0x2
++#define LOGIC_OP_SZ 2
++#define LOGIC_OP_MASK 0x3
++#define LOGIC_OP_XOR 0x3
++#define MMU_ADDR_BYPASS_TLB 0x3
++#define MMU_ADDR_BYPASS_TLB_CACHEABLE 0x0
++#define MMU_ADDR_BYPASS_TLB_CACHEABLE_LSB 29
++#define MMU_ADDR_BYPASS_TLB_CACHEABLE_MSB 29
++#define MMU_ADDR_BYPASS_TLB_CACHEABLE_SZ 1
++#define MMU_ADDR_BYPASS_TLB_CACHEABLE_MASK 0x1
++#define MMU_ADDR_BYPASS_TLB_LSB 30
++#define MMU_ADDR_BYPASS_TLB_MSB 31
++#define MMU_ADDR_BYPASS_TLB_PADDR_LSB 0
++#define MMU_ADDR_BYPASS_TLB_PADDR_MSB 28
++#define MMU_ADDR_BYPASS_TLB_PADDR_SZ 29
++#define MMU_ADDR_BYPASS_TLB_PADDR_MASK 0x1fffffff
++#define MMU_ADDR_BYPASS_TLB_SZ 2
++#define MMU_ADDR_BYPASS_TLB_MASK 0x3
++#define MMU_ADDR_IO_REGION 0x7
++#define MMU_ADDR_IO_REGION_LSB 29
++#define MMU_ADDR_IO_REGION_MSB 31
++#define MMU_ADDR_IO_REGION_SZ 3
++#define MMU_ADDR_IO_REGION_MASK 0x7
++#define MMU_ADDR_KERNEL_MMU_REGION 0x2
++#define MMU_ADDR_KERNEL_MMU_REGION_LSB 30
++#define MMU_ADDR_KERNEL_MMU_REGION_MSB 31
++#define MMU_ADDR_KERNEL_MMU_REGION_SZ 2
++#define MMU_ADDR_KERNEL_MMU_REGION_MASK 0x3
++#define MMU_ADDR_KERNEL_REGION 0x6
++#define MMU_ADDR_KERNEL_REGION_LSB 29
++#define MMU_ADDR_KERNEL_REGION_MSB 31
++#define MMU_ADDR_KERNEL_REGION_SZ 3
++#define MMU_ADDR_KERNEL_REGION_MASK 0x7
++#define MMU_ADDR_PAGE_OFFSET_LSB 0
++#define MMU_ADDR_PAGE_OFFSET_MSB 11
++#define MMU_ADDR_PAGE_OFFSET_SZ 12
++#define MMU_ADDR_PAGE_OFFSET_MASK 0xfff
++#define MMU_ADDR_PFN_LSB 12
++#define MMU_ADDR_PFN_MSB 31
++#define MMU_ADDR_PFN_SZ 20
++#define MMU_ADDR_PFN_MASK 0xfffff
++#define MMU_ADDR_USER_REGION 0x0
++#define MMU_ADDR_USER_REGION_LSB 31
++#define MMU_ADDR_USER_REGION_MSB 31
++#define MMU_ADDR_USER_REGION_SZ 1
++#define MMU_ADDR_USER_REGION_MASK 0x1
++#define MMU_ADDR_VPN_LSB 12
++#define MMU_ADDR_VPN_MSB 31
++#define MMU_ADDR_VPN_SZ 20
++#define MMU_ADDR_VPN_MASK 0xfffff
++#define PERF_CNT_REG_CLR_LSB 1
++#define PERF_CNT_REG_CLR_MSB 1
++#define PERF_CNT_REG_CLR_SZ 1
++#define PERF_CNT_REG_CLR_MASK 0x1
++#define PERF_CNT_REG_EN_LSB 0
++#define PERF_CNT_REG_EN_MSB 0
++#define PERF_CNT_REG_EN_SZ 1
++#define PERF_CNT_REG_EN_MASK 0x1
++#define PERF_CNT_REG_LSB 0
++#define PERF_CNT_REG_MSB 1
++#define PERF_CNT_REG_REGNUM 7
++#define PERF_CNT_REG_SZ 2
++#define PERF_CNT_REG_MASK 0x3
++#define PTEADDR_REG_LSB 0
++#define PTEADDR_REG_MSB 31
++#define PTEADDR_REG_PTBASE_LSB 22
++#define PTEADDR_REG_PTBASE_MSB 31
++#define PTEADDR_REG_PTBASE_SZ 10
++#define PTEADDR_REG_PTBASE_MASK 0x3ff
++#define PTEADDR_REG_REGNUM 8
++#define PTEADDR_REG_RSV_LSB 0
++#define PTEADDR_REG_RSV_MSB 1
++#define PTEADDR_REG_RSV_SZ 2
++#define PTEADDR_REG_RSV_MASK 0x3
++#define PTEADDR_REG_SZ 32
++#define PTEADDR_REG_MASK 0xffffffff
++#define PTEADDR_REG_VPN_LSB 2
++#define PTEADDR_REG_VPN_MSB 21
++#define PTEADDR_REG_VPN_SZ 20
++#define PTEADDR_REG_VPN_MASK 0xfffff
++#define REGNUM_SZ 5
++#define REGNUM_MASK 0x1f
++#define RETADDR_REGNUM 31
++#define RF_ADDR_SZ 5
++#define RF_ADDR_MASK 0x1f
++#define RF_NUM_REG 32
++#define SIM_REG_LSB 0
++#define SIM_REG_MSB 3
++#define SIM_REG_REGNUM 6
++#define SIM_REG_SHOW_DTLB_LSB 2
++#define SIM_REG_SHOW_DTLB_MSB 2
++#define SIM_REG_SHOW_DTLB_SZ 1
++#define SIM_REG_SHOW_DTLB_MASK 0x1
++#define SIM_REG_SHOW_ITLB_LSB 1
++#define SIM_REG_SHOW_ITLB_MSB 1
++#define SIM_REG_SHOW_ITLB_SZ 1
++#define SIM_REG_SHOW_ITLB_MASK 0x1
++#define SIM_REG_SHOW_MMU_REGS_LSB 3
++#define SIM_REG_SHOW_MMU_REGS_MSB 3
++#define SIM_REG_SHOW_MMU_REGS_SZ 1
++#define SIM_REG_SHOW_MMU_REGS_MASK 0x1
++#define SIM_REG_STOP_LSB 0
++#define SIM_REG_STOP_MSB 0
++#define SIM_REG_STOP_SZ 1
++#define SIM_REG_STOP_MASK 0x1
++#define SIM_REG_SZ 4
++#define SIM_REG_MASK 0xf
++#define SP_REGNUM 27
++#define STATUS_REG_EH_LSB 2
++#define STATUS_REG_EH_MSB 2
++#define STATUS_REG_EH_SZ 1
++#define STATUS_REG_EH_MASK 0x1
++#define STATUS_REG_LSB 0
++#define STATUS_REG_MMU_LSB 0
++#define STATUS_REG_MMU_MSB 2
++#define STATUS_REG_MMU_SZ 3
++#define STATUS_REG_MMU_MASK 0x7
++#define STATUS_REG_MSB 2
++#define STATUS_REG_NO_MMU_LSB 0
++#define STATUS_REG_NO_MMU_MSB 0
++#define STATUS_REG_NO_MMU_SZ 1
++#define STATUS_REG_NO_MMU_MASK 0x1
++#define STATUS_REG_PIE_LSB 0
++#define STATUS_REG_PIE_MSB 0
++#define STATUS_REG_PIE_SZ 1
++#define STATUS_REG_PIE_MASK 0x1
++#define STATUS_REG_REGNUM 0
++#define STATUS_REG_SZ 3
++#define STATUS_REG_MASK 0x7
++#define STATUS_REG_U_LSB 1
++#define STATUS_REG_U_MSB 1
++#define STATUS_REG_U_SZ 1
++#define STATUS_REG_U_MASK 0x1
++#define TLB_MAX_ENTRIES 1024
++#define TLB_MAX_LINES 512
++#define TLB_MAX_PID_SZ 14
++#define TLB_MAX_PID_MASK 0x3fff
++#define TLB_MAX_PTR_SZ 10
++#define TLB_MAX_PTR_MASK 0x3ff
++#define TLB_MAX_WAYS 8
++#define TLB_MIN_PID_SZ 1
++#define TLB_MIN_PID_MASK 0x1
++#define TLB_MIN_PTR_SZ 7
++#define TLB_MIN_PTR_MASK 0x7f
++#define TLB_MIN_WAYS 2
++#define TLBACC_REG_C_LSB 24
++#define TLBACC_REG_C_MSB 24
++#define TLBACC_REG_C_SZ 1
++#define TLBACC_REG_C_MASK 0x1
++#define TLBACC_REG_G_LSB 20
++#define TLBACC_REG_G_MSB 20
++#define TLBACC_REG_G_SZ 1
++#define TLBACC_REG_G_MASK 0x1
++#define TLBACC_REG_LSB 0
++#define TLBACC_REG_MSB 24
++#define TLBACC_REG_PFN_LSB 0
++#define TLBACC_REG_PFN_MSB 19
++#define TLBACC_REG_PFN_SZ 20
++#define TLBACC_REG_PFN_MASK 0xfffff
++#define TLBACC_REG_R_LSB 23
++#define TLBACC_REG_R_MSB 23
++#define TLBACC_REG_R_SZ 1
++#define TLBACC_REG_R_MASK 0x1
++#define TLBACC_REG_REGNUM 9
++#define TLBACC_REG_SZ 25
++#define TLBACC_REG_MASK 0x1ffffff
++#define TLBACC_REG_W_LSB 22
++#define TLBACC_REG_W_MSB 22
++#define TLBACC_REG_W_SZ 1
++#define TLBACC_REG_W_MASK 0x1
++#define TLBACC_REG_X_LSB 21
++#define TLBACC_REG_X_MSB 21
++#define TLBACC_REG_X_SZ 1
++#define TLBACC_REG_X_MASK 0x1
++#define TLBMISC_REG_BAD_LSB 2
++#define TLBMISC_REG_BAD_MSB 2
++#define TLBMISC_REG_BAD_SZ 1
++#define TLBMISC_REG_BAD_MASK 0x1
++#define TLBMISC_REG_D_LSB 0
++#define TLBMISC_REG_D_MSB 0
++#define TLBMISC_REG_D_SZ 1
++#define TLBMISC_REG_D_MASK 0x1
++#define TLBMISC_REG_DBL_LSB 3
++#define TLBMISC_REG_DBL_MSB 3
++#define TLBMISC_REG_DBL_SZ 1
++#define TLBMISC_REG_DBL_MASK 0x1
++#define TLBMISC_REG_LSB 0
++#define TLBMISC_REG_MSB 22
++#define TLBMISC_REG_PERM_LSB 1
++#define TLBMISC_REG_PERM_MSB 1
++#define TLBMISC_REG_PERM_SZ 1
++#define TLBMISC_REG_PERM_MASK 0x1
++#define TLBMISC_REG_PID_LSB 4
++#define TLBMISC_REG_PID_MSB 17
++#define TLBMISC_REG_PID_SZ 14
++#define TLBMISC_REG_PID_MASK 0x3fff
++#define TLBMISC_REG_RD_LSB 23
++#define TLBMISC_REG_RD_MSB 23
++#define TLBMISC_REG_RD_SZ 1
++#define TLBMISC_REG_RD_MASK 0x1
++#define TLBMISC_REG_REGNUM 10
++#define TLBMISC_REG_RSV_LSB 18
++#define TLBMISC_REG_RSV_MSB 19
++#define TLBMISC_REG_RSV_SZ 2
++#define TLBMISC_REG_RSV_MASK 0x3
++#define TLBMISC_REG_SZ 23
++#define TLBMISC_REG_MASK 0x7fffff
++#define TLBMISC_REG_WAY_LSB 20
++#define TLBMISC_REG_WAY_MSB 22
++#define TLBMISC_REG_WAY_SZ 3
++#define TLBMISC_REG_WAY_MASK 0x7
++
++/* Macros to extract instruction fields */
++#define GET_IW_A(Iw) \
++ (((Iw) >> IW_A_LSB) & IW_A_MASK)
++#define SET_IW_A(Iw, Val) \
++ Iw = (((Iw) & (~(IW_A_MASK << IW_A_LSB))) | \
++ (((Val) & IW_A_MASK) << IW_A_LSB))
++#define GET_IW_B(Iw) \
++ (((Iw) >> IW_B_LSB) & IW_B_MASK)
++#define SET_IW_B(Iw, Val) \
++ Iw = (((Iw) & (~(IW_B_MASK << IW_B_LSB))) | \
++ (((Val) & IW_B_MASK) << IW_B_LSB))
++#define GET_IW_C(Iw) \
++ (((Iw) >> IW_C_LSB) & IW_C_MASK)
++#define SET_IW_C(Iw, Val) \
++ Iw = (((Iw) & (~(IW_C_MASK << IW_C_LSB))) | \
++ (((Val) & IW_C_MASK) << IW_C_LSB))
++#define GET_IW_CONTROL_REGNUM(Iw) \
++ (((Iw) >> IW_CONTROL_REGNUM_LSB) & IW_CONTROL_REGNUM_MASK)
++#define SET_IW_CONTROL_REGNUM(Iw, Val) \
++ Iw = (((Iw) & (~(IW_CONTROL_REGNUM_MASK << IW_CONTROL_REGNUM_LSB))) | \
++ (((Val) & IW_CONTROL_REGNUM_MASK) << IW_CONTROL_REGNUM_LSB))
++#define GET_IW_CUSTOM_N(Iw) \
++ (((Iw) >> IW_CUSTOM_N_LSB) & IW_CUSTOM_N_MASK)
++#define SET_IW_CUSTOM_N(Iw, Val) \
++ Iw = (((Iw) & (~(IW_CUSTOM_N_MASK << IW_CUSTOM_N_LSB))) | \
++ (((Val) & IW_CUSTOM_N_MASK) << IW_CUSTOM_N_LSB))
++#define GET_IW_CUSTOM_READRA(Iw) \
++ (((Iw) >> IW_CUSTOM_READRA_LSB) & IW_CUSTOM_READRA_MASK)
++#define SET_IW_CUSTOM_READRA(Iw, Val) \
++ Iw = (((Iw) & (~(IW_CUSTOM_READRA_MASK << IW_CUSTOM_READRA_LSB))) | \
++ (((Val) & IW_CUSTOM_READRA_MASK) << IW_CUSTOM_READRA_LSB))
++#define GET_IW_CUSTOM_READRB(Iw) \
++ (((Iw) >> IW_CUSTOM_READRB_LSB) & IW_CUSTOM_READRB_MASK)
++#define SET_IW_CUSTOM_READRB(Iw, Val) \
++ Iw = (((Iw) & (~(IW_CUSTOM_READRB_MASK << IW_CUSTOM_READRB_LSB))) | \
++ (((Val) & IW_CUSTOM_READRB_MASK) << IW_CUSTOM_READRB_LSB))
++#define GET_IW_CUSTOM_WRITERC(Iw) \
++ (((Iw) >> IW_CUSTOM_WRITERC_LSB) & IW_CUSTOM_WRITERC_MASK)
++#define SET_IW_CUSTOM_WRITERC(Iw, Val) \
++ Iw = (((Iw) & (~(IW_CUSTOM_WRITERC_MASK << IW_CUSTOM_WRITERC_LSB))) | \
++ (((Val) & IW_CUSTOM_WRITERC_MASK) << IW_CUSTOM_WRITERC_LSB))
++#define GET_IW_IMM16(Iw) \
++ (((Iw) >> IW_IMM16_LSB) & IW_IMM16_MASK)
++#define SET_IW_IMM16(Iw, Val) \
++ Iw = (((Iw) & (~(IW_IMM16_MASK << IW_IMM16_LSB))) | \
++ (((Val) & IW_IMM16_MASK) << IW_IMM16_LSB))
++#define GET_IW_IMM26(Iw) \
++ (((Iw) >> IW_IMM26_LSB) & IW_IMM26_MASK)
++#define SET_IW_IMM26(Iw, Val) \
++ Iw = (((Iw) & (~(IW_IMM26_MASK << IW_IMM26_LSB))) | \
++ (((Val) & IW_IMM26_MASK) << IW_IMM26_LSB))
++#define GET_IW_MEMSZ(Iw) \
++ (((Iw) >> IW_MEMSZ_LSB) & IW_MEMSZ_MASK)
++#define SET_IW_MEMSZ(Iw, Val) \
++ Iw = (((Iw) & (~(IW_MEMSZ_MASK << IW_MEMSZ_LSB))) | \
++ (((Val) & IW_MEMSZ_MASK) << IW_MEMSZ_LSB))
++#define GET_IW_OP(Iw) \
++ (((Iw) >> IW_OP_LSB) & IW_OP_MASK)
++#define SET_IW_OP(Iw, Val) \
++ Iw = (((Iw) & (~(IW_OP_MASK << IW_OP_LSB))) | \
++ (((Val) & IW_OP_MASK) << IW_OP_LSB))
++#define GET_IW_OPX(Iw) \
++ (((Iw) >> IW_OPX_LSB) & IW_OPX_MASK)
++#define SET_IW_OPX(Iw, Val) \
++ Iw = (((Iw) & (~(IW_OPX_MASK << IW_OPX_LSB))) | \
++ (((Val) & IW_OPX_MASK) << IW_OPX_LSB))
++#define GET_IW_SHIFT_IMM5(Iw) \
++ (((Iw) >> IW_SHIFT_IMM5_LSB) & IW_SHIFT_IMM5_MASK)
++#define SET_IW_SHIFT_IMM5(Iw, Val) \
++ Iw = (((Iw) & (~(IW_SHIFT_IMM5_MASK << IW_SHIFT_IMM5_LSB))) | \
++ (((Val) & IW_SHIFT_IMM5_MASK) << IW_SHIFT_IMM5_LSB))
++#define GET_IW_TRAP_BREAK_IMM5(Iw) \
++ (((Iw) >> IW_TRAP_BREAK_IMM5_LSB) & IW_TRAP_BREAK_IMM5_MASK)
++#define SET_IW_TRAP_BREAK_IMM5(Iw, Val) \
++ Iw = (((Iw) & (~(IW_TRAP_BREAK_IMM5_MASK << IW_TRAP_BREAK_IMM5_LSB))) | \
++ (((Val) & IW_TRAP_BREAK_IMM5_MASK) << IW_TRAP_BREAK_IMM5_LSB))
++
++/* Macros to extract control register fields */
++#define GET_BSTATUS_REG_MMU(Reg) \
++ (((Reg) >> BSTATUS_REG_MMU_LSB) & BSTATUS_REG_MMU_MASK)
++#define SET_BSTATUS_REG_MMU(Reg, Val) \
++ Reg = (((Reg) & (~(BSTATUS_REG_MMU_MASK << BSTATUS_REG_MMU_LSB))) | \
++ (((Val) & BSTATUS_REG_MMU_MASK) << BSTATUS_REG_MMU_LSB))
++#define GET_BSTATUS_REG_NO_MMU(Reg) \
++ (((Reg) >> BSTATUS_REG_NO_MMU_LSB) & BSTATUS_REG_NO_MMU_MASK)
++#define SET_BSTATUS_REG_NO_MMU(Reg, Val) \
++ Reg = (((Reg) & (~(BSTATUS_REG_NO_MMU_MASK << BSTATUS_REG_NO_MMU_LSB))) | \
++ (((Val) & BSTATUS_REG_NO_MMU_MASK) << BSTATUS_REG_NO_MMU_LSB))
++#define GET_ESTATUS_REG_MMU(Reg) \
++ (((Reg) >> ESTATUS_REG_MMU_LSB) & ESTATUS_REG_MMU_MASK)
++#define SET_ESTATUS_REG_MMU(Reg, Val) \
++ Reg = (((Reg) & (~(ESTATUS_REG_MMU_MASK << ESTATUS_REG_MMU_LSB))) | \
++ (((Val) & ESTATUS_REG_MMU_MASK) << ESTATUS_REG_MMU_LSB))
++#define GET_ESTATUS_REG_NO_MMU(Reg) \
++ (((Reg) >> ESTATUS_REG_NO_MMU_LSB) & ESTATUS_REG_NO_MMU_MASK)
++#define SET_ESTATUS_REG_NO_MMU(Reg, Val) \
++ Reg = (((Reg) & (~(ESTATUS_REG_NO_MMU_MASK << ESTATUS_REG_NO_MMU_LSB))) | \
++ (((Val) & ESTATUS_REG_NO_MMU_MASK) << ESTATUS_REG_NO_MMU_LSB))
++#define GET_PERF_CNT_REG_CLR(Reg) \
++ (((Reg) >> PERF_CNT_REG_CLR_LSB) & PERF_CNT_REG_CLR_MASK)
++#define SET_PERF_CNT_REG_CLR(Reg, Val) \
++ Reg = (((Reg) & (~(PERF_CNT_REG_CLR_MASK << PERF_CNT_REG_CLR_LSB))) | \
++ (((Val) & PERF_CNT_REG_CLR_MASK) << PERF_CNT_REG_CLR_LSB))
++#define GET_PERF_CNT_REG_EN(Reg) \
++ (((Reg) >> PERF_CNT_REG_EN_LSB) & PERF_CNT_REG_EN_MASK)
++#define SET_PERF_CNT_REG_EN(Reg, Val) \
++ Reg = (((Reg) & (~(PERF_CNT_REG_EN_MASK << PERF_CNT_REG_EN_LSB))) | \
++ (((Val) & PERF_CNT_REG_EN_MASK) << PERF_CNT_REG_EN_LSB))
++#define GET_PTEADDR_REG_PTBASE(Reg) \
++ (((Reg) >> PTEADDR_REG_PTBASE_LSB) & PTEADDR_REG_PTBASE_MASK)
++#define SET_PTEADDR_REG_PTBASE(Reg, Val) \
++ Reg = (((Reg) & (~(PTEADDR_REG_PTBASE_MASK << PTEADDR_REG_PTBASE_LSB))) | \
++ (((Val) & PTEADDR_REG_PTBASE_MASK) << PTEADDR_REG_PTBASE_LSB))
++#define GET_PTEADDR_REG_RSV(Reg) \
++ (((Reg) >> PTEADDR_REG_RSV_LSB) & PTEADDR_REG_RSV_MASK)
++#define SET_PTEADDR_REG_RSV(Reg, Val) \
++ Reg = (((Reg) & (~(PTEADDR_REG_RSV_MASK << PTEADDR_REG_RSV_LSB))) | \
++ (((Val) & PTEADDR_REG_RSV_MASK) << PTEADDR_REG_RSV_LSB))
++#define GET_PTEADDR_REG_VPN(Reg) \
++ (((Reg) >> PTEADDR_REG_VPN_LSB) & PTEADDR_REG_VPN_MASK)
++#define SET_PTEADDR_REG_VPN(Reg, Val) \
++ Reg = (((Reg) & (~(PTEADDR_REG_VPN_MASK << PTEADDR_REG_VPN_LSB))) | \
++ (((Val) & PTEADDR_REG_VPN_MASK) << PTEADDR_REG_VPN_LSB))
++#define GET_SIM_REG_SHOW_DTLB(Reg) \
++ (((Reg) >> SIM_REG_SHOW_DTLB_LSB) & SIM_REG_SHOW_DTLB_MASK)
++#define SET_SIM_REG_SHOW_DTLB(Reg, Val) \
++ Reg = (((Reg) & (~(SIM_REG_SHOW_DTLB_MASK << SIM_REG_SHOW_DTLB_LSB))) | \
++ (((Val) & SIM_REG_SHOW_DTLB_MASK) << SIM_REG_SHOW_DTLB_LSB))
++#define GET_SIM_REG_SHOW_ITLB(Reg) \
++ (((Reg) >> SIM_REG_SHOW_ITLB_LSB) & SIM_REG_SHOW_ITLB_MASK)
++#define SET_SIM_REG_SHOW_ITLB(Reg, Val) \
++ Reg = (((Reg) & (~(SIM_REG_SHOW_ITLB_MASK << SIM_REG_SHOW_ITLB_LSB))) | \
++ (((Val) & SIM_REG_SHOW_ITLB_MASK) << SIM_REG_SHOW_ITLB_LSB))
++#define GET_SIM_REG_SHOW_MMU_REGS(Reg) \
++ (((Reg) >> SIM_REG_SHOW_MMU_REGS_LSB) & SIM_REG_SHOW_MMU_REGS_MASK)
++#define SET_SIM_REG_SHOW_MMU_REGS(Reg, Val) \
++ Reg = (((Reg) & (~(SIM_REG_SHOW_MMU_REGS_MASK << SIM_REG_SHOW_MMU_REGS_LSB))) | \
++ (((Val) & SIM_REG_SHOW_MMU_REGS_MASK) << SIM_REG_SHOW_MMU_REGS_LSB))
++#define GET_SIM_REG_STOP(Reg) \
++ (((Reg) >> SIM_REG_STOP_LSB) & SIM_REG_STOP_MASK)
++#define SET_SIM_REG_STOP(Reg, Val) \
++ Reg = (((Reg) & (~(SIM_REG_STOP_MASK << SIM_REG_STOP_LSB))) | \
++ (((Val) & SIM_REG_STOP_MASK) << SIM_REG_STOP_LSB))
++#define GET_STATUS_REG_EH(Reg) \
++ (((Reg) >> STATUS_REG_EH_LSB) & STATUS_REG_EH_MASK)
++#define SET_STATUS_REG_EH(Reg, Val) \
++ Reg = (((Reg) & (~(STATUS_REG_EH_MASK << STATUS_REG_EH_LSB))) | \
++ (((Val) & STATUS_REG_EH_MASK) << STATUS_REG_EH_LSB))
++#define GET_STATUS_REG_MMU(Reg) \
++ (((Reg) >> STATUS_REG_MMU_LSB) & STATUS_REG_MMU_MASK)
++#define SET_STATUS_REG_MMU(Reg, Val) \
++ Reg = (((Reg) & (~(STATUS_REG_MMU_MASK << STATUS_REG_MMU_LSB))) | \
++ (((Val) & STATUS_REG_MMU_MASK) << STATUS_REG_MMU_LSB))
++#define GET_STATUS_REG_NO_MMU(Reg) \
++ (((Reg) >> STATUS_REG_NO_MMU_LSB) & STATUS_REG_NO_MMU_MASK)
++#define SET_STATUS_REG_NO_MMU(Reg, Val) \
++ Reg = (((Reg) & (~(STATUS_REG_NO_MMU_MASK << STATUS_REG_NO_MMU_LSB))) | \
++ (((Val) & STATUS_REG_NO_MMU_MASK) << STATUS_REG_NO_MMU_LSB))
++#define GET_STATUS_REG_PIE(Reg) \
++ (((Reg) >> STATUS_REG_PIE_LSB) & STATUS_REG_PIE_MASK)
++#define SET_STATUS_REG_PIE(Reg, Val) \
++ Reg = (((Reg) & (~(STATUS_REG_PIE_MASK << STATUS_REG_PIE_LSB))) | \
++ (((Val) & STATUS_REG_PIE_MASK) << STATUS_REG_PIE_LSB))
++#define GET_STATUS_REG_U(Reg) \
++ (((Reg) >> STATUS_REG_U_LSB) & STATUS_REG_U_MASK)
++#define SET_STATUS_REG_U(Reg, Val) \
++ Reg = (((Reg) & (~(STATUS_REG_U_MASK << STATUS_REG_U_LSB))) | \
++ (((Val) & STATUS_REG_U_MASK) << STATUS_REG_U_LSB))
++#define GET_TLBACC_REG_C(Reg) \
++ (((Reg) >> TLBACC_REG_C_LSB) & TLBACC_REG_C_MASK)
++#define SET_TLBACC_REG_C(Reg, Val) \
++ Reg = (((Reg) & (~(TLBACC_REG_C_MASK << TLBACC_REG_C_LSB))) | \
++ (((Val) & TLBACC_REG_C_MASK) << TLBACC_REG_C_LSB))
++#define GET_TLBACC_REG_G(Reg) \
++ (((Reg) >> TLBACC_REG_G_LSB) & TLBACC_REG_G_MASK)
++#define SET_TLBACC_REG_G(Reg, Val) \
++ Reg = (((Reg) & (~(TLBACC_REG_G_MASK << TLBACC_REG_G_LSB))) | \
++ (((Val) & TLBACC_REG_G_MASK) << TLBACC_REG_G_LSB))
++#define GET_TLBACC_REG_PFN(Reg) \
++ (((Reg) >> TLBACC_REG_PFN_LSB) & TLBACC_REG_PFN_MASK)
++#define SET_TLBACC_REG_PFN(Reg, Val) \
++ Reg = (((Reg) & (~(TLBACC_REG_PFN_MASK << TLBACC_REG_PFN_LSB))) | \
++ (((Val) & TLBACC_REG_PFN_MASK) << TLBACC_REG_PFN_LSB))
++#define GET_TLBACC_REG_R(Reg) \
++ (((Reg) >> TLBACC_REG_R_LSB) & TLBACC_REG_R_MASK)
++#define SET_TLBACC_REG_R(Reg, Val) \
++ Reg = (((Reg) & (~(TLBACC_REG_R_MASK << TLBACC_REG_R_LSB))) | \
++ (((Val) & TLBACC_REG_R_MASK) << TLBACC_REG_R_LSB))
++#define GET_TLBACC_REG_W(Reg) \
++ (((Reg) >> TLBACC_REG_W_LSB) & TLBACC_REG_W_MASK)
++#define SET_TLBACC_REG_W(Reg, Val) \
++ Reg = (((Reg) & (~(TLBACC_REG_W_MASK << TLBACC_REG_W_LSB))) | \
++ (((Val) & TLBACC_REG_W_MASK) << TLBACC_REG_W_LSB))
++#define GET_TLBACC_REG_X(Reg) \
++ (((Reg) >> TLBACC_REG_X_LSB) & TLBACC_REG_X_MASK)
++#define SET_TLBACC_REG_X(Reg, Val) \
++ Reg = (((Reg) & (~(TLBACC_REG_X_MASK << TLBACC_REG_X_LSB))) | \
++ (((Val) & TLBACC_REG_X_MASK) << TLBACC_REG_X_LSB))
++#define GET_TLBMISC_REG_BAD(Reg) \
++ (((Reg) >> TLBMISC_REG_BAD_LSB) & TLBMISC_REG_BAD_MASK)
++#define SET_TLBMISC_REG_BAD(Reg, Val) \
++ Reg = (((Reg) & (~(TLBMISC_REG_BAD_MASK << TLBMISC_REG_BAD_LSB))) | \
++ (((Val) & TLBMISC_REG_BAD_MASK) << TLBMISC_REG_BAD_LSB))
++#define GET_TLBMISC_REG_D(Reg) \
++ (((Reg) >> TLBMISC_REG_D_LSB) & TLBMISC_REG_D_MASK)
++#define SET_TLBMISC_REG_D(Reg, Val) \
++ Reg = (((Reg) & (~(TLBMISC_REG_D_MASK << TLBMISC_REG_D_LSB))) | \
++ (((Val) & TLBMISC_REG_D_MASK) << TLBMISC_REG_D_LSB))
++#define GET_TLBMISC_REG_DBL(Reg) \
++ (((Reg) >> TLBMISC_REG_DBL_LSB) & TLBMISC_REG_DBL_MASK)
++#define SET_TLBMISC_REG_DBL(Reg, Val) \
++ Reg = (((Reg) & (~(TLBMISC_REG_DBL_MASK << TLBMISC_REG_DBL_LSB))) | \
++ (((Val) & TLBMISC_REG_DBL_MASK) << TLBMISC_REG_DBL_LSB))
++#define GET_TLBMISC_REG_PERM(Reg) \
++ (((Reg) >> TLBMISC_REG_PERM_LSB) & TLBMISC_REG_PERM_MASK)
++#define SET_TLBMISC_REG_PERM(Reg, Val) \
++ Reg = (((Reg) & (~(TLBMISC_REG_PERM_MASK << TLBMISC_REG_PERM_LSB))) | \
++ (((Val) & TLBMISC_REG_PERM_MASK) << TLBMISC_REG_PERM_LSB))
++#define GET_TLBMISC_REG_PID(Reg) \
++ (((Reg) >> TLBMISC_REG_PID_LSB) & TLBMISC_REG_PID_MASK)
++#define SET_TLBMISC_REG_PID(Reg, Val) \
++ Reg = (((Reg) & (~(TLBMISC_REG_PID_MASK << TLBMISC_REG_PID_LSB))) | \
++ (((Val) & TLBMISC_REG_PID_MASK) << TLBMISC_REG_PID_LSB))
++#define GET_TLBMISC_REG_RD(Reg) \
++ (((Reg) >> TLBMISC_REG_RD_LSB) & TLBMISC_REG_RD_MASK)
++#define SET_TLBMISC_REG_RD(Reg, Val) \
++ Reg = (((Reg) & (~(TLBMISC_REG_RD_MASK << TLBMISC_REG_RD_LSB))) | \
++ (((Val) & TLBMISC_REG_RD_MASK) << TLBMISC_REG_RD_LSB))
++#define GET_TLBMISC_REG_RSV(Reg) \
++ (((Reg) >> TLBMISC_REG_RSV_LSB) & TLBMISC_REG_RSV_MASK)
++#define SET_TLBMISC_REG_RSV(Reg, Val) \
++ Reg = (((Reg) & (~(TLBMISC_REG_RSV_MASK << TLBMISC_REG_RSV_LSB))) | \
++ (((Val) & TLBMISC_REG_RSV_MASK) << TLBMISC_REG_RSV_LSB))
++#define GET_TLBMISC_REG_WAY(Reg) \
++ (((Reg) >> TLBMISC_REG_WAY_LSB) & TLBMISC_REG_WAY_MASK)
++#define SET_TLBMISC_REG_WAY(Reg, Val) \
++ Reg = (((Reg) & (~(TLBMISC_REG_WAY_MASK << TLBMISC_REG_WAY_LSB))) | \
++ (((Val) & TLBMISC_REG_WAY_MASK) << TLBMISC_REG_WAY_LSB))
++
++/* Macros to extract MMU fields */
++#define GET_MMU_ADDR_BYPASS_TLB_CACHEABLE(Addr) \
++ (((Addr) >> MMU_ADDR_BYPASS_TLB_CACHEABLE_LSB) & MMU_ADDR_BYPASS_TLB_CACHEABLE_MASK)
++#define SET_MMU_ADDR_BYPASS_TLB_CACHEABLE(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_BYPASS_TLB_CACHEABLE_MASK << MMU_ADDR_BYPASS_TLB_CACHEABLE_LSB))) | \
++ (((Val) & MMU_ADDR_BYPASS_TLB_CACHEABLE_MASK) << MMU_ADDR_BYPASS_TLB_CACHEABLE_LSB))
++#define GET_MMU_ADDR_BYPASS_TLB(Addr) \
++ (((Addr) >> MMU_ADDR_BYPASS_TLB_LSB) & MMU_ADDR_BYPASS_TLB_MASK)
++#define SET_MMU_ADDR_BYPASS_TLB(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_BYPASS_TLB_MASK << MMU_ADDR_BYPASS_TLB_LSB))) | \
++ (((Val) & MMU_ADDR_BYPASS_TLB_MASK) << MMU_ADDR_BYPASS_TLB_LSB))
++#define GET_MMU_ADDR_BYPASS_TLB_PADDR(Addr) \
++ (((Addr) >> MMU_ADDR_BYPASS_TLB_PADDR_LSB) & MMU_ADDR_BYPASS_TLB_PADDR_MASK)
++#define SET_MMU_ADDR_BYPASS_TLB_PADDR(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_BYPASS_TLB_PADDR_MASK << MMU_ADDR_BYPASS_TLB_PADDR_LSB))) | \
++ (((Val) & MMU_ADDR_BYPASS_TLB_PADDR_MASK) << MMU_ADDR_BYPASS_TLB_PADDR_LSB))
++#define GET_MMU_ADDR_IO_REGION(Addr) \
++ (((Addr) >> MMU_ADDR_IO_REGION_LSB) & MMU_ADDR_IO_REGION_MASK)
++#define SET_MMU_ADDR_IO_REGION(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_IO_REGION_MASK << MMU_ADDR_IO_REGION_LSB))) | \
++ (((Val) & MMU_ADDR_IO_REGION_MASK) << MMU_ADDR_IO_REGION_LSB))
++#define GET_MMU_ADDR_KERNEL_MMU_REGION(Addr) \
++ (((Addr) >> MMU_ADDR_KERNEL_MMU_REGION_LSB) & MMU_ADDR_KERNEL_MMU_REGION_MASK)
++#define SET_MMU_ADDR_KERNEL_MMU_REGION(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_KERNEL_MMU_REGION_MASK << MMU_ADDR_KERNEL_MMU_REGION_LSB))) | \
++ (((Val) & MMU_ADDR_KERNEL_MMU_REGION_MASK) << MMU_ADDR_KERNEL_MMU_REGION_LSB))
++#define GET_MMU_ADDR_KERNEL_REGION(Addr) \
++ (((Addr) >> MMU_ADDR_KERNEL_REGION_LSB) & MMU_ADDR_KERNEL_REGION_MASK)
++#define SET_MMU_ADDR_KERNEL_REGION(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_KERNEL_REGION_MASK << MMU_ADDR_KERNEL_REGION_LSB))) | \
++ (((Val) & MMU_ADDR_KERNEL_REGION_MASK) << MMU_ADDR_KERNEL_REGION_LSB))
++#define GET_MMU_ADDR_PAGE_OFFSET(Addr) \
++ (((Addr) >> MMU_ADDR_PAGE_OFFSET_LSB) & MMU_ADDR_PAGE_OFFSET_MASK)
++#define SET_MMU_ADDR_PAGE_OFFSET(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_PAGE_OFFSET_MASK << MMU_ADDR_PAGE_OFFSET_LSB))) | \
++ (((Val) & MMU_ADDR_PAGE_OFFSET_MASK) << MMU_ADDR_PAGE_OFFSET_LSB))
++#define GET_MMU_ADDR_PFN(Addr) \
++ (((Addr) >> MMU_ADDR_PFN_LSB) & MMU_ADDR_PFN_MASK)
++#define SET_MMU_ADDR_PFN(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_PFN_MASK << MMU_ADDR_PFN_LSB))) | \
++ (((Val) & MMU_ADDR_PFN_MASK) << MMU_ADDR_PFN_LSB))
++#define GET_MMU_ADDR_USER_REGION(Addr) \
++ (((Addr) >> MMU_ADDR_USER_REGION_LSB) & MMU_ADDR_USER_REGION_MASK)
++#define SET_MMU_ADDR_USER_REGION(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_USER_REGION_MASK << MMU_ADDR_USER_REGION_LSB))) | \
++ (((Val) & MMU_ADDR_USER_REGION_MASK) << MMU_ADDR_USER_REGION_LSB))
++#define GET_MMU_ADDR_VPN(Addr) \
++ (((Addr) >> MMU_ADDR_VPN_LSB) & MMU_ADDR_VPN_MASK)
++#define SET_MMU_ADDR_VPN(Addr, Val) \
++ Addr = (((Addr) & (~(MMU_ADDR_VPN_MASK << MMU_ADDR_VPN_LSB))) | \
++ (((Val) & MMU_ADDR_VPN_MASK) << MMU_ADDR_VPN_LSB))
++
++/* OP instruction values */
++#define OP_ADDI 4
++#define OP_ANDHI 44
++#define OP_ANDI 12
++#define OP_BEQ 38
++#define OP_BGE 14
++#define OP_BGEU 46
++#define OP_BLT 22
++#define OP_BLTU 54
++#define OP_BNE 30
++#define OP_BR 6
++#define OP_CALL 0
++#define OP_CMPEQI 32
++#define OP_CMPGEI 8
++#define OP_CMPGEUI 40
++#define OP_CMPLTI 16
++#define OP_CMPLTUI 48
++#define OP_CMPNEI 24
++#define OP_CUSTOM 50
++#define OP_FLUSHD 59
++#define OP_INITD 51
++#define OP_LDB 7
++#define OP_LDBIO 39
++#define OP_LDBU 3
++#define OP_LDBUIO 35
++#define OP_LDH 15
++#define OP_LDHIO 47
++#define OP_LDHU 11
++#define OP_LDHUIO 43
++#define OP_LDW 23
++#define OP_LDWIO 55
++#define OP_MULI 36
++#define OP_OPX 58
++#define OP_ORHI 52
++#define OP_ORI 20
++#define OP_STB 5
++#define OP_STBIO 37
++#define OP_STH 13
++#define OP_STHIO 45
++#define OP_STW 21
++#define OP_STWIO 53
++#define OP_XORHI 60
++#define OP_XORI 28
++
++/* OPX instruction values */
++#define OPX_ADD 49
++#define OPX_AND 14
++#define OPX_BREAK 52
++#define OPX_BRET 9
++#define OPX_CALLR 29
++#define OPX_CMPEQ 32
++#define OPX_CMPGE 8
++#define OPX_CMPGEU 40
++#define OPX_CMPLT 16
++#define OPX_CMPLTU 48
++#define OPX_CMPNE 24
++#define OPX_DIV 37
++#define OPX_DIVU 36
++#define OPX_ERET 1
++#define OPX_FLUSHI 12
++#define OPX_FLUSHP 4
++#define OPX_HBREAK 53
++#define OPX_INITI 41
++#define OPX_INTR 61
++#define OPX_JMP 13
++#define OPX_MUL 39
++#define OPX_MULXSS 31
++#define OPX_MULXSU 23
++#define OPX_MULXUU 7
++#define OPX_NEXTPC 28
++#define OPX_NOR 6
++#define OPX_OR 22
++#define OPX_RDCTL 38
++#define OPX_RET 5
++#define OPX_ROL 3
++#define OPX_ROLI 2
++#define OPX_ROR 11
++#define OPX_SLL 19
++#define OPX_SLLI 18
++#define OPX_SRA 59
++#define OPX_SRAI 58
++#define OPX_SRL 27
++#define OPX_SRLI 26
++#define OPX_SUB 57
++#define OPX_SYNC 54
++#define OPX_TRAP 45
++#define OPX_WRCTL 46
++#define OPX_XOR 30
++
++/* Macros to detect sub-opcode instructions */
++#define IS_OPX_INST(Iw) (GET_IW_OP(Iw) == OP_OPX)
++#define IS_CUSTOM_INST(Iw) (GET_IW_OP(Iw) == OP_CUSTOM)
++
++/* Instruction property macros */
++#define IW_PROP_RESERVED_OP(Iw) (0)
++
++#define IW_PROP_RESERVED_OPX(Iw) (0)
++
++#define IW_PROP_RESERVED(Iw) (0)
++
++#define IW_PROP_FLUSH_PIPE(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_FLUSHP) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_BRET) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_JMP_INDIRECT_NON_TRAP(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_jmp_indirect_non_trap[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_jmp_indirect_non_trap[64];
++
++#define IW_PROP_JMP_INDIRECT(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_jmp_indirect[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_jmp_indirect[64];
++
++#define IW_PROP_JMP_DIRECT(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_CALL)) \
++ ) \
++ \
++)
++
++#define IW_PROP_MUL_LSW(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_MULI)) || \
++ ((GET_IW_OPX((Iw)) == OPX_MUL) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_MULX(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_mulx[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_mulx[64];
++
++#define IW_PROP_MUL(Iw) ( \
++ (op_prop_mul[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_mul[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_mul[64];
++extern unsigned char opx_prop_mul[64];
++
++#define IW_PROP_DIV_UNSIGNED(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_DIVU) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_DIV_SIGNED(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_DIV) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_DIV(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_DIVU) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_DIV) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_UNIMPLEMENTED(Iw) (0)
++
++#define IW_PROP_IMPLICIT_DST_RETADDR(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_CALL)) \
++ ) \
++ \
++)
++
++#define IW_PROP_IMPLICIT_DST_ERETADDR(Iw) (0)
++
++#define IW_PROP_EXCEPTION(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_TRAP) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_INTR) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_BREAK(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_BREAK) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_HBREAK) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_WR_CTL_REG(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_wr_ctl_reg[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_wr_ctl_reg[64];
++
++#define IW_PROP_UNCOND_CTI_NON_BR(Iw) ( \
++ (op_prop_uncond_cti_non_br[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_uncond_cti_non_br[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_uncond_cti_non_br[64];
++extern unsigned char opx_prop_uncond_cti_non_br[64];
++
++#define IW_PROP_RETADDR(Iw) ( \
++ (op_prop_retaddr[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_retaddr[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_retaddr[64];
++extern unsigned char opx_prop_retaddr[64];
++
++#define IW_PROP_SHIFT_LEFT(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_SLLI) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_SLL) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_SHIFT_LOGICAL(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_shift_logical[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_shift_logical[64];
++
++#define IW_PROP_ROT_LEFT(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_ROLI) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_ROL) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_SHIFT_ROT_LEFT(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_shift_rot_left[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_shift_rot_left[64];
++
++#define IW_PROP_SHIFT_RIGHT_LOGICAL(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_SRLI) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_SRL) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_SHIFT_RIGHT_ARITH(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_SRAI) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_SRA) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_SHIFT_RIGHT(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_shift_right[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_shift_right[64];
++
++#define IW_PROP_ROT_RIGHT(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_ROR) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_SHIFT_ROT_RIGHT(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_shift_rot_right[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_shift_rot_right[64];
++
++#define IW_PROP_SHIFT_ROT(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_shift_rot[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_shift_rot[64];
++
++#define IW_PROP_SHIFT_ROT_IMM(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_shift_rot_imm[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_shift_rot_imm[64];
++
++#define IW_PROP_ROTATE(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_rotate[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_rotate[64];
++
++#define IW_PROP_LOGIC_REG(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_logic_reg[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_logic_reg[64];
++
++#define IW_PROP_LOGIC_HI_IMM16(Iw) ( \
++ (op_prop_logic_hi_imm16[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_logic_hi_imm16[64];
++
++#define IW_PROP_LOGIC_LO_IMM16(Iw) ( \
++ (op_prop_logic_lo_imm16[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_logic_lo_imm16[64];
++
++#define IW_PROP_LOGIC_IMM16(Iw) ( \
++ (op_prop_logic_imm16[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_logic_imm16[64];
++
++#define IW_PROP_LOGIC(Iw) ( \
++ (op_prop_logic[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_logic[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_logic[64];
++extern unsigned char opx_prop_logic[64];
++
++#define IW_PROP_UNSIGNED_LO_IMM16(Iw) ( \
++ (op_prop_unsigned_lo_imm16[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_unsigned_lo_imm16[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_unsigned_lo_imm16[64];
++extern unsigned char opx_prop_unsigned_lo_imm16[64];
++
++#define IW_PROP_ARITH_IMM16(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_ADDI)) || \
++ ((GET_IW_OP((Iw)) == OP_MULI)) \
++ ) \
++ \
++)
++
++#define IW_PROP_CMP_IMM16_NO_CALL(Iw) ( \
++ (op_prop_cmp_imm16_no_call[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_cmp_imm16_no_call[64];
++
++#define IW_PROP_CMP_IMM16_WITH_CALL(Iw) ( \
++ (op_prop_cmp_imm16_with_call[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_cmp_imm16_with_call[64];
++
++#define IW_PROP_CMP_REG(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_cmp_reg[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_cmp_reg[64];
++
++#define IW_PROP_SRC_IMM16(Iw) ( \
++ (op_prop_src_imm16[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_src_imm16[64];
++
++#define IW_PROP_SRC_IMM5(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_src_imm5[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_src_imm5[64];
++
++#define IW_PROP_CMP_WITH_LT(Iw) ( \
++ (op_prop_cmp_with_lt[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_cmp_with_lt[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_cmp_with_lt[64];
++extern unsigned char opx_prop_cmp_with_lt[64];
++
++#define IW_PROP_CMP_WITH_EQ(Iw) ( \
++ (op_prop_cmp_with_eq[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_cmp_with_eq[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_cmp_with_eq[64];
++extern unsigned char opx_prop_cmp_with_eq[64];
++
++#define IW_PROP_CMP_WITH_GE(Iw) ( \
++ (op_prop_cmp_with_ge[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_cmp_with_ge[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_cmp_with_ge[64];
++extern unsigned char opx_prop_cmp_with_ge[64];
++
++#define IW_PROP_CMP_WITH_NE(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_CMPNEI)) || \
++ ((GET_IW_OPX((Iw)) == OPX_CMPNE) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_CMP_ALU_SIGNED(Iw) ( \
++ (op_prop_cmp_alu_signed[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_cmp_alu_signed[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_cmp_alu_signed[64];
++extern unsigned char opx_prop_cmp_alu_signed[64];
++
++#define IW_PROP_CMP(Iw) ( \
++ (op_prop_cmp[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_cmp[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_cmp[64];
++extern unsigned char opx_prop_cmp[64];
++
++#define IW_PROP_BR_WITH_LT(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_BLT)) || \
++ ((GET_IW_OP((Iw)) == OP_BLTU)) \
++ ) \
++ \
++)
++
++#define IW_PROP_BR_WITH_GE(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_BGE)) || \
++ ((GET_IW_OP((Iw)) == OP_BGEU)) \
++ ) \
++ \
++)
++
++#define IW_PROP_BR_WITH_EQ(Iw) ( \
++ (op_prop_br_with_eq[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_br_with_eq[64];
++
++#define IW_PROP_BR_WITH_NE(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_BNE)) \
++ ) \
++ \
++)
++
++#define IW_PROP_BR_ALU_SIGNED(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_BGE)) || \
++ ((GET_IW_OP((Iw)) == OP_BLT)) \
++ ) \
++ \
++)
++
++#define IW_PROP_BR_COND(Iw) ( \
++ (op_prop_br_cond[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_br_cond[64];
++
++#define IW_PROP_BR_UNCOND(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_BR)) \
++ ) \
++ \
++)
++
++#define IW_PROP_BR(Iw) ( \
++ (op_prop_br[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_br[64];
++
++#define IW_PROP_ALU_SUB(Iw) ( \
++ (op_prop_alu_sub[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_alu_sub[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_alu_sub[64];
++extern unsigned char opx_prop_alu_sub[64];
++
++#define IW_PROP_FORCE_XOR(Iw) ( \
++ (op_prop_force_xor[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_force_xor[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_force_xor[64];
++extern unsigned char opx_prop_force_xor[64];
++
++#define IW_PROP_LOAD8(Iw) ( \
++ (op_prop_load8[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_load8[64];
++
++#define IW_PROP_LOAD16(Iw) ( \
++ (op_prop_load16[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_load16[64];
++
++#define IW_PROP_LOAD32(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_LDW)) || \
++ ((GET_IW_OP((Iw)) == OP_LDWIO)) \
++ ) \
++ \
++)
++
++#define IW_PROP_LOAD_SIGNED(Iw) ( \
++ (op_prop_load_signed[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_load_signed[64];
++
++#define IW_PROP_LOAD_UNSIGNED(Iw) ( \
++ (op_prop_load_unsigned[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_load_unsigned[64];
++
++#define IW_PROP_LOAD(Iw) ( \
++ (op_prop_load[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_load[64];
++
++#define IW_PROP_LOAD_INITD_FLUSHD(Iw) ( \
++ (op_prop_load_initd_flushd[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_load_initd_flushd[64];
++
++#define IW_PROP_LOAD_NON_IO(Iw) ( \
++ (op_prop_load_non_io[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_load_non_io[64];
++
++#define IW_PROP_STORE8(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_STB)) || \
++ ((GET_IW_OP((Iw)) == OP_STBIO)) \
++ ) \
++ \
++)
++
++#define IW_PROP_STORE16(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_STH)) || \
++ ((GET_IW_OP((Iw)) == OP_STHIO)) \
++ ) \
++ \
++)
++
++#define IW_PROP_STORE32(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_STW)) || \
++ ((GET_IW_OP((Iw)) == OP_STWIO)) \
++ ) \
++ \
++)
++
++#define IW_PROP_STORE(Iw) ( \
++ (op_prop_store[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_store[64];
++
++#define IW_PROP_STORE_NON_IO(Iw) ( \
++ (op_prop_store_non_io[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_store_non_io[64];
++
++#define IW_PROP_MEM(Iw) ( \
++ (op_prop_mem[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_mem[64];
++
++#define IW_PROP_INITD(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_INITD)) \
++ ) \
++ \
++)
++
++#define IW_PROP_FLUSHD(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_FLUSHD)) \
++ ) \
++ \
++)
++
++#define IW_PROP_INITD_FLUSHD(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_INITD)) || \
++ ((GET_IW_OP((Iw)) == OP_FLUSHD)) \
++ ) \
++ \
++)
++
++#define IW_PROP_INITI_FLUSHI(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_INITI) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_FLUSHI) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_LOAD_IO(Iw) ( \
++ (op_prop_load_io[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_load_io[64];
++
++#define IW_PROP_STORE_IO(Iw) ( \
++ (op_prop_store_io[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_store_io[64];
++
++#define IW_PROP_MEM_IO(Iw) ( \
++ (op_prop_mem_io[GET_IW_OP(Iw)]))
++extern unsigned char op_prop_mem_io[64];
++
++#define IW_PROP_ARITH(Iw) ( \
++ (op_prop_arith[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_arith[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_arith[64];
++extern unsigned char opx_prop_arith[64];
++
++#define IW_PROP_A_NOT_SRC(Iw) ( \
++ ( \
++ ((GET_IW_OP((Iw)) == OP_CALL)) \
++ ) \
++ || (IS_CUSTOM_INST(Iw) && !GET_IW_CUSTOM_READRA(Iw)) \
++)
++
++#define IW_PROP_B_NOT_SRC(Iw) ( \
++ (op_prop_b_not_src[GET_IW_OP(Iw)]) \
++ || (IS_CUSTOM_INST(Iw) && !GET_IW_CUSTOM_READRB(Iw)))
++extern unsigned char op_prop_b_not_src[64];
++
++#define IW_PROP_IGNORE_DST(Iw) ( \
++ (op_prop_ignore_dst[GET_IW_OP(Iw)]) \
++ || (IS_CUSTOM_INST(Iw) && !GET_IW_CUSTOM_WRITERC(Iw)))
++extern unsigned char op_prop_ignore_dst[64];
++
++#define IW_PROP_SRC2_IS_IMM(Iw) ( \
++ (op_prop_src2_is_imm[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_src2_is_imm[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_src2_is_imm[64];
++extern unsigned char opx_prop_src2_is_imm[64];
++
++#define IW_PROP_WRCTL_INST(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_WRCTL) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_RDCTL_INST(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_RDCTL) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_MUL_SRC1_SIGNED(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_MULXSS) && IS_OPX_INST(Iw)) || \
++ ((GET_IW_OPX((Iw)) == OPX_MULXSU) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_MUL_SRC2_SIGNED(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_MULXSS) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_MUL_SHIFT_SRC1_SIGNED(Iw) ( \
++ (IS_OPX_INST(Iw) && opx_prop_mul_shift_src1_signed[GET_IW_OPX(Iw)]))
++extern unsigned char opx_prop_mul_shift_src1_signed[64];
++
++#define IW_PROP_MUL_SHIFT_SRC2_SIGNED(Iw) ( \
++ ( \
++ ((GET_IW_OPX((Iw)) == OPX_MULXSS) && IS_OPX_INST(Iw)) \
++ ) \
++ \
++)
++
++#define IW_PROP_DONT_DISPLAY_DST_REG(Iw) ( \
++ (op_prop_dont_display_dst_reg[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_dont_display_dst_reg[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_dont_display_dst_reg[64];
++extern unsigned char opx_prop_dont_display_dst_reg[64];
++
++#define IW_PROP_DONT_DISPLAY_SRC1_REG(Iw) ( \
++ (op_prop_dont_display_src1_reg[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_dont_display_src1_reg[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_dont_display_src1_reg[64];
++extern unsigned char opx_prop_dont_display_src1_reg[64];
++
++#define IW_PROP_DONT_DISPLAY_SRC2_REG(Iw) ( \
++ (op_prop_dont_display_src2_reg[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_dont_display_src2_reg[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_dont_display_src2_reg[64];
++extern unsigned char opx_prop_dont_display_src2_reg[64];
++
++#define IW_PROP_SRC1_NO_X(Iw) ( \
++ (op_prop_src1_no_x[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_src1_no_x[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_src1_no_x[64];
++extern unsigned char opx_prop_src1_no_x[64];
++
++#define IW_PROP_SRC2_NO_X(Iw) ( \
++ (op_prop_src2_no_x[GET_IW_OP(Iw)] || \
++ (IS_OPX_INST(Iw) && opx_prop_src2_no_x[GET_IW_OPX(Iw)])))
++extern unsigned char op_prop_src2_no_x[64];
++extern unsigned char opx_prop_src2_no_x[64];
++
++/* Instruction information entry */
++typedef struct {
++ const char* name; /* Assembly-language instruction name */
++ int instType; /* INST_TYPE_OP or INST_TYPE_OPX */
++ unsigned opcode; /* Value of instruction word OP/OPX field */
++} Nios2InstInfo;
++
++/* Instruction types */
++#define INST_TYPE_OP 0
++#define INST_TYPE_OPX 1
++
++/* Canonical instruction codes independent of encoding */
++#define CALL_INST_CODE 0
++#define LDBU_INST_CODE 1
++#define ADDI_INST_CODE 2
++#define STB_INST_CODE 3
++#define BR_INST_CODE 4
++#define LDB_INST_CODE 5
++#define CMPGEI_INST_CODE 6
++#define LDHU_INST_CODE 7
++#define ANDI_INST_CODE 8
++#define STH_INST_CODE 9
++#define BGE_INST_CODE 10
++#define LDH_INST_CODE 11
++#define CMPLTI_INST_CODE 12
++#define ORI_INST_CODE 13
++#define STW_INST_CODE 14
++#define BLT_INST_CODE 15
++#define LDW_INST_CODE 16
++#define CMPNEI_INST_CODE 17
++#define XORI_INST_CODE 18
++#define BNE_INST_CODE 19
++#define CMPEQI_INST_CODE 20
++#define LDBUIO_INST_CODE 21
++#define MULI_INST_CODE 22
++#define STBIO_INST_CODE 23
++#define BEQ_INST_CODE 24
++#define LDBIO_INST_CODE 25
++#define CMPGEUI_INST_CODE 26
++#define LDHUIO_INST_CODE 27
++#define ANDHI_INST_CODE 28
++#define STHIO_INST_CODE 29
++#define BGEU_INST_CODE 30
++#define LDHIO_INST_CODE 31
++#define CMPLTUI_INST_CODE 32
++#define CUSTOM_INST_CODE 33
++#define INITD_INST_CODE 34
++#define ORHI_INST_CODE 35
++#define STWIO_INST_CODE 36
++#define BLTU_INST_CODE 37
++#define LDWIO_INST_CODE 38
++#define FLUSHD_INST_CODE 39
++#define XORHI_INST_CODE 40
++#define ERET_INST_CODE 41
++#define ROLI_INST_CODE 42
++#define ROL_INST_CODE 43
++#define FLUSHP_INST_CODE 44
++#define RET_INST_CODE 45
++#define NOR_INST_CODE 46
++#define MULXUU_INST_CODE 47
++#define CMPGE_INST_CODE 48
++#define BRET_INST_CODE 49
++#define ROR_INST_CODE 50
++#define FLUSHI_INST_CODE 51
++#define JMP_INST_CODE 52
++#define AND_INST_CODE 53
++#define CMPLT_INST_CODE 54
++#define SLLI_INST_CODE 55
++#define SLL_INST_CODE 56
++#define OR_INST_CODE 57
++#define MULXSU_INST_CODE 58
++#define CMPNE_INST_CODE 59
++#define SRLI_INST_CODE 60
++#define SRL_INST_CODE 61
++#define NEXTPC_INST_CODE 62
++#define CALLR_INST_CODE 63
++#define XOR_INST_CODE 64
++#define MULXSS_INST_CODE 65
++#define CMPEQ_INST_CODE 66
++#define DIVU_INST_CODE 67
++#define DIV_INST_CODE 68
++#define RDCTL_INST_CODE 69
++#define MUL_INST_CODE 70
++#define CMPGEU_INST_CODE 71
++#define INITI_INST_CODE 72
++#define TRAP_INST_CODE 73
++#define WRCTL_INST_CODE 74
++#define CMPLTU_INST_CODE 75
++#define ADD_INST_CODE 76
++#define BREAK_INST_CODE 77
++#define HBREAK_INST_CODE 78
++#define SYNC_INST_CODE 79
++#define SUB_INST_CODE 80
++#define SRAI_INST_CODE 81
++#define SRA_INST_CODE 82
++#define INTR_INST_CODE 83
++#define RSV_INST_CODE 84
++#define NUM_NIOS2_INST_CODES 85
++
++extern Nios2InstInfo nios2InstInfo[NUM_NIOS2_INST_CODES];
++
++/* Returns the instruction code given the 32-bit instruction word */
++#define GET_INST_CODE(Iw) \
++ (IS_OPX_INST(Iw) ? opxToInstCode[GET_IW_OPX(Iw)] : opToInstCode[GET_IW_OP(Iw)])
++extern int opToInstCode[64];
++extern int opxToInstCode[64];
++
++//
++// MMU Memory Region Macros
++//
++#define isMmuUserRegion(Vaddr) \
++ (GET_MMU_ADDR_USER_REGION(Vaddr) == MMU_ADDR_USER_REGION)
++#define isMmuKernelMmuRegion(Vaddr) \
++ (GET_MMU_ADDR_KERNEL_MMU_REGION(Vaddr) == MMU_ADDR_KERNEL_MMU_REGION)
++#define isMmuKernelRegion(Vaddr) \
++ (GET_MMU_ADDR_KERNEL_REGION(Vaddr) == MMU_ADDR_KERNEL_REGION)
++#define isMmuIORegion(Vaddr) \
++ (GET_MMU_ADDR_IO_REGION(Vaddr) == MMU_ADDR_IO_REGION)
++
++// Does this virtual address bypass the TLB?
++#define vaddrBypassTlb(Vaddr) \
++ (GET_MMU_ADDR_BYPASS_TLB(Vaddr) == MMU_ADDR_BYPASS_TLB)
++
++// If TLB is bypassed, is the address cacheable or uncachable.
++#define vaddrBypassTlbCacheable(Vaddr) \
++ (GET_MMU_ADDR_BYPASS_TLB_CACHEABLE(Vaddr) == MMU_ADDR_BYPASS_TLB_CACHEABLE)
++
++// Compute physical address for regions that bypass the TLB.
++// Just need to clear some top bits.
++#define bypassTlbVaddrToPaddr(Vaddr) \
++ ((Vaddr) & (MMU_ADDR_BYPASS_TLB_PADDR_MASK << MMU_ADDR_BYPASS_TLB_PADDR_LSB))
++
++// Will the physical address fit in the Kernel/IO region virtual address space?
++#define fitsInKernelRegion(Paddr) \
++ (GET_MMU_ADDR_KERNEL_REGION(Paddr) == 0)
++#define fitsInIORegion(Paddr) \
++ (GET_MMU_ADDR_IO_REGION(Paddr) == 0)
++
++// Convert a physical address to a Kernel/IO region virtual address.
++#define paddrToKernelRegionVaddr(Paddr) \
++ ((Paddr) | (MMU_ADDR_KERNEL_REGION << MMU_ADDR_KERNEL_REGION_LSB))
++#define paddrToIORegionVaddr(Paddr) \
++ ((Paddr) | (MMU_ADDR_IO_REGION << MMU_ADDR_IO_REGION_LSB))
++
++// Convert a virtual address to a Kernel/IO region virtual address.
++// Uses bypassTlbVaddrToPaddr to clear top bits.
++#define vaddrToKernelRegionVaddr(Vaddr) \
++ paddrToKernelRegionVaddr(bypassTlbVaddrToPaddr(Vaddr))
++#define vaddrToIORegionVaddr(Vaddr) \
++ paddrToIORegionVaddr(bypassTlbVaddrToPaddr(Vaddr))
++
++// Convert between VPN/PFN and virtual/physical addresses.
++#define vpnToVaddr(Vpn) ((Vpn) << MMU_ADDR_VPN_LSB)
++#define pfnToPaddr(Pfn) ((Pfn) << MMU_ADDR_PFN_LSB)
++#define vaddrToVpn(Vaddr) GET_MMU_ADDR_VPN(Vaddr)
++#define paddrToPfn(Paddr) GET_MMU_ADDR_PFN(Paddr)
++
++
++#endif /* _NIOS2_ISA_H_ */
+--- binutils-2.15/include/opcode/nios2.h 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/include/opcode/nios2.h 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,357 @@
++/* nios2.h. Altera New Jersey opcode list for GAS, the GNU assembler.
++
++ Copyright (C) 2003
++ by Nigel Gray (ngray@altera.com).
++
++This file is part of GDB, GAS, and the GNU binutils.
++
++GDB, GAS, and the GNU binutils are free software; you can redistribute
++them and/or modify them under the terms of the GNU General Public
++License as published by the Free Software Foundation; either version
++1, or (at your option) any later version.
++
++GDB, GAS, and the GNU binutils are distributed in the hope that they
++will be useful, but WITHOUT ANY WARRANTY; without even the implied
++warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
++the GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this file; see the file COPYING. If not, write to the Free
++Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
++
++#ifndef _NIOS2_H_
++#define _NIOS2_H_
++
++
++/****************************************************************************
++ * This file contains structures, bit masks and shift counts used
++ * by the GNU toolchain to define the New Jersey instruction set and
++ * access various opcode fields.
++ ****************************************************************************/
++
++enum overflow_type
++{
++ call_target_overflow = 0,
++ branch_target_overflow,
++ address_offset_overflow,
++ signed_immed16_overflow,
++ unsigned_immed16_overflow,
++ unsigned_immed5_overflow,
++ custom_opcode_overflow,
++ no_overflow
++};
++
++/*---------------------------------------------------------------------------
++ This structure holds information for a particular instruction
++ ---------------------------------------------------------------------------*/
++
++/* match When assembling, this
++ opcode is modified by the arguments to produce the actual opcode
++ that is used. If pinfo is INSN_MACRO, then this is 0. */
++
++/* mask If pinfo is not INSN_MACRO, then this is a bit mask for the
++ relevant portions of the opcode when disassembling. If the
++ actual opcode anded with the match field equals the opcode field,
++ then we have found the correct instruction. If pinfo is
++ INSN_MACRO, then this field is the macro identifier. */
++
++/* For a macro, this is INSN_MACRO. Otherwise, it is a collection
++ of bits describing the instruction, notably any relevant hazard
++ information. */
++
++struct nios2_opcode
++{
++ const char *name; /* The name of the instruction. */
++ const char *args; /* A string describing the arguments for this instruction. */
++ const char *args_test; /* Like args, but with an extra argument for the expected opcode */
++ unsigned long num_args; /* the number of arguments the instruction takes */
++ unsigned long match; /* The basic opcode for the instruction. */
++ unsigned long mask; /* mask for the opcode field of the instruction */
++ unsigned long pinfo; /* is this a real instruction or instruction macro */
++ enum overflow_type overflow_msg; /* msg template used to generate informative message when fixup overflows */
++};
++
++/* This value is used in the nios2_opcode.pinfo field to indicate that the instruction
++ is a macro or pseudo-op. This requires special treatment by the assembler, and is
++ used by the disassembler to determine whether to check for a nop */
++#define NIOS2_INSN_MACRO 0x80000000
++#define NIOS2_INSN_MACRO_MOV 0x80000001
++#define NIOS2_INSN_MACRO_MOVI 0x80000002
++#define NIOS2_INSN_MACRO_MOVIA 0x80000004
++
++#define NIOS2_INSN_RELAXABLE 0x40000000
++#define NIOS2_INSN_UBRANCH 0x00000010
++#define NIOS2_INSN_CBRANCH 0x00000020
++#define NIOS2_INSN_CALL 0x00000040
++
++#define NIOS2_INSN_ADDI 0x00000080
++#define NIOS2_INSN_ANDI 0x00000100
++#define NIOS2_INSN_ORI 0x00000200
++#define NIOS2_INSN_XORI 0x00000400
++
++
++
++/* Associates a register name ($6) with a 5-bit index (eg 6) */
++struct nios2_reg
++{
++ const char *name;
++ const int index;
++};
++
++
++/* -------------------------------------------------------------------------
++ Bitfield masks for New Jersey instructions
++ -------------------------------------------------------------------------*/
++
++/* These are bit masks and shift counts to use to access the various
++ fields of an instruction. */
++
++/* Macros for getting and setting an instruction field */
++#define GET_INSN_FIELD(X, i) ((i) & OP_MASK_##X) >> OP_SH_##X
++#define SET_INSN_FIELD(X, i, j) (i) = ((i) &~ (OP_MASK_##X)) | ((j) << OP_SH_##X)
++
++
++/*
++ We include the auto-generated file nios2-isa.h and define the mask
++ and shifts below in terms of those in nios2-isa.h. This ensures
++ that the binutils and hardware are always in sync
++*/
++
++#include "nios2-isa.h"
++
++#define OP_MASK_OP (IW_OP_MASK << IW_OP_LSB)
++#define OP_SH_OP IW_OP_LSB
++
++
++/* Masks and shifts for I-type instructions */
++
++#define OP_MASK_IOP (IW_OP_MASK << IW_OP_LSB)
++#define OP_SH_IOP IW_OP_LSB
++
++#define OP_MASK_IMM16 (IW_IMM16_MASK << IW_IMM16_LSB)
++#define OP_SH_IMM16 IW_IMM16_LSB
++
++#define OP_MASK_IRD (IW_B_MASK << IW_B_LSB) // the same as T for I-type
++#define OP_SH_IRD IW_B_LSB
++
++#define OP_MASK_IRT (IW_B_MASK << IW_B_LSB)
++#define OP_SH_IRT IW_B_LSB
++
++#define OP_MASK_IRS (IW_A_MASK << IW_A_LSB)
++#define OP_SH_IRS IW_A_LSB
++
++/* Masks and shifts for R-type instructions */
++
++#define OP_MASK_ROP (IW_OP_MASK << IW_OP_LSB)
++#define OP_SH_ROP IW_OP_LSB
++
++#define OP_MASK_ROPX (IW_OPX_MASK << IW_OPX_LSB)
++#define OP_SH_ROPX IW_OPX_LSB
++
++#define OP_MASK_RRD (IW_C_MASK << IW_C_LSB)
++#define OP_SH_RRD IW_C_LSB
++
++#define OP_MASK_RRT (IW_B_MASK << IW_B_LSB)
++#define OP_SH_RRT IW_B_LSB
++
++#define OP_MASK_RRS (IW_A_MASK << IW_A_LSB)
++#define OP_SH_RRS IW_A_LSB
++
++/* Masks and shifts for J-type instructions */
++
++#define OP_MASK_JOP (IW_OP_MASK << IW_OP_LSB)
++#define OP_SH_JOP IW_OP_LSB
++
++#define OP_MASK_IMM26 (IW_IMM26_MASK << IW_IMM26_LSB)
++#define OP_SH_IMM26 IW_IMM26_LSB
++
++/* Masks and shifts for CTL instructions */
++
++#define OP_MASK_RCTL 0x000007c0
++#define OP_SH_RCTL 6
++
++/* break instruction imm5 field */
++#define OP_MASK_TRAP_IMM5 0x000007c0
++#define OP_SH_TRAP_IMM5 6
++
++/* instruction imm5 field */
++#define OP_MASK_IMM5 (IW_SHIFT_IMM5_MASK << IW_SHIFT_IMM5_LSB)
++#define OP_SH_IMM5 IW_SHIFT_IMM5_LSB
++
++/* cache operation fields (type j,i(s)) */
++#define OP_MASK_CACHE_OPX (IW_B_MASK << IW_B_LSB)
++#define OP_SH_CACHE_OPX IW_B_LSB
++#define OP_MASK_CACHE_RRS (IW_A_MASK << IW_A_LSB)
++#define OP_SH_CACHE_RRS IW_A_LSB
++
++/* custom instruction masks */
++#define OP_MASK_CUSTOM_A 0x00010000
++#define OP_SH_CUSTOM_A 16
++
++#define OP_MASK_CUSTOM_B 0x00008000
++#define OP_SH_CUSTOM_B 15
++
++#define OP_MASK_CUSTOM_C 0x00004000
++#define OP_SH_CUSTOM_C 14
++
++#define OP_MASK_CUSTOM_N 0x00003fc0
++#define OP_SH_CUSTOM_N 6
++#define OP_MAX_CUSTOM_N 255
++
++/*
++ The following macros define the opcode matches for each
++ instruction
++ code & OP_MASK_INST == OP_MATCH_INST
++ */
++
++/* OP instruction matches */
++#define OP_MATCH_ADDI OP_ADDI
++#define OP_MATCH_ANDHI OP_ANDHI
++#define OP_MATCH_ANDI OP_ANDI
++#define OP_MATCH_BEQ OP_BEQ
++#define OP_MATCH_BGE OP_BGE
++#define OP_MATCH_BGEU OP_BGEU
++#define OP_MATCH_BLT OP_BLT
++#define OP_MATCH_BLTU OP_BLTU
++#define OP_MATCH_BNE OP_BNE
++#define OP_MATCH_BR OP_BR
++#define OP_MATCH_FLUSHD OP_FLUSHD
++#define OP_MATCH_INITD OP_INITD
++#define OP_MATCH_CALL OP_CALL
++#define OP_MATCH_CMPEQI OP_CMPEQI
++#define OP_MATCH_CMPGEI OP_CMPGEI
++#define OP_MATCH_CMPGEUI OP_CMPGEUI
++#define OP_MATCH_CMPLTI OP_CMPLTI
++#define OP_MATCH_CMPLTUI OP_CMPLTUI
++#define OP_MATCH_CMPNEI OP_CMPNEI
++#define OP_MATCH_LDB OP_LDB
++#define OP_MATCH_LDBIO OP_LDBIO
++#define OP_MATCH_LDBU OP_LDBU
++#define OP_MATCH_LDBUIO OP_LDBUIO
++#define OP_MATCH_LDH OP_LDH
++#define OP_MATCH_LDHIO OP_LDHIO
++#define OP_MATCH_LDHU OP_LDHU
++#define OP_MATCH_LDHUIO OP_LDHUIO
++#define OP_MATCH_LDW OP_LDW
++#define OP_MATCH_LDWIO OP_LDWIO
++#define OP_MATCH_MULI OP_MULI
++#define OP_MATCH_OPX OP_OPX
++#define OP_MATCH_ORHI OP_ORHI
++#define OP_MATCH_ORI OP_ORI
++#define OP_MATCH_STB OP_STB
++#define OP_MATCH_STBIO OP_STBIO
++#define OP_MATCH_STH OP_STH
++#define OP_MATCH_STHIO OP_STHIO
++#define OP_MATCH_STW OP_STW
++#define OP_MATCH_STWIO OP_STWIO
++#define OP_MATCH_CUSTOM OP_CUSTOM
++#define OP_MATCH_XORHI OP_XORHI
++#define OP_MATCH_XORI OP_XORI
++#define OP_MATCH_OPX OP_OPX
++
++/* OPX instruction values */
++#define OP_MATCH_ADD ((OPX_ADD << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_AND ((OPX_AND << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_BREAK ((0x1e << 17) | (OPX_BREAK << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_BRET ((0xf0000000) | (OPX_BRET << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_CALLR ((0x1f << 17) | (OPX_CALLR << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_CMPEQ ((OPX_CMPEQ << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_CMPGE ((OPX_CMPGE << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_CMPGEU ((OPX_CMPGEU << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_CMPLT ((OPX_CMPLT << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_CMPLTU ((OPX_CMPLTU << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_CMPNE ((OPX_CMPNE << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_DIV ((OPX_DIV << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_DIVU ((OPX_DIVU << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_JMP ((OPX_JMP << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_MUL ((OPX_MUL << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_MULXSS ((OPX_MULXSS << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_MULXSU ((OPX_MULXSU << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_MULXUU ((OPX_MULXUU << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_NEXTPC ((OPX_NEXTPC << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_NOR ((OPX_NOR << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_OR ((OPX_OR << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_RDCTL ((OPX_RDCTL << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_RET ((0xf8000000) | (OPX_RET << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_ROL ((OPX_ROL << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_ROLI ((OPX_ROLI << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_ROR ((OPX_ROR << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_SLL ((OPX_SLL << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_SLLI ((OPX_SLLI << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_SRA ((OPX_SRA << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_SRAI ((OPX_SRAI << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_SRL ((OPX_SRL << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_SRLI ((OPX_SRLI << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_SUB ((OPX_SUB << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_SYNC ((OPX_SYNC << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_TRAP ((0x1d << 17) | (OPX_TRAP << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_ERET ((0xe8000000) | (OPX_ERET << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_WRCTL ((OPX_WRCTL << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_XOR ((OPX_XOR << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_FLUSHI ((OPX_FLUSHI << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_FLUSHP ((OPX_FLUSHP << IW_OPX_LSB) | (OP_OPX))
++#define OP_MATCH_INITI ((OPX_INITI << IW_OPX_LSB) | (OP_OPX))
++
++/*
++ Some unusual op masks
++*/
++#define OP_MASK_BREAK ((OP_MASK_RRS | OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX | OP_MASK_OP) & 0xfffff03f)
++#define OP_MASK_CALLR ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_JMP ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_SYNC ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_TRAP ((OP_MASK_RRS | OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX | OP_MASK_OP) & 0xfffff83f)
++#define OP_MASK_WRCTL ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX | OP_MASK_OP)) /*& 0xfffff83f */
++#define OP_MASK_NEXTPC ((OP_MASK_RRS | OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_FLUSHI ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_INITI ((OP_MASK_RRT | OP_MASK_RRD | OP_MASK_ROPX | OP_MASK_OP))
++
++#define OP_MASK_ROLI ((OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_SLLI ((OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_SRAI ((OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_SRLI ((OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP))
++#define OP_MASK_RDCTL ((OP_MASK_RRS | OP_MASK_RRT | OP_MASK_ROPX | OP_MASK_OP)) /*& 0xfffff83f */
++
++#ifndef OP_MASK
++#define OP_MASK 0xffffffff
++#endif
++
++/* These are the data structures we use to hold the instruction information */
++
++extern const struct nios2_opcode nios2_builtin_opcodes[];
++extern const int bfd_nios2_num_builtin_opcodes;
++extern struct nios2_opcode *nios2_opcodes;
++extern int bfd_nios2_num_opcodes;
++
++/* These are the data structures used to hold the operand parsing information */
++//extern const struct nios2_arg_parser nios2_arg_parsers[];
++//extern struct nios2_arg_parser* nios2_arg_parsers;
++//extern const int nios2_num_builtin_arg_parsers;
++//extern int nios2_num_arg_parsers;
++
++/* These are the data structures used to hold the register information */
++extern const struct nios2_reg nios2_builtin_regs[];
++extern struct nios2_reg *nios2_regs;
++extern const int nios2_num_builtin_regs;
++extern int nios2_num_regs;
++
++/* Machine-independent macro for number of opcodes */
++
++#define NUMOPCODES bfd_nios2_num_opcodes
++#define NUMREGISTERS nios2_num_regs;
++
++/* these are used in disassembly to get the correct register names */
++#define NUMREGNAMES 32
++#define NUMCTLREGNAMES 32
++#define CTLREGBASE 42
++#define COPROCREGBASE 83
++#define NUMCOPROCREGNAMES 32
++
++
++/* this is made extern so that the assembler can use it to find out
++ what instruction caused an error */
++extern const struct nios2_opcode *nios2_find_opcode_hash (unsigned long);
++
++/* overflow message strings used in the assembler */
++extern char *overflow_msgs[];
++
++#endif // _NIOS2_H
+--- binutils-2.15/include/opcode/s-nios2-isa 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/include/opcode/s-nios2-isa 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1 @@
++timestamp
+--- binutils-2.15/ld/Makefile.am 2004-05-17 21:36:15.000000000 +0200
++++ binutils-2.15-nios2/ld/Makefile.am 2005-05-17 12:20:14.000000000 +0200
+@@ -1440,6 +1440,9 @@ eelf32frvfd.c: $(srcdir)/emulparams/elf3
+ $(srcdir)/emulparams/elf32frv.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32frvfd "$(tdir_frv)"
++enios2elf.c: $(srcdir)/emulparams/nios2elf.sh \
++ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
++ ${GENSCRIPTS} nios2elf "$(tdir_nios2)"
+
+ # We need this for automake to use YLWRAP.
+ EXTRA_ld_new_SOURCES = deffilep.y
+--- binutils-2.15/ld/Makefile.in 2004-05-17 21:36:15.000000000 +0200
++++ binutils-2.15-nios2/ld/Makefile.in 2005-05-17 12:20:14.000000000 +0200
+@@ -2166,6 +2166,9 @@ eelf32frvfd.c: $(srcdir)/emulparams/elf3
+ $(srcdir)/emulparams/elf32frv.sh \
+ $(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32frvfd "$(tdir_frv)"
++enios2elf.c: $(srcdir)/emulparams/nios2elf.sh \
++ $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
++ ${GENSCRIPTS} nios2elf "$(tdir_nios2)"
+
+ # The generated emulation files mostly have the same dependencies.
+ $(EMULATION_OFILES): ../bfd/bfd.h sysdep.h config.h $(INCDIR)/bfdlink.h \
+--- binutils-2.15/ld/configure.tgt 2004-05-17 21:36:15.000000000 +0200
++++ binutils-2.15-nios2/ld/configure.tgt 2005-05-17 12:20:14.000000000 +0200
+@@ -450,6 +450,7 @@ mn10200-*-*) targ_emul=mn10200 ;;
+ mn10300-*-*) targ_emul=mn10300 ;;
+ msp430-*-*) targ_emul=msp430x110
+ targ_extra_emuls="msp430x112 msp430x1101 msp430x1111 msp430x1121 msp430x1122 msp430x1132 msp430x122 msp430x123 msp430x1222 msp430x1232 msp430x133 msp430x135 msp430x1331 msp430x1351 msp430x147 msp430x148 msp430x149 msp430x155 msp430x156 msp430x157 msp430x167 msp430x168 msp430x169 msp430x311 msp430x312 msp430x313 msp430x314 msp430x315 msp430x323 msp430x325 msp430x336 msp430x337 msp430x412 msp430x413 msp430xE423 msp430xE425 msp430xE427 msp430xW423 msp430xW425 msp430xW427 msp430x435 msp430x436 msp430x437 msp430x447 msp430x448 msp430x449" ;;
++nios2-*-*|nios2-*-*) targ_emul=nios2elf ;;
+ alpha*-*-freebsd* | alpha*-*-kfreebsd*-gnu)
+ targ_emul=elf64alpha_fbsd
+ targ_extra_emuls="elf64alpha alpha"
+--- binutils-2.15/ld/emulparams/nios2elf.sh 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/ld/emulparams/nios2elf.sh 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,15 @@
++SCRIPT_NAME=elf
++OUTPUT_FORMAT="elf32-littlenios2"
++TEXT_START_ADDR=0x0
++OTHER_GOT_SYMBOLS='
++ _gp = ALIGN(16) + 0x7ff0;
++ PROVIDE(gp = _gp);
++'
++ARCH=nios2
++MACHINE=
++MAXPAGESIZE=256
++ENTRY=_start
++EMBEDDED=yes
++DATA_ADDR=.
++NOP=0x0001883a
++
+--- binutils-2.15/ld/ldmain.c 2004-05-17 21:36:16.000000000 +0200
++++ binutils-2.15-nios2/ld/ldmain.c 2005-05-17 12:20:14.000000000 +0200
+@@ -397,6 +397,14 @@ main (int argc, char **argv)
+ yyparse ();
+ lex_string = NULL;
+ }
++/* NG horrible hack, but it works and I haven't the time to do this properly */
++#ifdef bfd_set_link_info
++ bfd_set_link_info(&link_info);
++#endif
++#ifdef bfd_set_force_make_executable
++ bfd_set_force_make_executable(force_make_executable);
++#endif
++
+
+ if (trace_file_tries)
+ {
+--- binutils-2.15/ld/nios2_ld_xfail.lst 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/ld/nios2_ld_xfail.lst 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,3 @@
++
++
++
+--- binutils-2.15/ld/testsuite/ld-elf/merge.d 2003-05-07 07:08:02.000000000 +0200
++++ binutils-2.15-nios2/ld/testsuite/ld-elf/merge.d 2005-05-17 12:20:14.000000000 +0200
+@@ -5,6 +5,7 @@
+ #xfail: "hppa*-*-*" "h8300-*-*" "i960-*-*" "ip2k-*-*" "m32r-*-*" "mcore-*-*"
+ #xfail: "mn10*-*-*" "mips64*-*-linux*" "openrisc-*-*" "pj-*-*" "sparc*-*-*"
+ #xfail: "xtensa-*-*"
++#xfail: "nios2-*-*"
+
+ .*: file format .*elf.*
+
+--- binutils-2.15/ld/testsuite/ld-elfcomm/elfcomm.exp 2003-06-18 05:38:05.000000000 +0200
++++ binutils-2.15-nios2/ld/testsuite/ld-elfcomm/elfcomm.exp 2005-05-17 12:20:14.000000000 +0200
+@@ -56,6 +56,10 @@ proc dump_common1 { testname } {
+ return 1
+ }
+
++if [istarget nios2-*-*] {
++ set CFLAGS "$CFLAGS -G0"
++}
++
+ if { ![ld_compile "$CC $CFLAGS" $srcdir/$subdir/common1a.c tmpdir/common1a.o]
+ || ![ld_compile "$CC $CFLAGS" $srcdir/$subdir/common1b.c tmpdir/common1b.o] } {
+ unresolved $test1
+--- binutils-2.15/ld/testsuite/ld-scripts/cross2.t 2001-08-27 12:49:55.000000000 +0200
++++ binutils-2.15-nios2/ld/testsuite/ld-scripts/cross2.t 2005-05-17 12:20:14.000000000 +0200
+@@ -2,5 +2,9 @@ NOCROSSREFS ( .text .data )
+ SECTIONS
+ {
+ .text : { *(.text) *(.text.*) *(.pr) }
+- .data : { *(.data) *(.data.*) *(.sdata) *(.rw) *(.tc0) *(.tc) *(.toc) }
++ .data :
++ { *(.data) *(.data.*)
++ _gp = ABSOLUTE(. + 0x7ff0);
++ *(.sdata) *(.rw) *(.tc0) *(.tc) *(.toc)
++ }
+ }
+--- binutils-2.15/opcodes/Makefile.am 2004-01-07 19:39:40.000000000 +0100
++++ binutils-2.15-nios2/opcodes/Makefile.am 2005-05-17 12:20:14.000000000 +0200
+@@ -125,6 +125,8 @@ CFILES = \
+ mmix-dis.c \
+ mmix-opc.c \
+ ns32k-dis.c \
++ nios2-opc.c \
++ nios2-dis.c \
+ openrisc-asm.c \
+ openrisc-desc.c \
+ openrisc-dis.c \
+@@ -237,6 +239,8 @@ ALL_MACHINES = \
+ mmix-opc.lo \
+ msp430-dis.lo \
+ ns32k-dis.lo \
++ nios2-opc.lo \
++ nios2-dis.lo \
+ openrisc-asm.lo \
+ openrisc-desc.lo \
+ openrisc-dis.lo \
+@@ -739,6 +743,13 @@ mmix-opc.lo: mmix-opc.c $(INCDIR)/opcode
+ ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \
+ $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/dis-asm.h \
+ $(INCDIR)/opcode/ns32k.h opintl.h
++nios2-opc.lo: nios2-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
++ $(INCDIR)/opcode/nios2.h
++nios2-dis.lo: nios2-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
++ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/nios2.h \
++ opintl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
++ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
++ $(INCDIR)/elf/nios2.h $(INCDIR)/elf/reloc-macros.h
+ openrisc-asm.lo: openrisc-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen.h \
+ openrisc-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
+--- binutils-2.15/opcodes/Makefile.in 2004-01-07 19:39:40.000000000 +0100
++++ binutils-2.15-nios2/opcodes/Makefile.in 2005-05-17 12:20:14.000000000 +0200
+@@ -236,6 +236,8 @@ CFILES = \
+ mmix-dis.c \
+ mmix-opc.c \
+ ns32k-dis.c \
++ nios2-opc.c \
++ nios2-dis.c \
+ openrisc-asm.c \
+ openrisc-desc.c \
+ openrisc-dis.c \
+@@ -348,6 +350,8 @@ ALL_MACHINES = \
+ mmix-dis.lo \
+ mmix-opc.lo \
+ msp430-dis.lo \
++ nios2-opc.lo \
++ nios2-dis.lo \
+ ns32k-dis.lo \
+ openrisc-asm.lo \
+ openrisc-desc.lo \
+@@ -1232,6 +1236,13 @@ mmix-dis.lo: mmix-dis.c $(INCDIR)/opcode
+ $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+ opintl.h
+ mmix-opc.lo: mmix-opc.c $(INCDIR)/opcode/mmix.h $(INCDIR)/symcat.h
++nios2-opc.lo: nios2-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
++ $(INCDIR)/opcode/nios2.h
++nios2-dis.lo: nios2-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
++ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/nios2.h \
++ opintl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
++ $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
++ $(INCDIR)/elf/nios2.h $(INCDIR)/elf/reloc-macros.h
+ ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \
+ $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/dis-asm.h \
+ $(INCDIR)/opcode/ns32k.h opintl.h
+--- binutils-2.15/opcodes/configure 2003-08-05 11:39:31.000000000 +0200
++++ binutils-2.15-nios2/opcodes/configure 2005-05-17 12:20:14.000000000 +0200
+@@ -4661,6 +4661,7 @@ if test x${all_targets} = xfalse ; then
+ bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
+ bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
+ bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
++ bfd_nios2_arch) ta="$ta nios2-dis.lo nios2-opc.lo" ;;
+ bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
+ bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
+ bfd_or32_arch) ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;;
+--- binutils-2.15/opcodes/configure.in 2003-08-05 11:39:31.000000000 +0200
++++ binutils-2.15-nios2/opcodes/configure.in 2005-05-17 12:20:14.000000000 +0200
+@@ -202,6 +202,7 @@ if test x${all_targets} = xfalse ; then
+ bfd_mn10200_arch) ta="$ta m10200-dis.lo m10200-opc.lo" ;;
+ bfd_mn10300_arch) ta="$ta m10300-dis.lo m10300-opc.lo" ;;
+ bfd_msp430_arch) ta="$ta msp430-dis.lo" ;;
++ bfd_nios2_arch) ta="$ta nios2-dis.lo nios2-opc.lo" ;;
+ bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
+ bfd_openrisc_arch) ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;
+ bfd_or32_arch) ta="$ta or32-dis.lo or32-opc.lo" using_cgen=yes ;;
+--- binutils-2.15/opcodes/disassemble.c 2003-11-14 16:12:44.000000000 +0100
++++ binutils-2.15-nios2/opcodes/disassemble.c 2005-05-17 12:20:14.000000000 +0200
+@@ -1,5 +1,5 @@
+ /* Select disassembly routine for specified architecture.
+- Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
++ Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
+ Free Software Foundation, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+@@ -72,6 +72,7 @@ Foundation, Inc., 59 Temple Place - Suit
+ #define ARCH_z8k
+ #define ARCH_frv
+ #define ARCH_iq2000
++#define ARCH_nios2
+ #define INCLUDE_SHMEDIA
+ #endif
+
+@@ -375,6 +376,11 @@ disassembler (abfd)
+ disassemble = print_insn_iq2000;
+ break;
+ #endif
++#ifdef ARCH_nios2
++ case bfd_arch_nios2:
++ disassemble = print_insn_nios2;
++ break;
++#endif
+ default:
+ return 0;
+ }
+--- binutils-2.15/opcodes/nios2-dis.c 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/opcodes/nios2-dis.c 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,445 @@
++/* nios2-dis.c -- Altera New Jersey disassemble routines.
++
++ Copyright (C) 2003
++ by Nigel Gray (ngray@altera.com).
++
++This file is part of GDB, GAS, and the GNU binutils.
++
++GDB, GAS, and the GNU binutils are free software; you can redistribute
++them and/or modify them under the terms of the GNU General Public
++License as published by the Free Software Foundation; either version
++1, or (at your option) any later version.
++
++GDB, GAS, and the GNU binutils are distributed in the hope that they
++will be useful, but WITHOUT ANY WARRANTY; without even the implied
++warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
++the GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this file; see the file COPYING. If not, write to the Free
++Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
++
++#include <stdlib.h>
++#include <assert.h>
++#include <string.h>
++#include "dis-asm.h"
++#include "opcode/nios2.h"
++
++/* No symbol table is available when this code runs out in an embedded
++ system as when it is used for disassembler support in a monitor. */
++
++#if !defined(EMBEDDED_ENV)
++#define SYMTAB_AVAILABLE 1
++#include "elf-bfd.h"
++#include "elf/nios2.h"
++#endif
++
++/* length of New Jersey instruction in bytes */
++#define INSNLEN 4
++
++/* helper function prototypes */
++static int nios2_disassemble (bfd_vma, unsigned long, disassemble_info *);
++static void nios2_init_opcode_hash (void);
++
++
++static int nios2_print_insn_arg (const char *argptr, unsigned long opcode,
++ bfd_vma address, disassemble_info * info);
++
++
++/* print_insn_nios2 is the main disassemble function for New Jersey.
++ The function diassembler(abfd) (source in disassemble.c)
++ returns a pointer to this function when the bfd machine type is
++ New Jersey. print_insn_nios2 reads the instruction word at the
++ address given, and prints the disassembled instruction on the
++ stream info->stream using info->fprintf_func. */
++
++int
++print_insn_nios2 (bfd_vma address, disassemble_info * info)
++{
++ /* buffer into which the instruction bytes are written */
++ bfd_byte buffer[INSNLEN];
++ /* used to indicate return status from function calls */
++ int status;
++
++ assert (info != NULL);
++
++ status = (*info->read_memory_func) (address, buffer, INSNLEN, info);
++ if (status == 0)
++ {
++ status =
++ nios2_disassemble (address, (unsigned long) bfd_getl32 (buffer),
++ info);
++ }
++ else
++ {
++ (*info->memory_error_func) (status, address, info);
++ status = -1;
++ }
++ return status;
++}
++
++/* Data structures used by the opcode hash table */
++
++typedef struct _nios2_opcode_hash
++{
++ const struct nios2_opcode *opcode;
++ struct _nios2_opcode_hash *next;
++} nios2_opcode_hash;
++
++static bfd_boolean nios2_hash_init = 0;
++static nios2_opcode_hash *nios2_hash[(OP_MASK_OP) + 1];
++
++/* separate hash table for pseudo-ops */
++static nios2_opcode_hash *nios2_ps_hash[(OP_MASK_OP) + 1];
++
++/* Function to initialize the opcode hash table */
++
++void
++nios2_init_opcode_hash ()
++{
++ unsigned int i;
++ register const struct nios2_opcode *op;
++ nios2_opcode_hash *tmp_hash;
++
++ for (i = 0; i <= OP_MASK_OP; ++i)
++ {
++ nios2_hash[0] = NULL;
++ }
++ for (i = 0; i <= OP_MASK_OP; i++)
++ {
++ for (op = nios2_opcodes; op < &nios2_opcodes[NUMOPCODES]; op++)
++ {
++ if ((op->pinfo & NIOS2_INSN_MACRO) == NIOS2_INSN_MACRO)
++ {
++ if (i == ((op->match >> OP_SH_OP) & OP_MASK_OP) &&
++ (op->
++ pinfo & (NIOS2_INSN_MACRO_MOV | NIOS2_INSN_MACRO_MOVI) &
++ 0x7fffffff) != 0)
++ {
++ tmp_hash = nios2_ps_hash[i];
++ if (tmp_hash == NULL)
++ {
++ tmp_hash =
++ (nios2_opcode_hash *)
++ malloc (sizeof (nios2_opcode_hash));
++ nios2_ps_hash[i] = tmp_hash;
++ }
++ else
++ {
++ while (tmp_hash->next != NULL)
++ tmp_hash = tmp_hash->next;
++ tmp_hash->next =
++ (nios2_opcode_hash *)
++ malloc (sizeof (nios2_opcode_hash));
++ tmp_hash = tmp_hash->next;
++ }
++ if (tmp_hash == NULL)
++ {
++ fprintf (stderr,
++ "error allocating memory...broken disassembler\n");
++ abort ();
++ }
++ tmp_hash->opcode = op;
++ tmp_hash->next = NULL;
++ }
++ }
++ else if (i == ((op->match >> OP_SH_OP) & OP_MASK_OP))
++ {
++ tmp_hash = nios2_hash[i];
++ if (tmp_hash == NULL)
++ {
++ tmp_hash =
++ (nios2_opcode_hash *) malloc (sizeof (nios2_opcode_hash));
++ nios2_hash[i] = tmp_hash;
++ }
++ else
++ {
++ while (tmp_hash->next != NULL)
++ tmp_hash = tmp_hash->next;
++ tmp_hash->next =
++ (nios2_opcode_hash *) malloc (sizeof (nios2_opcode_hash));
++ tmp_hash = tmp_hash->next;
++ }
++ if (tmp_hash == NULL)
++ {
++ fprintf (stderr,
++ "error allocating memory...broken disassembler\n");
++ abort ();
++ }
++ tmp_hash->opcode = op;
++ tmp_hash->next = NULL;
++ }
++ }
++ }
++ nios2_hash_init = 1;
++#ifdef DEBUG_HASHTABLE
++ for (i = 0; i <= OP_MASK_OP; ++i)
++ {
++ printf ("index: 0x%02X ops: ", i);
++ tmp_hash = nios2_hash[i];
++ if (tmp_hash != NULL)
++ {
++ while (tmp_hash != NULL)
++ {
++ printf ("%s ", tmp_hash->opcode->name);
++ tmp_hash = tmp_hash->next;
++ }
++ }
++ printf ("\n");
++ }
++
++ for (i = 0; i <= OP_MASK_OP; ++i)
++ {
++ printf ("index: 0x%02X ops: ", i);
++ tmp_hash = nios2_ps_hash[i];
++ if (tmp_hash != NULL)
++ {
++ while (tmp_hash != NULL)
++ {
++ printf ("%s ", tmp_hash->opcode->name);
++ tmp_hash = tmp_hash->next;
++ }
++ }
++ printf ("\n");
++ }
++#endif
++}
++
++/* Function which returns a pointer to an nios2_opcode struct for
++ a given instruction opcode, or NULL if there is an error */
++
++const struct nios2_opcode *
++nios2_find_opcode_hash (unsigned long opcode)
++{
++ nios2_opcode_hash *entry;
++
++ /* Build a hash table to shorten the search time. */
++ if (!nios2_hash_init)
++ {
++ nios2_init_opcode_hash ();
++ }
++
++ /* first look in the pseudo-op hashtable */
++ entry = nios2_ps_hash[(opcode >> OP_SH_OP) & OP_MASK_OP];
++
++ /* look for a match and if we get one, this is the instruction we decode */
++ while (entry != NULL)
++ {
++ if ((entry->opcode->match) == (opcode & entry->opcode->mask))
++ return entry->opcode;
++ else
++ entry = entry->next;
++ }
++
++ /* if we haven't yet returned, then we need to look in the main
++ hashtable */
++ entry = nios2_hash[(opcode >> OP_SH_OP) & OP_MASK_OP];
++
++ if (entry == NULL)
++ return NULL;
++
++
++ while (entry != NULL)
++ {
++ if ((entry->opcode->match) == (opcode & entry->opcode->mask))
++ return entry->opcode;
++ else
++ entry = entry->next;
++ }
++
++ return NULL;
++}
++
++/* nios2_disassemble does all the work of disassembling a New Jersey
++ instruction opcode */
++
++int
++nios2_disassemble (bfd_vma address, unsigned long opcode,
++ disassemble_info * info)
++{
++ const struct nios2_opcode *op;
++ const char *argstr;
++
++ info->bytes_per_line = INSNLEN;
++ info->bytes_per_chunk = INSNLEN;
++ info->display_endian = info->endian;
++ info->insn_info_valid = 1;
++ info->branch_delay_insns = 0;
++ info->data_size = 0;
++ info->insn_type = dis_nonbranch;
++ info->target = 0;
++ info->target2 = 0;
++
++ /* Find the major opcode and use this to disassemble
++ the instruction and its arguments */
++ op = nios2_find_opcode_hash (opcode);
++
++ if (op != NULL)
++ {
++ bfd_boolean is_nop = FALSE;
++ if (op->pinfo == NIOS2_INSN_MACRO_MOV)
++ {
++ /* check for mov r0, r0 and if it is
++ change to nop */
++ int dst, src;
++ dst = GET_INSN_FIELD (RRD, opcode);
++ src = GET_INSN_FIELD (RRS, opcode);
++ if (dst == 0 && src == 0)
++ {
++ (*info->fprintf_func) (info->stream, "nop");
++ is_nop = TRUE;
++ }
++ else
++ {
++ (*info->fprintf_func) (info->stream, "%s", op->name);
++ }
++ }
++ else
++ {
++ (*info->fprintf_func) (info->stream, "%s", op->name);
++ }
++
++ if (!is_nop)
++ {
++ argstr = op->args;
++ if (argstr != NULL && *argstr != '\0')
++ {
++ (*info->fprintf_func) (info->stream, "\t");
++ while (*argstr != '\0')
++ {
++ nios2_print_insn_arg (argstr, opcode, address, info);
++ ++argstr;
++ }
++ }
++ }
++ }
++ else
++ {
++ /* Handle undefined instructions. */
++ info->insn_type = dis_noninsn;
++ (*info->fprintf_func) (info->stream, "0x%x", opcode);
++ }
++ // this tells the caller how far to advance the program counter
++ return INSNLEN;
++}
++
++/* The function nios2_print_insn_arg uses the character pointed
++ to by argptr to determine how it print the next token or separator
++ character in the arguments to an instruction */
++int
++nios2_print_insn_arg (const char *argptr,
++ unsigned long opcode, bfd_vma address,
++ disassemble_info * info)
++{
++ unsigned long i = 0;
++ unsigned long reg_base;
++
++ assert (argptr != NULL);
++ assert (info != NULL);
++
++ switch (*argptr)
++ {
++ case ',':
++ case '(':
++ case ')':
++ (*info->fprintf_func) (info->stream, "%c", *argptr);
++ break;
++ case 'd':
++ i = GET_INSN_FIELD (RRD, opcode);
++
++ if (GET_INSN_FIELD (OP, opcode) == OP_MATCH_CUSTOM
++ && GET_INSN_FIELD (CUSTOM_C, opcode) == 0)
++ reg_base = COPROCREGBASE;
++ else
++ reg_base = 0;
++
++ if (i < NUMREGNAMES)
++ (*info->fprintf_func) (info->stream, "%s",
++ nios2_regs[i + reg_base].name);
++ else
++ (*info->fprintf_func) (info->stream, "unknown");
++ break;
++ case 's':
++ i = GET_INSN_FIELD (RRS, opcode);
++
++ if (GET_INSN_FIELD (OP, opcode) == OP_MATCH_CUSTOM
++ && GET_INSN_FIELD (CUSTOM_A, opcode) == 0)
++ reg_base = COPROCREGBASE;
++ else
++ reg_base = 0;
++
++ if (i < NUMREGNAMES)
++ (*info->fprintf_func) (info->stream, "%s",
++ nios2_regs[i + reg_base].name);
++ else
++ (*info->fprintf_func) (info->stream, "unknown");
++ break;
++ case 't':
++ i = GET_INSN_FIELD (RRT, opcode);
++
++ if (GET_INSN_FIELD (OP, opcode) == OP_MATCH_CUSTOM
++ && GET_INSN_FIELD (CUSTOM_B, opcode) == 0)
++ reg_base = COPROCREGBASE;
++ else
++ reg_base = 0;
++
++ if (i < NUMREGNAMES)
++ (*info->fprintf_func) (info->stream, "%s",
++ nios2_regs[i + reg_base].name);
++ else
++ (*info->fprintf_func) (info->stream, "unknown");
++ break;
++ case 'i':
++ /* 16-bit signed immediate */
++ i = (signed) (GET_INSN_FIELD (IMM16, opcode) << 16) >> 16;
++ (*info->fprintf_func) (info->stream, "%d", i);
++ break;
++ case 'u':
++ /* 16-bit unsigned immediate */
++ i = GET_INSN_FIELD (IMM16, opcode);
++ (*info->fprintf_func) (info->stream, "%d", i);
++ break;
++ case 'o':
++ /* 16-bit signed immediate address offset */
++ i = (signed) (GET_INSN_FIELD (IMM16, opcode) << 16) >> 16;
++ address = address + 4 + i; /* NG changed to byte offset 1/9/03 */
++ (*info->print_address_func) (address, info);
++ break;
++ case 'p':
++ /* 5-bit unsigned immediate */
++ i = GET_INSN_FIELD (CACHE_OPX, opcode);
++ (*info->fprintf_func) (info->stream, "%d", i);
++ break;
++ case 'j':
++ /* 5-bit unsigned immediate */
++ i = GET_INSN_FIELD (IMM5, opcode);
++ (*info->fprintf_func) (info->stream, "%d", i);
++ break;
++ case 'l':
++ /* 8-bit unsigned immediate */
++ /* FIXME - not yet implemented */
++ i = GET_INSN_FIELD (CUSTOM_N, opcode);
++ (*info->fprintf_func) (info->stream, "%u", i);
++ break;
++ case 'm':
++ /* 26-bit unsigned immediate */
++ i = GET_INSN_FIELD (IMM26, opcode);
++ /* this translates to an address because its only used in call instructions */
++ address = (address & 0xf0000000) | (i << 2);
++ (*info->print_address_func) (address, info);
++ break;
++ case 'c':
++ i = GET_INSN_FIELD (IMM5, opcode); /* ctrl register index */
++ (*info->fprintf_func) (info->stream, "%s",
++ nios2_regs[CTLREGBASE + i].name);
++ break;
++ case 'b':
++ i = GET_INSN_FIELD (IMM5, opcode);
++ (*info->fprintf_func) (info->stream, "%d", i);
++ break;
++ default:
++ (*info->fprintf_func) (info->stream, "unknown");
++ break;
++ }
++ return 0;
++}
+--- binutils-2.15/opcodes/nios2-opc.c 1970-01-01 01:00:00.000000000 +0100
++++ binutils-2.15-nios2/opcodes/nios2-opc.c 2005-05-17 12:20:14.000000000 +0200
+@@ -0,0 +1,315 @@
++/* nios2-opc.c -- Altera New Jersey opcode list.
++
++ Copyright (C) 2003
++ by Nigel Gray (ngray@altera.com).
++
++This file is part of GDB, GAS, and the GNU binutils.
++
++GDB, GAS, and the GNU binutils are free software; you can redistribute
++them and/or modify them under the terms of the GNU General Public
++License as published by the Free Software Foundation; either version
++1, or (at your option) any later version.
++
++GDB, GAS, and the GNU binutils are distributed in the hope that they
++will be useful, but WITHOUT ANY WARRANTY; without even the implied
++warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
++the GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this file; see the file COPYING. If not, write to the Free
++Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
++
++#include <stdio.h>
++#include "opcode/nios2.h"
++
++/* Register string table */
++
++const struct nios2_reg nios2_builtin_regs[] = {
++ {"zero", 0},
++ {"at", 1}, // assembler temporary
++ {"r2", 2},
++ {"r3", 3},
++ {"r4", 4},
++ {"r5", 5},
++ {"r6", 6},
++ {"r7", 7},
++ {"r8", 8},
++ {"r9", 9},
++ {"r10", 10},
++ {"r11", 11},
++ {"r12", 12},
++ {"r13", 13},
++ {"r14", 14},
++ {"r15", 15},
++ {"r16", 16},
++ {"r17", 17},
++ {"r18", 18},
++ {"r19", 19},
++ {"r20", 20},
++ {"r21", 21},
++ {"r22", 22},
++ {"r23", 23},
++ {"et", 24},
++ {"bt", 25},
++ {"gp", 26}, /* global pointer */
++ {"sp", 27}, /* stack pointer */
++ {"fp", 28}, /* frame pointer */
++ {"ea", 29}, /* exception return address */
++ {"ba", 30}, /* breakpoint return address */
++ {"ra", 31}, /* return address */
++
++ /* alternative names for special registers */
++ {"r0", 0},
++ {"r1", 1},
++ {"r24", 24},
++ {"r25", 25},
++ {"r26", 26},
++ {"r27", 27},
++ {"r28", 28},
++ {"r29", 29},
++ {"r30", 30},
++ {"r31", 31},
++
++ /* control register names */
++ {"status", 0},
++ {"estatus", 1},
++ {"bstatus", 2},
++ {"ienable", 3},
++ {"ipending", 4},
++ {"cpuid", 5},
++ {"ctl6", 6},
++ {"ctl7", 7},
++ {"pteaddr", 8},
++ {"tlbacc", 9},
++ {"tlbmisc", 10},
++ {"ctl11", 11},
++ {"ctl12", 12},
++ {"ctl13", 13},
++ {"ctl14", 14},
++ {"ctl15", 15},
++ {"ctl16", 16},
++ {"ctl17", 17},
++ {"ctl18", 18},
++ {"ctl19", 19},
++ {"ctl20", 20},
++ {"ctl21", 21},
++ {"ctl22", 22},
++ {"ctl23", 23},
++ {"ctl24", 24},
++ {"ctl25", 25},
++ {"ctl26", 26},
++ {"ctl27", 27},
++ {"ctl28", 28},
++ {"ctl29", 29},
++ {"ctl30", 30},
++ {"ctl31", 31},
++ {"ctl0", 0},
++ {"ctl1", 1},
++ {"ctl2", 2},
++ {"ctl3", 3},
++ {"ctl4", 4},
++ {"ctl5", 5},
++ {"ctl8", 8},
++ {"ctl9", 9},
++ {"ctl10", 10},
++
++ /* coprocessor register names */
++ {"c0", 0},
++ {"c1", 1},
++ {"c2", 2},
++ {"c3", 3},
++ {"c4", 4},
++ {"c5", 5},
++ {"c6", 6},
++ {"c7", 7},
++ {"c8", 8},
++ {"c9", 9},
++ {"c10", 10},
++ {"c11", 11},
++ {"c12", 12},
++ {"c13", 13},
++ {"c14", 14},
++ {"c15", 15},
++ {"c16", 16},
++ {"c17", 17},
++ {"c18", 18},
++ {"c19", 19},
++ {"c20", 20},
++ {"c21", 21},
++ {"c22", 22},
++ {"c23", 23},
++ {"c24", 24},
++ {"c25", 25},
++ {"c26", 26},
++ {"c27", 27},
++ {"c28", 28},
++ {"c29", 29},
++ {"c30", 30},
++ {"c31", 31},
++};
++
++#define NIOS2_NUM_REGS \
++ ((sizeof nios2_builtin_regs) / (sizeof (nios2_builtin_regs[0])))
++const int nios2_num_builtin_regs = NIOS2_NUM_REGS;
++
++/* const removed from the following to allow for dynamic extensions to the
++ * built-in instruction set. */
++struct nios2_reg *nios2_regs = (struct nios2_reg *) nios2_builtin_regs;
++int nios2_num_regs = NIOS2_NUM_REGS;
++#undef NIOS2_NUM_REGS
++
++/* overflow message string templates */
++
++char *overflow_msgs[] = {
++ "call target address 0x%08x out of range 0x%08x to 0x%08x",
++ "branch offset %d out of range %d to %d",
++ "%s offset %d out of range %d to %d",
++ "immediate value %d out of range %d to %d",
++ "immediate value %u out of range %u to %u",
++ "immediate value %u out of range %u to %u",
++ "custom instruction opcode %u out of range %u to %u",
++};
++
++
++
++/*--------------------------------------------------------------------------------
++ This is the opcode table used by the New Jersey GNU as, disassembler and GDB
++ --------------------------------------------------------------------------------*/
++
++/*
++ The following letters can appear in the args field of the nios2_opcode
++ structure:
++
++ c - a 5-bit control register index or break opcode
++ d - a 5-bit destination register index
++ s - a 5-bit left source register index
++ t - a 5-bit right source register index
++ i - a 16-bit signed immediate
++ u - a 16-bit unsigned immediate
++
++ j - a 5-bit unsigned immediate
++ k - a 6-bit unsigned immediate
++ l - an 8-bit unsigned immediate
++ m - a 26-bit unsigned immediate
++*/
++
++/* *INDENT-OFF* */
++/* FIXME: Re-format for GNU standards */
++const struct nios2_opcode nios2_builtin_opcodes[] =
++{
++ /* name, args, args_test num_args, match, mask, pinfo */
++ {"add", "d,s,t", "d,s,t,E", 3, OP_MATCH_ADD, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"addi", "t,s,i", "t,s,i,E", 3, OP_MATCH_ADDI, OP_MASK_IOP, NIOS2_INSN_ADDI, signed_immed16_overflow },
++ {"subi", "t,s,i", "t,s,i,E", 3, OP_MATCH_ADDI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow },
++ {"and", "d,s,t", "d,s,t,E", 3, OP_MATCH_AND, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"andhi", "t,s,u", "t,s,u,E", 3, OP_MATCH_ANDHI, OP_MASK_IOP, 0, unsigned_immed16_overflow },
++ {"andi", "t,s,u", "t,s,u,E", 3, OP_MATCH_ANDI, OP_MASK_IOP, NIOS2_INSN_ANDI, unsigned_immed16_overflow },
++ {"beq", "s,t,o", "s,t,o,E", 3, OP_MATCH_BEQ, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"bge", "s,t,o", "s,t,o,E", 3, OP_MATCH_BGE, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"bgeu", "s,t,o", "s,t,o,E", 3, OP_MATCH_BGEU, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"bgt", "s,t,o", "s,t,o,E", 3, OP_MATCH_BLT, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"bgtu", "s,t,o", "s,t,o,E", 3, OP_MATCH_BLTU, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"ble", "s,t,o", "s,t,o,E", 3, OP_MATCH_BGE, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"bleu", "s,t,o", "s,t,o,E", 3, OP_MATCH_BGEU, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"blt", "s,t,o", "s,t,o,E", 3, OP_MATCH_BLT, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"bltu", "s,t,o", "s,t,o,E", 3, OP_MATCH_BLTU, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"bne", "s,t,o", "s,t,o,E", 3, OP_MATCH_BNE, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow },
++ {"br", "o", "o,E", 1, OP_MATCH_BR, OP_MASK_IOP, NIOS2_INSN_UBRANCH, branch_target_overflow },
++ {"break", "b", "b,E", 1, OP_MATCH_BREAK, OP_MASK_BREAK, 0, no_overflow },
++ {"bret", "", "E", 0, OP_MATCH_BRET, OP_MASK, 0, no_overflow },
++ {"flushd", "i(s)", "i(s)E", 2, OP_MATCH_FLUSHD, OP_MASK_IOP, 0, signed_immed16_overflow },
++ {"flushi", "s", "s,E", 1, OP_MATCH_FLUSHI, OP_MASK_FLUSHI, 0, no_overflow },
++ {"flushp", "", "E", 0, OP_MATCH_FLUSHP, OP_MASK, 0, no_overflow },
++ {"initd", "i(s)", "i(s)E", 2, OP_MATCH_INITD, OP_MASK_IOP, 0, signed_immed16_overflow },
++ {"initi", "s", "s,E", 1, OP_MATCH_INITI, OP_MASK_INITI, 0, no_overflow },
++ {"call", "m", "m,E", 1, OP_MATCH_CALL, OP_MASK_IOP, NIOS2_INSN_CALL, call_target_overflow },
++ {"callr", "s", "s,E", 1, OP_MATCH_CALLR, OP_MASK_CALLR, 0, no_overflow },
++ {"cmpeq", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPEQ, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"cmpeqi", "t,s,i", "t,s,i,E", 3, OP_MATCH_CMPEQI, OP_MASK_IOP, 0, signed_immed16_overflow },
++ {"cmpge", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPGE, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"cmpgei", "t,s,i", "t,s,i,E", 3, OP_MATCH_CMPGEI, OP_MASK_IOP, 0, signed_immed16_overflow },
++ {"cmpgeu", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPGEU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"cmpgeui", "t,s,u", "t,s,u,E", 3, OP_MATCH_CMPGEUI, OP_MASK_IOP, 0, unsigned_immed16_overflow },
++ {"cmpgt", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPLT, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow },
++ {"cmpgti", "t,s,i", "t,s,i,E", 3, OP_MATCH_CMPGEI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow },
++ {"cmpgtu", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPLTU, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow },
++ {"cmpgtui", "t,s,u", "t,s,u,E", 3, OP_MATCH_CMPGEUI, OP_MASK_IOP, NIOS2_INSN_MACRO, unsigned_immed16_overflow },
++ {"cmple", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPGE, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow },
++ {"cmplei", "t,s,i", "t,s,i,E", 3, OP_MATCH_CMPLTI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow },
++ {"cmpleu", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPGEU, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow },
++ {"cmpleui", "t,s,u", "t,s,u,E", 3, OP_MATCH_CMPLTUI, OP_MASK_IOP, NIOS2_INSN_MACRO, unsigned_immed16_overflow },
++ {"cmplt", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPLT, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"cmplti", "t,s,i", "t,s,i,E", 3, OP_MATCH_CMPLTI, OP_MASK_IOP, 0, signed_immed16_overflow },
++ {"cmpltu", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPLTU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"cmpltui", "t,s,u", "t,s,u,E", 3, OP_MATCH_CMPLTUI, OP_MASK_IOP, 0, unsigned_immed16_overflow },
++ {"cmpne", "d,s,t", "d,s,t,E", 3, OP_MATCH_CMPNE, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"cmpnei", "t,s,i", "t,s,i,E", 3, OP_MATCH_CMPNEI, OP_MASK_IOP, 0, signed_immed16_overflow },
++ {"div", "d,s,t", "d,s,t,E", 3, OP_MATCH_DIV, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"divu", "d,s,t", "d,s,t,E", 3, OP_MATCH_DIVU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"jmp", "s", "s,E", 1, OP_MATCH_JMP, OP_MASK_JMP, 0, no_overflow },
++ {"ldb", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDB, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldbio", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDBIO, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldbu", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDBU, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldbuio", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDBUIO, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldh", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDH, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldhio", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDHIO, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldhu", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDHU, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldhuio", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDHUIO, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldw", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDW, OP_MASK_IOP, 0, address_offset_overflow },
++ {"ldwio", "t,i(s)", "t,i(s)E", 3, OP_MATCH_LDWIO, OP_MASK_IOP, 0, address_offset_overflow },
++ {"mov", "d,s", "d,s,E", 2, OP_MATCH_ADD, OP_MASK_RRT|OP_MASK_ROPX|OP_MASK_ROP, NIOS2_INSN_MACRO_MOV, no_overflow },
++ {"movhi", "t,u", "t,u,E", 2, OP_MATCH_ORHI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI, unsigned_immed16_overflow },
++ {"movui", "t,u", "t,u,E", 2, OP_MATCH_ORI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI, unsigned_immed16_overflow },
++ {"movi", "t,i", "t,i,E", 2, OP_MATCH_ADDI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI, signed_immed16_overflow },
++ /* movia expands to two instructions so there is no mask or match */
++ {"movia", "t,o", "t,o,E", 2, OP_MATCH_ORHI, OP_MASK_IOP, NIOS2_INSN_MACRO_MOVIA, no_overflow },
++ {"mul", "d,s,t", "d,s,t,E", 3, OP_MATCH_MUL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"muli", "t,s,i", "t,s,i,E", 3, OP_MATCH_MULI, OP_MASK_IOP, 0, signed_immed16_overflow },
++ {"mulxss", "d,s,t", "d,s,t,E", 3, OP_MATCH_MULXSS, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"mulxsu", "d,s,t", "d,s,t,E", 3, OP_MATCH_MULXSU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"mulxuu", "d,s,t", "d,s,t,E", 3, OP_MATCH_MULXUU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"nextpc", "d", "d,E", 1, OP_MATCH_NEXTPC, OP_MASK_NEXTPC, 0, no_overflow },
++ {"nop", "", "E", 0, OP_MATCH_ADD, OP_MASK, NIOS2_INSN_MACRO_MOV, no_overflow },
++ {"nor", "d,s,t", "d,s,t,E", 3, OP_MATCH_NOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"or", "d,s,t", "d,s,t,E", 3, OP_MATCH_OR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"orhi", "t,s,u", "t,s,u,E", 3, OP_MATCH_ORHI, OP_MASK_IOP, 0, unsigned_immed16_overflow },
++ {"ori", "t,s,u", "t,s,u,E", 3, OP_MATCH_ORI, OP_MASK_IOP, NIOS2_INSN_ORI, unsigned_immed16_overflow },
++ {"rdctl", "d,c", "d,c,E", 2, OP_MATCH_RDCTL, OP_MASK_RDCTL, 0, no_overflow },
++ {"ret", "", "E", 0, OP_MATCH_RET, OP_MASK, 0, no_overflow },
++ {"rol", "d,s,t", "d,s,t,E", 3, OP_MATCH_ROL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"roli", "d,s,j", "d,s,j,E", 3, OP_MATCH_ROLI, OP_MASK_ROLI, 0, unsigned_immed5_overflow },
++ {"ror", "d,s,t", "d,s,t,E", 3, OP_MATCH_ROR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"sll", "d,s,t", "d,s,t,E", 3, OP_MATCH_SLL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"slli", "d,s,j", "d,s,j,E", 3, OP_MATCH_SLLI, OP_MASK_SLLI, 0, unsigned_immed5_overflow },
++ {"sra", "d,s,t", "d,s,t,E", 3, OP_MATCH_SRA, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"srai", "d,s,j", "d,s,j,E", 3, OP_MATCH_SRAI, OP_MASK_SRAI, 0, unsigned_immed5_overflow },
++ {"srl", "d,s,t", "d,s,t,E", 3, OP_MATCH_SRL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"srli", "d,s,j", "d,s,j,E", 3, OP_MATCH_SRLI, OP_MASK_SRLI, 0, unsigned_immed5_overflow },
++ {"stb", "t,i(s)", "t,i(s)E", 3, OP_MATCH_STB, OP_MASK_IOP, 0, address_offset_overflow },
++ {"stbio", "t,i(s)", "t,i(s)E", 3, OP_MATCH_STBIO, OP_MASK_IOP, 0, address_offset_overflow },
++ {"sth", "t,i(s)", "t,i(s)E", 3, OP_MATCH_STH, OP_MASK_IOP, 0, address_offset_overflow },
++ {"sthio", "t,i(s)", "t,i(s)E", 3, OP_MATCH_STHIO, OP_MASK_IOP, 0, address_offset_overflow },
++ {"stw", "t,i(s)", "t,i(s)E", 3, OP_MATCH_STW, OP_MASK_IOP, 0, address_offset_overflow },
++ {"stwio", "t,i(s)", "t,i(s)E", 3, OP_MATCH_STWIO, OP_MASK_IOP, 0, address_offset_overflow },
++ {"sub", "d,s,t", "d,s,t,E", 3, OP_MATCH_SUB, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"sync", "", "E", 0, OP_MATCH_SYNC, OP_MASK_SYNC, 0, no_overflow },
++ {"trap", "", "E", 0, OP_MATCH_TRAP, OP_MASK_TRAP, 0, no_overflow },
++ {"eret", "", "E", 0, OP_MATCH_ERET, OP_MASK, 0, no_overflow },
++ {"custom", "l,d,s,t", "l,d,s,t,E", 4, OP_MATCH_CUSTOM, OP_MASK_ROP, 0, custom_opcode_overflow },
++ {"wrctl", "c,s", "c,s,E", 2, OP_MATCH_WRCTL, OP_MASK_WRCTL, 0, no_overflow },
++ {"xor", "d,s,t", "d,s,t,E", 3, OP_MATCH_XOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow },
++ {"xorhi", "t,s,u", "t,s,u,E", 3, OP_MATCH_XORHI, OP_MASK_IOP, 0, unsigned_immed16_overflow },
++ {"xori", "t,s,u", "t,s,u,E", 3, OP_MATCH_XORI, OP_MASK_IOP, NIOS2_INSN_XORI, unsigned_immed16_overflow }
++};
++/* *INDENT-ON* */
++
++#define NIOS2_NUM_OPCODES \
++ ((sizeof nios2_builtin_opcodes) / (sizeof (nios2_builtin_opcodes[0])))
++const int bfd_nios2_num_builtin_opcodes = NIOS2_NUM_OPCODES;
++
++/* const removed from the following to allow for dynamic extensions to the
++ * built-in instruction set. */
++struct nios2_opcode *nios2_opcodes =
++ (struct nios2_opcode *) nios2_builtin_opcodes;
++int bfd_nios2_num_opcodes = NIOS2_NUM_OPCODES;
++#undef NIOS2_NUM_OPCODES
Select the version of binutils you wish to use.
config BR2_BINUTILS_VERSION_2_14_90_0_8
+ depends !BR2_nios2
bool "binutils 2.14.90.0.8"
config BR2_BINUTILS_VERSION_2_15
bool "binutils 2.15"
config BR2_BINUTILS_VERSION_2_15_94_0_2_2
+ depends !BR2_nios2
bool "binutils 2.15.94.0.2.2"
config BR2_BINUTILS_VERSION_2_15_97
+ depends !BR2_nios2
bool "binutils 2.15.97"
config BR2_BINUTILS_VERSION_2_16
+ depends !BR2_nios2
bool "binutils 2.16"
config BR2_BINUTILS_VERSION_2_16_1
+ depends !BR2_nios2
bool "binutils 2.16.1"
config BR2_BINUTILS_VERSION_2_16_90_0_3
+ depends !BR2_nios2
bool "binutils 2.16.90.0.3"
config BR2_BINUTILS_VERSION_2_16_91_0_2
+ depends !BR2_nios2
bool "binutils 2.16.91.0.2"
config BR2_BINUTILS_VERSION_2_16_91_0_3
+ depends !BR2_nios2
bool "binutils 2.16.91.0.3"
config BR2_BINUTILS_VERSION_2_16_91_0_4
+ depends !BR2_nios2
bool "binutils 2.16.91.0.4"
config BR2_BINUTILS_VERSION_2_16_91_0_5
+ depends !BR2_nios2
bool "binutils 2.16.91.0.5"
endchoice
--- /dev/null
+--- gcc-3.4.2/gcc/Makefile.in
++++ gcc-3.4.2.nios2/gcc/Makefile.in
+@@ -3067,7 +3067,7 @@ install-mkheaders: stmp-int-hdrs $(STMP_
+ $(INSTALL_DATA) $(srcdir)/README-fixinc \
+ $(DESTDIR)$(itoolsdatadir)/include/README ; \
+ $(INSTALL_SCRIPT) fixinc.sh $(DESTDIR)$(itoolsdir)/fixinc.sh ; \
+- $(INSTALL_PROGRAM) fixinc/fixincl $(DESTDIR)$(itoolsdir)/fixincl ; \
++ $(INSTALL_PROGRAM) fixinc/fixincl$(build_exeext) $(DESTDIR)$(itoolsdir)/fixincl$(build_exeext) ; \
+ $(INSTALL_DATA) $(srcdir)/gsyslimits.h \
+ $(DESTDIR)$(itoolsdatadir)/gsyslimits.h ; \
+ else :; fi
+--- gcc-3.4.2/gcc/combine.c
++++ gcc-3.4.2.nios2/gcc/combine.c
+@@ -4379,6 +4379,14 @@ combine_simplify_rtx (rtx x, enum machin
+ mode);
+ }
+
++#ifndef __nios2__
++/* This screws up Nios II in this test case:
++
++if (x & 1)
++ return 2;
++else
++ return 3;
++*/
+ else if (STORE_FLAG_VALUE == 1
+ && new_code == EQ && GET_MODE_CLASS (mode) == MODE_INT
+ && op1 == const0_rtx
+@@ -4390,6 +4398,7 @@ combine_simplify_rtx (rtx x, enum machin
+ gen_lowpart_for_combine (mode, op0),
+ const1_rtx);
+ }
++#endif
+
+ else if (STORE_FLAG_VALUE == 1
+ && new_code == EQ && GET_MODE_CLASS (mode) == MODE_INT
+--- gcc-3.4.2/gcc/config/nios2/crti.asm
++++ gcc-3.4.2.nios2/gcc/config/nios2/crti.asm
+@@ -0,0 +1,88 @@
++/*
++ Copyright (C) 2003
++ by Jonah Graham (jgraham@altera.com)
++
++This file is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 2, or (at your option) any
++later version.
++
++In addition to the permissions in the GNU General Public License, the
++Free Software Foundation gives you unlimited permission to link the
++compiled version of this file with other programs, and to distribute
++those programs without any restriction coming from the use of this
++file. (The General Public License restrictions do apply in other
++respects; for example, they cover modification of the file, and
++distribution when not linked into another program.)
++
++This file is distributed in the hope that it will be useful, but
++WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA.
++
++ As a special exception, if you link this library with files
++ compiled with GCC to produce an executable, this does not cause
++ the resulting executable to be covered by the GNU General Public License.
++ This exception does not however invalidate any other reasons why
++ the executable file might be covered by the GNU General Public License.
++
++
++This file just make a stack frame for the contents of the .fini and
++.init sections. Users may put any desired instructions in those
++sections.
++
++
++While technically any code can be put in the init and fini sections
++most stuff will not work other than stuff which obeys the call frame
++and ABI. All the call-preserved registers are saved, the call clobbered
++registers should have been saved by the code calling init and fini.
++
++See crtstuff.c for an example of code that inserts itself in the
++init and fini sections.
++
++See crt0.s for the code that calls init and fini.
++*/
++
++ .file "crti.asm"
++
++ .section ".init"
++ .align 2
++ .global _init
++_init:
++ addi sp, sp, -48
++ stw ra, 44(sp)
++ stw r23, 40(sp)
++ stw r22, 36(sp)
++ stw r21, 32(sp)
++ stw r20, 28(sp)
++ stw r19, 24(sp)
++ stw r18, 20(sp)
++ stw r17, 16(sp)
++ stw r16, 12(sp)
++ stw fp, 8(sp)
++ mov fp, sp
++
++
++ .section ".fini"
++ .align 2
++ .global _fini
++_fini:
++ addi sp, sp, -48
++ stw ra, 44(sp)
++ stw r23, 40(sp)
++ stw r22, 36(sp)
++ stw r21, 32(sp)
++ stw r20, 28(sp)
++ stw r19, 24(sp)
++ stw r18, 20(sp)
++ stw r17, 16(sp)
++ stw r16, 12(sp)
++ stw fp, 8(sp)
++ mov fp, sp
++
++
+--- gcc-3.4.2/gcc/config/nios2/crtn.asm
++++ gcc-3.4.2.nios2/gcc/config/nios2/crtn.asm
+@@ -0,0 +1,70 @@
++/*
++ Copyright (C) 2003
++ by Jonah Graham (jgraham@altera.com)
++
++This file is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 2, or (at your option) any
++later version.
++
++In addition to the permissions in the GNU General Public License, the
++Free Software Foundation gives you unlimited permission to link the
++compiled version of this file with other programs, and to distribute
++those programs without any restriction coming from the use of this
++file. (The General Public License restrictions do apply in other
++respects; for example, they cover modification of the file, and
++distribution when not linked into another program.)
++
++This file is distributed in the hope that it will be useful, but
++WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA.
++
++ As a special exception, if you link this library with files
++ compiled with GCC to produce an executable, this does not cause
++ the resulting executable to be covered by the GNU General Public License.
++ This exception does not however invalidate any other reasons why
++ the executable file might be covered by the GNU General Public License.
++
++
++This file just makes sure that the .fini and .init sections do in
++fact return. Users may put any desired instructions in those sections.
++This file is the last thing linked into any executable.
++*/
++ .file "crtn.asm"
++
++
++
++ .section ".init"
++ ldw ra, 44(sp)
++ ldw r23, 40(sp)
++ ldw r22, 36(sp)
++ ldw r21, 32(sp)
++ ldw r20, 28(sp)
++ ldw r19, 24(sp)
++ ldw r18, 20(sp)
++ ldw r17, 16(sp)
++ ldw r16, 12(sp)
++ ldw fp, 8(sp)
++ addi sp, sp, -48
++ ret
++
++ .section ".fini"
++ ldw ra, 44(sp)
++ ldw r23, 40(sp)
++ ldw r22, 36(sp)
++ ldw r21, 32(sp)
++ ldw r20, 28(sp)
++ ldw r19, 24(sp)
++ ldw r18, 20(sp)
++ ldw r17, 16(sp)
++ ldw r16, 12(sp)
++ ldw fp, 8(sp)
++ addi sp, sp, -48
++ ret
++
+--- gcc-3.4.2/gcc/config/nios2/lib2-divmod-hi.c
++++ gcc-3.4.2.nios2/gcc/config/nios2/lib2-divmod-hi.c
+@@ -0,0 +1,123 @@
++
++/* We include auto-host.h here to get HAVE_GAS_HIDDEN. This is
++ supposedly valid even though this is a "target" file. */
++#include "auto-host.h"
++
++
++#include "tconfig.h"
++#include "tsystem.h"
++#include "coretypes.h"
++#include "tm.h"
++
++
++/* Don't use `fancy_abort' here even if config.h says to use it. */
++#ifdef abort
++#undef abort
++#endif
++
++
++#ifdef HAVE_GAS_HIDDEN
++#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__ ("hidden")))
++#else
++#define ATTRIBUTE_HIDDEN
++#endif
++
++#include "libgcc2.h"
++
++extern HItype __modhi3 (HItype, HItype);
++extern HItype __divhi3 (HItype, HItype);
++extern HItype __umodhi3 (HItype, HItype);
++extern HItype __udivhi3 (HItype, HItype);
++
++static UHItype udivmodhi4(UHItype, UHItype, word_type);
++
++static UHItype
++udivmodhi4(UHItype num, UHItype den, word_type modwanted)
++{
++ UHItype bit = 1;
++ UHItype res = 0;
++
++ while (den < num && bit && !(den & (1L<<15)))
++ {
++ den <<=1;
++ bit <<=1;
++ }
++ while (bit)
++ {
++ if (num >= den)
++ {
++ num -= den;
++ res |= bit;
++ }
++ bit >>=1;
++ den >>=1;
++ }
++ if (modwanted) return num;
++ return res;
++}
++
++
++HItype
++__divhi3 (HItype a, HItype b)
++{
++ word_type neg = 0;
++ HItype res;
++
++ if (a < 0)
++ {
++ a = -a;
++ neg = !neg;
++ }
++
++ if (b < 0)
++ {
++ b = -b;
++ neg = !neg;
++ }
++
++ res = udivmodhi4 (a, b, 0);
++
++ if (neg)
++ res = -res;
++
++ return res;
++}
++
++
++HItype
++__modhi3 (HItype a, HItype b)
++{
++ word_type neg = 0;
++ HItype res;
++
++ if (a < 0)
++ {
++ a = -a;
++ neg = 1;
++ }
++
++ if (b < 0)
++ b = -b;
++
++ res = udivmodhi4 (a, b, 1);
++
++ if (neg)
++ res = -res;
++
++ return res;
++}
++
++
++HItype
++__udivhi3 (HItype a, HItype b)
++{
++ return udivmodhi4 (a, b, 0);
++}
++
++
++HItype
++__umodhi3 (HItype a, HItype b)
++{
++ return udivmodhi4 (a, b, 1);
++}
++
+--- gcc-3.4.2/gcc/config/nios2/lib2-divmod.c
++++ gcc-3.4.2.nios2/gcc/config/nios2/lib2-divmod.c
+@@ -0,0 +1,126 @@
++
++/* We include auto-host.h here to get HAVE_GAS_HIDDEN. This is
++ supposedly valid even though this is a "target" file. */
++#include "auto-host.h"
++
++
++#include "tconfig.h"
++#include "tsystem.h"
++#include "coretypes.h"
++#include "tm.h"
++
++
++/* Don't use `fancy_abort' here even if config.h says to use it. */
++#ifdef abort
++#undef abort
++#endif
++
++
++#ifdef HAVE_GAS_HIDDEN
++#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__ ("hidden")))
++#else
++#define ATTRIBUTE_HIDDEN
++#endif
++
++#include "libgcc2.h"
++
++extern SItype __modsi3 (SItype, SItype);
++extern SItype __divsi3 (SItype, SItype);
++extern SItype __umodsi3 (SItype, SItype);
++extern SItype __udivsi3 (SItype, SItype);
++
++static USItype udivmodsi4(USItype, USItype, word_type);
++
++/* 16-bit SI divide and modulo as used in NIOS */
++
++
++static USItype
++udivmodsi4(USItype num, USItype den, word_type modwanted)
++{
++ USItype bit = 1;
++ USItype res = 0;
++
++ while (den < num && bit && !(den & (1L<<31)))
++ {
++ den <<=1;
++ bit <<=1;
++ }
++ while (bit)
++ {
++ if (num >= den)
++ {
++ num -= den;
++ res |= bit;
++ }
++ bit >>=1;
++ den >>=1;
++ }
++ if (modwanted) return num;
++ return res;
++}
++
++
++SItype
++__divsi3 (SItype a, SItype b)
++{
++ word_type neg = 0;
++ SItype res;
++
++ if (a < 0)
++ {
++ a = -a;
++ neg = !neg;
++ }
++
++ if (b < 0)
++ {
++ b = -b;
++ neg = !neg;
++ }
++
++ res = udivmodsi4 (a, b, 0);
++
++ if (neg)
++ res = -res;
++
++ return res;
++}
++
++
++SItype
++__modsi3 (SItype a, SItype b)
++{
++ word_type neg = 0;
++ SItype res;
++
++ if (a < 0)
++ {
++ a = -a;
++ neg = 1;
++ }
++
++ if (b < 0)
++ b = -b;
++
++ res = udivmodsi4 (a, b, 1);
++
++ if (neg)
++ res = -res;
++
++ return res;
++}
++
++
++SItype
++__udivsi3 (SItype a, SItype b)
++{
++ return udivmodsi4 (a, b, 0);
++}
++
++
++SItype
++__umodsi3 (SItype a, SItype b)
++{
++ return udivmodsi4 (a, b, 1);
++}
++
+--- gcc-3.4.2/gcc/config/nios2/lib2-divtable.c
++++ gcc-3.4.2.nios2/gcc/config/nios2/lib2-divtable.c
+@@ -0,0 +1,46 @@
++
++/* We include auto-host.h here to get HAVE_GAS_HIDDEN. This is
++ supposedly valid even though this is a "target" file. */
++#include "auto-host.h"
++
++
++#include "tconfig.h"
++#include "tsystem.h"
++#include "coretypes.h"
++#include "tm.h"
++
++
++/* Don't use `fancy_abort' here even if config.h says to use it. */
++#ifdef abort
++#undef abort
++#endif
++
++
++#ifdef HAVE_GAS_HIDDEN
++#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__ ("hidden")))
++#else
++#define ATTRIBUTE_HIDDEN
++#endif
++
++#include "libgcc2.h"
++
++UQItype __divsi3_table[] =
++{
++ 0, 0/1, 0/2, 0/3, 0/4, 0/5, 0/6, 0/7, 0/8, 0/9, 0/10, 0/11, 0/12, 0/13, 0/14, 0/15,
++ 0, 1/1, 1/2, 1/3, 1/4, 1/5, 1/6, 1/7, 1/8, 1/9, 1/10, 1/11, 1/12, 1/13, 1/14, 1/15,
++ 0, 2/1, 2/2, 2/3, 2/4, 2/5, 2/6, 2/7, 2/8, 2/9, 2/10, 2/11, 2/12, 2/13, 2/14, 2/15,
++ 0, 3/1, 3/2, 3/3, 3/4, 3/5, 3/6, 3/7, 3/8, 3/9, 3/10, 3/11, 3/12, 3/13, 3/14, 3/15,
++ 0, 4/1, 4/2, 4/3, 4/4, 4/5, 4/6, 4/7, 4/8, 4/9, 4/10, 4/11, 4/12, 4/13, 4/14, 4/15,
++ 0, 5/1, 5/2, 5/3, 5/4, 5/5, 5/6, 5/7, 5/8, 5/9, 5/10, 5/11, 5/12, 5/13, 5/14, 5/15,
++ 0, 6/1, 6/2, 6/3, 6/4, 6/5, 6/6, 6/7, 6/8, 6/9, 6/10, 6/11, 6/12, 6/13, 6/14, 6/15,
++ 0, 7/1, 7/2, 7/3, 7/4, 7/5, 7/6, 7/7, 7/8, 7/9, 7/10, 7/11, 7/12, 7/13, 7/14, 7/15,
++ 0, 8/1, 8/2, 8/3, 8/4, 8/5, 8/6, 8/7, 8/8, 8/9, 8/10, 8/11, 8/12, 8/13, 8/14, 8/15,
++ 0, 9/1, 9/2, 9/3, 9/4, 9/5, 9/6, 9/7, 9/8, 9/9, 9/10, 9/11, 9/12, 9/13, 9/14, 9/15,
++ 0, 10/1, 10/2, 10/3, 10/4, 10/5, 10/6, 10/7, 10/8, 10/9, 10/10, 10/11, 10/12, 10/13, 10/14, 10/15,
++ 0, 11/1, 11/2, 11/3, 11/4, 11/5, 11/6, 11/7, 11/8, 11/9, 11/10, 11/11, 11/12, 11/13, 11/14, 11/15,
++ 0, 12/1, 12/2, 12/3, 12/4, 12/5, 12/6, 12/7, 12/8, 12/9, 12/10, 12/11, 12/12, 12/13, 12/14, 12/15,
++ 0, 13/1, 13/2, 13/3, 13/4, 13/5, 13/6, 13/7, 13/8, 13/9, 13/10, 13/11, 13/12, 13/13, 13/14, 13/15,
++ 0, 14/1, 14/2, 14/3, 14/4, 14/5, 14/6, 14/7, 14/8, 14/9, 14/10, 14/11, 14/12, 14/13, 14/14, 14/15,
++ 0, 15/1, 15/2, 15/3, 15/4, 15/5, 15/6, 15/7, 15/8, 15/9, 15/10, 15/11, 15/12, 15/13, 15/14, 15/15,
++};
++
+--- gcc-3.4.2/gcc/config/nios2/lib2-mul.c
++++ gcc-3.4.2.nios2/gcc/config/nios2/lib2-mul.c
+@@ -0,0 +1,103 @@
++/* while we are debugging (ie compile outside of gcc build)
++ disable gcc specific headers */
++#ifndef DEBUG_MULSI3
++
++
++/* We include auto-host.h here to get HAVE_GAS_HIDDEN. This is
++ supposedly valid even though this is a "target" file. */
++#include "auto-host.h"
++
++
++#include "tconfig.h"
++#include "tsystem.h"
++#include "coretypes.h"
++#include "tm.h"
++
++
++/* Don't use `fancy_abort' here even if config.h says to use it. */
++#ifdef abort
++#undef abort
++#endif
++
++
++#ifdef HAVE_GAS_HIDDEN
++#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__ ("hidden")))
++#else
++#define ATTRIBUTE_HIDDEN
++#endif
++
++#include "libgcc2.h"
++
++#else
++#define SItype int
++#define USItype unsigned int
++#endif
++
++
++extern SItype __mulsi3 (SItype, SItype);
++
++SItype
++__mulsi3 (SItype a, SItype b)
++{
++ SItype res = 0;
++ USItype cnt = a;
++
++ while (cnt)
++ {
++ if (cnt & 1)
++ {
++ res += b;
++ }
++ b <<= 1;
++ cnt >>= 1;
++ }
++
++ return res;
++}
++/*
++TODO: Choose best alternative implementation.
++
++SItype
++__divsi3 (SItype a, SItype b)
++{
++ SItype res = 0;
++ USItype cnt = 0;
++
++ while (cnt < 32)
++ {
++ if (a & (1L << cnt))
++ {
++ res += b;
++ }
++ b <<= 1;
++ cnt++;
++ }
++
++ return res;
++}
++*/
++
++
++#ifdef DEBUG_MULSI3
++
++int
++main ()
++{
++ int i, j;
++ int error = 0;
++
++ for (i = -1000; i < 1000; i++)
++ for (j = -1000; j < 1000; j++)
++ {
++ int expect = i * j;
++ int actual = A__divsi3 (i, j);
++ if (expect != actual)
++ {
++ printf ("error: %d * %d = %d not %d\n", i, j, expect, actual);
++ error = 1;
++ }
++ }
++
++ return error;
++}
++#endif
+--- gcc-3.4.2/gcc/config/nios2/nios2-dp-bit.c
++++ gcc-3.4.2.nios2/gcc/config/nios2/nios2-dp-bit.c
+@@ -0,0 +1,1652 @@
++
++/* This is a software floating point library which can be used
++ for targets without hardware floating point.
++ Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2004
++ Free Software Foundation, Inc.
++
++This file is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 2, or (at your option) any
++later version.
++
++In addition to the permissions in the GNU General Public License, the
++Free Software Foundation gives you unlimited permission to link the
++compiled version of this file with other programs, and to distribute
++those programs without any restriction coming from the use of this
++file. (The General Public License restrictions do apply in other
++respects; for example, they cover modification of the file, and
++distribution when not linked into another program.)
++
++This file is distributed in the hope that it will be useful, but
++WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++/* As a special exception, if you link this library with other files,
++ some of which are compiled with GCC, to produce an executable,
++ this library does not by itself cause the resulting executable
++ to be covered by the GNU General Public License.
++ This exception does not however invalidate any other reasons why
++ the executable file might be covered by the GNU General Public License. */
++
++/* This implements IEEE 754 format arithmetic, but does not provide a
++ mechanism for setting the rounding mode, or for generating or handling
++ exceptions.
++
++ The original code by Steve Chamberlain, hacked by Mark Eichin and Jim
++ Wilson, all of Cygnus Support. */
++
++/* The intended way to use this file is to make two copies, add `#define FLOAT'
++ to one copy, then compile both copies and add them to libgcc.a. */
++
++#include "tconfig.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "config/fp-bit.h"
++
++/* The following macros can be defined to change the behavior of this file:
++ FLOAT: Implement a `float', aka SFmode, fp library. If this is not
++ defined, then this file implements a `double', aka DFmode, fp library.
++ FLOAT_ONLY: Used with FLOAT, to implement a `float' only library, i.e.
++ don't include float->double conversion which requires the double library.
++ This is useful only for machines which can't support doubles, e.g. some
++ 8-bit processors.
++ CMPtype: Specify the type that floating point compares should return.
++ This defaults to SItype, aka int.
++ US_SOFTWARE_GOFAST: This makes all entry points use the same names as the
++ US Software goFast library.
++ _DEBUG_BITFLOAT: This makes debugging the code a little easier, by adding
++ two integers to the FLO_union_type.
++ NO_DENORMALS: Disable handling of denormals.
++ NO_NANS: Disable nan and infinity handling
++ SMALL_MACHINE: Useful when operations on QIs and HIs are faster
++ than on an SI */
++
++/* We don't currently support extended floats (long doubles) on machines
++ without hardware to deal with them.
++
++ These stubs are just to keep the linker from complaining about unresolved
++ references which can be pulled in from libio & libstdc++, even if the
++ user isn't using long doubles. However, they may generate an unresolved
++ external to abort if abort is not used by the function, and the stubs
++ are referenced from within libc, since libgcc goes before and after the
++ system library. */
++
++#ifdef DECLARE_LIBRARY_RENAMES
++ DECLARE_LIBRARY_RENAMES
++#endif
++
++#ifdef EXTENDED_FLOAT_STUBS
++extern void abort (void);
++void __extendsfxf2 (void) { abort(); }
++void __extenddfxf2 (void) { abort(); }
++void __truncxfdf2 (void) { abort(); }
++void __truncxfsf2 (void) { abort(); }
++void __fixxfsi (void) { abort(); }
++void __floatsixf (void) { abort(); }
++void __addxf3 (void) { abort(); }
++void __subxf3 (void) { abort(); }
++void __mulxf3 (void) { abort(); }
++void __divxf3 (void) { abort(); }
++void __negxf2 (void) { abort(); }
++void __eqxf2 (void) { abort(); }
++void __nexf2 (void) { abort(); }
++void __gtxf2 (void) { abort(); }
++void __gexf2 (void) { abort(); }
++void __lexf2 (void) { abort(); }
++void __ltxf2 (void) { abort(); }
++
++void __extendsftf2 (void) { abort(); }
++void __extenddftf2 (void) { abort(); }
++void __trunctfdf2 (void) { abort(); }
++void __trunctfsf2 (void) { abort(); }
++void __fixtfsi (void) { abort(); }
++void __floatsitf (void) { abort(); }
++void __addtf3 (void) { abort(); }
++void __subtf3 (void) { abort(); }
++void __multf3 (void) { abort(); }
++void __divtf3 (void) { abort(); }
++void __negtf2 (void) { abort(); }
++void __eqtf2 (void) { abort(); }
++void __netf2 (void) { abort(); }
++void __gttf2 (void) { abort(); }
++void __getf2 (void) { abort(); }
++void __letf2 (void) { abort(); }
++void __lttf2 (void) { abort(); }
++#else /* !EXTENDED_FLOAT_STUBS, rest of file */
++
++/* IEEE "special" number predicates */
++
++#ifdef NO_NANS
++
++#define nan() 0
++#define isnan(x) 0
++#define isinf(x) 0
++#else
++
++#if defined L_thenan_sf
++const fp_number_type __thenan_sf = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined L_thenan_df
++const fp_number_type __thenan_df = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined L_thenan_tf
++const fp_number_type __thenan_tf = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined TFLOAT
++extern const fp_number_type __thenan_tf;
++#elif defined FLOAT
++extern const fp_number_type __thenan_sf;
++#else
++extern const fp_number_type __thenan_df;
++#endif
++
++INLINE
++static fp_number_type *
++nan (void)
++{
++ /* Discard the const qualifier... */
++#ifdef TFLOAT
++ return (fp_number_type *) (& __thenan_tf);
++#elif defined FLOAT
++ return (fp_number_type *) (& __thenan_sf);
++#else
++ return (fp_number_type *) (& __thenan_df);
++#endif
++}
++
++INLINE
++static int
++isnan ( fp_number_type * x)
++{
++ return x->class == CLASS_SNAN || x->class == CLASS_QNAN;
++}
++
++INLINE
++static int
++isinf ( fp_number_type * x)
++{
++ return x->class == CLASS_INFINITY;
++}
++
++#endif /* NO_NANS */
++
++INLINE
++static int
++iszero ( fp_number_type * x)
++{
++ return x->class == CLASS_ZERO;
++}
++
++INLINE
++static void
++flip_sign ( fp_number_type * x)
++{
++ x->sign = !x->sign;
++}
++
++extern FLO_type pack_d ( fp_number_type * );
++
++#if defined(L_pack_df) || defined(L_pack_sf) || defined(L_pack_tf)
++FLO_type
++pack_d ( fp_number_type * src)
++{
++ FLO_union_type dst;
++ fractype fraction = src->fraction.ll; /* wasn't unsigned before? */
++ int sign = src->sign;
++ int exp = 0;
++
++ if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && (isnan (src) || isinf (src)))
++ {
++ /* We can't represent these values accurately. By using the
++ largest possible magnitude, we guarantee that the conversion
++ of infinity is at least as big as any finite number. */
++ exp = EXPMAX;
++ fraction = ((fractype) 1 << FRACBITS) - 1;
++ }
++ else if (isnan (src))
++ {
++ exp = EXPMAX;
++ if (src->class == CLASS_QNAN || 1)
++ {
++#ifdef QUIET_NAN_NEGATED
++ fraction |= QUIET_NAN - 1;
++#else
++ fraction |= QUIET_NAN;
++#endif
++ }
++ }
++ else if (isinf (src))
++ {
++ exp = EXPMAX;
++ fraction = 0;
++ }
++ else if (iszero (src))
++ {
++ exp = 0;
++ fraction = 0;
++ }
++ else if (fraction == 0)
++ {
++ exp = 0;
++ }
++ else
++ {
++ if (src->normal_exp < NORMAL_EXPMIN)
++ {
++#ifdef NO_DENORMALS
++ /* Go straight to a zero representation if denormals are not
++ supported. The denormal handling would be harmless but
++ isn't unnecessary. */
++ exp = 0;
++ fraction = 0;
++#else /* NO_DENORMALS */
++ /* This number's exponent is too low to fit into the bits
++ available in the number, so we'll store 0 in the exponent and
++ shift the fraction to the right to make up for it. */
++
++ int shift = NORMAL_EXPMIN - src->normal_exp;
++
++ exp = 0;
++
++ if (shift > FRAC_NBITS - NGARDS)
++ {
++ /* No point shifting, since it's more that 64 out. */
++ fraction = 0;
++ }
++ else
++ {
++ int lowbit = (fraction & (((fractype)1 << shift) - 1)) ? 1 : 0;
++ fraction = (fraction >> shift) | lowbit;
++ }
++ if ((fraction & GARDMASK) == GARDMSB)
++ {
++ if ((fraction & (1 << NGARDS)))
++ fraction += GARDROUND + 1;
++ }
++ else
++ {
++ /* Add to the guards to round up. */
++ fraction += GARDROUND;
++ }
++ /* Perhaps the rounding means we now need to change the
++ exponent, because the fraction is no longer denormal. */
++ if (fraction >= IMPLICIT_1)
++ {
++ exp += 1;
++ }
++ fraction >>= NGARDS;
++#endif /* NO_DENORMALS */
++ }
++ else if (!LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS)
++ && src->normal_exp > EXPBIAS)
++ {
++ exp = EXPMAX;
++ fraction = 0;
++ }
++ else
++ {
++ exp = src->normal_exp + EXPBIAS;
++ if (!ROUND_TOWARDS_ZERO)
++ {
++ /* IF the gard bits are the all zero, but the first, then we're
++ half way between two numbers, choose the one which makes the
++ lsb of the answer 0. */
++ if ((fraction & GARDMASK) == GARDMSB)
++ {
++ if (fraction & (1 << NGARDS))
++ fraction += GARDROUND + 1;
++ }
++ else
++ {
++ /* Add a one to the guards to round up */
++ fraction += GARDROUND;
++ }
++ if (fraction >= IMPLICIT_2)
++ {
++ fraction >>= 1;
++ exp += 1;
++ }
++ }
++ fraction >>= NGARDS;
++
++ if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && exp > EXPMAX)
++ {
++ /* Saturate on overflow. */
++ exp = EXPMAX;
++ fraction = ((fractype) 1 << FRACBITS) - 1;
++ }
++ }
++ }
++
++ /* We previously used bitfields to store the number, but this doesn't
++ handle little/big endian systems conveniently, so use shifts and
++ masks */
++#ifdef FLOAT_BIT_ORDER_MISMATCH
++ dst.bits.fraction = fraction;
++ dst.bits.exp = exp;
++ dst.bits.sign = sign;
++#else
++# if defined TFLOAT && defined HALFFRACBITS
++ {
++ halffractype high, low, unity;
++ int lowsign, lowexp;
++
++ unity = (halffractype) 1 << HALFFRACBITS;
++
++ /* Set HIGH to the high double's significand, masking out the implicit 1.
++ Set LOW to the low double's full significand. */
++ high = (fraction >> (FRACBITS - HALFFRACBITS)) & (unity - 1);
++ low = fraction & (unity * 2 - 1);
++
++ /* Get the initial sign and exponent of the low double. */
++ lowexp = exp - HALFFRACBITS - 1;
++ lowsign = sign;
++
++ /* HIGH should be rounded like a normal double, making |LOW| <=
++ 0.5 ULP of HIGH. Assume round-to-nearest. */
++ if (exp < EXPMAX)
++ if (low > unity || (low == unity && (high & 1) == 1))
++ {
++ /* Round HIGH up and adjust LOW to match. */
++ high++;
++ if (high == unity)
++ {
++ /* May make it infinite, but that's OK. */
++ high = 0;
++ exp++;
++ }
++ low = unity * 2 - low;
++ lowsign ^= 1;
++ }
++
++ high |= (halffractype) exp << HALFFRACBITS;
++ high |= (halffractype) sign << (HALFFRACBITS + EXPBITS);
++
++ if (exp == EXPMAX || exp == 0 || low == 0)
++ low = 0;
++ else
++ {
++ while (lowexp > 0 && low < unity)
++ {
++ low <<= 1;
++ lowexp--;
++ }
++
++ if (lowexp <= 0)
++ {
++ halffractype roundmsb, round;
++ int shift;
++
++ shift = 1 - lowexp;
++ roundmsb = (1 << (shift - 1));
++ round = low & ((roundmsb << 1) - 1);
++
++ low >>= shift;
++ lowexp = 0;
++
++ if (round > roundmsb || (round == roundmsb && (low & 1) == 1))
++ {
++ low++;
++ if (low == unity)
++ /* LOW rounds up to the smallest normal number. */
++ lowexp++;
++ }
++ }
++
++ low &= unity - 1;
++ low |= (halffractype) lowexp << HALFFRACBITS;
++ low |= (halffractype) lowsign << (HALFFRACBITS + EXPBITS);
++ }
++ dst.value_raw = ((fractype) high << HALFSHIFT) | low;
++ }
++# else
++ dst.value_raw = fraction & ((((fractype)1) << FRACBITS) - (fractype)1);
++ dst.value_raw |= ((fractype) (exp & ((1 << EXPBITS) - 1))) << FRACBITS;
++ dst.value_raw |= ((fractype) (sign & 1)) << (FRACBITS | EXPBITS);
++# endif
++#endif
++
++#if defined(FLOAT_WORD_ORDER_MISMATCH) && !defined(FLOAT)
++#ifdef TFLOAT
++ {
++ qrtrfractype tmp1 = dst.words[0];
++ qrtrfractype tmp2 = dst.words[1];
++ dst.words[0] = dst.words[3];
++ dst.words[1] = dst.words[2];
++ dst.words[2] = tmp2;
++ dst.words[3] = tmp1;
++ }
++#else
++ {
++ halffractype tmp = dst.words[0];
++ dst.words[0] = dst.words[1];
++ dst.words[1] = tmp;
++ }
++#endif
++#endif
++
++ return dst.value;
++}
++#endif
++
++#if defined(L_unpack_df) || defined(L_unpack_sf) || defined(L_unpack_tf)
++void
++unpack_d (FLO_union_type * src, fp_number_type * dst)
++{
++ /* We previously used bitfields to store the number, but this doesn't
++ handle little/big endian systems conveniently, so use shifts and
++ masks */
++ fractype fraction;
++ int exp;
++ int sign;
++
++#if defined(FLOAT_WORD_ORDER_MISMATCH) && !defined(FLOAT)
++ FLO_union_type swapped;
++
++#ifdef TFLOAT
++ swapped.words[0] = src->words[3];
++ swapped.words[1] = src->words[2];
++ swapped.words[2] = src->words[1];
++ swapped.words[3] = src->words[0];
++#else
++ swapped.words[0] = src->words[1];
++ swapped.words[1] = src->words[0];
++#endif
++ src = &swapped;
++#endif
++
++#ifdef FLOAT_BIT_ORDER_MISMATCH
++ fraction = src->bits.fraction;
++ exp = src->bits.exp;
++ sign = src->bits.sign;
++#else
++# if defined TFLOAT && defined HALFFRACBITS
++ {
++ halffractype high, low;
++
++ high = src->value_raw >> HALFSHIFT;
++ low = src->value_raw & (((fractype)1 << HALFSHIFT) - 1);
++
++ fraction = high & ((((fractype)1) << HALFFRACBITS) - 1);
++ fraction <<= FRACBITS - HALFFRACBITS;
++ exp = ((int)(high >> HALFFRACBITS)) & ((1 << EXPBITS) - 1);
++ sign = ((int)(high >> (((HALFFRACBITS + EXPBITS))))) & 1;
++
++ if (exp != EXPMAX && exp != 0 && low != 0)
++ {
++ int lowexp = ((int)(low >> HALFFRACBITS)) & ((1 << EXPBITS) - 1);
++ int lowsign = ((int)(low >> (((HALFFRACBITS + EXPBITS))))) & 1;
++ int shift;
++ fractype xlow;
++
++ xlow = low & ((((fractype)1) << HALFFRACBITS) - 1);
++ if (lowexp)
++ xlow |= (((halffractype)1) << HALFFRACBITS);
++ else
++ lowexp = 1;
++ shift = (FRACBITS - HALFFRACBITS) - (exp - lowexp);
++ if (shift > 0)
++ xlow <<= shift;
++ else if (shift < 0)
++ xlow >>= -shift;
++ if (sign == lowsign)
++ fraction += xlow;
++ else if (fraction >= xlow)
++ fraction -= xlow;
++ else
++ {
++ /* The high part is a power of two but the full number is lower.
++ This code will leave the implicit 1 in FRACTION, but we'd
++ have added that below anyway. */
++ fraction = (((fractype) 1 << FRACBITS) - xlow) << 1;
++ exp--;
++ }
++ }
++ }
++# else
++ fraction = src->value_raw & ((((fractype)1) << FRACBITS) - 1);
++ exp = ((int)(src->value_raw >> FRACBITS)) & ((1 << EXPBITS) - 1);
++ sign = ((int)(src->value_raw >> (FRACBITS + EXPBITS))) & 1;
++# endif
++#endif
++
++ dst->sign = sign;
++ if (exp == 0)
++ {
++ /* Hmm. Looks like 0 */
++ if (fraction == 0
++#ifdef NO_DENORMALS
++ || 1
++#endif
++ )
++ {
++ /* tastes like zero */
++ dst->class = CLASS_ZERO;
++ }
++ else
++ {
++ /* Zero exponent with nonzero fraction - it's denormalized,
++ so there isn't a leading implicit one - we'll shift it so
++ it gets one. */
++ dst->normal_exp = exp - EXPBIAS + 1;
++ fraction <<= NGARDS;
++
++ dst->class = CLASS_NUMBER;
++#if 1
++ while (fraction < IMPLICIT_1)
++ {
++ fraction <<= 1;
++ dst->normal_exp--;
++ }
++#endif
++ dst->fraction.ll = fraction;
++ }
++ }
++ else if (!LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && exp == EXPMAX)
++ {
++ /* Huge exponent*/
++ if (fraction == 0)
++ {
++ /* Attached to a zero fraction - means infinity */
++ dst->class = CLASS_INFINITY;
++ }
++ else
++ {
++ /* Nonzero fraction, means nan */
++#ifdef QUIET_NAN_NEGATED
++ if ((fraction & QUIET_NAN) == 0)
++#else
++ if (fraction & QUIET_NAN)
++#endif
++ {
++ dst->class = CLASS_QNAN;
++ }
++ else
++ {
++ dst->class = CLASS_SNAN;
++ }
++ /* Keep the fraction part as the nan number */
++ dst->fraction.ll = fraction;
++ }
++ }
++ else
++ {
++ /* Nothing strange about this number */
++ dst->normal_exp = exp - EXPBIAS;
++ dst->class = CLASS_NUMBER;
++ dst->fraction.ll = (fraction << NGARDS) | IMPLICIT_1;
++ }
++}
++#endif /* L_unpack_df || L_unpack_sf */
++
++#if defined(L_addsub_sf) || defined(L_addsub_df) || defined(L_addsub_tf)
++static fp_number_type *
++_fpadd_parts (fp_number_type * a,
++ fp_number_type * b,
++ fp_number_type * tmp)
++{
++ intfrac tfraction;
++
++ /* Put commonly used fields in local variables. */
++ int a_normal_exp;
++ int b_normal_exp;
++ fractype a_fraction;
++ fractype b_fraction;
++
++ if (isnan (a))
++ {
++ return a;
++ }
++ if (isnan (b))
++ {
++ return b;
++ }
++ if (isinf (a))
++ {
++ /* Adding infinities with opposite signs yields a NaN. */
++ if (isinf (b) && a->sign != b->sign)
++ return nan ();
++ return a;
++ }
++ if (isinf (b))
++ {
++ return b;
++ }
++ if (iszero (b))
++ {
++ if (iszero (a))
++ {
++ *tmp = *a;
++ tmp->sign = a->sign & b->sign;
++ return tmp;
++ }
++ return a;
++ }
++ if (iszero (a))
++ {
++ return b;
++ }
++
++ /* Got two numbers. shift the smaller and increment the exponent till
++ they're the same */
++ {
++ int diff;
++
++ a_normal_exp = a->normal_exp;
++ b_normal_exp = b->normal_exp;
++ a_fraction = a->fraction.ll;
++ b_fraction = b->fraction.ll;
++
++ diff = a_normal_exp - b_normal_exp;
++
++ if (diff < 0)
++ diff = -diff;
++ if (diff < FRAC_NBITS)
++ {
++ /* ??? This does shifts one bit at a time. Optimize. */
++ while (a_normal_exp > b_normal_exp)
++ {
++ b_normal_exp++;
++ LSHIFT (b_fraction);
++ }
++ while (b_normal_exp > a_normal_exp)
++ {
++ a_normal_exp++;
++ LSHIFT (a_fraction);
++ }
++ }
++ else
++ {
++ /* Somethings's up.. choose the biggest */
++ if (a_normal_exp > b_normal_exp)
++ {
++ b_normal_exp = a_normal_exp;
++ b_fraction = 0;
++ }
++ else
++ {
++ a_normal_exp = b_normal_exp;
++ a_fraction = 0;
++ }
++ }
++ }
++
++ if (a->sign != b->sign)
++ {
++ if (a->sign)
++ {
++ tfraction = -a_fraction + b_fraction;
++ }
++ else
++ {
++ tfraction = a_fraction - b_fraction;
++ }
++ if (tfraction >= 0)
++ {
++ tmp->sign = 0;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = tfraction;
++ }
++ else
++ {
++ tmp->sign = 1;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = -tfraction;
++ }
++ /* and renormalize it */
++
++ while (tmp->fraction.ll < IMPLICIT_1 && tmp->fraction.ll)
++ {
++ tmp->fraction.ll <<= 1;
++ tmp->normal_exp--;
++ }
++ }
++ else
++ {
++ tmp->sign = a->sign;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = a_fraction + b_fraction;
++ }
++ tmp->class = CLASS_NUMBER;
++ /* Now the fraction is added, we have to shift down to renormalize the
++ number */
++
++ if (tmp->fraction.ll >= IMPLICIT_2)
++ {
++ LSHIFT (tmp->fraction.ll);
++ tmp->normal_exp++;
++ }
++ return tmp;
++
++}
++
++FLO_type
++add (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpadd_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++
++FLO_type
++sub (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ b.sign ^= 1;
++
++ res = _fpadd_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++#endif /* L_addsub_sf || L_addsub_df */
++
++#if defined(L_mul_sf) || defined(L_mul_df) || defined(L_mul_tf)
++static inline __attribute__ ((__always_inline__)) fp_number_type *
++_fpmul_parts ( fp_number_type * a,
++ fp_number_type * b,
++ fp_number_type * tmp)
++{
++ fractype low = 0;
++ fractype high = 0;
++
++ if (isnan (a))
++ {
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (isnan (b))
++ {
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++ if (isinf (a))
++ {
++ if (iszero (b))
++ return nan ();
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (isinf (b))
++ {
++ if (iszero (a))
++ {
++ return nan ();
++ }
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++ if (iszero (a))
++ {
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (iszero (b))
++ {
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++
++ /* Calculate the mantissa by multiplying both numbers to get a
++ twice-as-wide number. */
++ {
++#if defined(NO_DI_MODE) || defined(TFLOAT)
++ {
++ fractype x = a->fraction.ll;
++ fractype ylow = b->fraction.ll;
++ fractype yhigh = 0;
++ int bit;
++
++ /* ??? This does multiplies one bit at a time. Optimize. */
++ for (bit = 0; bit < FRAC_NBITS; bit++)
++ {
++ int carry;
++
++ if (x & 1)
++ {
++ carry = (low += ylow) < ylow;
++ high += yhigh + carry;
++ }
++ yhigh <<= 1;
++ if (ylow & FRACHIGH)
++ {
++ yhigh |= 1;
++ }
++ ylow <<= 1;
++ x >>= 1;
++ }
++ }
++#elif defined(FLOAT)
++ /* Multiplying two USIs to get a UDI, we're safe. */
++ {
++ UDItype answer = (UDItype)a->fraction.ll * (UDItype)b->fraction.ll;
++
++ high = answer >> BITS_PER_SI;
++ low = answer;
++ }
++#else
++ /* fractype is DImode, but we need the result to be twice as wide.
++ Assuming a widening multiply from DImode to TImode is not
++ available, build one by hand. */
++ {
++ USItype nl = a->fraction.ll;
++ USItype nh = a->fraction.ll >> BITS_PER_SI;
++ USItype ml = b->fraction.ll;
++ USItype mh = b->fraction.ll >> BITS_PER_SI;
++ UDItype pp_ll = (UDItype) ml * nl;
++ UDItype pp_hl = (UDItype) mh * nl;
++ UDItype pp_lh = (UDItype) ml * nh;
++ UDItype pp_hh = (UDItype) mh * nh;
++ UDItype res2 = 0;
++ UDItype res0 = 0;
++ UDItype ps_hh__ = pp_hl + pp_lh;
++ if (ps_hh__ < pp_hl)
++ res2 += (UDItype)1 << BITS_PER_SI;
++ pp_hl = (UDItype)(USItype)ps_hh__ << BITS_PER_SI;
++ res0 = pp_ll + pp_hl;
++ if (res0 < pp_ll)
++ res2++;
++ res2 += (ps_hh__ >> BITS_PER_SI) + pp_hh;
++ high = res2;
++ low = res0;
++ }
++#endif
++ }
++
++ tmp->normal_exp = a->normal_exp + b->normal_exp
++ + FRAC_NBITS - (FRACBITS + NGARDS);
++ tmp->sign = a->sign != b->sign;
++ while (high >= IMPLICIT_2)
++ {
++ tmp->normal_exp++;
++ if (high & 1)
++ {
++ low >>= 1;
++ low |= FRACHIGH;
++ }
++ high >>= 1;
++ }
++ while (high < IMPLICIT_1)
++ {
++ tmp->normal_exp--;
++
++ high <<= 1;
++ if (low & FRACHIGH)
++ high |= 1;
++ low <<= 1;
++ }
++ /* rounding is tricky. if we only round if it won't make us round later. */
++#if 0
++ if (low & FRACHIGH2)
++ {
++ if (((high & GARDMASK) != GARDMSB)
++ && (((high + 1) & GARDMASK) == GARDMSB))
++ {
++ /* don't round, it gets done again later. */
++ }
++ else
++ {
++ high++;
++ }
++ }
++#endif
++ if (!ROUND_TOWARDS_ZERO && (high & GARDMASK) == GARDMSB)
++ {
++ if (high & (1 << NGARDS))
++ {
++ /* half way, so round to even */
++ high += GARDROUND + 1;
++ }
++ else if (low)
++ {
++ /* but we really weren't half way */
++ high += GARDROUND + 1;
++ }
++ }
++ tmp->fraction.ll = high;
++ tmp->class = CLASS_NUMBER;
++ return tmp;
++}
++
++FLO_type
++multiply (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpmul_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++#endif /* L_mul_sf || L_mul_df */
++
++#if defined(L_div_sf) || defined(L_div_df) || defined(L_div_tf)
++static inline __attribute__ ((__always_inline__)) fp_number_type *
++_fpdiv_parts (fp_number_type * a,
++ fp_number_type * b)
++{
++ fractype bit;
++ fractype numerator;
++ fractype denominator;
++ fractype quotient;
++
++ if (isnan (a))
++ {
++ return a;
++ }
++ if (isnan (b))
++ {
++ return b;
++ }
++
++ a->sign = a->sign ^ b->sign;
++
++ if (isinf (a) || iszero (a))
++ {
++ if (a->class == b->class)
++ return nan ();
++ return a;
++ }
++
++ if (isinf (b))
++ {
++ a->fraction.ll = 0;
++ a->normal_exp = 0;
++ return a;
++ }
++ if (iszero (b))
++ {
++ a->class = CLASS_INFINITY;
++ return a;
++ }
++
++ /* Calculate the mantissa by multiplying both 64bit numbers to get a
++ 128 bit number */
++ {
++ /* quotient =
++ ( numerator / denominator) * 2^(numerator exponent - denominator exponent)
++ */
++
++ a->normal_exp = a->normal_exp - b->normal_exp;
++ numerator = a->fraction.ll;
++ denominator = b->fraction.ll;
++
++ if (numerator < denominator)
++ {
++ /* Fraction will be less than 1.0 */
++ numerator *= 2;
++ a->normal_exp--;
++ }
++ bit = IMPLICIT_1;
++ quotient = 0;
++ /* ??? Does divide one bit at a time. Optimize. */
++ while (bit)
++ {
++ if (numerator >= denominator)
++ {
++ quotient |= bit;
++ numerator -= denominator;
++ }
++ bit >>= 1;
++ numerator *= 2;
++ }
++
++ if (!ROUND_TOWARDS_ZERO && (quotient & GARDMASK) == GARDMSB)
++ {
++ if (quotient & (1 << NGARDS))
++ {
++ /* half way, so round to even */
++ quotient += GARDROUND + 1;
++ }
++ else if (numerator)
++ {
++ /* but we really weren't half way, more bits exist */
++ quotient += GARDROUND + 1;
++ }
++ }
++
++ a->fraction.ll = quotient;
++ return (a);
++ }
++}
++
++FLO_type
++divide (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpdiv_parts (&a, &b);
++
++ return pack_d (res);
++}
++#endif /* L_div_sf || L_div_df */
++
++#if defined(L_fpcmp_parts_sf) || defined(L_fpcmp_parts_df) \
++ || defined(L_fpcmp_parts_tf)
++/* according to the demo, fpcmp returns a comparison with 0... thus
++ a<b -> -1
++ a==b -> 0
++ a>b -> +1
++ */
++
++int
++__fpcmp_parts (fp_number_type * a, fp_number_type * b)
++{
++#if 0
++ /* either nan -> unordered. Must be checked outside of this routine. */
++ if (isnan (a) && isnan (b))
++ {
++ return 1; /* still unordered! */
++ }
++#endif
++
++ if (isnan (a) || isnan (b))
++ {
++ return 1; /* how to indicate unordered compare? */
++ }
++ if (isinf (a) && isinf (b))
++ {
++ /* +inf > -inf, but +inf != +inf */
++ /* b \a| +inf(0)| -inf(1)
++ ______\+--------+--------
++ +inf(0)| a==b(0)| a<b(-1)
++ -------+--------+--------
++ -inf(1)| a>b(1) | a==b(0)
++ -------+--------+--------
++ So since unordered must be nonzero, just line up the columns...
++ */
++ return b->sign - a->sign;
++ }
++ /* but not both... */
++ if (isinf (a))
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (isinf (b))
++ {
++ return b->sign ? 1 : -1;
++ }
++ if (iszero (a) && iszero (b))
++ {
++ return 0;
++ }
++ if (iszero (a))
++ {
++ return b->sign ? 1 : -1;
++ }
++ if (iszero (b))
++ {
++ return a->sign ? -1 : 1;
++ }
++ /* now both are "normal". */
++ if (a->sign != b->sign)
++ {
++ /* opposite signs */
++ return a->sign ? -1 : 1;
++ }
++ /* same sign; exponents? */
++ if (a->normal_exp > b->normal_exp)
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (a->normal_exp < b->normal_exp)
++ {
++ return a->sign ? 1 : -1;
++ }
++ /* same exponents; check size. */
++ if (a->fraction.ll > b->fraction.ll)
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (a->fraction.ll < b->fraction.ll)
++ {
++ return a->sign ? 1 : -1;
++ }
++ /* after all that, they're equal. */
++ return 0;
++}
++#endif
++
++#if defined(L_compare_sf) || defined(L_compare_df) || defined(L_compoare_tf)
++CMPtype
++compare (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_compare_sf || L_compare_df */
++
++#ifndef US_SOFTWARE_GOFAST
++
++/* These should be optimized for their specific tasks someday. */
++
++#if defined(L_eq_sf) || defined(L_eq_df) || defined(L_eq_tf)
++CMPtype
++_eq_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth == 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_eq_sf || L_eq_df */
++
++#if defined(L_ne_sf) || defined(L_ne_df) || defined(L_ne_tf)
++CMPtype
++_ne_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* true, truth != 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_ne_sf || L_ne_df */
++
++#if defined(L_gt_sf) || defined(L_gt_df) || defined(L_gt_tf)
++CMPtype
++_gt_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return -1; /* false, truth > 0 */
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_gt_sf || L_gt_df */
++
++#if defined(L_ge_sf) || defined(L_ge_df) || defined(L_ge_tf)
++CMPtype
++_ge_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return -1; /* false, truth >= 0 */
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_ge_sf || L_ge_df */
++
++#if defined(L_lt_sf) || defined(L_lt_df) || defined(L_lt_tf)
++CMPtype
++_lt_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth < 0 */
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_lt_sf || L_lt_df */
++
++#if defined(L_le_sf) || defined(L_le_df) || defined(L_le_tf)
++CMPtype
++_le_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth <= 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_le_sf || L_le_df */
++
++#endif /* ! US_SOFTWARE_GOFAST */
++
++#if defined(L_unord_sf) || defined(L_unord_df) || defined(L_unord_tf)
++CMPtype
++_unord_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ return (isnan (&a) || isnan (&b));
++}
++#endif /* L_unord_sf || L_unord_df */
++
++#if defined(L_si_to_sf) || defined(L_si_to_df) || defined(L_si_to_tf)
++FLO_type
++si_to_float (SItype arg_a)
++{
++ fp_number_type in;
++
++ in.class = CLASS_NUMBER;
++ in.sign = arg_a < 0;
++ if (!arg_a)
++ {
++ in.class = CLASS_ZERO;
++ }
++ else
++ {
++ in.normal_exp = FRACBITS + NGARDS;
++ if (in.sign)
++ {
++ /* Special case for minint, since there is no +ve integer
++ representation for it */
++ if (arg_a == (- MAX_SI_INT - 1))
++ {
++ return (FLO_type)(- MAX_SI_INT - 1);
++ }
++ in.fraction.ll = (-arg_a);
++ }
++ else
++ in.fraction.ll = arg_a;
++
++ while (in.fraction.ll < ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll <<= 1;
++ in.normal_exp -= 1;
++ }
++ }
++ return pack_d (&in);
++}
++#endif /* L_si_to_sf || L_si_to_df */
++
++#if defined(L_usi_to_sf) || defined(L_usi_to_df) || defined(L_usi_to_tf)
++FLO_type
++usi_to_float (USItype arg_a)
++{
++ fp_number_type in;
++
++ in.sign = 0;
++ if (!arg_a)
++ {
++ in.class = CLASS_ZERO;
++ }
++ else
++ {
++ in.class = CLASS_NUMBER;
++ in.normal_exp = FRACBITS + NGARDS;
++ in.fraction.ll = arg_a;
++
++ while (in.fraction.ll > ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll >>= 1;
++ in.normal_exp += 1;
++ }
++ while (in.fraction.ll < ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll <<= 1;
++ in.normal_exp -= 1;
++ }
++ }
++ return pack_d (&in);
++}
++#endif
++
++#if defined(L_sf_to_si) || defined(L_df_to_si) || defined(L_tf_to_si)
++SItype
++float_to_si (FLO_type arg_a)
++{
++ fp_number_type a;
++ SItype tmp;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ if (iszero (&a))
++ return 0;
++ if (isnan (&a))
++ return 0;
++ /* get reasonable MAX_SI_INT... */
++ if (isinf (&a))
++ return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
++ /* it is a number, but a small one */
++ if (a.normal_exp < 0)
++ return 0;
++ if (a.normal_exp > BITS_PER_SI - 2)
++ return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
++ tmp = a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
++ return a.sign ? (-tmp) : (tmp);
++}
++#endif /* L_sf_to_si || L_df_to_si */
++
++#if defined(L_sf_to_usi) || defined(L_df_to_usi) || defined(L_tf_to_usi)
++#if defined US_SOFTWARE_GOFAST || defined(L_tf_to_usi)
++/* While libgcc2.c defines its own __fixunssfsi and __fixunsdfsi routines,
++ we also define them for GOFAST because the ones in libgcc2.c have the
++ wrong names and I'd rather define these here and keep GOFAST CYG-LOC's
++ out of libgcc2.c. We can't define these here if not GOFAST because then
++ there'd be duplicate copies. */
++
++USItype
++float_to_usi (FLO_type arg_a)
++{
++ fp_number_type a;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ if (iszero (&a))
++ return 0;
++ if (isnan (&a))
++ return 0;
++ /* it is a negative number */
++ if (a.sign)
++ return 0;
++ /* get reasonable MAX_USI_INT... */
++ if (isinf (&a))
++ return MAX_USI_INT;
++ /* it is a number, but a small one */
++ if (a.normal_exp < 0)
++ return 0;
++ if (a.normal_exp > BITS_PER_SI - 1)
++ return MAX_USI_INT;
++ else if (a.normal_exp > (FRACBITS + NGARDS))
++ return a.fraction.ll << (a.normal_exp - (FRACBITS + NGARDS));
++ else
++ return a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
++}
++#endif /* US_SOFTWARE_GOFAST */
++#endif /* L_sf_to_usi || L_df_to_usi */
++
++#if defined(L_negate_sf) || defined(L_negate_df) || defined(L_negate_tf)
++FLO_type
++negate (FLO_type arg_a)
++{
++ fp_number_type a;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ flip_sign (&a);
++ return pack_d (&a);
++}
++#endif /* L_negate_sf || L_negate_df */
++
++#ifdef FLOAT
++
++#if defined(L_make_sf)
++SFtype
++__make_fp(fp_class_type class,
++ unsigned int sign,
++ int exp,
++ USItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_sf */
++
++#ifndef FLOAT_ONLY
++
++/* This enables one to build an fp library that supports float but not double.
++ Otherwise, we would get an undefined reference to __make_dp.
++ This is needed for some 8-bit ports that can't handle well values that
++ are 8-bytes in size, so we just don't support double for them at all. */
++
++#if defined(L_sf_to_df)
++DFtype
++sf_to_df (SFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_dp (in.class, in.sign, in.normal_exp,
++ ((UDItype) in.fraction.ll) << F_D_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#if defined(L_sf_to_tf) && defined(TMODES)
++TFtype
++sf_to_tf (SFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_tp (in.class, in.sign, in.normal_exp,
++ ((UTItype) in.fraction.ll) << F_T_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#endif /* ! FLOAT_ONLY */
++#endif /* FLOAT */
++
++#ifndef FLOAT
++
++extern SFtype __make_fp (fp_class_type, unsigned int, int, USItype);
++
++#if defined(L_make_df)
++DFtype
++__make_dp (fp_class_type class, unsigned int sign, int exp, UDItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_df */
++
++#if defined(L_df_to_sf)
++SFtype
++df_to_sf (DFtype arg_a)
++{
++ fp_number_type in;
++ USItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> F_D_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((USItype) 1 << F_D_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_fp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_df_to_sf */
++
++#if defined(L_df_to_tf) && defined(TMODES) \
++ && !defined(FLOAT) && !defined(TFLOAT)
++TFtype
++df_to_tf (DFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_tp (in.class, in.sign, in.normal_exp,
++ ((UTItype) in.fraction.ll) << D_T_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#ifdef TFLOAT
++#if defined(L_make_tf)
++TFtype
++__make_tp(fp_class_type class,
++ unsigned int sign,
++ int exp,
++ UTItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_tf */
++
++#if defined(L_tf_to_df)
++DFtype
++tf_to_df (TFtype arg_a)
++{
++ fp_number_type in;
++ UDItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> D_T_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((UTItype) 1 << D_T_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_dp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_tf_to_df */
++
++#if defined(L_tf_to_sf)
++SFtype
++tf_to_sf (TFtype arg_a)
++{
++ fp_number_type in;
++ USItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> F_T_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((UTItype) 1 << F_T_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_fp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_tf_to_sf */
++#endif /* TFLOAT */
++
++#endif /* ! FLOAT */
++#endif /* !EXTENDED_FLOAT_STUBS */
+--- gcc-3.4.2/gcc/config/nios2/nios2-fp-bit.c
++++ gcc-3.4.2.nios2/gcc/config/nios2/nios2-fp-bit.c
+@@ -0,0 +1,1652 @@
++#define FLOAT
++/* This is a software floating point library which can be used
++ for targets without hardware floating point.
++ Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2004
++ Free Software Foundation, Inc.
++
++This file is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 2, or (at your option) any
++later version.
++
++In addition to the permissions in the GNU General Public License, the
++Free Software Foundation gives you unlimited permission to link the
++compiled version of this file with other programs, and to distribute
++those programs without any restriction coming from the use of this
++file. (The General Public License restrictions do apply in other
++respects; for example, they cover modification of the file, and
++distribution when not linked into another program.)
++
++This file is distributed in the hope that it will be useful, but
++WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++/* As a special exception, if you link this library with other files,
++ some of which are compiled with GCC, to produce an executable,
++ this library does not by itself cause the resulting executable
++ to be covered by the GNU General Public License.
++ This exception does not however invalidate any other reasons why
++ the executable file might be covered by the GNU General Public License. */
++
++/* This implements IEEE 754 format arithmetic, but does not provide a
++ mechanism for setting the rounding mode, or for generating or handling
++ exceptions.
++
++ The original code by Steve Chamberlain, hacked by Mark Eichin and Jim
++ Wilson, all of Cygnus Support. */
++
++/* The intended way to use this file is to make two copies, add `#define FLOAT'
++ to one copy, then compile both copies and add them to libgcc.a. */
++
++#include "tconfig.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "config/fp-bit.h"
++
++/* The following macros can be defined to change the behavior of this file:
++ FLOAT: Implement a `float', aka SFmode, fp library. If this is not
++ defined, then this file implements a `double', aka DFmode, fp library.
++ FLOAT_ONLY: Used with FLOAT, to implement a `float' only library, i.e.
++ don't include float->double conversion which requires the double library.
++ This is useful only for machines which can't support doubles, e.g. some
++ 8-bit processors.
++ CMPtype: Specify the type that floating point compares should return.
++ This defaults to SItype, aka int.
++ US_SOFTWARE_GOFAST: This makes all entry points use the same names as the
++ US Software goFast library.
++ _DEBUG_BITFLOAT: This makes debugging the code a little easier, by adding
++ two integers to the FLO_union_type.
++ NO_DENORMALS: Disable handling of denormals.
++ NO_NANS: Disable nan and infinity handling
++ SMALL_MACHINE: Useful when operations on QIs and HIs are faster
++ than on an SI */
++
++/* We don't currently support extended floats (long doubles) on machines
++ without hardware to deal with them.
++
++ These stubs are just to keep the linker from complaining about unresolved
++ references which can be pulled in from libio & libstdc++, even if the
++ user isn't using long doubles. However, they may generate an unresolved
++ external to abort if abort is not used by the function, and the stubs
++ are referenced from within libc, since libgcc goes before and after the
++ system library. */
++
++#ifdef DECLARE_LIBRARY_RENAMES
++ DECLARE_LIBRARY_RENAMES
++#endif
++
++#ifdef EXTENDED_FLOAT_STUBS
++extern void abort (void);
++void __extendsfxf2 (void) { abort(); }
++void __extenddfxf2 (void) { abort(); }
++void __truncxfdf2 (void) { abort(); }
++void __truncxfsf2 (void) { abort(); }
++void __fixxfsi (void) { abort(); }
++void __floatsixf (void) { abort(); }
++void __addxf3 (void) { abort(); }
++void __subxf3 (void) { abort(); }
++void __mulxf3 (void) { abort(); }
++void __divxf3 (void) { abort(); }
++void __negxf2 (void) { abort(); }
++void __eqxf2 (void) { abort(); }
++void __nexf2 (void) { abort(); }
++void __gtxf2 (void) { abort(); }
++void __gexf2 (void) { abort(); }
++void __lexf2 (void) { abort(); }
++void __ltxf2 (void) { abort(); }
++
++void __extendsftf2 (void) { abort(); }
++void __extenddftf2 (void) { abort(); }
++void __trunctfdf2 (void) { abort(); }
++void __trunctfsf2 (void) { abort(); }
++void __fixtfsi (void) { abort(); }
++void __floatsitf (void) { abort(); }
++void __addtf3 (void) { abort(); }
++void __subtf3 (void) { abort(); }
++void __multf3 (void) { abort(); }
++void __divtf3 (void) { abort(); }
++void __negtf2 (void) { abort(); }
++void __eqtf2 (void) { abort(); }
++void __netf2 (void) { abort(); }
++void __gttf2 (void) { abort(); }
++void __getf2 (void) { abort(); }
++void __letf2 (void) { abort(); }
++void __lttf2 (void) { abort(); }
++#else /* !EXTENDED_FLOAT_STUBS, rest of file */
++
++/* IEEE "special" number predicates */
++
++#ifdef NO_NANS
++
++#define nan() 0
++#define isnan(x) 0
++#define isinf(x) 0
++#else
++
++#if defined L_thenan_sf
++const fp_number_type __thenan_sf = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined L_thenan_df
++const fp_number_type __thenan_df = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined L_thenan_tf
++const fp_number_type __thenan_tf = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined TFLOAT
++extern const fp_number_type __thenan_tf;
++#elif defined FLOAT
++extern const fp_number_type __thenan_sf;
++#else
++extern const fp_number_type __thenan_df;
++#endif
++
++INLINE
++static fp_number_type *
++nan (void)
++{
++ /* Discard the const qualifier... */
++#ifdef TFLOAT
++ return (fp_number_type *) (& __thenan_tf);
++#elif defined FLOAT
++ return (fp_number_type *) (& __thenan_sf);
++#else
++ return (fp_number_type *) (& __thenan_df);
++#endif
++}
++
++INLINE
++static int
++isnan ( fp_number_type * x)
++{
++ return x->class == CLASS_SNAN || x->class == CLASS_QNAN;
++}
++
++INLINE
++static int
++isinf ( fp_number_type * x)
++{
++ return x->class == CLASS_INFINITY;
++}
++
++#endif /* NO_NANS */
++
++INLINE
++static int
++iszero ( fp_number_type * x)
++{
++ return x->class == CLASS_ZERO;
++}
++
++INLINE
++static void
++flip_sign ( fp_number_type * x)
++{
++ x->sign = !x->sign;
++}
++
++extern FLO_type pack_d ( fp_number_type * );
++
++#if defined(L_pack_df) || defined(L_pack_sf) || defined(L_pack_tf)
++FLO_type
++pack_d ( fp_number_type * src)
++{
++ FLO_union_type dst;
++ fractype fraction = src->fraction.ll; /* wasn't unsigned before? */
++ int sign = src->sign;
++ int exp = 0;
++
++ if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && (isnan (src) || isinf (src)))
++ {
++ /* We can't represent these values accurately. By using the
++ largest possible magnitude, we guarantee that the conversion
++ of infinity is at least as big as any finite number. */
++ exp = EXPMAX;
++ fraction = ((fractype) 1 << FRACBITS) - 1;
++ }
++ else if (isnan (src))
++ {
++ exp = EXPMAX;
++ if (src->class == CLASS_QNAN || 1)
++ {
++#ifdef QUIET_NAN_NEGATED
++ fraction |= QUIET_NAN - 1;
++#else
++ fraction |= QUIET_NAN;
++#endif
++ }
++ }
++ else if (isinf (src))
++ {
++ exp = EXPMAX;
++ fraction = 0;
++ }
++ else if (iszero (src))
++ {
++ exp = 0;
++ fraction = 0;
++ }
++ else if (fraction == 0)
++ {
++ exp = 0;
++ }
++ else
++ {
++ if (src->normal_exp < NORMAL_EXPMIN)
++ {
++#ifdef NO_DENORMALS
++ /* Go straight to a zero representation if denormals are not
++ supported. The denormal handling would be harmless but
++ isn't unnecessary. */
++ exp = 0;
++ fraction = 0;
++#else /* NO_DENORMALS */
++ /* This number's exponent is too low to fit into the bits
++ available in the number, so we'll store 0 in the exponent and
++ shift the fraction to the right to make up for it. */
++
++ int shift = NORMAL_EXPMIN - src->normal_exp;
++
++ exp = 0;
++
++ if (shift > FRAC_NBITS - NGARDS)
++ {
++ /* No point shifting, since it's more that 64 out. */
++ fraction = 0;
++ }
++ else
++ {
++ int lowbit = (fraction & (((fractype)1 << shift) - 1)) ? 1 : 0;
++ fraction = (fraction >> shift) | lowbit;
++ }
++ if ((fraction & GARDMASK) == GARDMSB)
++ {
++ if ((fraction & (1 << NGARDS)))
++ fraction += GARDROUND + 1;
++ }
++ else
++ {
++ /* Add to the guards to round up. */
++ fraction += GARDROUND;
++ }
++ /* Perhaps the rounding means we now need to change the
++ exponent, because the fraction is no longer denormal. */
++ if (fraction >= IMPLICIT_1)
++ {
++ exp += 1;
++ }
++ fraction >>= NGARDS;
++#endif /* NO_DENORMALS */
++ }
++ else if (!LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS)
++ && src->normal_exp > EXPBIAS)
++ {
++ exp = EXPMAX;
++ fraction = 0;
++ }
++ else
++ {
++ exp = src->normal_exp + EXPBIAS;
++ if (!ROUND_TOWARDS_ZERO)
++ {
++ /* IF the gard bits are the all zero, but the first, then we're
++ half way between two numbers, choose the one which makes the
++ lsb of the answer 0. */
++ if ((fraction & GARDMASK) == GARDMSB)
++ {
++ if (fraction & (1 << NGARDS))
++ fraction += GARDROUND + 1;
++ }
++ else
++ {
++ /* Add a one to the guards to round up */
++ fraction += GARDROUND;
++ }
++ if (fraction >= IMPLICIT_2)
++ {
++ fraction >>= 1;
++ exp += 1;
++ }
++ }
++ fraction >>= NGARDS;
++
++ if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && exp > EXPMAX)
++ {
++ /* Saturate on overflow. */
++ exp = EXPMAX;
++ fraction = ((fractype) 1 << FRACBITS) - 1;
++ }
++ }
++ }
++
++ /* We previously used bitfields to store the number, but this doesn't
++ handle little/big endian systems conveniently, so use shifts and
++ masks */
++#ifdef FLOAT_BIT_ORDER_MISMATCH
++ dst.bits.fraction = fraction;
++ dst.bits.exp = exp;
++ dst.bits.sign = sign;
++#else
++# if defined TFLOAT && defined HALFFRACBITS
++ {
++ halffractype high, low, unity;
++ int lowsign, lowexp;
++
++ unity = (halffractype) 1 << HALFFRACBITS;
++
++ /* Set HIGH to the high double's significand, masking out the implicit 1.
++ Set LOW to the low double's full significand. */
++ high = (fraction >> (FRACBITS - HALFFRACBITS)) & (unity - 1);
++ low = fraction & (unity * 2 - 1);
++
++ /* Get the initial sign and exponent of the low double. */
++ lowexp = exp - HALFFRACBITS - 1;
++ lowsign = sign;
++
++ /* HIGH should be rounded like a normal double, making |LOW| <=
++ 0.5 ULP of HIGH. Assume round-to-nearest. */
++ if (exp < EXPMAX)
++ if (low > unity || (low == unity && (high & 1) == 1))
++ {
++ /* Round HIGH up and adjust LOW to match. */
++ high++;
++ if (high == unity)
++ {
++ /* May make it infinite, but that's OK. */
++ high = 0;
++ exp++;
++ }
++ low = unity * 2 - low;
++ lowsign ^= 1;
++ }
++
++ high |= (halffractype) exp << HALFFRACBITS;
++ high |= (halffractype) sign << (HALFFRACBITS + EXPBITS);
++
++ if (exp == EXPMAX || exp == 0 || low == 0)
++ low = 0;
++ else
++ {
++ while (lowexp > 0 && low < unity)
++ {
++ low <<= 1;
++ lowexp--;
++ }
++
++ if (lowexp <= 0)
++ {
++ halffractype roundmsb, round;
++ int shift;
++
++ shift = 1 - lowexp;
++ roundmsb = (1 << (shift - 1));
++ round = low & ((roundmsb << 1) - 1);
++
++ low >>= shift;
++ lowexp = 0;
++
++ if (round > roundmsb || (round == roundmsb && (low & 1) == 1))
++ {
++ low++;
++ if (low == unity)
++ /* LOW rounds up to the smallest normal number. */
++ lowexp++;
++ }
++ }
++
++ low &= unity - 1;
++ low |= (halffractype) lowexp << HALFFRACBITS;
++ low |= (halffractype) lowsign << (HALFFRACBITS + EXPBITS);
++ }
++ dst.value_raw = ((fractype) high << HALFSHIFT) | low;
++ }
++# else
++ dst.value_raw = fraction & ((((fractype)1) << FRACBITS) - (fractype)1);
++ dst.value_raw |= ((fractype) (exp & ((1 << EXPBITS) - 1))) << FRACBITS;
++ dst.value_raw |= ((fractype) (sign & 1)) << (FRACBITS | EXPBITS);
++# endif
++#endif
++
++#if defined(FLOAT_WORD_ORDER_MISMATCH) && !defined(FLOAT)
++#ifdef TFLOAT
++ {
++ qrtrfractype tmp1 = dst.words[0];
++ qrtrfractype tmp2 = dst.words[1];
++ dst.words[0] = dst.words[3];
++ dst.words[1] = dst.words[2];
++ dst.words[2] = tmp2;
++ dst.words[3] = tmp1;
++ }
++#else
++ {
++ halffractype tmp = dst.words[0];
++ dst.words[0] = dst.words[1];
++ dst.words[1] = tmp;
++ }
++#endif
++#endif
++
++ return dst.value;
++}
++#endif
++
++#if defined(L_unpack_df) || defined(L_unpack_sf) || defined(L_unpack_tf)
++void
++unpack_d (FLO_union_type * src, fp_number_type * dst)
++{
++ /* We previously used bitfields to store the number, but this doesn't
++ handle little/big endian systems conveniently, so use shifts and
++ masks */
++ fractype fraction;
++ int exp;
++ int sign;
++
++#if defined(FLOAT_WORD_ORDER_MISMATCH) && !defined(FLOAT)
++ FLO_union_type swapped;
++
++#ifdef TFLOAT
++ swapped.words[0] = src->words[3];
++ swapped.words[1] = src->words[2];
++ swapped.words[2] = src->words[1];
++ swapped.words[3] = src->words[0];
++#else
++ swapped.words[0] = src->words[1];
++ swapped.words[1] = src->words[0];
++#endif
++ src = &swapped;
++#endif
++
++#ifdef FLOAT_BIT_ORDER_MISMATCH
++ fraction = src->bits.fraction;
++ exp = src->bits.exp;
++ sign = src->bits.sign;
++#else
++# if defined TFLOAT && defined HALFFRACBITS
++ {
++ halffractype high, low;
++
++ high = src->value_raw >> HALFSHIFT;
++ low = src->value_raw & (((fractype)1 << HALFSHIFT) - 1);
++
++ fraction = high & ((((fractype)1) << HALFFRACBITS) - 1);
++ fraction <<= FRACBITS - HALFFRACBITS;
++ exp = ((int)(high >> HALFFRACBITS)) & ((1 << EXPBITS) - 1);
++ sign = ((int)(high >> (((HALFFRACBITS + EXPBITS))))) & 1;
++
++ if (exp != EXPMAX && exp != 0 && low != 0)
++ {
++ int lowexp = ((int)(low >> HALFFRACBITS)) & ((1 << EXPBITS) - 1);
++ int lowsign = ((int)(low >> (((HALFFRACBITS + EXPBITS))))) & 1;
++ int shift;
++ fractype xlow;
++
++ xlow = low & ((((fractype)1) << HALFFRACBITS) - 1);
++ if (lowexp)
++ xlow |= (((halffractype)1) << HALFFRACBITS);
++ else
++ lowexp = 1;
++ shift = (FRACBITS - HALFFRACBITS) - (exp - lowexp);
++ if (shift > 0)
++ xlow <<= shift;
++ else if (shift < 0)
++ xlow >>= -shift;
++ if (sign == lowsign)
++ fraction += xlow;
++ else if (fraction >= xlow)
++ fraction -= xlow;
++ else
++ {
++ /* The high part is a power of two but the full number is lower.
++ This code will leave the implicit 1 in FRACTION, but we'd
++ have added that below anyway. */
++ fraction = (((fractype) 1 << FRACBITS) - xlow) << 1;
++ exp--;
++ }
++ }
++ }
++# else
++ fraction = src->value_raw & ((((fractype)1) << FRACBITS) - 1);
++ exp = ((int)(src->value_raw >> FRACBITS)) & ((1 << EXPBITS) - 1);
++ sign = ((int)(src->value_raw >> (FRACBITS + EXPBITS))) & 1;
++# endif
++#endif
++
++ dst->sign = sign;
++ if (exp == 0)
++ {
++ /* Hmm. Looks like 0 */
++ if (fraction == 0
++#ifdef NO_DENORMALS
++ || 1
++#endif
++ )
++ {
++ /* tastes like zero */
++ dst->class = CLASS_ZERO;
++ }
++ else
++ {
++ /* Zero exponent with nonzero fraction - it's denormalized,
++ so there isn't a leading implicit one - we'll shift it so
++ it gets one. */
++ dst->normal_exp = exp - EXPBIAS + 1;
++ fraction <<= NGARDS;
++
++ dst->class = CLASS_NUMBER;
++#if 1
++ while (fraction < IMPLICIT_1)
++ {
++ fraction <<= 1;
++ dst->normal_exp--;
++ }
++#endif
++ dst->fraction.ll = fraction;
++ }
++ }
++ else if (!LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && exp == EXPMAX)
++ {
++ /* Huge exponent*/
++ if (fraction == 0)
++ {
++ /* Attached to a zero fraction - means infinity */
++ dst->class = CLASS_INFINITY;
++ }
++ else
++ {
++ /* Nonzero fraction, means nan */
++#ifdef QUIET_NAN_NEGATED
++ if ((fraction & QUIET_NAN) == 0)
++#else
++ if (fraction & QUIET_NAN)
++#endif
++ {
++ dst->class = CLASS_QNAN;
++ }
++ else
++ {
++ dst->class = CLASS_SNAN;
++ }
++ /* Keep the fraction part as the nan number */
++ dst->fraction.ll = fraction;
++ }
++ }
++ else
++ {
++ /* Nothing strange about this number */
++ dst->normal_exp = exp - EXPBIAS;
++ dst->class = CLASS_NUMBER;
++ dst->fraction.ll = (fraction << NGARDS) | IMPLICIT_1;
++ }
++}
++#endif /* L_unpack_df || L_unpack_sf */
++
++#if defined(L_addsub_sf) || defined(L_addsub_df) || defined(L_addsub_tf)
++static fp_number_type *
++_fpadd_parts (fp_number_type * a,
++ fp_number_type * b,
++ fp_number_type * tmp)
++{
++ intfrac tfraction;
++
++ /* Put commonly used fields in local variables. */
++ int a_normal_exp;
++ int b_normal_exp;
++ fractype a_fraction;
++ fractype b_fraction;
++
++ if (isnan (a))
++ {
++ return a;
++ }
++ if (isnan (b))
++ {
++ return b;
++ }
++ if (isinf (a))
++ {
++ /* Adding infinities with opposite signs yields a NaN. */
++ if (isinf (b) && a->sign != b->sign)
++ return nan ();
++ return a;
++ }
++ if (isinf (b))
++ {
++ return b;
++ }
++ if (iszero (b))
++ {
++ if (iszero (a))
++ {
++ *tmp = *a;
++ tmp->sign = a->sign & b->sign;
++ return tmp;
++ }
++ return a;
++ }
++ if (iszero (a))
++ {
++ return b;
++ }
++
++ /* Got two numbers. shift the smaller and increment the exponent till
++ they're the same */
++ {
++ int diff;
++
++ a_normal_exp = a->normal_exp;
++ b_normal_exp = b->normal_exp;
++ a_fraction = a->fraction.ll;
++ b_fraction = b->fraction.ll;
++
++ diff = a_normal_exp - b_normal_exp;
++
++ if (diff < 0)
++ diff = -diff;
++ if (diff < FRAC_NBITS)
++ {
++ /* ??? This does shifts one bit at a time. Optimize. */
++ while (a_normal_exp > b_normal_exp)
++ {
++ b_normal_exp++;
++ LSHIFT (b_fraction);
++ }
++ while (b_normal_exp > a_normal_exp)
++ {
++ a_normal_exp++;
++ LSHIFT (a_fraction);
++ }
++ }
++ else
++ {
++ /* Somethings's up.. choose the biggest */
++ if (a_normal_exp > b_normal_exp)
++ {
++ b_normal_exp = a_normal_exp;
++ b_fraction = 0;
++ }
++ else
++ {
++ a_normal_exp = b_normal_exp;
++ a_fraction = 0;
++ }
++ }
++ }
++
++ if (a->sign != b->sign)
++ {
++ if (a->sign)
++ {
++ tfraction = -a_fraction + b_fraction;
++ }
++ else
++ {
++ tfraction = a_fraction - b_fraction;
++ }
++ if (tfraction >= 0)
++ {
++ tmp->sign = 0;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = tfraction;
++ }
++ else
++ {
++ tmp->sign = 1;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = -tfraction;
++ }
++ /* and renormalize it */
++
++ while (tmp->fraction.ll < IMPLICIT_1 && tmp->fraction.ll)
++ {
++ tmp->fraction.ll <<= 1;
++ tmp->normal_exp--;
++ }
++ }
++ else
++ {
++ tmp->sign = a->sign;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = a_fraction + b_fraction;
++ }
++ tmp->class = CLASS_NUMBER;
++ /* Now the fraction is added, we have to shift down to renormalize the
++ number */
++
++ if (tmp->fraction.ll >= IMPLICIT_2)
++ {
++ LSHIFT (tmp->fraction.ll);
++ tmp->normal_exp++;
++ }
++ return tmp;
++
++}
++
++FLO_type
++add (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpadd_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++
++FLO_type
++sub (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ b.sign ^= 1;
++
++ res = _fpadd_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++#endif /* L_addsub_sf || L_addsub_df */
++
++#if defined(L_mul_sf) || defined(L_mul_df) || defined(L_mul_tf)
++static inline __attribute__ ((__always_inline__)) fp_number_type *
++_fpmul_parts ( fp_number_type * a,
++ fp_number_type * b,
++ fp_number_type * tmp)
++{
++ fractype low = 0;
++ fractype high = 0;
++
++ if (isnan (a))
++ {
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (isnan (b))
++ {
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++ if (isinf (a))
++ {
++ if (iszero (b))
++ return nan ();
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (isinf (b))
++ {
++ if (iszero (a))
++ {
++ return nan ();
++ }
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++ if (iszero (a))
++ {
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (iszero (b))
++ {
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++
++ /* Calculate the mantissa by multiplying both numbers to get a
++ twice-as-wide number. */
++ {
++#if defined(NO_DI_MODE) || defined(TFLOAT)
++ {
++ fractype x = a->fraction.ll;
++ fractype ylow = b->fraction.ll;
++ fractype yhigh = 0;
++ int bit;
++
++ /* ??? This does multiplies one bit at a time. Optimize. */
++ for (bit = 0; bit < FRAC_NBITS; bit++)
++ {
++ int carry;
++
++ if (x & 1)
++ {
++ carry = (low += ylow) < ylow;
++ high += yhigh + carry;
++ }
++ yhigh <<= 1;
++ if (ylow & FRACHIGH)
++ {
++ yhigh |= 1;
++ }
++ ylow <<= 1;
++ x >>= 1;
++ }
++ }
++#elif defined(FLOAT)
++ /* Multiplying two USIs to get a UDI, we're safe. */
++ {
++ UDItype answer = (UDItype)a->fraction.ll * (UDItype)b->fraction.ll;
++
++ high = answer >> BITS_PER_SI;
++ low = answer;
++ }
++#else
++ /* fractype is DImode, but we need the result to be twice as wide.
++ Assuming a widening multiply from DImode to TImode is not
++ available, build one by hand. */
++ {
++ USItype nl = a->fraction.ll;
++ USItype nh = a->fraction.ll >> BITS_PER_SI;
++ USItype ml = b->fraction.ll;
++ USItype mh = b->fraction.ll >> BITS_PER_SI;
++ UDItype pp_ll = (UDItype) ml * nl;
++ UDItype pp_hl = (UDItype) mh * nl;
++ UDItype pp_lh = (UDItype) ml * nh;
++ UDItype pp_hh = (UDItype) mh * nh;
++ UDItype res2 = 0;
++ UDItype res0 = 0;
++ UDItype ps_hh__ = pp_hl + pp_lh;
++ if (ps_hh__ < pp_hl)
++ res2 += (UDItype)1 << BITS_PER_SI;
++ pp_hl = (UDItype)(USItype)ps_hh__ << BITS_PER_SI;
++ res0 = pp_ll + pp_hl;
++ if (res0 < pp_ll)
++ res2++;
++ res2 += (ps_hh__ >> BITS_PER_SI) + pp_hh;
++ high = res2;
++ low = res0;
++ }
++#endif
++ }
++
++ tmp->normal_exp = a->normal_exp + b->normal_exp
++ + FRAC_NBITS - (FRACBITS + NGARDS);
++ tmp->sign = a->sign != b->sign;
++ while (high >= IMPLICIT_2)
++ {
++ tmp->normal_exp++;
++ if (high & 1)
++ {
++ low >>= 1;
++ low |= FRACHIGH;
++ }
++ high >>= 1;
++ }
++ while (high < IMPLICIT_1)
++ {
++ tmp->normal_exp--;
++
++ high <<= 1;
++ if (low & FRACHIGH)
++ high |= 1;
++ low <<= 1;
++ }
++ /* rounding is tricky. if we only round if it won't make us round later. */
++#if 0
++ if (low & FRACHIGH2)
++ {
++ if (((high & GARDMASK) != GARDMSB)
++ && (((high + 1) & GARDMASK) == GARDMSB))
++ {
++ /* don't round, it gets done again later. */
++ }
++ else
++ {
++ high++;
++ }
++ }
++#endif
++ if (!ROUND_TOWARDS_ZERO && (high & GARDMASK) == GARDMSB)
++ {
++ if (high & (1 << NGARDS))
++ {
++ /* half way, so round to even */
++ high += GARDROUND + 1;
++ }
++ else if (low)
++ {
++ /* but we really weren't half way */
++ high += GARDROUND + 1;
++ }
++ }
++ tmp->fraction.ll = high;
++ tmp->class = CLASS_NUMBER;
++ return tmp;
++}
++
++FLO_type
++multiply (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpmul_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++#endif /* L_mul_sf || L_mul_df */
++
++#if defined(L_div_sf) || defined(L_div_df) || defined(L_div_tf)
++static inline __attribute__ ((__always_inline__)) fp_number_type *
++_fpdiv_parts (fp_number_type * a,
++ fp_number_type * b)
++{
++ fractype bit;
++ fractype numerator;
++ fractype denominator;
++ fractype quotient;
++
++ if (isnan (a))
++ {
++ return a;
++ }
++ if (isnan (b))
++ {
++ return b;
++ }
++
++ a->sign = a->sign ^ b->sign;
++
++ if (isinf (a) || iszero (a))
++ {
++ if (a->class == b->class)
++ return nan ();
++ return a;
++ }
++
++ if (isinf (b))
++ {
++ a->fraction.ll = 0;
++ a->normal_exp = 0;
++ return a;
++ }
++ if (iszero (b))
++ {
++ a->class = CLASS_INFINITY;
++ return a;
++ }
++
++ /* Calculate the mantissa by multiplying both 64bit numbers to get a
++ 128 bit number */
++ {
++ /* quotient =
++ ( numerator / denominator) * 2^(numerator exponent - denominator exponent)
++ */
++
++ a->normal_exp = a->normal_exp - b->normal_exp;
++ numerator = a->fraction.ll;
++ denominator = b->fraction.ll;
++
++ if (numerator < denominator)
++ {
++ /* Fraction will be less than 1.0 */
++ numerator *= 2;
++ a->normal_exp--;
++ }
++ bit = IMPLICIT_1;
++ quotient = 0;
++ /* ??? Does divide one bit at a time. Optimize. */
++ while (bit)
++ {
++ if (numerator >= denominator)
++ {
++ quotient |= bit;
++ numerator -= denominator;
++ }
++ bit >>= 1;
++ numerator *= 2;
++ }
++
++ if (!ROUND_TOWARDS_ZERO && (quotient & GARDMASK) == GARDMSB)
++ {
++ if (quotient & (1 << NGARDS))
++ {
++ /* half way, so round to even */
++ quotient += GARDROUND + 1;
++ }
++ else if (numerator)
++ {
++ /* but we really weren't half way, more bits exist */
++ quotient += GARDROUND + 1;
++ }
++ }
++
++ a->fraction.ll = quotient;
++ return (a);
++ }
++}
++
++FLO_type
++divide (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpdiv_parts (&a, &b);
++
++ return pack_d (res);
++}
++#endif /* L_div_sf || L_div_df */
++
++#if defined(L_fpcmp_parts_sf) || defined(L_fpcmp_parts_df) \
++ || defined(L_fpcmp_parts_tf)
++/* according to the demo, fpcmp returns a comparison with 0... thus
++ a<b -> -1
++ a==b -> 0
++ a>b -> +1
++ */
++
++int
++__fpcmp_parts (fp_number_type * a, fp_number_type * b)
++{
++#if 0
++ /* either nan -> unordered. Must be checked outside of this routine. */
++ if (isnan (a) && isnan (b))
++ {
++ return 1; /* still unordered! */
++ }
++#endif
++
++ if (isnan (a) || isnan (b))
++ {
++ return 1; /* how to indicate unordered compare? */
++ }
++ if (isinf (a) && isinf (b))
++ {
++ /* +inf > -inf, but +inf != +inf */
++ /* b \a| +inf(0)| -inf(1)
++ ______\+--------+--------
++ +inf(0)| a==b(0)| a<b(-1)
++ -------+--------+--------
++ -inf(1)| a>b(1) | a==b(0)
++ -------+--------+--------
++ So since unordered must be nonzero, just line up the columns...
++ */
++ return b->sign - a->sign;
++ }
++ /* but not both... */
++ if (isinf (a))
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (isinf (b))
++ {
++ return b->sign ? 1 : -1;
++ }
++ if (iszero (a) && iszero (b))
++ {
++ return 0;
++ }
++ if (iszero (a))
++ {
++ return b->sign ? 1 : -1;
++ }
++ if (iszero (b))
++ {
++ return a->sign ? -1 : 1;
++ }
++ /* now both are "normal". */
++ if (a->sign != b->sign)
++ {
++ /* opposite signs */
++ return a->sign ? -1 : 1;
++ }
++ /* same sign; exponents? */
++ if (a->normal_exp > b->normal_exp)
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (a->normal_exp < b->normal_exp)
++ {
++ return a->sign ? 1 : -1;
++ }
++ /* same exponents; check size. */
++ if (a->fraction.ll > b->fraction.ll)
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (a->fraction.ll < b->fraction.ll)
++ {
++ return a->sign ? 1 : -1;
++ }
++ /* after all that, they're equal. */
++ return 0;
++}
++#endif
++
++#if defined(L_compare_sf) || defined(L_compare_df) || defined(L_compoare_tf)
++CMPtype
++compare (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_compare_sf || L_compare_df */
++
++#ifndef US_SOFTWARE_GOFAST
++
++/* These should be optimized for their specific tasks someday. */
++
++#if defined(L_eq_sf) || defined(L_eq_df) || defined(L_eq_tf)
++CMPtype
++_eq_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth == 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_eq_sf || L_eq_df */
++
++#if defined(L_ne_sf) || defined(L_ne_df) || defined(L_ne_tf)
++CMPtype
++_ne_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* true, truth != 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_ne_sf || L_ne_df */
++
++#if defined(L_gt_sf) || defined(L_gt_df) || defined(L_gt_tf)
++CMPtype
++_gt_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return -1; /* false, truth > 0 */
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_gt_sf || L_gt_df */
++
++#if defined(L_ge_sf) || defined(L_ge_df) || defined(L_ge_tf)
++CMPtype
++_ge_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return -1; /* false, truth >= 0 */
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_ge_sf || L_ge_df */
++
++#if defined(L_lt_sf) || defined(L_lt_df) || defined(L_lt_tf)
++CMPtype
++_lt_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth < 0 */
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_lt_sf || L_lt_df */
++
++#if defined(L_le_sf) || defined(L_le_df) || defined(L_le_tf)
++CMPtype
++_le_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth <= 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_le_sf || L_le_df */
++
++#endif /* ! US_SOFTWARE_GOFAST */
++
++#if defined(L_unord_sf) || defined(L_unord_df) || defined(L_unord_tf)
++CMPtype
++_unord_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ return (isnan (&a) || isnan (&b));
++}
++#endif /* L_unord_sf || L_unord_df */
++
++#if defined(L_si_to_sf) || defined(L_si_to_df) || defined(L_si_to_tf)
++FLO_type
++si_to_float (SItype arg_a)
++{
++ fp_number_type in;
++
++ in.class = CLASS_NUMBER;
++ in.sign = arg_a < 0;
++ if (!arg_a)
++ {
++ in.class = CLASS_ZERO;
++ }
++ else
++ {
++ in.normal_exp = FRACBITS + NGARDS;
++ if (in.sign)
++ {
++ /* Special case for minint, since there is no +ve integer
++ representation for it */
++ if (arg_a == (- MAX_SI_INT - 1))
++ {
++ return (FLO_type)(- MAX_SI_INT - 1);
++ }
++ in.fraction.ll = (-arg_a);
++ }
++ else
++ in.fraction.ll = arg_a;
++
++ while (in.fraction.ll < ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll <<= 1;
++ in.normal_exp -= 1;
++ }
++ }
++ return pack_d (&in);
++}
++#endif /* L_si_to_sf || L_si_to_df */
++
++#if defined(L_usi_to_sf) || defined(L_usi_to_df) || defined(L_usi_to_tf)
++FLO_type
++usi_to_float (USItype arg_a)
++{
++ fp_number_type in;
++
++ in.sign = 0;
++ if (!arg_a)
++ {
++ in.class = CLASS_ZERO;
++ }
++ else
++ {
++ in.class = CLASS_NUMBER;
++ in.normal_exp = FRACBITS + NGARDS;
++ in.fraction.ll = arg_a;
++
++ while (in.fraction.ll > ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll >>= 1;
++ in.normal_exp += 1;
++ }
++ while (in.fraction.ll < ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll <<= 1;
++ in.normal_exp -= 1;
++ }
++ }
++ return pack_d (&in);
++}
++#endif
++
++#if defined(L_sf_to_si) || defined(L_df_to_si) || defined(L_tf_to_si)
++SItype
++float_to_si (FLO_type arg_a)
++{
++ fp_number_type a;
++ SItype tmp;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ if (iszero (&a))
++ return 0;
++ if (isnan (&a))
++ return 0;
++ /* get reasonable MAX_SI_INT... */
++ if (isinf (&a))
++ return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
++ /* it is a number, but a small one */
++ if (a.normal_exp < 0)
++ return 0;
++ if (a.normal_exp > BITS_PER_SI - 2)
++ return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
++ tmp = a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
++ return a.sign ? (-tmp) : (tmp);
++}
++#endif /* L_sf_to_si || L_df_to_si */
++
++#if defined(L_sf_to_usi) || defined(L_df_to_usi) || defined(L_tf_to_usi)
++#if defined US_SOFTWARE_GOFAST || defined(L_tf_to_usi)
++/* While libgcc2.c defines its own __fixunssfsi and __fixunsdfsi routines,
++ we also define them for GOFAST because the ones in libgcc2.c have the
++ wrong names and I'd rather define these here and keep GOFAST CYG-LOC's
++ out of libgcc2.c. We can't define these here if not GOFAST because then
++ there'd be duplicate copies. */
++
++USItype
++float_to_usi (FLO_type arg_a)
++{
++ fp_number_type a;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ if (iszero (&a))
++ return 0;
++ if (isnan (&a))
++ return 0;
++ /* it is a negative number */
++ if (a.sign)
++ return 0;
++ /* get reasonable MAX_USI_INT... */
++ if (isinf (&a))
++ return MAX_USI_INT;
++ /* it is a number, but a small one */
++ if (a.normal_exp < 0)
++ return 0;
++ if (a.normal_exp > BITS_PER_SI - 1)
++ return MAX_USI_INT;
++ else if (a.normal_exp > (FRACBITS + NGARDS))
++ return a.fraction.ll << (a.normal_exp - (FRACBITS + NGARDS));
++ else
++ return a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
++}
++#endif /* US_SOFTWARE_GOFAST */
++#endif /* L_sf_to_usi || L_df_to_usi */
++
++#if defined(L_negate_sf) || defined(L_negate_df) || defined(L_negate_tf)
++FLO_type
++negate (FLO_type arg_a)
++{
++ fp_number_type a;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ flip_sign (&a);
++ return pack_d (&a);
++}
++#endif /* L_negate_sf || L_negate_df */
++
++#ifdef FLOAT
++
++#if defined(L_make_sf)
++SFtype
++__make_fp(fp_class_type class,
++ unsigned int sign,
++ int exp,
++ USItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_sf */
++
++#ifndef FLOAT_ONLY
++
++/* This enables one to build an fp library that supports float but not double.
++ Otherwise, we would get an undefined reference to __make_dp.
++ This is needed for some 8-bit ports that can't handle well values that
++ are 8-bytes in size, so we just don't support double for them at all. */
++
++#if defined(L_sf_to_df)
++DFtype
++sf_to_df (SFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_dp (in.class, in.sign, in.normal_exp,
++ ((UDItype) in.fraction.ll) << F_D_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#if defined(L_sf_to_tf) && defined(TMODES)
++TFtype
++sf_to_tf (SFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_tp (in.class, in.sign, in.normal_exp,
++ ((UTItype) in.fraction.ll) << F_T_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#endif /* ! FLOAT_ONLY */
++#endif /* FLOAT */
++
++#ifndef FLOAT
++
++extern SFtype __make_fp (fp_class_type, unsigned int, int, USItype);
++
++#if defined(L_make_df)
++DFtype
++__make_dp (fp_class_type class, unsigned int sign, int exp, UDItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_df */
++
++#if defined(L_df_to_sf)
++SFtype
++df_to_sf (DFtype arg_a)
++{
++ fp_number_type in;
++ USItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> F_D_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((USItype) 1 << F_D_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_fp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_df_to_sf */
++
++#if defined(L_df_to_tf) && defined(TMODES) \
++ && !defined(FLOAT) && !defined(TFLOAT)
++TFtype
++df_to_tf (DFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_tp (in.class, in.sign, in.normal_exp,
++ ((UTItype) in.fraction.ll) << D_T_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#ifdef TFLOAT
++#if defined(L_make_tf)
++TFtype
++__make_tp(fp_class_type class,
++ unsigned int sign,
++ int exp,
++ UTItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_tf */
++
++#if defined(L_tf_to_df)
++DFtype
++tf_to_df (TFtype arg_a)
++{
++ fp_number_type in;
++ UDItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> D_T_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((UTItype) 1 << D_T_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_dp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_tf_to_df */
++
++#if defined(L_tf_to_sf)
++SFtype
++tf_to_sf (TFtype arg_a)
++{
++ fp_number_type in;
++ USItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> F_T_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((UTItype) 1 << F_T_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_fp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_tf_to_sf */
++#endif /* TFLOAT */
++
++#endif /* ! FLOAT */
++#endif /* !EXTENDED_FLOAT_STUBS */
+--- gcc-3.4.2/gcc/config/nios2/nios2-protos.h
++++ gcc-3.4.2.nios2/gcc/config/nios2/nios2-protos.h
+@@ -0,0 +1,70 @@
++/* Subroutines for assembler code output for Altera NIOS 2G NIOS2 version.
++ Copyright (C) 2003 Altera
++ Contributed by Jonah Graham (jgraham@altera.com).
++
++This file is part of GNU CC.
++
++GNU CC is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2, or (at your option)
++any later version.
++
++GNU CC is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with GNU CC; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++extern void dump_frame_size (FILE *);
++extern HOST_WIDE_INT compute_frame_size (void);
++extern int nios2_initial_elimination_offset (int, int);
++extern void override_options (void);
++extern void optimization_options (int, int);
++extern int nios2_can_use_return_insn (void);
++extern void expand_prologue (void);
++extern void expand_epilogue (bool);
++extern void function_profiler (FILE *, int);
++
++
++#ifdef RTX_CODE
++extern int nios2_legitimate_address (rtx, enum machine_mode, int);
++extern void nios2_print_operand (FILE *, rtx, int);
++extern void nios2_print_operand_address (FILE *, rtx);
++
++extern int nios2_emit_move_sequence (rtx *, enum machine_mode);
++extern int nios2_emit_expensive_div (rtx *, enum machine_mode);
++
++extern void gen_int_relational (enum rtx_code, rtx, rtx, rtx, rtx);
++extern void gen_conditional_move (rtx *, enum machine_mode);
++extern const char *asm_output_opcode (FILE *, const char *);
++
++/* predicates */
++extern int arith_operand (rtx, enum machine_mode);
++extern int uns_arith_operand (rtx, enum machine_mode);
++extern int logical_operand (rtx, enum machine_mode);
++extern int shift_operand (rtx, enum machine_mode);
++extern int reg_or_0_operand (rtx, enum machine_mode);
++extern int equality_op (rtx, enum machine_mode);
++extern int custom_insn_opcode (rtx, enum machine_mode);
++extern int rdwrctl_operand (rtx, enum machine_mode);
++
++# ifdef HAVE_MACHINE_MODES
++# if defined TREE_CODE
++extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
++extern rtx function_arg (const CUMULATIVE_ARGS *, enum machine_mode, tree, int);
++extern int function_arg_partial_nregs (const CUMULATIVE_ARGS *, enum machine_mode, tree, int);
++extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
++extern int nios2_setup_incoming_varargs (const CUMULATIVE_ARGS *, enum machine_mode, tree, int);
++
++# endif /* TREE_CODE */
++# endif /* HAVE_MACHINE_MODES */
++#endif
++
++#ifdef TREE_CODE
++extern int nios2_return_in_memory (tree);
++
++#endif /* TREE_CODE */
+--- gcc-3.4.2/gcc/config/nios2/nios2.c
++++ gcc-3.4.2.nios2/gcc/config/nios2/nios2.c
+@@ -0,0 +1,2853 @@
++/* Subroutines for assembler code output for Altera NIOS 2G NIOS2 version.
++ Copyright (C) 2003 Altera
++ Contributed by Jonah Graham (jgraham@altera.com).
++
++This file is part of GNU CC.
++
++GNU CC is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2, or (at your option)
++any later version.
++
++GNU CC is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with GNU CC; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++
++#include <stdio.h>
++#include "config.h"
++#include "system.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "rtl.h"
++#include "tree.h"
++#include "tm_p.h"
++#include "regs.h"
++#include "hard-reg-set.h"
++#include "real.h"
++#include "insn-config.h"
++#include "conditions.h"
++#include "output.h"
++#include "insn-attr.h"
++#include "flags.h"
++#include "recog.h"
++#include "expr.h"
++#include "toplev.h"
++#include "basic-block.h"
++#include "function.h"
++#include "ggc.h"
++#include "reload.h"
++#include "debug.h"
++#include "optabs.h"
++#include "target.h"
++#include "target-def.h"
++
++/* local prototypes */
++static bool nios2_rtx_costs (rtx, int, int, int *);
++
++static void nios2_asm_function_prologue (FILE *, HOST_WIDE_INT);
++static int nios2_use_dfa_pipeline_interface (void);
++static int nios2_issue_rate (void);
++static struct machine_function *nios2_init_machine_status (void);
++static bool nios2_in_small_data_p (tree);
++static rtx save_reg (int, HOST_WIDE_INT, rtx);
++static rtx restore_reg (int, HOST_WIDE_INT);
++static unsigned int nios2_section_type_flags (tree, const char *, int);
++static void nios2_init_builtins (void);
++static rtx nios2_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
++static bool nios2_function_ok_for_sibcall (tree, tree);
++static void nios2_encode_section_info (tree, rtx, int);
++
++/* Initialize the GCC target structure. */
++#undef TARGET_ASM_FUNCTION_PROLOGUE
++#define TARGET_ASM_FUNCTION_PROLOGUE nios2_asm_function_prologue
++
++#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
++#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE \
++ nios2_use_dfa_pipeline_interface
++#undef TARGET_SCHED_ISSUE_RATE
++#define TARGET_SCHED_ISSUE_RATE nios2_issue_rate
++#undef TARGET_IN_SMALL_DATA_P
++#define TARGET_IN_SMALL_DATA_P nios2_in_small_data_p
++#undef TARGET_ENCODE_SECTION_INFO
++#define TARGET_ENCODE_SECTION_INFO nios2_encode_section_info
++#undef TARGET_SECTION_TYPE_FLAGS
++#define TARGET_SECTION_TYPE_FLAGS nios2_section_type_flags
++
++#undef TARGET_INIT_BUILTINS
++#define TARGET_INIT_BUILTINS nios2_init_builtins
++#undef TARGET_EXPAND_BUILTIN
++#define TARGET_EXPAND_BUILTIN nios2_expand_builtin
++
++#undef TARGET_FUNCTION_OK_FOR_SIBCALL
++#define TARGET_FUNCTION_OK_FOR_SIBCALL nios2_function_ok_for_sibcall
++
++#undef TARGET_RTX_COSTS
++#define TARGET_RTX_COSTS nios2_rtx_costs
++
++
++struct gcc_target targetm = TARGET_INITIALIZER;
++\f
++
++
++/* Threshold for data being put into the small data/bss area, instead
++ of the normal data area (references to the small data/bss area take
++ 1 instruction, and use the global pointer, references to the normal
++ data area takes 2 instructions). */
++unsigned HOST_WIDE_INT nios2_section_threshold = NIOS2_DEFAULT_GVALUE;
++
++
++/* Structure to be filled in by compute_frame_size with register
++ save masks, and offsets for the current function. */
++
++struct nios2_frame_info
++GTY (())
++{
++ long total_size; /* # bytes that the entire frame takes up */
++ long var_size; /* # bytes that variables take up */
++ long args_size; /* # bytes that outgoing arguments take up */
++ int save_reg_size; /* # bytes needed to store gp regs */
++ int save_reg_rounded; /* # bytes needed to store gp regs */
++ long save_regs_offset; /* offset from new sp to store gp registers */
++ int initialized; /* != 0 if frame size already calculated */
++ int num_regs; /* number of gp registers saved */
++};
++
++struct machine_function
++GTY (())
++{
++
++ /* Current frame information, calculated by compute_frame_size. */
++ struct nios2_frame_info frame;
++};
++\f
++
++/***************************************
++ * Section encodings
++ ***************************************/
++\f
++
++
++
++
++/***************************************
++ * Stack Layout and Calling Conventions
++ ***************************************/
++
++
++#define TOO_BIG_OFFSET(X) ((X) > ((1 << 15) - 1))
++#define TEMP_REG_NUM 8
++
++static void
++nios2_asm_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
++{
++ if (flag_verbose_asm || flag_debug_asm)
++ {
++ compute_frame_size ();
++ dump_frame_size (file);
++ }
++}
++
++static rtx
++save_reg (int regno, HOST_WIDE_INT offset, rtx cfa_store_reg)
++{
++ rtx insn, stack_slot;
++
++ stack_slot = gen_rtx_PLUS (SImode,
++ cfa_store_reg,
++ GEN_INT (offset));
++
++ insn = emit_insn (gen_rtx_SET (SImode,
++ gen_rtx_MEM (SImode, stack_slot),
++ gen_rtx_REG (SImode, regno)));
++
++ RTX_FRAME_RELATED_P (insn) = 1;
++
++ return insn;
++}
++
++static rtx
++restore_reg (int regno, HOST_WIDE_INT offset)
++{
++ rtx insn, stack_slot;
++
++ if (TOO_BIG_OFFSET (offset))
++ {
++ stack_slot = gen_rtx_REG (SImode, TEMP_REG_NUM);
++ insn = emit_insn (gen_rtx_SET (SImode,
++ stack_slot,
++ GEN_INT (offset)));
++
++ insn = emit_insn (gen_rtx_SET (SImode,
++ stack_slot,
++ gen_rtx_PLUS (SImode,
++ stack_slot,
++ stack_pointer_rtx)));
++ }
++ else
++ {
++ stack_slot = gen_rtx_PLUS (SImode,
++ stack_pointer_rtx,
++ GEN_INT (offset));
++ }
++
++ stack_slot = gen_rtx_MEM (SImode, stack_slot);
++
++ insn = emit_move_insn (gen_rtx_REG (SImode, regno), stack_slot);
++
++ return insn;
++}
++
++
++/* There are two possible paths for prologue expansion,
++- the first is if the total frame size is < 2^15-1. In that
++case all the immediates will fit into the 16-bit immediate
++fields.
++- the second is when the frame size is too big, in that
++case an additional temporary register is used, first
++as a cfa_temp to offset the sp, second as the cfa_store
++register.
++
++See the comment above dwarf2out_frame_debug_expr in
++dwarf2out.c for more explanation of the "rules."
++
++
++Case 1:
++Rule # Example Insn Effect
++2 addi sp, sp, -total_frame_size cfa.reg=sp, cfa.offset=total_frame_size
++ cfa_store.reg=sp, cfa_store.offset=total_frame_size
++12 stw ra, offset(sp)
++12 stw r16, offset(sp)
++1 mov fp, sp
++
++Case 2:
++Rule # Example Insn Effect
++6 movi r8, total_frame_size cfa_temp.reg=r8, cfa_temp.offset=total_frame_size
++2 sub sp, sp, r8 cfa.reg=sp, cfa.offset=total_frame_size
++ cfa_store.reg=sp, cfa_store.offset=total_frame_size
++5 add r8, r8, sp cfa_store.reg=r8, cfa_store.offset=0
++12 stw ra, offset(r8)
++12 stw r16, offset(r8)
++1 mov fp, sp
++
++*/
++
++void
++expand_prologue ()
++{
++ int i;
++ HOST_WIDE_INT total_frame_size;
++ int cfa_store_offset;
++ rtx insn;
++ rtx cfa_store_reg = 0;
++
++ total_frame_size = compute_frame_size ();
++
++ if (total_frame_size)
++ {
++
++ if (TOO_BIG_OFFSET (total_frame_size))
++ {
++ /* cfa_temp and cfa_store_reg are the same register,
++ cfa_store_reg overwrites cfa_temp */
++ cfa_store_reg = gen_rtx_REG (SImode, TEMP_REG_NUM);
++ insn = emit_insn (gen_rtx_SET (SImode,
++ cfa_store_reg,
++ GEN_INT (total_frame_size)));
++
++ RTX_FRAME_RELATED_P (insn) = 1;
++
++
++ insn = gen_rtx_SET (SImode,
++ stack_pointer_rtx,
++ gen_rtx_MINUS (SImode,
++ stack_pointer_rtx,
++ cfa_store_reg));
++
++ insn = emit_insn (insn);
++ RTX_FRAME_RELATED_P (insn) = 1;
++
++
++ /* if there are no registers to save, I don't need to
++ create a cfa_store */
++ if (cfun->machine->frame.save_reg_size)
++ {
++ insn = gen_rtx_SET (SImode,
++ cfa_store_reg,
++ gen_rtx_PLUS (SImode,
++ cfa_store_reg,
++ stack_pointer_rtx));
++
++ insn = emit_insn (insn);
++ RTX_FRAME_RELATED_P (insn) = 1;
++ }
++
++ cfa_store_offset
++ = total_frame_size
++ - (cfun->machine->frame.save_regs_offset
++ + cfun->machine->frame.save_reg_rounded);
++ }
++ else
++ {
++ insn = gen_rtx_SET (SImode,
++ stack_pointer_rtx,
++ gen_rtx_PLUS (SImode,
++ stack_pointer_rtx,
++ GEN_INT (-total_frame_size)));
++ insn = emit_insn (insn);
++ RTX_FRAME_RELATED_P (insn) = 1;
++
++ cfa_store_reg = stack_pointer_rtx;
++ cfa_store_offset
++ = cfun->machine->frame.save_regs_offset
++ + cfun->machine->frame.save_reg_rounded;
++ }
++ }
++
++ if (MUST_SAVE_REGISTER (RA_REGNO))
++ {
++ cfa_store_offset -= 4;
++ save_reg (RA_REGNO, cfa_store_offset, cfa_store_reg);
++ }
++ if (MUST_SAVE_REGISTER (FP_REGNO))
++ {
++ cfa_store_offset -= 4;
++ save_reg (FP_REGNO, cfa_store_offset, cfa_store_reg);
++ }
++
++ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++ {
++ if (MUST_SAVE_REGISTER (i) && i != FP_REGNO && i != RA_REGNO)
++ {
++ cfa_store_offset -= 4;
++ save_reg (i, cfa_store_offset, cfa_store_reg);
++ }
++ }
++
++ if (frame_pointer_needed)
++ {
++ insn = emit_insn (gen_rtx_SET (SImode,
++ gen_rtx_REG (SImode, FP_REGNO),
++ gen_rtx_REG (SImode, SP_REGNO)));
++
++ RTX_FRAME_RELATED_P (insn) = 1;
++ }
++
++ /* If we are profiling, make sure no instructions are scheduled before
++ the call to mcount. */
++ if (current_function_profile)
++ emit_insn (gen_blockage ());
++}
++
++void
++expand_epilogue (bool sibcall_p)
++{
++ rtx insn;
++ int i;
++ HOST_WIDE_INT total_frame_size;
++ int register_store_offset;
++
++ total_frame_size = compute_frame_size ();
++
++ if (!sibcall_p && nios2_can_use_return_insn ())
++ {
++ insn = emit_jump_insn (gen_return ());
++ return;
++ }
++
++ emit_insn (gen_blockage ());
++
++ register_store_offset =
++ cfun->machine->frame.save_regs_offset +
++ cfun->machine->frame.save_reg_rounded;
++
++ if (MUST_SAVE_REGISTER (RA_REGNO))
++ {
++ register_store_offset -= 4;
++ restore_reg (RA_REGNO, register_store_offset);
++ }
++
++ if (MUST_SAVE_REGISTER (FP_REGNO))
++ {
++ register_store_offset -= 4;
++ restore_reg (FP_REGNO, register_store_offset);
++ }
++
++ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++ {
++ if (MUST_SAVE_REGISTER (i) && i != FP_REGNO && i != RA_REGNO)
++ {
++ register_store_offset -= 4;
++ restore_reg (i, register_store_offset);
++ }
++ }
++
++ if (total_frame_size)
++ {
++ rtx sp_adjust;
++
++ if (TOO_BIG_OFFSET (total_frame_size))
++ {
++ sp_adjust = gen_rtx_REG (SImode, TEMP_REG_NUM);
++ insn = emit_insn (gen_rtx_SET (SImode,
++ sp_adjust,
++ GEN_INT (total_frame_size)));
++
++ }
++ else
++ {
++ sp_adjust = GEN_INT (total_frame_size);
++ }
++
++ insn = gen_rtx_SET (SImode,
++ stack_pointer_rtx,
++ gen_rtx_PLUS (SImode,
++ stack_pointer_rtx,
++ sp_adjust));
++ insn = emit_insn (insn);
++ }
++
++
++ if (!sibcall_p)
++ {
++ insn = emit_jump_insn (gen_return_from_epilogue (gen_rtx (REG, Pmode,
++ RA_REGNO)));
++ }
++}
++
++
++bool
++nios2_function_ok_for_sibcall (tree a ATTRIBUTE_UNUSED, tree b ATTRIBUTE_UNUSED)
++{
++ return true;
++}
++
++
++
++\f
++
++/* ----------------------- *
++ * Profiling
++ * ----------------------- */
++
++void
++function_profiler (FILE *file, int labelno)
++{
++ fprintf (file, "\t%s mcount begin, label: .LP%d\n",
++ ASM_COMMENT_START, labelno);
++ fprintf (file, "\tnextpc\tr8\n");
++ fprintf (file, "\tmov\tr9, ra\n");
++ fprintf (file, "\tmovhi\tr10, %%hiadj(.LP%d)\n", labelno);
++ fprintf (file, "\taddi\tr10, r10, %%lo(.LP%d)\n", labelno);
++ fprintf (file, "\tcall\tmcount\n");
++ fprintf (file, "\tmov\tra, r9\n");
++ fprintf (file, "\t%s mcount end\n", ASM_COMMENT_START);
++}
++
++
++/***************************************
++ * Stack Layout
++ ***************************************/
++
++
++void
++dump_frame_size (FILE *file)
++{
++ fprintf (file, "\t%s Current Frame Info\n", ASM_COMMENT_START);
++
++ fprintf (file, "\t%s total_size = %ld\n", ASM_COMMENT_START,
++ cfun->machine->frame.total_size);
++ fprintf (file, "\t%s var_size = %ld\n", ASM_COMMENT_START,
++ cfun->machine->frame.var_size);
++ fprintf (file, "\t%s args_size = %ld\n", ASM_COMMENT_START,
++ cfun->machine->frame.args_size);
++ fprintf (file, "\t%s save_reg_size = %d\n", ASM_COMMENT_START,
++ cfun->machine->frame.save_reg_size);
++ fprintf (file, "\t%s save_reg_rounded = %d\n", ASM_COMMENT_START,
++ cfun->machine->frame.save_reg_rounded);
++ fprintf (file, "\t%s initialized = %d\n", ASM_COMMENT_START,
++ cfun->machine->frame.initialized);
++ fprintf (file, "\t%s num_regs = %d\n", ASM_COMMENT_START,
++ cfun->machine->frame.num_regs);
++ fprintf (file, "\t%s save_regs_offset = %ld\n", ASM_COMMENT_START,
++ cfun->machine->frame.save_regs_offset);
++ fprintf (file, "\t%s current_function_is_leaf = %d\n", ASM_COMMENT_START,
++ current_function_is_leaf);
++ fprintf (file, "\t%s frame_pointer_needed = %d\n", ASM_COMMENT_START,
++ frame_pointer_needed);
++ fprintf (file, "\t%s pretend_args_size = %d\n", ASM_COMMENT_START,
++ current_function_pretend_args_size);
++
++}
++
++
++/* Return the bytes needed to compute the frame pointer from the current
++ stack pointer.
++*/
++
++HOST_WIDE_INT
++compute_frame_size ()
++{
++ unsigned int regno;
++ HOST_WIDE_INT var_size; /* # of var. bytes allocated */
++ HOST_WIDE_INT total_size; /* # bytes that the entire frame takes up */
++ HOST_WIDE_INT save_reg_size; /* # bytes needed to store callee save regs */
++ HOST_WIDE_INT save_reg_rounded;
++ /* # bytes needed to store callee save regs (rounded) */
++ HOST_WIDE_INT out_args_size; /* # bytes needed for outgoing args */
++
++ save_reg_size = 0;
++ var_size = STACK_ALIGN (get_frame_size ());
++ out_args_size = STACK_ALIGN (current_function_outgoing_args_size);
++
++ total_size = var_size + out_args_size;
++
++ /* Calculate space needed for gp registers. */
++ for (regno = 0; regno <= FIRST_PSEUDO_REGISTER; regno++)
++ {
++ if (MUST_SAVE_REGISTER (regno))
++ {
++ save_reg_size += 4;
++ }
++ }
++
++ save_reg_rounded = STACK_ALIGN (save_reg_size);
++ total_size += save_reg_rounded;
++
++ total_size += STACK_ALIGN (current_function_pretend_args_size);
++
++ /* Save other computed information. */
++ cfun->machine->frame.total_size = total_size;
++ cfun->machine->frame.var_size = var_size;
++ cfun->machine->frame.args_size = current_function_outgoing_args_size;
++ cfun->machine->frame.save_reg_size = save_reg_size;
++ cfun->machine->frame.save_reg_rounded = save_reg_rounded;
++ cfun->machine->frame.initialized = reload_completed;
++ cfun->machine->frame.num_regs = save_reg_size / UNITS_PER_WORD;
++
++ cfun->machine->frame.save_regs_offset
++ = save_reg_rounded ? current_function_outgoing_args_size + var_size : 0;
++
++ return total_size;
++}
++
++
++int
++nios2_initial_elimination_offset (int from, int to ATTRIBUTE_UNUSED)
++{
++ int offset;
++
++ /* Set OFFSET to the offset from the stack pointer. */
++ switch (from)
++ {
++ case FRAME_POINTER_REGNUM:
++ offset = 0;
++ break;
++
++ case ARG_POINTER_REGNUM:
++ compute_frame_size ();
++ offset = cfun->machine->frame.total_size;
++ offset -= current_function_pretend_args_size;
++ break;
++
++ case RETURN_ADDRESS_POINTER_REGNUM:
++ compute_frame_size ();
++ /* since the return address is always the first of the
++ saved registers, return the offset to the beginning
++ of the saved registers block */
++ offset = cfun->machine->frame.save_regs_offset;
++ break;
++
++ default:
++ abort ();
++ }
++
++ return offset;
++}
++
++/* Return nonzero if this function is known to have a null epilogue.
++ This allows the optimizer to omit jumps to jumps if no stack
++ was created. */
++int
++nios2_can_use_return_insn ()
++{
++ if (!reload_completed)
++ return 0;
++
++ if (regs_ever_live[RA_REGNO] || current_function_profile)
++ return 0;
++
++ if (cfun->machine->frame.initialized)
++ return cfun->machine->frame.total_size == 0;
++
++ return compute_frame_size () == 0;
++}
++
++
++
++\f
++
++/***************************************
++ *
++ ***************************************/
++
++const char *nios2_sys_nosys_string; /* for -msys=nosys */
++const char *nios2_sys_lib_string; /* for -msys-lib= */
++const char *nios2_sys_crt0_string; /* for -msys-crt0= */
++
++void
++override_options ()
++{
++ /* Function to allocate machine-dependent function status. */
++ init_machine_status = &nios2_init_machine_status;
++
++ nios2_section_threshold
++ = g_switch_set ? g_switch_value : NIOS2_DEFAULT_GVALUE;
++
++ if (nios2_sys_nosys_string && *nios2_sys_nosys_string)
++ {
++ error ("invalid option '-msys=nosys%s'", nios2_sys_nosys_string);
++ }
++
++ /* If we don't have mul, we don't have mulx either! */
++ if (!TARGET_HAS_MUL && TARGET_HAS_MULX)
++ {
++ target_flags &= ~HAS_MULX_FLAG;
++ }
++
++}
++
++void
++optimization_options (int level, int size)
++{
++ if (level || size)
++ {
++ target_flags |= INLINE_MEMCPY_FLAG;
++ }
++
++ if (level >= 3 && !size)
++ {
++ target_flags |= FAST_SW_DIV_FLAG;
++ }
++}
++
++/* Allocate a chunk of memory for per-function machine-dependent data. */
++static struct machine_function *
++nios2_init_machine_status ()
++{
++ return ((struct machine_function *)
++ ggc_alloc_cleared (sizeof (struct machine_function)));
++}
++
++\f
++
++/*****************
++ * Describing Relative Costs of Operations
++ *****************/
++
++/* Compute a (partial) cost for rtx X. Return true if the complete
++ cost has been computed, and false if subexpressions should be
++ scanned. In either case, *TOTAL contains the cost result. */
++
++
++
++static bool
++nios2_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, int *total)
++{
++ switch (code)
++ {
++ case CONST_INT:
++ if (INTVAL (x) == 0)
++ {
++ *total = COSTS_N_INSNS (0);
++ return true;
++ }
++ else if (SMALL_INT (INTVAL (x))
++ || SMALL_INT_UNSIGNED (INTVAL (x))
++ || UPPER16_INT (INTVAL (x)))
++ {
++ *total = COSTS_N_INSNS (2);
++ return true;
++ }
++ else
++ {
++ *total = COSTS_N_INSNS (4);
++ return true;
++ }
++
++ case LABEL_REF:
++ case SYMBOL_REF:
++ /* ??? gp relative stuff will fit in here */
++ /* fall through */
++ case CONST:
++ case CONST_DOUBLE:
++ {
++ *total = COSTS_N_INSNS (4);
++ return true;
++ }
++
++ case MULT:
++ {
++ *total = COSTS_N_INSNS (1);
++ return false;
++ }
++ case SIGN_EXTEND:
++ {
++ *total = COSTS_N_INSNS (3);
++ return false;
++ }
++ case ZERO_EXTEND:
++ {
++ *total = COSTS_N_INSNS (1);
++ return false;
++ }
++
++ default:
++ return false;
++ }
++}
++
++
++/***************************************
++ * INSTRUCTION SUPPORT
++ *
++ * These functions are used within the Machine Description to
++ * handle common or complicated output and expansions from
++ * instructions.
++ ***************************************/
++
++int
++nios2_emit_move_sequence (rtx *operands, enum machine_mode mode)
++{
++ rtx to = operands[0];
++ rtx from = operands[1];
++
++ if (!register_operand (to, mode) && !reg_or_0_operand (from, mode))
++ {
++ if (no_new_pseudos)
++ internal_error ("Trying to force_reg no_new_pseudos == 1");
++ from = copy_to_mode_reg (mode, from);
++ }
++
++ operands[0] = to;
++ operands[1] = from;
++ return 0;
++}
++
++/* Divide Support */
++
++/*
++ If -O3 is used, we want to output a table lookup for
++ divides between small numbers (both num and den >= 0
++ and < 0x10). The overhead of this method in the worse
++ case is 40 bytes in the text section (10 insns) and
++ 256 bytes in the data section. Additional divides do
++ not incur additional penalties in the data section.
++
++ Code speed is improved for small divides by about 5x
++ when using this method in the worse case (~9 cycles
++ vs ~45). And in the worse case divides not within the
++ table are penalized by about 10% (~5 cycles vs ~45).
++ However in the typical case the penalty is not as bad
++ because doing the long divide in only 45 cycles is
++ quite optimistic.
++
++ ??? It would be nice to have some benchmarks other
++ than Dhrystone to back this up.
++
++ This bit of expansion is to create this instruction
++ sequence as rtl.
++ or $8, $4, $5
++ slli $9, $4, 4
++ cmpgeui $3, $8, 16
++ beq $3, $0, .L3
++ or $10, $9, $5
++ add $12, $11, divide_table
++ ldbu $2, 0($12)
++ br .L1
++.L3:
++ call slow_div
++.L1:
++# continue here with result in $2
++
++ ??? Ideally I would like the emit libcall block to contain
++ all of this code, but I don't know how to do that. What it
++ means is that if the divide can be eliminated, it may not
++ completely disappear.
++
++ ??? The __divsi3_table label should ideally be moved out
++ of this block and into a global. If it is placed into the
++ sdata section we can save even more cycles by doing things
++ gp relative.
++*/
++int
++nios2_emit_expensive_div (rtx *operands, enum machine_mode mode)
++{
++ rtx or_result, shift_left_result;
++ rtx lookup_value;
++ rtx lab1, lab3;
++ rtx insns;
++ rtx libfunc;
++ rtx final_result;
++ rtx tmp;
++
++ /* it may look a little generic, but only SImode
++ is supported for now */
++ if (mode != SImode)
++ abort ();
++
++ libfunc = sdiv_optab->handlers[(int) SImode].libfunc;
++
++
++
++ lab1 = gen_label_rtx ();
++ lab3 = gen_label_rtx ();
++
++ or_result = expand_simple_binop (SImode, IOR,
++ operands[1], operands[2],
++ 0, 0, OPTAB_LIB_WIDEN);
++
++ emit_cmp_and_jump_insns (or_result, GEN_INT (15), GTU, 0,
++ GET_MODE (or_result), 0, lab3);
++ JUMP_LABEL (get_last_insn ()) = lab3;
++
++ shift_left_result = expand_simple_binop (SImode, ASHIFT,
++ operands[1], GEN_INT (4),
++ 0, 0, OPTAB_LIB_WIDEN);
++
++ lookup_value = expand_simple_binop (SImode, IOR,
++ shift_left_result, operands[2],
++ 0, 0, OPTAB_LIB_WIDEN);
++
++ convert_move (operands[0],
++ gen_rtx (MEM, QImode,
++ gen_rtx (PLUS, SImode,
++ lookup_value,
++ gen_rtx_SYMBOL_REF (SImode, "__divsi3_table"))),
++ 1);
++
++
++ tmp = emit_jump_insn (gen_jump (lab1));
++ JUMP_LABEL (tmp) = lab1;
++ emit_barrier ();
++
++ emit_label (lab3);
++ LABEL_NUSES (lab3) = 1;
++
++ start_sequence ();
++ final_result = emit_library_call_value (libfunc, NULL_RTX,
++ LCT_CONST, SImode, 2,
++ operands[1], SImode,
++ operands[2], SImode);
++
++
++ insns = get_insns ();
++ end_sequence ();
++ emit_libcall_block (insns, operands[0], final_result,
++ gen_rtx (DIV, SImode, operands[1], operands[2]));
++
++ emit_label (lab1);
++ LABEL_NUSES (lab1) = 1;
++ return 1;
++}
++
++/* Branches/Compares */
++
++/* the way of handling branches/compares
++ in gcc is heavily borrowed from MIPS */
++
++enum internal_test
++{
++ ITEST_EQ,
++ ITEST_NE,
++ ITEST_GT,
++ ITEST_GE,
++ ITEST_LT,
++ ITEST_LE,
++ ITEST_GTU,
++ ITEST_GEU,
++ ITEST_LTU,
++ ITEST_LEU,
++ ITEST_MAX
++};
++
++static enum internal_test map_test_to_internal_test (enum rtx_code);
++
++/* Cached operands, and operator to compare for use in set/branch/trap
++ on condition codes. */
++rtx branch_cmp[2];
++enum cmp_type branch_type;
++
++/* Make normal rtx_code into something we can index from an array */
++
++static enum internal_test
++map_test_to_internal_test (enum rtx_code test_code)
++{
++ enum internal_test test = ITEST_MAX;
++
++ switch (test_code)
++ {
++ case EQ:
++ test = ITEST_EQ;
++ break;
++ case NE:
++ test = ITEST_NE;
++ break;
++ case GT:
++ test = ITEST_GT;
++ break;
++ case GE:
++ test = ITEST_GE;
++ break;
++ case LT:
++ test = ITEST_LT;
++ break;
++ case LE:
++ test = ITEST_LE;
++ break;
++ case GTU:
++ test = ITEST_GTU;
++ break;
++ case GEU:
++ test = ITEST_GEU;
++ break;
++ case LTU:
++ test = ITEST_LTU;
++ break;
++ case LEU:
++ test = ITEST_LEU;
++ break;
++ default:
++ break;
++ }
++
++ return test;
++}
++
++/* Generate the code to compare (and possibly branch) two integer values
++ TEST_CODE is the comparison code we are trying to emulate
++ (or implement directly)
++ RESULT is where to store the result of the comparison,
++ or null to emit a branch
++ CMP0 CMP1 are the two comparison operands
++ DESTINATION is the destination of the branch, or null to only compare
++ */
++
++void
++gen_int_relational (enum rtx_code test_code, /* relational test (EQ, etc) */
++ rtx result, /* result to store comp. or 0 if branch */
++ rtx cmp0, /* first operand to compare */
++ rtx cmp1, /* second operand to compare */
++ rtx destination) /* destination of the branch, or 0 if compare */
++{
++ struct cmp_info
++ {
++ /* for register (or 0) compares */
++ enum rtx_code test_code_reg; /* code to use in instruction (LT vs. LTU) */
++ int reverse_regs; /* reverse registers in test */
++
++ /* for immediate compares */
++ enum rtx_code test_code_const;
++ /* code to use in instruction (LT vs. LTU) */
++ int const_low; /* low bound of constant we can accept */
++ int const_high; /* high bound of constant we can accept */
++ int const_add; /* constant to add */
++
++ /* generic info */
++ int unsignedp; /* != 0 for unsigned comparisons. */
++ };
++
++ static const struct cmp_info info[(int) ITEST_MAX] = {
++
++ {EQ, 0, EQ, -32768, 32767, 0, 0}, /* EQ */
++ {NE, 0, NE, -32768, 32767, 0, 0}, /* NE */
++
++ {LT, 1, GE, -32769, 32766, 1, 0}, /* GT */
++ {GE, 0, GE, -32768, 32767, 0, 0}, /* GE */
++ {LT, 0, LT, -32768, 32767, 0, 0}, /* LT */
++ {GE, 1, LT, -32769, 32766, 1, 0}, /* LE */
++
++ {LTU, 1, GEU, 0, 65534, 1, 0}, /* GTU */
++ {GEU, 0, GEU, 0, 65535, 0, 0}, /* GEU */
++ {LTU, 0, LTU, 0, 65535, 0, 0}, /* LTU */
++ {GEU, 1, LTU, 0, 65534, 1, 0}, /* LEU */
++ };
++
++ enum internal_test test;
++ enum machine_mode mode;
++ const struct cmp_info *p_info;
++ int branch_p;
++
++
++
++
++ test = map_test_to_internal_test (test_code);
++ if (test == ITEST_MAX)
++ abort ();
++
++ p_info = &info[(int) test];
++
++ mode = GET_MODE (cmp0);
++ if (mode == VOIDmode)
++ mode = GET_MODE (cmp1);
++
++ branch_p = (destination != 0);
++
++ /* We can't, under any circumstances, have const_ints in cmp0
++ ??? Actually we could have const0 */
++ if (GET_CODE (cmp0) == CONST_INT)
++ cmp0 = force_reg (mode, cmp0);
++
++ /* if the comparison is against an int not in legal range
++ move it into a register */
++ if (GET_CODE (cmp1) == CONST_INT)
++ {
++ HOST_WIDE_INT value = INTVAL (cmp1);
++
++ if (value < p_info->const_low || value > p_info->const_high)
++ cmp1 = force_reg (mode, cmp1);
++ }
++
++ /* Comparison to constants, may involve adding 1 to change a GT into GE.
++ Comparison between two registers, may involve switching operands. */
++ if (GET_CODE (cmp1) == CONST_INT)
++ {
++ if (p_info->const_add != 0)
++ {
++ HOST_WIDE_INT new = INTVAL (cmp1) + p_info->const_add;
++
++ /* If modification of cmp1 caused overflow,
++ we would get the wrong answer if we follow the usual path;
++ thus, x > 0xffffffffU would turn into x > 0U. */
++ if ((p_info->unsignedp
++ ? (unsigned HOST_WIDE_INT) new >
++ (unsigned HOST_WIDE_INT) INTVAL (cmp1)
++ : new > INTVAL (cmp1)) != (p_info->const_add > 0))
++ {
++ /* ??? This case can never happen with the current numbers,
++ but I am paranoid and would rather an abort than
++ a bug I will never find */
++ abort ();
++ }
++ else
++ cmp1 = GEN_INT (new);
++ }
++ }
++
++ else if (p_info->reverse_regs)
++ {
++ rtx temp = cmp0;
++ cmp0 = cmp1;
++ cmp1 = temp;
++ }
++
++
++
++ if (branch_p)
++ {
++ if (register_operand (cmp0, mode) && register_operand (cmp1, mode))
++ {
++ rtx insn;
++ rtx cond = gen_rtx (p_info->test_code_reg, mode, cmp0, cmp1);
++ rtx label = gen_rtx_LABEL_REF (VOIDmode, destination);
++
++ insn = gen_rtx_SET (VOIDmode, pc_rtx,
++ gen_rtx_IF_THEN_ELSE (VOIDmode,
++ cond, label, pc_rtx));
++ emit_jump_insn (insn);
++ }
++ else
++ {
++ rtx cond, label;
++
++ result = gen_reg_rtx (mode);
++
++ emit_move_insn (result,
++ gen_rtx (p_info->test_code_const, mode, cmp0,
++ cmp1));
++
++ cond = gen_rtx (NE, mode, result, const0_rtx);
++ label = gen_rtx_LABEL_REF (VOIDmode, destination);
++
++ emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
++ gen_rtx_IF_THEN_ELSE (VOIDmode,
++ cond,
++ label, pc_rtx)));
++ }
++ }
++ else
++ {
++ if (register_operand (cmp0, mode) && register_operand (cmp1, mode))
++ {
++ emit_move_insn (result,
++ gen_rtx (p_info->test_code_reg, mode, cmp0, cmp1));
++ }
++ else
++ {
++ emit_move_insn (result,
++ gen_rtx (p_info->test_code_const, mode, cmp0,
++ cmp1));
++ }
++ }
++
++}
++
++
++/* ??? For now conditional moves are only supported
++ when the mode of the operands being compared are
++ the same as the ones being moved */
++
++void
++gen_conditional_move (rtx *operands, enum machine_mode mode)
++{
++ rtx insn, cond;
++ rtx cmp_reg = gen_reg_rtx (mode);
++ enum rtx_code cmp_code = GET_CODE (operands[1]);
++ enum rtx_code move_code = EQ;
++
++ /* emit a comparison if it is not "simple".
++ Simple comparisons are X eq 0 and X ne 0 */
++ if ((cmp_code == EQ || cmp_code == NE) && branch_cmp[1] == const0_rtx)
++ {
++ cmp_reg = branch_cmp[0];
++ move_code = cmp_code;
++ }
++ else if ((cmp_code == EQ || cmp_code == NE) && branch_cmp[0] == const0_rtx)
++ {
++ cmp_reg = branch_cmp[1];
++ move_code = cmp_code == EQ ? NE : EQ;
++ }
++ else
++ gen_int_relational (cmp_code, cmp_reg, branch_cmp[0], branch_cmp[1],
++ NULL_RTX);
++
++ cond = gen_rtx (move_code, VOIDmode, cmp_reg, CONST0_RTX (mode));
++ insn = gen_rtx_SET (mode, operands[0],
++ gen_rtx_IF_THEN_ELSE (mode,
++ cond, operands[2], operands[3]));
++ emit_insn (insn);
++}
++
++/*******************
++ * Addressing Modes
++ *******************/
++
++int
++nios2_legitimate_address (rtx operand, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int strict)
++{
++ int ret_val = 0;
++
++ switch (GET_CODE (operand))
++ {
++ /* direct. */
++ case SYMBOL_REF:
++ if (SYMBOL_REF_IN_NIOS2_SMALL_DATA_P (operand))
++ {
++ ret_val = 1;
++ break;
++ }
++ /* else, fall through */
++ case LABEL_REF:
++ case CONST_INT:
++ case CONST:
++ case CONST_DOUBLE:
++ /* ??? In here I need to add gp addressing */
++ ret_val = 0;
++
++ break;
++
++ /* Register indirect. */
++ case REG:
++ ret_val = REG_OK_FOR_BASE_P2 (operand, strict);
++ break;
++
++ /* Register indirect with displacement */
++ case PLUS:
++ {
++ rtx op0 = XEXP (operand, 0);
++ rtx op1 = XEXP (operand, 1);
++
++ if (REG_P (op0) && REG_P (op1))
++ ret_val = 0;
++ else if (REG_P (op0) && CONSTANT_P (op1))
++ ret_val = REG_OK_FOR_BASE_P2 (op0, strict)
++ && SMALL_INT (INTVAL (op1));
++ else if (REG_P (op1) && CONSTANT_P (op0))
++ ret_val = REG_OK_FOR_BASE_P2 (op1, strict)
++ && SMALL_INT (INTVAL (op0));
++ else
++ ret_val = 0;
++ }
++ break;
++
++ default:
++ ret_val = 0;
++ break;
++ }
++
++ return ret_val;
++}
++
++/* Return true if EXP should be placed in the small data section. */
++
++static bool
++nios2_in_small_data_p (tree exp)
++{
++ /* We want to merge strings, so we never consider them small data. */
++ if (TREE_CODE (exp) == STRING_CST)
++ return false;
++
++ if (TREE_CODE (exp) == VAR_DECL && DECL_SECTION_NAME (exp))
++ {
++ const char *section = TREE_STRING_POINTER (DECL_SECTION_NAME (exp));
++ /* ??? these string names need moving into
++ an array in some header file */
++ if (nios2_section_threshold > 0
++ && (strcmp (section, ".sbss") == 0
++ || strncmp (section, ".sbss.", 6) == 0
++ || strcmp (section, ".sdata") == 0
++ || strncmp (section, ".sdata.", 7) == 0))
++ return true;
++ }
++ else if (TREE_CODE (exp) == VAR_DECL)
++ {
++ HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
++
++ /* If this is an incomplete type with size 0, then we can't put it
++ in sdata because it might be too big when completed. */
++ if (size > 0 && size <= nios2_section_threshold)
++ return true;
++ }
++
++ return false;
++}
++
++static void
++nios2_encode_section_info (tree decl, rtx rtl, int first)
++{
++
++ rtx symbol;
++ int flags;
++
++ default_encode_section_info (decl, rtl, first);
++
++ /* Careful not to prod global register variables. */
++ if (GET_CODE (rtl) != MEM)
++ return;
++ symbol = XEXP (rtl, 0);
++ if (GET_CODE (symbol) != SYMBOL_REF)
++ return;
++
++ flags = SYMBOL_REF_FLAGS (symbol);
++
++ /* We don't want weak variables to be addressed with gp in case they end up with
++ value 0 which is not within 2^15 of $gp */
++ if (DECL_P (decl) && DECL_WEAK (decl))
++ flags |= SYMBOL_FLAG_WEAK_DECL;
++
++ SYMBOL_REF_FLAGS (symbol) = flags;
++}
++
++
++static unsigned int
++nios2_section_type_flags (tree decl, const char *name, int reloc)
++{
++ unsigned int flags;
++
++ flags = default_section_type_flags (decl, name, reloc);
++
++ /* ??? these string names need moving into an array in some header file */
++ if (strcmp (name, ".sbss") == 0
++ || strncmp (name, ".sbss.", 6) == 0
++ || strcmp (name, ".sdata") == 0
++ || strncmp (name, ".sdata.", 7) == 0)
++ flags |= SECTION_SMALL;
++
++ return flags;
++}
++
++
++
++
++/*****************************************
++ * Defining the Output Assembler Language
++ *****************************************/
++
++/* -------------- *
++ * Output of Data
++ * -------------- */
++
++
++/* -------------------------------- *
++ * Output of Assembler Instructions
++ * -------------------------------- */
++
++
++/* print the operand OP to file stream
++ FILE modified by LETTER. LETTER
++ can be one of:
++ i: print "i" if OP is an immediate, except 0
++ o: print "io" if OP is volatile
++
++ z: for const0_rtx print $0 instead of 0
++ H: for %hiadj
++ L: for %lo
++ U: for upper half of 32 bit value
++ */
++
++void
++nios2_print_operand (FILE *file, rtx op, int letter)
++{
++
++ switch (letter)
++ {
++ case 'i':
++ if (CONSTANT_P (op) && (op != const0_rtx))
++ fprintf (file, "i");
++ return;
++
++ case 'o':
++ if (GET_CODE (op) == MEM
++ && ((MEM_VOLATILE_P (op) && !TARGET_CACHE_VOLATILE)
++ || TARGET_BYPASS_CACHE))
++ fprintf (file, "io");
++ return;
++
++ default:
++ break;
++ }
++
++ if (comparison_operator (op, VOIDmode))
++ {
++ if (letter == 0)
++ {
++ fprintf (file, "%s", GET_RTX_NAME (GET_CODE (op)));
++ return;
++ }
++ }
++
++
++ switch (GET_CODE (op))
++ {
++ case REG:
++ if (letter == 0 || letter == 'z')
++ {
++ fprintf (file, "%s", reg_names[REGNO (op)]);
++ return;
++ }
++
++ case CONST_INT:
++ if (INTVAL (op) == 0 && letter == 'z')
++ {
++ fprintf (file, "zero");
++ return;
++ }
++ else if (letter == 'U')
++ {
++ HOST_WIDE_INT val = INTVAL (op);
++ rtx new_op;
++ val = (val / 65536) & 0xFFFF;
++ new_op = GEN_INT (val);
++ output_addr_const (file, new_op);
++ return;
++ }
++
++ /* else, fall through */
++ case CONST:
++ case LABEL_REF:
++ case SYMBOL_REF:
++ case CONST_DOUBLE:
++ if (letter == 0 || letter == 'z')
++ {
++ output_addr_const (file, op);
++ return;
++ }
++ else if (letter == 'H')
++ {
++ fprintf (file, "%%hiadj(");
++ output_addr_const (file, op);
++ fprintf (file, ")");
++ return;
++ }
++ else if (letter == 'L')
++ {
++ fprintf (file, "%%lo(");
++ output_addr_const (file, op);
++ fprintf (file, ")");
++ return;
++ }
++
++
++ case SUBREG:
++ case MEM:
++ if (letter == 0)
++ {
++ output_address (op);
++ return;
++ }
++
++ case CODE_LABEL:
++ if (letter == 0)
++ {
++ output_addr_const (file, op);
++ return;
++ }
++
++ default:
++ break;
++ }
++
++ fprintf (stderr, "Missing way to print (%c) ", letter);
++ debug_rtx (op);
++ abort ();
++}
++
++static int gprel_constant (rtx);
++
++static int
++gprel_constant (rtx op)
++{
++ if (GET_CODE (op) == SYMBOL_REF
++ && SYMBOL_REF_IN_NIOS2_SMALL_DATA_P (op))
++ {
++ return 1;
++ }
++ else if (GET_CODE (op) == CONST
++ && GET_CODE (XEXP (op, 0)) == PLUS)
++ {
++ return gprel_constant (XEXP (XEXP (op, 0), 0));
++ }
++ else
++ {
++ return 0;
++ }
++}
++
++void
++nios2_print_operand_address (FILE *file, rtx op)
++{
++ switch (GET_CODE (op))
++ {
++ case CONST:
++ case CONST_INT:
++ case LABEL_REF:
++ case CONST_DOUBLE:
++ case SYMBOL_REF:
++ if (gprel_constant (op))
++ {
++ fprintf (file, "%%gprel(");
++ output_addr_const (file, op);
++ fprintf (file, ")(%s)", reg_names[GP_REGNO]);
++ return;
++ }
++
++ break;
++
++ case PLUS:
++ {
++ rtx op0 = XEXP (op, 0);
++ rtx op1 = XEXP (op, 1);
++
++ if (REG_P (op0) && CONSTANT_P (op1))
++ {
++ output_addr_const (file, op1);
++ fprintf (file, "(%s)", reg_names[REGNO (op0)]);
++ return;
++ }
++ else if (REG_P (op1) && CONSTANT_P (op0))
++ {
++ output_addr_const (file, op0);
++ fprintf (file, "(%s)", reg_names[REGNO (op1)]);
++ return;
++ }
++ }
++ break;
++
++ case REG:
++ fprintf (file, "0(%s)", reg_names[REGNO (op)]);
++ return;
++
++ case MEM:
++ {
++ rtx base = XEXP (op, 0);
++ PRINT_OPERAND_ADDRESS (file, base);
++ return;
++ }
++ default:
++ break;
++ }
++
++ fprintf (stderr, "Missing way to print address\n");
++ debug_rtx (op);
++ abort ();
++}
++\f
++
++
++
++
++/****************************
++ * Predicates
++ ****************************/
++
++int
++arith_operand (rtx op, enum machine_mode mode)
++{
++ if (GET_CODE (op) == CONST_INT && SMALL_INT (INTVAL (op)))
++ return 1;
++
++ return register_operand (op, mode);
++}
++
++int
++uns_arith_operand (rtx op, enum machine_mode mode)
++{
++ if (GET_CODE (op) == CONST_INT && SMALL_INT_UNSIGNED (INTVAL (op)))
++ return 1;
++
++ return register_operand (op, mode);
++}
++
++int
++logical_operand (rtx op, enum machine_mode mode)
++{
++ if (GET_CODE (op) == CONST_INT
++ && (SMALL_INT_UNSIGNED (INTVAL (op)) || UPPER16_INT (INTVAL (op))))
++ return 1;
++
++ return register_operand (op, mode);
++}
++
++int
++shift_operand (rtx op, enum machine_mode mode)
++{
++ if (GET_CODE (op) == CONST_INT && SHIFT_INT (INTVAL (op)))
++ return 1;
++
++ return register_operand (op, mode);
++}
++
++int
++rdwrctl_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
++{
++ return GET_CODE (op) == CONST_INT && RDWRCTL_INT (INTVAL (op));
++}
++
++/* Return truth value of whether OP is a register or the constant 0. */
++
++int
++reg_or_0_operand (rtx op, enum machine_mode mode)
++{
++ switch (GET_CODE (op))
++ {
++ case CONST_INT:
++ return INTVAL (op) == 0;
++
++ case CONST_DOUBLE:
++ return op == CONST0_RTX (mode);
++
++ default:
++ break;
++ }
++
++ return register_operand (op, mode);
++}
++
++
++int
++equality_op (rtx op, enum machine_mode mode)
++{
++ if (mode != GET_MODE (op))
++ return 0;
++
++ return GET_CODE (op) == EQ || GET_CODE (op) == NE;
++}
++
++int
++custom_insn_opcode (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
++{
++ return GET_CODE (op) == CONST_INT && CUSTOM_INSN_OPCODE (INTVAL (op));
++}
++
++
++\f
++
++
++
++
++/*****************************************************************************
++**
++** instruction scheduler
++**
++*****************************************************************************/
++static int
++nios2_use_dfa_pipeline_interface ()
++{
++ return 1;
++}
++
++
++static int
++nios2_issue_rate ()
++{
++#ifdef MAX_DFA_ISSUE_RATE
++ return MAX_DFA_ISSUE_RATE;
++#else
++ return 1;
++#endif
++}
++
++
++const char *
++asm_output_opcode (FILE *file ATTRIBUTE_UNUSED,
++ const char *ptr ATTRIBUTE_UNUSED)
++{
++ const char *p;
++
++ p = ptr;
++ return ptr;
++}
++\f
++
++
++/*****************************************************************************
++**
++** function arguments
++**
++*****************************************************************************/
++
++void
++init_cumulative_args (CUMULATIVE_ARGS *cum,
++ tree fntype ATTRIBUTE_UNUSED,
++ rtx libname ATTRIBUTE_UNUSED,
++ tree fndecl ATTRIBUTE_UNUSED,
++ int n_named_args ATTRIBUTE_UNUSED)
++{
++ cum->regs_used = 0;
++}
++
++
++/* Update the data in CUM to advance over an argument
++ of mode MODE and data type TYPE.
++ (TYPE is null for libcalls where that information may not be available.) */
++
++void
++function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
++ tree type ATTRIBUTE_UNUSED, int named ATTRIBUTE_UNUSED)
++{
++ HOST_WIDE_INT param_size;
++
++ if (mode == BLKmode)
++ {
++ param_size = int_size_in_bytes (type);
++ if (param_size < 0)
++ internal_error
++ ("Do not know how to handle large structs or variable length types");
++ }
++ else
++ {
++ param_size = GET_MODE_SIZE (mode);
++ }
++
++ /* convert to words (round up) */
++ param_size = (3 + param_size) / 4;
++
++ if (cum->regs_used + param_size > NUM_ARG_REGS)
++ {
++ cum->regs_used = NUM_ARG_REGS;
++ }
++ else
++ {
++ cum->regs_used += param_size;
++ }
++
++ return;
++}
++
++/* Define where to put the arguments to a function. Value is zero to
++ push the argument on the stack, or a hard register in which to
++ store the argument.
++
++ MODE is the argument's machine mode.
++ TYPE is the data type of the argument (as a tree).
++ This is null for libcalls where that information may
++ not be available.
++ CUM is a variable of type CUMULATIVE_ARGS which gives info about
++ the preceding args and about the function being called.
++ NAMED is nonzero if this argument is a named parameter
++ (otherwise it is an extra parameter matching an ellipsis). */
++rtx
++function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
++ tree type ATTRIBUTE_UNUSED, int named ATTRIBUTE_UNUSED)
++{
++ rtx return_rtx = NULL_RTX;
++
++ if (cum->regs_used < NUM_ARG_REGS)
++ {
++ return_rtx = gen_rtx_REG (mode, FIRST_ARG_REGNO + cum->regs_used);
++ }
++
++ return return_rtx;
++}
++
++int
++function_arg_partial_nregs (const CUMULATIVE_ARGS *cum,
++ enum machine_mode mode, tree type,
++ int named ATTRIBUTE_UNUSED)
++{
++ HOST_WIDE_INT param_size;
++
++ if (mode == BLKmode)
++ {
++ param_size = int_size_in_bytes (type);
++ if (param_size < 0)
++ internal_error
++ ("Do not know how to handle large structs or variable length types");
++ }
++ else
++ {
++ param_size = GET_MODE_SIZE (mode);
++ }
++
++ /* convert to words (round up) */
++ param_size = (3 + param_size) / 4;
++
++ if (cum->regs_used < NUM_ARG_REGS
++ && cum->regs_used + param_size > NUM_ARG_REGS)
++ {
++ return NUM_ARG_REGS - cum->regs_used;
++ }
++ else
++ {
++ return 0;
++ }
++}
++
++
++int
++nios2_return_in_memory (tree type)
++{
++ int res = ((int_size_in_bytes (type) > (2 * UNITS_PER_WORD))
++ || (int_size_in_bytes (type) == -1));
++
++ return res;
++}
++
++/* ??? It may be possible to eliminate the copyback and implement
++ my own va_arg type, but that is more work for now. */
++int
++nios2_setup_incoming_varargs (const CUMULATIVE_ARGS *cum,
++ enum machine_mode mode, tree type,
++ int no_rtl)
++{
++ CUMULATIVE_ARGS local_cum;
++ int regs_to_push;
++
++ local_cum = *cum;
++ FUNCTION_ARG_ADVANCE (local_cum, mode, type, 1);
++
++ regs_to_push = NUM_ARG_REGS - local_cum.regs_used;
++
++ if (!no_rtl)
++ {
++ if (regs_to_push > 0)
++ {
++ rtx ptr, mem;
++
++ ptr = virtual_incoming_args_rtx;
++ mem = gen_rtx_MEM (BLKmode, ptr);
++
++ /* va_arg is an array access in this case, which causes
++ it to get MEM_IN_STRUCT_P set. We must set it here
++ so that the insn scheduler won't assume that these
++ stores can't possibly overlap with the va_arg loads. */
++ MEM_SET_IN_STRUCT_P (mem, 1);
++
++ emit_insn (gen_blockage ());
++ move_block_from_reg (local_cum.regs_used + FIRST_ARG_REGNO, mem,
++ regs_to_push);
++ emit_insn (gen_blockage ());
++ }
++ }
++
++ return regs_to_push * UNITS_PER_WORD;
++
++}
++
++
++\f
++/*****************************************************************************
++**
++** builtins
++**
++** This method for handling builtins is from CSP where _many_ more types of
++** expanders have already been written. Check there first before writing
++** new ones.
++**
++*****************************************************************************/
++
++enum nios2_builtins
++{
++ NIOS2_BUILTIN_LDBIO,
++ NIOS2_BUILTIN_LDBUIO,
++ NIOS2_BUILTIN_LDHIO,
++ NIOS2_BUILTIN_LDHUIO,
++ NIOS2_BUILTIN_LDWIO,
++ NIOS2_BUILTIN_STBIO,
++ NIOS2_BUILTIN_STHIO,
++ NIOS2_BUILTIN_STWIO,
++ NIOS2_BUILTIN_SYNC,
++ NIOS2_BUILTIN_RDCTL,
++ NIOS2_BUILTIN_WRCTL,
++
++ NIOS2_BUILTIN_CUSTOM_N,
++ NIOS2_BUILTIN_CUSTOM_NI,
++ NIOS2_BUILTIN_CUSTOM_NF,
++ NIOS2_BUILTIN_CUSTOM_NP,
++ NIOS2_BUILTIN_CUSTOM_NII,
++ NIOS2_BUILTIN_CUSTOM_NIF,
++ NIOS2_BUILTIN_CUSTOM_NIP,
++ NIOS2_BUILTIN_CUSTOM_NFI,
++ NIOS2_BUILTIN_CUSTOM_NFF,
++ NIOS2_BUILTIN_CUSTOM_NFP,
++ NIOS2_BUILTIN_CUSTOM_NPI,
++ NIOS2_BUILTIN_CUSTOM_NPF,
++ NIOS2_BUILTIN_CUSTOM_NPP,
++ NIOS2_BUILTIN_CUSTOM_IN,
++ NIOS2_BUILTIN_CUSTOM_INI,
++ NIOS2_BUILTIN_CUSTOM_INF,
++ NIOS2_BUILTIN_CUSTOM_INP,
++ NIOS2_BUILTIN_CUSTOM_INII,
++ NIOS2_BUILTIN_CUSTOM_INIF,
++ NIOS2_BUILTIN_CUSTOM_INIP,
++ NIOS2_BUILTIN_CUSTOM_INFI,
++ NIOS2_BUILTIN_CUSTOM_INFF,
++ NIOS2_BUILTIN_CUSTOM_INFP,
++ NIOS2_BUILTIN_CUSTOM_INPI,
++ NIOS2_BUILTIN_CUSTOM_INPF,
++ NIOS2_BUILTIN_CUSTOM_INPP,
++ NIOS2_BUILTIN_CUSTOM_FN,
++ NIOS2_BUILTIN_CUSTOM_FNI,
++ NIOS2_BUILTIN_CUSTOM_FNF,
++ NIOS2_BUILTIN_CUSTOM_FNP,
++ NIOS2_BUILTIN_CUSTOM_FNII,
++ NIOS2_BUILTIN_CUSTOM_FNIF,
++ NIOS2_BUILTIN_CUSTOM_FNIP,
++ NIOS2_BUILTIN_CUSTOM_FNFI,
++ NIOS2_BUILTIN_CUSTOM_FNFF,
++ NIOS2_BUILTIN_CUSTOM_FNFP,
++ NIOS2_BUILTIN_CUSTOM_FNPI,
++ NIOS2_BUILTIN_CUSTOM_FNPF,
++ NIOS2_BUILTIN_CUSTOM_FNPP,
++ NIOS2_BUILTIN_CUSTOM_PN,
++ NIOS2_BUILTIN_CUSTOM_PNI,
++ NIOS2_BUILTIN_CUSTOM_PNF,
++ NIOS2_BUILTIN_CUSTOM_PNP,
++ NIOS2_BUILTIN_CUSTOM_PNII,
++ NIOS2_BUILTIN_CUSTOM_PNIF,
++ NIOS2_BUILTIN_CUSTOM_PNIP,
++ NIOS2_BUILTIN_CUSTOM_PNFI,
++ NIOS2_BUILTIN_CUSTOM_PNFF,
++ NIOS2_BUILTIN_CUSTOM_PNFP,
++ NIOS2_BUILTIN_CUSTOM_PNPI,
++ NIOS2_BUILTIN_CUSTOM_PNPF,
++ NIOS2_BUILTIN_CUSTOM_PNPP,
++
++
++ LIM_NIOS2_BUILTINS
++};
++
++struct builtin_description
++{
++ const enum insn_code icode;
++ const char *const name;
++ const enum nios2_builtins code;
++ const tree *type;
++ rtx (* expander) PARAMS ((const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int));
++};
++
++static rtx nios2_expand_STXIO (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_LDXIO (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_sync (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_rdctl (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_wrctl (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++
++static rtx nios2_expand_custom_n (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_Xn (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_nX (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_XnX (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_nXX (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_XnXX (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++
++static tree endlink;
++
++/* int fn (volatile const void *)
++ */
++static tree int_ftype_volatile_const_void_p;
++
++/* int fn (int)
++ */
++static tree int_ftype_int;
++
++/* void fn (int, int)
++ */
++static tree void_ftype_int_int;
++
++/* void fn (volatile void *, int)
++ */
++static tree void_ftype_volatile_void_p_int;
++
++/* void fn (void)
++ */
++static tree void_ftype_void;
++
++static tree custom_n;
++static tree custom_ni;
++static tree custom_nf;
++static tree custom_np;
++static tree custom_nii;
++static tree custom_nif;
++static tree custom_nip;
++static tree custom_nfi;
++static tree custom_nff;
++static tree custom_nfp;
++static tree custom_npi;
++static tree custom_npf;
++static tree custom_npp;
++static tree custom_in;
++static tree custom_ini;
++static tree custom_inf;
++static tree custom_inp;
++static tree custom_inii;
++static tree custom_inif;
++static tree custom_inip;
++static tree custom_infi;
++static tree custom_inff;
++static tree custom_infp;
++static tree custom_inpi;
++static tree custom_inpf;
++static tree custom_inpp;
++static tree custom_fn;
++static tree custom_fni;
++static tree custom_fnf;
++static tree custom_fnp;
++static tree custom_fnii;
++static tree custom_fnif;
++static tree custom_fnip;
++static tree custom_fnfi;
++static tree custom_fnff;
++static tree custom_fnfp;
++static tree custom_fnpi;
++static tree custom_fnpf;
++static tree custom_fnpp;
++static tree custom_pn;
++static tree custom_pni;
++static tree custom_pnf;
++static tree custom_pnp;
++static tree custom_pnii;
++static tree custom_pnif;
++static tree custom_pnip;
++static tree custom_pnfi;
++static tree custom_pnff;
++static tree custom_pnfp;
++static tree custom_pnpi;
++static tree custom_pnpf;
++static tree custom_pnpp;
++
++
++static const struct builtin_description bdesc[] = {
++ {CODE_FOR_ldbio, "__builtin_ldbio", NIOS2_BUILTIN_LDBIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++ {CODE_FOR_ldbuio, "__builtin_ldbuio", NIOS2_BUILTIN_LDBUIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++ {CODE_FOR_ldhio, "__builtin_ldhio", NIOS2_BUILTIN_LDHIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++ {CODE_FOR_ldhuio, "__builtin_ldhuio", NIOS2_BUILTIN_LDHUIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++ {CODE_FOR_ldwio, "__builtin_ldwio", NIOS2_BUILTIN_LDWIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++
++ {CODE_FOR_stbio, "__builtin_stbio", NIOS2_BUILTIN_STBIO, &void_ftype_volatile_void_p_int, nios2_expand_STXIO},
++ {CODE_FOR_sthio, "__builtin_sthio", NIOS2_BUILTIN_STHIO, &void_ftype_volatile_void_p_int, nios2_expand_STXIO},
++ {CODE_FOR_stwio, "__builtin_stwio", NIOS2_BUILTIN_STWIO, &void_ftype_volatile_void_p_int, nios2_expand_STXIO},
++
++ {CODE_FOR_sync, "__builtin_sync", NIOS2_BUILTIN_SYNC, &void_ftype_void, nios2_expand_sync},
++ {CODE_FOR_rdctl, "__builtin_rdctl", NIOS2_BUILTIN_RDCTL, &int_ftype_int, nios2_expand_rdctl},
++ {CODE_FOR_wrctl, "__builtin_wrctl", NIOS2_BUILTIN_WRCTL, &void_ftype_int_int, nios2_expand_wrctl},
++
++ {CODE_FOR_custom_n, "__builtin_custom_n", NIOS2_BUILTIN_CUSTOM_N, &custom_n, nios2_expand_custom_n},
++ {CODE_FOR_custom_ni, "__builtin_custom_ni", NIOS2_BUILTIN_CUSTOM_NI, &custom_ni, nios2_expand_custom_nX},
++ {CODE_FOR_custom_nf, "__builtin_custom_nf", NIOS2_BUILTIN_CUSTOM_NF, &custom_nf, nios2_expand_custom_nX},
++ {CODE_FOR_custom_np, "__builtin_custom_np", NIOS2_BUILTIN_CUSTOM_NP, &custom_np, nios2_expand_custom_nX},
++ {CODE_FOR_custom_nii, "__builtin_custom_nii", NIOS2_BUILTIN_CUSTOM_NII, &custom_nii, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nif, "__builtin_custom_nif", NIOS2_BUILTIN_CUSTOM_NIF, &custom_nif, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nip, "__builtin_custom_nip", NIOS2_BUILTIN_CUSTOM_NIP, &custom_nip, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nfi, "__builtin_custom_nfi", NIOS2_BUILTIN_CUSTOM_NFI, &custom_nfi, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nff, "__builtin_custom_nff", NIOS2_BUILTIN_CUSTOM_NFF, &custom_nff, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nfp, "__builtin_custom_nfp", NIOS2_BUILTIN_CUSTOM_NFP, &custom_nfp, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_npi, "__builtin_custom_npi", NIOS2_BUILTIN_CUSTOM_NPI, &custom_npi, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_npf, "__builtin_custom_npf", NIOS2_BUILTIN_CUSTOM_NPF, &custom_npf, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_npp, "__builtin_custom_npp", NIOS2_BUILTIN_CUSTOM_NPP, &custom_npp, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_in, "__builtin_custom_in", NIOS2_BUILTIN_CUSTOM_IN, &custom_in, nios2_expand_custom_Xn},
++ {CODE_FOR_custom_ini, "__builtin_custom_ini", NIOS2_BUILTIN_CUSTOM_INI, &custom_ini, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_inf, "__builtin_custom_inf", NIOS2_BUILTIN_CUSTOM_INF, &custom_inf, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_inp, "__builtin_custom_inp", NIOS2_BUILTIN_CUSTOM_INP, &custom_inp, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_inii, "__builtin_custom_inii", NIOS2_BUILTIN_CUSTOM_INII, &custom_inii, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inif, "__builtin_custom_inif", NIOS2_BUILTIN_CUSTOM_INIF, &custom_inif, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inip, "__builtin_custom_inip", NIOS2_BUILTIN_CUSTOM_INIP, &custom_inip, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_infi, "__builtin_custom_infi", NIOS2_BUILTIN_CUSTOM_INFI, &custom_infi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inff, "__builtin_custom_inff", NIOS2_BUILTIN_CUSTOM_INFF, &custom_inff, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_infp, "__builtin_custom_infp", NIOS2_BUILTIN_CUSTOM_INFP, &custom_infp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inpi, "__builtin_custom_inpi", NIOS2_BUILTIN_CUSTOM_INPI, &custom_inpi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inpf, "__builtin_custom_inpf", NIOS2_BUILTIN_CUSTOM_INPF, &custom_inpf, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inpp, "__builtin_custom_inpp", NIOS2_BUILTIN_CUSTOM_INPP, &custom_inpp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fn, "__builtin_custom_fn", NIOS2_BUILTIN_CUSTOM_FN, &custom_fn, nios2_expand_custom_Xn},
++ {CODE_FOR_custom_fni, "__builtin_custom_fni", NIOS2_BUILTIN_CUSTOM_FNI, &custom_fni, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_fnf, "__builtin_custom_fnf", NIOS2_BUILTIN_CUSTOM_FNF, &custom_fnf, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_fnp, "__builtin_custom_fnp", NIOS2_BUILTIN_CUSTOM_FNP, &custom_fnp, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_fnii, "__builtin_custom_fnii", NIOS2_BUILTIN_CUSTOM_FNII, &custom_fnii, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnif, "__builtin_custom_fnif", NIOS2_BUILTIN_CUSTOM_FNIF, &custom_fnif, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnip, "__builtin_custom_fnip", NIOS2_BUILTIN_CUSTOM_FNIP, &custom_fnip, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnfi, "__builtin_custom_fnfi", NIOS2_BUILTIN_CUSTOM_FNFI, &custom_fnfi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnff, "__builtin_custom_fnff", NIOS2_BUILTIN_CUSTOM_FNFF, &custom_fnff, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnfp, "__builtin_custom_fnfp", NIOS2_BUILTIN_CUSTOM_FNFP, &custom_fnfp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnpi, "__builtin_custom_fnpi", NIOS2_BUILTIN_CUSTOM_FNPI, &custom_fnpi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnpf, "__builtin_custom_fnpf", NIOS2_BUILTIN_CUSTOM_FNPF, &custom_fnpf, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnpp, "__builtin_custom_fnpp", NIOS2_BUILTIN_CUSTOM_FNPP, &custom_fnpp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pn, "__builtin_custom_pn", NIOS2_BUILTIN_CUSTOM_PN, &custom_pn, nios2_expand_custom_Xn},
++ {CODE_FOR_custom_pni, "__builtin_custom_pni", NIOS2_BUILTIN_CUSTOM_PNI, &custom_pni, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_pnf, "__builtin_custom_pnf", NIOS2_BUILTIN_CUSTOM_PNF, &custom_pnf, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_pnp, "__builtin_custom_pnp", NIOS2_BUILTIN_CUSTOM_PNP, &custom_pnp, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_pnii, "__builtin_custom_pnii", NIOS2_BUILTIN_CUSTOM_PNII, &custom_pnii, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnif, "__builtin_custom_pnif", NIOS2_BUILTIN_CUSTOM_PNIF, &custom_pnif, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnip, "__builtin_custom_pnip", NIOS2_BUILTIN_CUSTOM_PNIP, &custom_pnip, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnfi, "__builtin_custom_pnfi", NIOS2_BUILTIN_CUSTOM_PNFI, &custom_pnfi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnff, "__builtin_custom_pnff", NIOS2_BUILTIN_CUSTOM_PNFF, &custom_pnff, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnfp, "__builtin_custom_pnfp", NIOS2_BUILTIN_CUSTOM_PNFP, &custom_pnfp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnpi, "__builtin_custom_pnpi", NIOS2_BUILTIN_CUSTOM_PNPI, &custom_pnpi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnpf, "__builtin_custom_pnpf", NIOS2_BUILTIN_CUSTOM_PNPF, &custom_pnpf, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnpp, "__builtin_custom_pnpp", NIOS2_BUILTIN_CUSTOM_PNPP, &custom_pnpp, nios2_expand_custom_XnXX},
++
++
++ {0, 0, 0, 0, 0},
++};
++
++/* This does not have a closing bracket on purpose (see use) */
++#define def_param(TYPE) \
++ tree_cons (NULL_TREE, TYPE,
++
++static void
++nios2_init_builtins ()
++{
++ const struct builtin_description *d;
++
++
++ endlink = void_list_node;
++
++ /* Special indenting here because one of the brackets is in def_param */
++ /* *INDENT-OFF* */
++
++ /* int fn (volatile const void *)
++ */
++ int_ftype_volatile_const_void_p
++ = build_function_type (integer_type_node,
++ def_param (build_qualified_type (ptr_type_node,
++ TYPE_QUAL_CONST | TYPE_QUAL_VOLATILE))
++ endlink));
++
++
++ /* void fn (volatile void *, int)
++ */
++ void_ftype_volatile_void_p_int
++ = build_function_type (void_type_node,
++ def_param (build_qualified_type (ptr_type_node,
++ TYPE_QUAL_VOLATILE))
++ def_param (integer_type_node)
++ endlink)));
++
++ /* void fn (void)
++ */
++ void_ftype_void
++ = build_function_type (void_type_node,
++ endlink);
++
++ /* int fn (int)
++ */
++ int_ftype_int
++ = build_function_type (integer_type_node,
++ def_param (integer_type_node)
++ endlink));
++
++ /* void fn (int, int)
++ */
++ void_ftype_int_int
++ = build_function_type (void_type_node,
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink)));
++
++
++#define CUSTOM_NUM def_param (integer_type_node)
++
++ custom_n
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ endlink));
++ custom_ni
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ endlink)));
++ custom_nf
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ endlink)));
++ custom_np
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ endlink)));
++ custom_nii
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_nif
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_nip
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_nfi
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_nff
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_nfp
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_npi
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_npf
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_npp
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++
++ custom_in
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ endlink));
++ custom_ini
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ endlink)));
++ custom_inf
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ endlink)));
++ custom_inp
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ endlink)));
++ custom_inii
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_inif
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_inip
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_infi
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_inff
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_infp
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_inpi
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_inpf
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_inpp
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++
++ custom_fn
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ endlink));
++ custom_fni
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ endlink)));
++ custom_fnf
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ endlink)));
++ custom_fnp
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ endlink)));
++ custom_fnii
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_fnif
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_fnip
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_fnfi
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_fnff
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_fnfp
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_fnpi
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_fnpf
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_fnpp
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++
++
++ custom_pn
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ endlink));
++ custom_pni
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ endlink)));
++ custom_pnf
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ endlink)));
++ custom_pnp
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ endlink)));
++ custom_pnii
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_pnif
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_pnip
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_pnfi
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_pnff
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_pnfp
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_pnpi
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_pnpf
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_pnpp
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++
++
++
++ /* *INDENT-ON* */
++
++
++ for (d = bdesc; d->name; d++)
++ {
++ builtin_function (d->name, *d->type, d->code,
++ BUILT_IN_MD, NULL, NULL);
++ }
++}
++
++/* Expand an expression EXP that calls a built-in function,
++ with result going to TARGET if that's convenient
++ (and in mode MODE if that's convenient).
++ SUBTARGET may be used as the target for computing one of EXP's operands.
++ IGNORE is nonzero if the value is to be ignored. */
++
++static rtx
++nios2_expand_builtin (tree exp, rtx target, rtx subtarget,
++ enum machine_mode mode, int ignore)
++{
++ const struct builtin_description *d;
++ tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
++ unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
++
++ for (d = bdesc; d->name; d++)
++ if (d->code == fcode)
++ return (d->expander) (d, exp, target, subtarget, mode, ignore);
++
++ /* we should have seen one of the functins we registered */
++ abort ();
++}
++
++static rtx nios2_create_target (const struct builtin_description *, rtx);
++
++
++static rtx
++nios2_create_target (const struct builtin_description *d, rtx target)
++{
++ if (!target
++ || !(*insn_data[d->icode].operand[0].predicate) (target,
++ insn_data[d->icode].operand[0].mode))
++ {
++ target = gen_reg_rtx (insn_data[d->icode].operand[0].mode);
++ }
++
++ return target;
++}
++
++
++static rtx nios2_extract_opcode (const struct builtin_description *, int, tree);
++static rtx nios2_extract_operand (const struct builtin_description *, int, int, tree);
++
++static rtx
++nios2_extract_opcode (const struct builtin_description *d, int op, tree arglist)
++{
++ enum machine_mode mode = insn_data[d->icode].operand[op].mode;
++ tree arg = TREE_VALUE (arglist);
++ rtx opcode = expand_expr (arg, NULL_RTX, mode, 0);
++ opcode = protect_from_queue (opcode, 0);
++
++ if (!(*insn_data[d->icode].operand[op].predicate) (opcode, mode))
++ error ("Custom instruction opcode must be compile time constant in the range 0-255 for %s", d->name);
++
++ return opcode;
++}
++
++static rtx
++nios2_extract_operand (const struct builtin_description *d, int op, int argnum, tree arglist)
++{
++ enum machine_mode mode = insn_data[d->icode].operand[op].mode;
++ tree arg = TREE_VALUE (arglist);
++ rtx operand = expand_expr (arg, NULL_RTX, mode, 0);
++ operand = protect_from_queue (operand, 0);
++
++ if (!(*insn_data[d->icode].operand[op].predicate) (operand, mode))
++ operand = copy_to_mode_reg (mode, operand);
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[d->icode].operand[op].predicate) (operand, mode))
++ error ("Invalid argument %d to %s", argnum, d->name);
++
++ return operand;
++}
++
++
++static rtx
++nios2_expand_custom_n (const struct builtin_description *d, tree exp,
++ rtx target ATTRIBUTE_UNUSED, rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++
++ /* custom_n should have exactly one operand */
++ if (insn_data[d->icode].n_operands != 1)
++ abort ();
++
++ opcode = nios2_extract_opcode (d, 0, arglist);
++
++ pat = GEN_FCN (d->icode) (opcode);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++static rtx
++nios2_expand_custom_Xn (const struct builtin_description *d, tree exp,
++ rtx target, rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++
++ /* custom_Xn should have exactly two operands */
++ if (insn_data[d->icode].n_operands != 2)
++ abort ();
++
++ target = nios2_create_target (d, target);
++ opcode = nios2_extract_opcode (d, 1, arglist);
++
++ pat = GEN_FCN (d->icode) (target, opcode);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++static rtx
++nios2_expand_custom_nX (const struct builtin_description *d, tree exp,
++ rtx target ATTRIBUTE_UNUSED, rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++ rtx operands[1];
++ int i;
++
++
++ /* custom_nX should have exactly two operands */
++ if (insn_data[d->icode].n_operands != 2)
++ abort ();
++
++ opcode = nios2_extract_opcode (d, 0, arglist);
++ for (i = 0; i < 1; i++)
++ {
++ arglist = TREE_CHAIN (arglist);
++ operands[i] = nios2_extract_operand (d, i + 1, i + 1, arglist);
++ }
++
++ pat = GEN_FCN (d->icode) (opcode, operands[0]);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++static rtx
++nios2_expand_custom_XnX (const struct builtin_description *d, tree exp, rtx target,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++ rtx operands[1];
++ int i;
++
++ /* custom_Xn should have exactly three operands */
++ if (insn_data[d->icode].n_operands != 3)
++ abort ();
++
++ target = nios2_create_target (d, target);
++ opcode = nios2_extract_opcode (d, 1, arglist);
++
++ for (i = 0; i < 1; i++)
++ {
++ arglist = TREE_CHAIN (arglist);
++ operands[i] = nios2_extract_operand (d, i + 2, i + 1, arglist);
++ }
++
++ pat = GEN_FCN (d->icode) (target, opcode, operands[0]);
++
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++static rtx
++nios2_expand_custom_nXX (const struct builtin_description *d, tree exp, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++ rtx operands[2];
++ int i;
++
++
++ /* custom_nX should have exactly three operands */
++ if (insn_data[d->icode].n_operands != 3)
++ abort ();
++
++ opcode = nios2_extract_opcode (d, 0, arglist);
++ for (i = 0; i < 2; i++)
++ {
++ arglist = TREE_CHAIN (arglist);
++ operands[i] = nios2_extract_operand (d, i + 1, i + 1, arglist);
++ }
++
++ pat = GEN_FCN (d->icode) (opcode, operands[0], operands[1]);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++static rtx
++nios2_expand_custom_XnXX (const struct builtin_description *d, tree exp, rtx target,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++ rtx operands[2];
++ int i;
++
++
++ /* custom_XnX should have exactly four operands */
++ if (insn_data[d->icode].n_operands != 4)
++ abort ();
++
++ target = nios2_create_target (d, target);
++ opcode = nios2_extract_opcode (d, 1, arglist);
++ for (i = 0; i < 2; i++)
++ {
++ arglist = TREE_CHAIN (arglist);
++ operands[i] = nios2_extract_operand (d, i + 2, i + 1, arglist);
++ }
++
++ pat = GEN_FCN (d->icode) (target, opcode, operands[0], operands[1]);
++
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++
++
++static rtx
++nios2_expand_STXIO (const struct builtin_description *d, tree exp, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx store_dest, store_val;
++ enum insn_code icode = d->icode;
++
++ /* stores should have exactly two operands */
++ if (insn_data[icode].n_operands != 2)
++ abort ();
++
++ /* process the destination of the store */
++ {
++ enum machine_mode mode = insn_data[icode].operand[0].mode;
++ tree arg = TREE_VALUE (arglist);
++ store_dest = expand_expr (arg, NULL_RTX, VOIDmode, 0);
++ store_dest = protect_from_queue (store_dest, 0);
++
++ store_dest = gen_rtx_MEM (mode, copy_to_mode_reg (Pmode, store_dest));
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[icode].operand[0].predicate) (store_dest, mode))
++ error ("Invalid argument 1 to %s", d->name);
++ }
++
++
++ /* process the value to store */
++ {
++ enum machine_mode mode = insn_data[icode].operand[1].mode;
++ tree arg = TREE_VALUE (TREE_CHAIN (arglist));
++ store_val = expand_expr (arg, NULL_RTX, mode, 0);
++ store_val = protect_from_queue (store_val, 0);
++
++ if (!(*insn_data[icode].operand[1].predicate) (store_val, mode))
++ store_val = copy_to_mode_reg (mode, store_val);
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[icode].operand[1].predicate) (store_val, mode))
++ error ("Invalid argument 2 to %s", d->name);
++ }
++
++ pat = GEN_FCN (d->icode) (store_dest, store_val);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++
++static rtx
++nios2_expand_LDXIO (const struct builtin_description * d, tree exp, rtx target,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx ld_src;
++ enum insn_code icode = d->icode;
++
++ /* loads should have exactly two operands */
++ if (insn_data[icode].n_operands != 2)
++ abort ();
++
++ target = nios2_create_target (d, target);
++
++ {
++ enum machine_mode mode = insn_data[icode].operand[1].mode;
++ tree arg = TREE_VALUE (arglist);
++ ld_src = expand_expr (arg, NULL_RTX, VOIDmode, 0);
++ ld_src = protect_from_queue (ld_src, 0);
++
++ ld_src = gen_rtx_MEM (mode, copy_to_mode_reg (Pmode, ld_src));
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[icode].operand[1].predicate) (ld_src, mode))
++ {
++ error ("Invalid argument 1 to %s", d->name);
++ }
++ }
++
++ pat = GEN_FCN (d->icode) (target, ld_src);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++
++static rtx
++nios2_expand_sync (const struct builtin_description * d ATTRIBUTE_UNUSED,
++ tree exp ATTRIBUTE_UNUSED, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ emit_insn (gen_sync ());
++ return 0;
++}
++
++static rtx
++nios2_expand_rdctl (const struct builtin_description * d ATTRIBUTE_UNUSED,
++ tree exp ATTRIBUTE_UNUSED, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx rdctl_reg;
++ enum insn_code icode = d->icode;
++
++ /* rdctl should have exactly two operands */
++ if (insn_data[icode].n_operands != 2)
++ abort ();
++
++ target = nios2_create_target (d, target);
++
++ {
++ enum machine_mode mode = insn_data[icode].operand[1].mode;
++ tree arg = TREE_VALUE (arglist);
++ rdctl_reg = expand_expr (arg, NULL_RTX, VOIDmode, 0);
++ rdctl_reg = protect_from_queue (rdctl_reg, 0);
++
++ if (!(*insn_data[icode].operand[1].predicate) (rdctl_reg, mode))
++ {
++ error ("Control register number must be in range 0-31 for %s", d->name);
++ }
++ }
++
++ pat = GEN_FCN (d->icode) (target, rdctl_reg);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++static rtx
++nios2_expand_wrctl (const struct builtin_description * d ATTRIBUTE_UNUSED,
++ tree exp ATTRIBUTE_UNUSED, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx wrctl_reg, store_val;
++ enum insn_code icode = d->icode;
++
++ /* stores should have exactly two operands */
++ if (insn_data[icode].n_operands != 2)
++ abort ();
++
++ /* process the destination of the store */
++ {
++ enum machine_mode mode = insn_data[icode].operand[0].mode;
++ tree arg = TREE_VALUE (arglist);
++ wrctl_reg = expand_expr (arg, NULL_RTX, VOIDmode, 0);
++ wrctl_reg = protect_from_queue (wrctl_reg, 0);
++
++ if (!(*insn_data[icode].operand[0].predicate) (wrctl_reg, mode))
++ error ("Control register number must be in range 0-31 for %s", d->name);
++ }
++
++
++ /* process the value to store */
++ {
++ enum machine_mode mode = insn_data[icode].operand[1].mode;
++ tree arg = TREE_VALUE (TREE_CHAIN (arglist));
++ store_val = expand_expr (arg, NULL_RTX, mode, 0);
++ store_val = protect_from_queue (store_val, 0);
++
++ if (!(*insn_data[icode].operand[1].predicate) (store_val, mode))
++ store_val = copy_to_mode_reg (mode, store_val);
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[icode].operand[1].predicate) (store_val, mode))
++ error ("Invalid argument 2 to %s", d->name);
++ }
++
++ pat = GEN_FCN (d->icode) (wrctl_reg, store_val);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++
++#include "gt-nios2.h"
++
+--- gcc-3.4.2/gcc/config/nios2/nios2.h
++++ gcc-3.4.2.nios2/gcc/config/nios2/nios2.h
+@@ -0,0 +1,823 @@
++/* Definitions of target machine for Altera NIOS 2G NIOS2 version.
++ Copyright (C) 2003 Altera
++ Contributed by Jonah Graham (jgraham@altera.com).
++
++This file is part of GNU CC.
++
++GNU CC is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2, or (at your option)
++any later version.
++
++GNU CC is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with GNU CC; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++
++
++#define TARGET_CPU_CPP_BUILTINS() \
++ do \
++ { \
++ builtin_define_std ("NIOS2"); \
++ builtin_define_std ("nios2"); \
++ } \
++ while (0)
++#define TARGET_VERSION fprintf (stderr, " (Altera Nios II)")
++
++
++
++
++
++/*********************************
++ * Run-time Target Specification
++ *********************************/
++
++#define HAS_DIV_FLAG 0x0001
++#define HAS_MUL_FLAG 0x0002
++#define HAS_MULX_FLAG 0x0004
++#define FAST_SW_DIV_FLAG 0x0008
++#define INLINE_MEMCPY_FLAG 0x00010
++#define CACHE_VOLATILE_FLAG 0x0020
++#define BYPASS_CACHE_FLAG 0x0040
++
++extern int target_flags;
++#define TARGET_HAS_DIV (target_flags & HAS_DIV_FLAG)
++#define TARGET_HAS_MUL (target_flags & HAS_MUL_FLAG)
++#define TARGET_HAS_MULX (target_flags & HAS_MULX_FLAG)
++#define TARGET_FAST_SW_DIV (target_flags & FAST_SW_DIV_FLAG)
++#define TARGET_INLINE_MEMCPY (target_flags & INLINE_MEMCPY_FLAG)
++#define TARGET_CACHE_VOLATILE (target_flags & CACHE_VOLATILE_FLAG)
++#define TARGET_BYPASS_CACHE (target_flags & BYPASS_CACHE_FLAG)
++
++#define TARGET_SWITCHES \
++{ \
++ { "hw-div", HAS_DIV_FLAG, \
++ N_("Enable DIV, DIVU") }, \
++ { "no-hw-div", -HAS_DIV_FLAG, \
++ N_("Disable DIV, DIVU (default)") }, \
++ { "hw-mul", HAS_MUL_FLAG, \
++ N_("Enable MUL instructions (default)") }, \
++ { "hw-mulx", HAS_MULX_FLAG, \
++ N_("Enable MULX instructions, assume fast shifter") }, \
++ { "no-hw-mul", -HAS_MUL_FLAG, \
++ N_("Disable MUL instructions") }, \
++ { "no-hw-mulx", -HAS_MULX_FLAG, \
++ N_("Disable MULX instructions, assume slow shifter (default and implied by -mno-hw-mul)") }, \
++ { "fast-sw-div", FAST_SW_DIV_FLAG, \
++ N_("Use table based fast divide (default at -O3)") }, \
++ { "no-fast-sw-div", -FAST_SW_DIV_FLAG, \
++ N_("Don't use table based fast divide ever") }, \
++ { "inline-memcpy", INLINE_MEMCPY_FLAG, \
++ N_("Inline small memcpy (default when optimizing)") }, \
++ { "no-inline-memcpy", -INLINE_MEMCPY_FLAG, \
++ N_("Don't Inline small memcpy") }, \
++ { "cache-volatile", CACHE_VOLATILE_FLAG, \
++ N_("Volatile accesses use non-io variants of instructions (default)") }, \
++ { "no-cache-volatile", -CACHE_VOLATILE_FLAG, \
++ N_("Volatile accesses use io variants of instructions") }, \
++ { "bypass-cache", BYPASS_CACHE_FLAG, \
++ N_("All ld/st instructins use io variants") }, \
++ { "no-bypass-cache", -BYPASS_CACHE_FLAG, \
++ N_("All ld/st instructins do not use io variants (default)") }, \
++ { "smallc", 0, \
++ N_("Link with a limited version of the C library") }, \
++ { "ctors-in-init", 0, \
++ "" /* undocumented: N_("Link with static constructors and destructors in init") */ }, \
++ { "", TARGET_DEFAULT, 0 } \
++}
++
++
++extern const char *nios2_sys_nosys_string; /* for -msys=nosys */
++extern const char *nios2_sys_lib_string; /* for -msys-lib= */
++extern const char *nios2_sys_crt0_string; /* for -msys-crt0= */
++
++#define TARGET_OPTIONS \
++{ \
++ { "sys=nosys", &nios2_sys_nosys_string, \
++ N_("Use stub versions of OS library calls (default)"), 0}, \
++ { "sys-lib=", &nios2_sys_lib_string, \
++ N_("Name of System Library to link against. (Converted to a -l option)"), 0}, \
++ { "sys-crt0=", &nios2_sys_crt0_string, \
++ N_("Name of the startfile. (default is a crt0 for the ISS only)"), 0}, \
++}
++
++
++/* Default target_flags if no switches specified. */
++#ifndef TARGET_DEFAULT
++# define TARGET_DEFAULT (HAS_MUL_FLAG | CACHE_VOLATILE_FLAG)
++#endif
++
++/* Switch Recognition by gcc.c. Add -G xx support */
++#undef SWITCH_TAKES_ARG
++#define SWITCH_TAKES_ARG(CHAR) \
++ (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
++
++#define OVERRIDE_OPTIONS override_options ()
++#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options (LEVEL, SIZE)
++#define CAN_DEBUG_WITHOUT_FP
++
++#define CC1_SPEC "\
++%{G*}"
++
++#undef LIB_SPEC
++#define LIB_SPEC \
++"--start-group %{msmallc: -lsmallc} %{!msmallc: -lc} -lgcc \
++ %{msys-lib=*: -l%*} \
++ %{!msys-lib=*: -lc } \
++ --end-group \
++ %{msys-lib=: %eYou need a library name for -msys-lib=} \
++"
++
++
++#undef STARTFILE_SPEC
++#define STARTFILE_SPEC \
++"%{msys-crt0=*: %*} %{!msys-crt0=*: crt0%O%s} \
++ %{msys-crt0=: %eYou need a C startup file for -msys-crt0=} \
++ %{mctors-in-init: crti%O%s crtbegin%O%s} \
++"
++
++#undef ENDFILE_SPEC
++#define ENDFILE_SPEC \
++ "%{mctors-in-init: crtend%O%s crtn%O%s}"
++
++
++/***********************
++ * Storage Layout
++ ***********************/
++
++#define DEFAULT_SIGNED_CHAR 1
++#define BITS_BIG_ENDIAN 0
++#define BYTES_BIG_ENDIAN 0
++#define WORDS_BIG_ENDIAN 0
++#define BITS_PER_UNIT 8
++#define BITS_PER_WORD 32
++#define UNITS_PER_WORD 4
++#define POINTER_SIZE 32
++#define BIGGEST_ALIGNMENT 32
++#define STRICT_ALIGNMENT 1
++#define FUNCTION_BOUNDARY 32
++#define PARM_BOUNDARY 32
++#define STACK_BOUNDARY 32
++#define PREFERRED_STACK_BOUNDARY 32
++#define MAX_FIXED_MODE_SIZE 64
++
++#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
++ ((TREE_CODE (EXP) == STRING_CST) \
++ && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
++
++
++/**********************
++ * Layout of Source Language Data Types
++ **********************/
++
++#define INT_TYPE_SIZE 32
++#define SHORT_TYPE_SIZE 16
++#define LONG_TYPE_SIZE 32
++#define LONG_LONG_TYPE_SIZE 64
++#define FLOAT_TYPE_SIZE 32
++#define DOUBLE_TYPE_SIZE 64
++#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
++
++
++/*************************
++ * Condition Code Status
++ ************************/
++
++/* comparison type */
++/* ??? currently only CMP_SI is used */
++enum cmp_type {
++ CMP_SI, /* compare four byte integers */
++ CMP_DI, /* compare eight byte integers */
++ CMP_SF, /* compare single precision floats */
++ CMP_DF, /* compare double precision floats */
++ CMP_MAX /* max comparison type */
++};
++
++extern GTY(()) rtx branch_cmp[2]; /* operands for compare */
++extern enum cmp_type branch_type; /* what type of branch to use */
++
++/**********************
++ * Register Usage
++ **********************/
++
++/* ---------------------------------- *
++ * Basic Characteristics of Registers
++ * ---------------------------------- */
++
++/*
++Register Number
++ Register Name
++ Alternate Name
++ Purpose
++0 r0 zero always zero
++1 r1 at Assembler Temporary
++2-3 r2-r3 Return Location
++4-7 r4-r7 Register Arguments
++8-15 r8-r15 Caller Saved Registers
++16-22 r16-r22 Callee Saved Registers
++23 r23 sc Static Chain (Callee Saved)
++ ??? Does $sc want to be caller or callee
++ saved. If caller, 15, else 23.
++24 r24 Exception Temporary
++25 r25 Breakpoint Temporary
++26 r26 gp Global Pointer
++27 r27 sp Stack Pointer
++28 r28 fp Frame Pointer
++29 r29 ea Exception Return Address
++30 r30 ba Breakpoint Return Address
++31 r31 ra Return Address
++
++32 ctl0 status
++33 ctl1 estatus STATUS saved by exception ?
++34 ctl2 bstatus STATUS saved by break ?
++35 ctl3 ipri Interrupt Priority Mask ?
++36 ctl4 ecause Exception Cause ?
++
++37 pc Not an actual register
++
++38 rap Return address pointer, this does not
++ actually exist and will be eliminated
++
++39 fake_fp Fake Frame Pointer which will always be eliminated.
++40 fake_ap Fake Argument Pointer which will always be eliminated.
++
++41 First Pseudo Register
++
++
++The definitions for all the hard register numbers
++are located in nios2.md.
++*/
++
++#define FIRST_PSEUDO_REGISTER 41
++#define NUM_ARG_REGS (LAST_ARG_REGNO - FIRST_ARG_REGNO + 1)
++
++
++
++/* also see CONDITIONAL_REGISTER_USAGE */
++#define FIXED_REGISTERS \
++ { \
++/* +0 1 2 3 4 5 6 7 8 9 */ \
++/* 0 */ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
++/* 10 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
++/* 20 */ 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
++/* 30 */ 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
++/* 40 */ 1, \
++ }
++
++/* call used is the same as caller saved
++ + fixed regs + args + ret vals */
++#define CALL_USED_REGISTERS \
++ { \
++/* +0 1 2 3 4 5 6 7 8 9 */ \
++/* 0 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
++/* 10 */ 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
++/* 20 */ 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
++/* 30 */ 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
++/* 40 */ 1, \
++ }
++
++#define HARD_REGNO_NREGS(REGNO, MODE) \
++ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
++ / UNITS_PER_WORD)
++
++/* --------------------------- *
++ * How Values Fit in Registers
++ * --------------------------- */
++
++#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
++
++#define MODES_TIEABLE_P(MODE1, MODE2) 1
++
++
++/*************************
++ * Register Classes
++ *************************/
++
++enum reg_class
++{
++ NO_REGS,
++ ALL_REGS,
++ LIM_REG_CLASSES
++};
++
++#define N_REG_CLASSES (int) LIM_REG_CLASSES
++
++#define REG_CLASS_NAMES \
++ {"NO_REGS", \
++ "ALL_REGS"}
++
++#define GENERAL_REGS ALL_REGS
++
++#define REG_CLASS_CONTENTS \
++/* NO_REGS */ {{ 0, 0}, \
++/* ALL_REGS */ {~0,~0}} \
++
++#define REGNO_REG_CLASS(REGNO) ALL_REGS
++
++#define BASE_REG_CLASS ALL_REGS
++#define INDEX_REG_CLASS ALL_REGS
++
++/* only one reg class, 'r', is handled automatically */
++#define REG_CLASS_FROM_LETTER(CHAR) NO_REGS
++
++#define REGNO_OK_FOR_BASE_P2(REGNO, STRICT) \
++ ((STRICT) \
++ ? (REGNO) < FIRST_PSEUDO_REGISTER \
++ : (REGNO) < FIRST_PSEUDO_REGISTER || (reg_renumber && reg_renumber[REGNO] < FIRST_PSEUDO_REGISTER))
++
++#define REGNO_OK_FOR_INDEX_P2(REGNO, STRICT) \
++ (REGNO_OK_FOR_BASE_P2 (REGNO, STRICT))
++
++#define REGNO_OK_FOR_BASE_P(REGNO) \
++ (REGNO_OK_FOR_BASE_P2 (REGNO, 1))
++
++#define REGNO_OK_FOR_INDEX_P(REGNO) \
++ (REGNO_OK_FOR_INDEX_P2 (REGNO, 1))
++
++#define REG_OK_FOR_BASE_P2(X, STRICT) \
++ (STRICT \
++ ? REGNO_OK_FOR_BASE_P2 (REGNO (X), 1) \
++ : REGNO_OK_FOR_BASE_P2 (REGNO (X), 1) || REGNO(X) >= FIRST_PSEUDO_REGISTER)
++
++#define REG_OK_FOR_INDEX_P2(X, STRICT) \
++ (STRICT \
++ ? REGNO_OK_FOR_INDEX_P2 (REGNO (X), 1) \
++ : REGNO_OK_FOR_INDEX_P2 (REGNO (X), 1) || REGNO(X) >= FIRST_PSEUDO_REGISTER)
++
++#define CLASS_MAX_NREGS(CLASS, MODE) \
++ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
++ / UNITS_PER_WORD)
++
++
++#define SMALL_INT(X) ((unsigned HOST_WIDE_INT) ((X) + 0x8000) < 0x10000)
++#define SMALL_INT_UNSIGNED(X) ((unsigned HOST_WIDE_INT) (X) < 0x10000)
++#define UPPER16_INT(X) (((X) & 0xffff) == 0)
++#define SHIFT_INT(X) ((X) >= 0 && (X) <= 31)
++#define RDWRCTL_INT(X) ((X) >= 0 && (X) <= 31)
++#define CUSTOM_INSN_OPCODE(X) ((X) >= 0 && (X) <= 255)
++
++#define CONST_OK_FOR_LETTER_P(VALUE, C) \
++ ( \
++ (C) == 'I' ? SMALL_INT (VALUE) : \
++ (C) == 'J' ? SMALL_INT_UNSIGNED (VALUE) : \
++ (C) == 'K' ? UPPER16_INT (VALUE) : \
++ (C) == 'L' ? SHIFT_INT (VALUE) : \
++ (C) == 'M' ? (VALUE) == 0 : \
++ (C) == 'N' ? CUSTOM_INSN_OPCODE (VALUE) : \
++ (C) == 'O' ? RDWRCTL_INT (VALUE) : \
++ 0)
++
++#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
++
++#define PREFERRED_RELOAD_CLASS(X, CLASS) \
++ ((CLASS) == NO_REGS ? GENERAL_REGS : (CLASS))
++
++/* 'S' matches immediates which are in small data
++ and therefore can be added to gp to create a
++ 32-bit value. */
++#define EXTRA_CONSTRAINT(VALUE, C) \
++ ((C) == 'S' \
++ && (GET_CODE (VALUE) == SYMBOL_REF) \
++ && SYMBOL_REF_IN_NIOS2_SMALL_DATA_P (VALUE))
++
++
++
++
++/* Say that the epilogue uses the return address register. Note that
++ in the case of sibcalls, the values "used by the epilogue" are
++ considered live at the start of the called function. */
++#define EPILOGUE_USES(REGNO) ((REGNO) == RA_REGNO)
++
++
++#define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
++
++/**********************************
++ * Trampolines for Nested Functions
++ ***********************************/
++
++#define TRAMPOLINE_TEMPLATE(FILE) \
++ error ("trampolines not yet implemented")
++#define TRAMPOLINE_SIZE 20
++#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
++ error ("trampolines not yet implemented")
++
++/***************************
++ * Stack Layout and Calling Conventions
++ ***************************/
++
++/* ------------------ *
++ * Basic Stack Layout
++ * ------------------ */
++
++/* The downward variants are used by the compiler,
++ the upward ones serve as documentation */
++#define STACK_GROWS_DOWNWARD
++#define FRAME_GROWS_UPWARD
++#define ARGS_GROW_UPWARD
++
++#define STARTING_FRAME_OFFSET current_function_outgoing_args_size
++#define FIRST_PARM_OFFSET(FUNDECL) 0
++
++/* Before the prologue, RA lives in r31. */
++#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNO)
++
++/* -------------------------------------- *
++ * Registers That Address the Stack Frame
++ * -------------------------------------- */
++
++#define STACK_POINTER_REGNUM SP_REGNO
++#define STATIC_CHAIN_REGNUM SC_REGNO
++#define PC_REGNUM PC_REGNO
++#define DWARF_FRAME_RETURN_COLUMN RA_REGNO
++
++/* Base register for access to local variables of the function. We
++ pretend that the frame pointer is a non-existent hard register, and
++ then eliminate it to HARD_FRAME_POINTER_REGNUM. */
++#define FRAME_POINTER_REGNUM FAKE_FP_REGNO
++
++#define HARD_FRAME_POINTER_REGNUM FP_REGNO
++#define RETURN_ADDRESS_POINTER_REGNUM RAP_REGNO
++/* the argumnet pointer needs to always be eliminated
++ so it is set to a fake hard register. */
++#define ARG_POINTER_REGNUM FAKE_AP_REGNO
++
++/* ----------------------------------------- *
++ * Eliminating Frame Pointer and Arg Pointer
++ * ----------------------------------------- */
++
++#define FRAME_POINTER_REQUIRED 0
++
++#define ELIMINABLE_REGS \
++{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
++ { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
++ { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
++ { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
++ { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
++ { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
++
++#define CAN_ELIMINATE(FROM, TO) 1
++
++#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
++ (OFFSET) = nios2_initial_elimination_offset ((FROM), (TO))
++
++#define MUST_SAVE_REGISTER(regno) \
++ ((regs_ever_live[regno] && !call_used_regs[regno]) \
++ || (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) \
++ || (regno == RA_REGNO && regs_ever_live[RA_REGNO]))
++
++/* Treat LOC as a byte offset from the stack pointer and round it up
++ to the next fully-aligned offset. */
++#define STACK_ALIGN(LOC) \
++ (((LOC) + ((PREFERRED_STACK_BOUNDARY / 8) - 1)) & ~((PREFERRED_STACK_BOUNDARY / 8) - 1))
++
++
++/* ------------------------------ *
++ * Passing Arguments in Registers
++ * ------------------------------ */
++
++/* see nios2.c */
++#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
++ (function_arg (&CUM, MODE, TYPE, NAMED))
++
++#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
++ (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
++
++#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0
++
++#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) 0
++
++typedef struct nios2_args
++{
++ int regs_used;
++} CUMULATIVE_ARGS;
++
++/* This is to initialize the above unused CUM data type */
++#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
++ (init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS))
++
++#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
++ (function_arg_advance (&CUM, MODE, TYPE, NAMED))
++
++#define FUNCTION_ARG_REGNO_P(REGNO) \
++ ((REGNO) >= FIRST_ARG_REGNO && (REGNO) <= LAST_ARG_REGNO)
++
++#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
++ { \
++ int pret_size = nios2_setup_incoming_varargs (&(CUM), (MODE), \
++ (TYPE), (NO_RTL)); \
++ if (pret_size) \
++ (PRETEND_SIZE) = pret_size; \
++ }
++
++/* ----------------------------- *
++ * Generating Code for Profiling
++ * ----------------------------- */
++
++#define PROFILE_BEFORE_PROLOGUE
++
++#define FUNCTION_PROFILER(FILE, LABELNO) \
++ function_profiler ((FILE), (LABELNO))
++
++/* --------------------------------------- *
++ * Passing Function Arguments on the Stack
++ * --------------------------------------- */
++
++#define PROMOTE_PROTOTYPES 1
++
++#define PUSH_ARGS 0
++#define ACCUMULATE_OUTGOING_ARGS 1
++
++#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACKSIZE) 0
++
++/* --------------------------------------- *
++ * How Scalar Function Values Are Returned
++ * --------------------------------------- */
++
++#define FUNCTION_VALUE(VALTYPE, FUNC) \
++ gen_rtx(REG, TYPE_MODE(VALTYPE), FIRST_RETVAL_REGNO)
++
++#define LIBCALL_VALUE(MODE) \
++ gen_rtx(REG, MODE, FIRST_RETVAL_REGNO)
++
++#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == FIRST_RETVAL_REGNO)
++
++/* ----------------------------- *
++ * How Large Values Are Returned
++ * ----------------------------- */
++
++
++#define RETURN_IN_MEMORY(TYPE) \
++ nios2_return_in_memory (TYPE)
++
++
++#define STRUCT_VALUE 0
++
++#define DEFAULT_PCC_STRUCT_RETURN 0
++
++/*******************
++ * Addressing Modes
++ *******************/
++
++
++#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
++
++#define CONSTANT_ADDRESS_P(X) (CONSTANT_P (X))
++
++#define MAX_REGS_PER_ADDRESS 1
++
++/* Go to ADDR if X is a valid address. */
++#ifndef REG_OK_STRICT
++#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
++ { \
++ if (nios2_legitimate_address ((X), (MODE), 0)) \
++ goto ADDR; \
++ }
++#else
++#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
++ { \
++ if (nios2_legitimate_address ((X), (MODE), 1)) \
++ goto ADDR; \
++ }
++#endif
++
++#ifndef REG_OK_STRICT
++#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P2 (REGNO (X), 0)
++#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P2 (REGNO (X), 0)
++#else
++#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P2 (REGNO (X), 1)
++#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P2 (REGNO (X), 1)
++#endif
++
++#define LEGITIMATE_CONSTANT_P(X) 1
++
++/* Nios II has no mode dependent addresses. */
++#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
++
++/* Set if this has a weak declaration */
++#define SYMBOL_FLAG_WEAK_DECL (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
++#define SYMBOL_REF_WEAK_DECL_P(RTX) \
++ ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_WEAK_DECL) != 0)
++
++
++/* true if a symbol is both small and not weak. In this case, gp
++ relative access can be used */
++#define SYMBOL_REF_IN_NIOS2_SMALL_DATA_P(RTX) \
++ (SYMBOL_REF_SMALL_P(RTX) && !SYMBOL_REF_WEAK_DECL_P(RTX))
++
++/*****************
++ * Describing Relative Costs of Operations
++ *****************/
++
++#define SLOW_BYTE_ACCESS 1
++
++/* It is as good to call a constant function address as to call an address
++ kept in a register.
++ ??? Not true anymore really. Now that call cannot address full range
++ of memory callr may need to be used */
++
++#define NO_FUNCTION_CSE
++#define NO_RECURSIVE_FUNCTION_CSE
++
++
++
++/*****************************************
++ * Defining the Output Assembler Language
++ *****************************************/
++
++/* ------------------------------------------ *
++ * The Overall Framework of an Assembler File
++ * ------------------------------------------ */
++
++#define ASM_APP_ON "#APP\n"
++#define ASM_APP_OFF "#NO_APP\n"
++
++#define ASM_COMMENT_START "# "
++
++/* ------------------------------- *
++ * Output and Generation of Labels
++ * ------------------------------- */
++
++#define GLOBAL_ASM_OP "\t.global\t"
++
++
++/* -------------- *
++ * Output of Data
++ * -------------- */
++
++#define DWARF2_UNWIND_INFO 0
++
++
++/* -------------------------------- *
++ * Assembler Commands for Alignment
++ * -------------------------------- */
++
++#define ASM_OUTPUT_ALIGN(FILE, LOG) \
++ do { \
++ fprintf ((FILE), "%s%d\n", ALIGN_ASM_OP, (LOG)); \
++ } while (0)
++
++
++/* -------------------------------- *
++ * Output of Assembler Instructions
++ * -------------------------------- */
++
++#define REGISTER_NAMES \
++{ \
++ "zero", \
++ "at", \
++ "r2", \
++ "r3", \
++ "r4", \
++ "r5", \
++ "r6", \
++ "r7", \
++ "r8", \
++ "r9", \
++ "r10", \
++ "r11", \
++ "r12", \
++ "r13", \
++ "r14", \
++ "r15", \
++ "r16", \
++ "r17", \
++ "r18", \
++ "r19", \
++ "r20", \
++ "r21", \
++ "r22", \
++ "r23", \
++ "r24", \
++ "r25", \
++ "gp", \
++ "sp", \
++ "fp", \
++ "ta", \
++ "ba", \
++ "ra", \
++ "status", \
++ "estatus", \
++ "bstatus", \
++ "ipri", \
++ "ecause", \
++ "pc", \
++ "rap", \
++ "fake_fp", \
++ "fake_ap", \
++}
++
++#define ASM_OUTPUT_OPCODE(STREAM, PTR)\
++ (PTR) = asm_output_opcode (STREAM, PTR)
++
++#define PRINT_OPERAND(STREAM, X, CODE) \
++ nios2_print_operand (STREAM, X, CODE)
++
++#define PRINT_OPERAND_ADDRESS(STREAM, X) \
++ nios2_print_operand_address (STREAM, X)
++
++#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
++do { fputs (integer_asm_op (POINTER_SIZE / BITS_PER_UNIT, TRUE), FILE); \
++ fprintf (FILE, ".L%u\n", (unsigned) (VALUE)); \
++ } while (0)
++
++
++/* ------------ *
++ * Label Output
++ * ------------ */
++
++
++/* ---------------------------------------------------- *
++ * Dividing the Output into Sections (Texts, Data, ...)
++ * ---------------------------------------------------- */
++
++/* Output before read-only data. */
++#define TEXT_SECTION_ASM_OP ("\t.section\t.text")
++
++/* Output before writable data. */
++#define DATA_SECTION_ASM_OP ("\t.section\t.data")
++
++
++/* Default the definition of "small data" to 8 bytes. */
++/* ??? How come I can't use HOST_WIDE_INT here? */
++extern unsigned long nios2_section_threshold;
++#define NIOS2_DEFAULT_GVALUE 8
++
++
++
++/* This says how to output assembler code to declare an
++ uninitialized external linkage data object. Under SVR4,
++ the linker seems to want the alignment of data objects
++ to depend on their types. We do exactly that here. */
++
++#undef COMMON_ASM_OP
++#define COMMON_ASM_OP "\t.comm\t"
++
++#undef ASM_OUTPUT_ALIGNED_COMMON
++#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
++do \
++{ \
++ if ((SIZE) <= nios2_section_threshold) \
++ { \
++ named_section (0, ".sbss", 0); \
++ (*targetm.asm_out.globalize_label) (FILE, NAME); \
++ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
++ if (!flag_inhibit_size_directive) \
++ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \
++ ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT)); \
++ ASM_OUTPUT_LABEL(FILE, NAME); \
++ ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1); \
++ } \
++ else \
++ { \
++ fprintf ((FILE), "%s", COMMON_ASM_OP); \
++ assemble_name ((FILE), (NAME)); \
++ fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \
++ } \
++} \
++while (0)
++
++
++/* This says how to output assembler code to declare an
++ uninitialized internal linkage data object. Under SVR4,
++ the linker seems to want the alignment of data objects
++ to depend on their types. We do exactly that here. */
++
++#undef ASM_OUTPUT_ALIGNED_LOCAL
++#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
++do { \
++ if ((SIZE) <= nios2_section_threshold) \
++ named_section (0, ".sbss", 0); \
++ else \
++ named_section (0, ".bss", 0); \
++ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
++ if (!flag_inhibit_size_directive) \
++ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \
++ ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT)); \
++ ASM_OUTPUT_LABEL(FILE, NAME); \
++ ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1); \
++} while (0)
++
++
++
++/***************************
++ * Miscellaneous Parameters
++ ***************************/
++
++#define MOVE_MAX 4
++
++#define Pmode SImode
++#define FUNCTION_MODE QImode
++
++#define CASE_VECTOR_MODE Pmode
++
++#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
++
++#define LOAD_EXTEND_OP(MODE) (ZERO_EXTEND)
++
++#define WORD_REGISTER_OPERATIONS
+--- gcc-3.4.2/gcc/config/nios2/nios2.md
++++ gcc-3.4.2.nios2/gcc/config/nios2/nios2.md
+@@ -0,0 +1,2078 @@
++;; Machine Description for Altera NIOS 2G NIOS2 version.
++;; Copyright (C) 2003 Altera
++;; Contributed by Jonah Graham (jgraham@altera.com).
++;;
++;; This file is part of GNU CC.
++;;
++;; GNU CC is free software; you can redistribute it and/or modify
++;; it under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 2, or (at your option)
++;; any later version.
++;;
++;; GNU CC is distributed in the hope that it will be useful,
++;; but WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++;; GNU General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GNU CC; see the file COPYING. If not, write to
++;; the Free Software Foundation, 59 Temple Place - Suite 330,
++;; Boston, MA 02111-1307, USA. */
++
++
++\f
++;*****************************************************************************
++;*
++;* constants
++;*
++;*****************************************************************************
++(define_constants [
++ (GP_REGNO 26)
++ (SP_REGNO 27)
++ (FP_REGNO 28)
++ (RA_REGNO 31)
++ (RAP_REGNO 38)
++ (FIRST_RETVAL_REGNO 2)
++ (LAST_RETVAL_REGNO 3)
++ (FIRST_ARG_REGNO 4)
++ (LAST_ARG_REGNO 7)
++ (SC_REGNO 23)
++ (PC_REGNO 37)
++ (FAKE_FP_REGNO 39)
++ (FAKE_AP_REGNO 40)
++
++
++ (UNSPEC_BLOCKAGE 0)
++ (UNSPEC_LDBIO 1)
++ (UNSPEC_LDBUIO 2)
++ (UNSPEC_LDHIO 3)
++ (UNSPEC_LDHUIO 4)
++ (UNSPEC_LDWIO 5)
++ (UNSPEC_STBIO 6)
++ (UNSPEC_STHIO 7)
++ (UNSPEC_STWIO 8)
++ (UNSPEC_SYNC 9)
++ (UNSPEC_WRCTL 10)
++ (UNSPEC_RDCTL 11)
++
++])
++
++
++\f
++;*****************************************************************************
++;*
++;* instruction scheduler
++;*
++;*****************************************************************************
++
++; No schedule info is currently available, using an assumption that no
++; instruction can use the results of the previous instruction without
++; incuring a stall.
++
++; length of an instruction (in bytes)
++(define_attr "length" "" (const_int 4))
++(define_attr "type" "unknown,complex,control,alu,cond_alu,st,ld,shift,mul,div,custom" (const_string "complex"))
++
++(define_asm_attributes
++ [(set_attr "length" "4")
++ (set_attr "type" "complex")])
++
++(define_automaton "nios2")
++(automata_option "v")
++;(automata_option "no-minimization")
++(automata_option "ndfa")
++
++; The nios2 pipeline is fairly straightforward for the fast model.
++; Every alu operation is pipelined so that an instruction can
++; be issued every cycle. However, there are still potential
++; stalls which this description tries to deal with.
++
++(define_cpu_unit "cpu" "nios2")
++
++(define_insn_reservation "complex" 1
++ (eq_attr "type" "complex")
++ "cpu")
++
++(define_insn_reservation "control" 1
++ (eq_attr "type" "control")
++ "cpu")
++
++(define_insn_reservation "alu" 1
++ (eq_attr "type" "alu")
++ "cpu")
++
++(define_insn_reservation "cond_alu" 1
++ (eq_attr "type" "cond_alu")
++ "cpu")
++
++(define_insn_reservation "st" 1
++ (eq_attr "type" "st")
++ "cpu")
++
++(define_insn_reservation "custom" 1
++ (eq_attr "type" "custom")
++ "cpu")
++
++; shifts, muls and lds have three cycle latency
++(define_insn_reservation "ld" 3
++ (eq_attr "type" "ld")
++ "cpu")
++
++(define_insn_reservation "shift" 3
++ (eq_attr "type" "shift")
++ "cpu")
++
++(define_insn_reservation "mul" 3
++ (eq_attr "type" "mul")
++ "cpu")
++
++(define_insn_reservation "div" 1
++ (eq_attr "type" "div")
++ "cpu")
++
++\f
++;*****************************************************************************
++;*
++;* MOV Instructions
++;*
++;*****************************************************************************
++
++(define_expand "movqi"
++ [(set (match_operand:QI 0 "nonimmediate_operand" "")
++ (match_operand:QI 1 "general_operand" ""))]
++ ""
++{
++ if (nios2_emit_move_sequence (operands, QImode))
++ DONE;
++})
++
++(define_insn "movqi_internal"
++ [(set (match_operand:QI 0 "nonimmediate_operand" "=m, r,r, r")
++ (match_operand:QI 1 "general_operand" "rM,m,rM,I"))]
++ "(register_operand (operands[0], QImode)
++ || register_operand (operands[1], QImode)
++ || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
++ "@
++ stb%o0\\t%z1, %0
++ ldbu%o1\\t%0, %1
++ mov\\t%0, %z1
++ movi\\t%0, %1"
++ [(set_attr "type" "st,ld,alu,alu")])
++
++(define_insn "ldbio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDBIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldbio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "ldbuio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDBUIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldbuio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "stbio"
++ [(set (match_operand:SI 0 "memory_operand" "=m")
++ (match_operand:SI 1 "register_operand" "r"))
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_STBIO)]
++ ""
++ "stbio\\t%z1, %0"
++ [(set_attr "type" "st")])
++
++
++(define_expand "movhi"
++ [(set (match_operand:HI 0 "nonimmediate_operand" "")
++ (match_operand:HI 1 "general_operand" ""))]
++ ""
++{
++ if (nios2_emit_move_sequence (operands, HImode))
++ DONE;
++})
++
++(define_insn "movhi_internal"
++ [(set (match_operand:HI 0 "nonimmediate_operand" "=m, r,r, r,r")
++ (match_operand:HI 1 "general_operand" "rM,m,rM,I,J"))]
++ "(register_operand (operands[0], HImode)
++ || register_operand (operands[1], HImode)
++ || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
++ "@
++ sth%o0\\t%z1, %0
++ ldhu%o1\\t%0, %1
++ mov\\t%0, %z1
++ movi\\t%0, %1
++ movui\\t%0, %1"
++ [(set_attr "type" "st,ld,alu,alu,alu")])
++
++(define_insn "ldhio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDHIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldhio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "ldhuio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDHUIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldhuio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "sthio"
++ [(set (match_operand:SI 0 "memory_operand" "=m")
++ (match_operand:SI 1 "register_operand" "r"))
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_STHIO)]
++ ""
++ "sthio\\t%z1, %0"
++ [(set_attr "type" "st")])
++
++(define_expand "movsi"
++ [(set (match_operand:SI 0 "nonimmediate_operand" "")
++ (match_operand:SI 1 "general_operand" ""))]
++ ""
++{
++ if (nios2_emit_move_sequence (operands, SImode))
++ DONE;
++})
++
++(define_insn "movsi_internal"
++ [(set (match_operand:SI 0 "nonimmediate_operand" "=m, r,r, r,r,r,r")
++ (match_operand:SI 1 "general_operand" "rM,m,rM,I,J,S,i"))]
++ "(register_operand (operands[0], SImode)
++ || register_operand (operands[1], SImode)
++ || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
++ "@
++ stw%o0\\t%z1, %0
++ ldw%o1\\t%0, %1
++ mov\\t%0, %z1
++ movi\\t%0, %1
++ movui\\t%0, %1
++ addi\\t%0, gp, %%gprel(%1)
++ movhi\\t%0, %H1\;addi\\t%0, %0, %L1"
++ [(set_attr "type" "st,ld,alu,alu,alu,alu,alu")])
++
++(define_insn "ldwio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDWIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldwio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "stwio"
++ [(set (match_operand:SI 0 "memory_operand" "=m")
++ (match_operand:SI 1 "register_operand" "r"))
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_STWIO)]
++ ""
++ "stwio\\t%z1, %0"
++ [(set_attr "type" "st")])
++
++
++\f
++;*****************************************************************************
++;*
++;* zero extension
++;*
++;*****************************************************************************
++
++
++(define_insn "zero_extendhisi2"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r,m")))]
++ ""
++ "@
++ andi\\t%0, %1, 0xffff
++ ldhu%o1\\t%0, %1"
++ [(set_attr "type" "alu,ld")])
++
++(define_insn "zero_extendqihi2"
++ [(set (match_operand:HI 0 "register_operand" "=r,r")
++ (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
++ ""
++ "@
++ andi\\t%0, %1, 0xff
++ ldbu%o1\\t%0, %1"
++ [(set_attr "type" "alu,ld")])
++
++(define_insn "zero_extendqisi2"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
++ ""
++ "@
++ andi\\t%0, %1, 0xff
++ ldbu%o1\\t%0, %1"
++ [(set_attr "type" "alu,ld")])
++
++
++\f
++;*****************************************************************************
++;*
++;* sign extension
++;*
++;*****************************************************************************
++
++(define_expand "extendhisi2"
++ [(set (match_operand:SI 0 "register_operand" "")
++ (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
++ ""
++{
++ if (optimize && GET_CODE (operands[1]) == MEM)
++ operands[1] = force_not_mem (operands[1]);
++
++ if (GET_CODE (operands[1]) != MEM)
++ {
++ rtx op1 = gen_lowpart (SImode, operands[1]);
++ rtx temp = gen_reg_rtx (SImode);
++ rtx shift = GEN_INT (16);
++
++ emit_insn (gen_ashlsi3 (temp, op1, shift));
++ emit_insn (gen_ashrsi3 (operands[0], temp, shift));
++ DONE;
++ }
++})
++
++(define_insn "extendhisi2_internal"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (sign_extend:SI (match_operand:HI 1 "memory_operand" "m")))]
++ ""
++ "ldh%o1\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_expand "extendqihi2"
++ [(set (match_operand:HI 0 "register_operand" "")
++ (sign_extend:HI (match_operand:QI 1 "nonimmediate_operand" "")))]
++ ""
++{
++ if (optimize && GET_CODE (operands[1]) == MEM)
++ operands[1] = force_not_mem (operands[1]);
++
++ if (GET_CODE (operands[1]) != MEM)
++ {
++ rtx op0 = gen_lowpart (SImode, operands[0]);
++ rtx op1 = gen_lowpart (SImode, operands[1]);
++ rtx temp = gen_reg_rtx (SImode);
++ rtx shift = GEN_INT (24);
++
++ emit_insn (gen_ashlsi3 (temp, op1, shift));
++ emit_insn (gen_ashrsi3 (op0, temp, shift));
++ DONE;
++ }
++})
++
++(define_insn "extendqihi2_internal"
++ [(set (match_operand:HI 0 "register_operand" "=r")
++ (sign_extend:HI (match_operand:QI 1 "memory_operand" "m")))]
++ ""
++ "ldb%o1\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++
++(define_expand "extendqisi2"
++ [(set (match_operand:SI 0 "register_operand" "")
++ (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "")))]
++ ""
++{
++ if (optimize && GET_CODE (operands[1]) == MEM)
++ operands[1] = force_not_mem (operands[1]);
++
++ if (GET_CODE (operands[1]) != MEM)
++ {
++ rtx op1 = gen_lowpart (SImode, operands[1]);
++ rtx temp = gen_reg_rtx (SImode);
++ rtx shift = GEN_INT (24);
++
++ emit_insn (gen_ashlsi3 (temp, op1, shift));
++ emit_insn (gen_ashrsi3 (operands[0], temp, shift));
++ DONE;
++ }
++})
++
++(define_insn "extendqisi2_insn"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (sign_extend:SI (match_operand:QI 1 "memory_operand" "m")))]
++ ""
++ "ldb%o1\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Arithmetic Operations
++;*
++;*****************************************************************************
++
++(define_insn "addsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (plus:SI (match_operand:SI 1 "register_operand" "%r,r")
++ (match_operand:SI 2 "arith_operand" "r,I")))]
++ ""
++ "add%i2\\t%0, %1, %z2"
++ [(set_attr "type" "alu")])
++
++(define_insn "subsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (minus:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "register_operand" "r")))]
++ ""
++ "sub\\t%0, %z1, %2"
++ [(set_attr "type" "alu")])
++
++(define_insn "mulsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (mult:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "arith_operand" "r,I")))]
++ "TARGET_HAS_MUL"
++ "mul%i2\\t%0, %1, %z2"
++ [(set_attr "type" "mul")])
++
++(define_expand "divsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (div:SI (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")))]
++ ""
++{
++ if (!TARGET_HAS_DIV)
++ {
++ if (!TARGET_FAST_SW_DIV)
++ FAIL;
++ else
++ {
++ if (nios2_emit_expensive_div (operands, SImode))
++ DONE;
++ }
++ }
++})
++
++(define_insn "divsi3_insn"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (div:SI (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")))]
++ "TARGET_HAS_DIV"
++ "div\\t%0, %1, %2"
++ [(set_attr "type" "div")])
++
++(define_insn "udivsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (udiv:SI (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")))]
++ "TARGET_HAS_DIV"
++ "divu\\t%0, %1, %2"
++ [(set_attr "type" "div")])
++
++(define_insn "smulsi3_highpart"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (truncate:SI
++ (lshiftrt:DI
++ (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
++ (sign_extend:DI (match_operand:SI 2 "register_operand" "r")))
++ (const_int 32))))]
++ "TARGET_HAS_MULX"
++ "mulxss\\t%0, %1, %2"
++ [(set_attr "type" "mul")])
++
++(define_insn "umulsi3_highpart"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (truncate:SI
++ (lshiftrt:DI
++ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
++ (zero_extend:DI (match_operand:SI 2 "register_operand" "r")))
++ (const_int 32))))]
++ "TARGET_HAS_MULX"
++ "mulxuu\\t%0, %1, %2"
++ [(set_attr "type" "mul")])
++
++
++(define_expand "mulsidi3"
++ [(set (subreg:SI (match_operand:DI 0 "register_operand" "") 0)
++ (mult:SI (match_operand:SI 1 "register_operand" "")
++ (match_operand:SI 2 "register_operand" "")))
++ (set (subreg:SI (match_dup 0) 4)
++ (truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1))
++ (sign_extend:DI (match_dup 2)))
++ (const_int 32))))]
++ "TARGET_HAS_MULX"
++ "")
++
++(define_expand "umulsidi3"
++ [(set (subreg:SI (match_operand:DI 0 "register_operand" "") 0)
++ (mult:SI (match_operand:SI 1 "register_operand" "")
++ (match_operand:SI 2 "register_operand" "")))
++ (set (subreg:SI (match_dup 0) 4)
++ (truncate:SI (lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1))
++ (zero_extend:DI (match_dup 2)))
++ (const_int 32))))]
++ "TARGET_HAS_MULX"
++ "")
++
++
++\f
++;*****************************************************************************
++;*
++;* Negate and ones complement
++;*
++;*****************************************************************************
++
++(define_insn "negsi2"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (neg:SI (match_operand:SI 1 "register_operand" "r")))]
++ ""
++{
++ operands[2] = const0_rtx;
++ return "sub\\t%0, %z2, %1";
++}
++ [(set_attr "type" "alu")])
++
++(define_insn "one_cmplsi2"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (not:SI (match_operand:SI 1 "register_operand" "r")))]
++ ""
++{
++ operands[2] = const0_rtx;
++ return "nor\\t%0, %z2, %1";
++}
++ [(set_attr "type" "alu")])
++
++
++
++; Logical Operantions
++
++(define_insn "andsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r, r,r")
++ (and:SI (match_operand:SI 1 "register_operand" "%r, r,r")
++ (match_operand:SI 2 "logical_operand" "rM,J,K")))]
++ ""
++ "@
++ and\\t%0, %1, %z2
++ and%i2\\t%0, %1, %2
++ andh%i2\\t%0, %1, %U2"
++ [(set_attr "type" "alu")])
++
++(define_insn "iorsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r, r,r")
++ (ior:SI (match_operand:SI 1 "register_operand" "%r, r,r")
++ (match_operand:SI 2 "logical_operand" "rM,J,K")))]
++ ""
++ "@
++ or\\t%0, %1, %z2
++ or%i2\\t%0, %1, %2
++ orh%i2\\t%0, %1, %U2"
++ [(set_attr "type" "alu")])
++
++(define_insn "*norsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (and:SI (not:SI (match_operand:SI 1 "register_operand" "%r"))
++ (not:SI (match_operand:SI 2 "reg_or_0_operand" "rM"))))]
++ ""
++ "nor\\t%0, %1, %z2"
++ [(set_attr "type" "alu")])
++
++(define_insn "xorsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r, r,r")
++ (xor:SI (match_operand:SI 1 "register_operand" "%r, r,r")
++ (match_operand:SI 2 "logical_operand" "rM,J,K")))]
++ ""
++ "@
++ xor\\t%0, %1, %z2
++ xor%i2\\t%0, %1, %2
++ xorh%i2\\t%0, %1, %U2"
++ [(set_attr "type" "alu")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Shifts
++;*
++;*****************************************************************************
++
++(define_insn "ashlsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (ashift:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "shift_operand" "r,L")))]
++ ""
++ "sll%i2\\t%0, %1, %z2"
++ [(set_attr "type" "shift")])
++
++(define_insn "ashrsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (ashiftrt:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "shift_operand" "r,L")))]
++ ""
++ "sra%i2\\t%0, %1, %z2"
++ [(set_attr "type" "shift")])
++
++(define_insn "lshrsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (lshiftrt:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "shift_operand" "r,L")))]
++ ""
++ "srl%i2\\t%0, %1, %z2"
++ [(set_attr "type" "shift")])
++
++(define_insn "rotlsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (rotate:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "shift_operand" "r,L")))]
++ ""
++ "rol%i2\\t%0, %1, %z2"
++ [(set_attr "type" "shift")])
++
++(define_insn "rotrsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (rotatert:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "register_operand" "r,r")))]
++ ""
++ "ror\\t%0, %1, %2"
++ [(set_attr "type" "shift")])
++
++(define_insn "*shift_mul_constants"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ashift:SI (mult:SI (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "const_int_operand" "I"))
++ (match_operand:SI 3 "const_int_operand" "I")))]
++ "TARGET_HAS_MUL && SMALL_INT (INTVAL (operands[2]) << INTVAL (operands[3]))"
++{
++ HOST_WIDE_INT mul = INTVAL (operands[2]) << INTVAL (operands[3]);
++ rtx ops[3];
++
++ ops[0] = operands[0];
++ ops[1] = operands[1];
++ ops[2] = GEN_INT (mul);
++
++ output_asm_insn ("muli\t%0, %1, %2", ops);
++ return "";
++}
++ [(set_attr "type" "mul")])
++
++
++
++\f
++;*****************************************************************************
++;*
++;* Prologue, Epilogue and Return
++;*
++;*****************************************************************************
++
++(define_expand "prologue"
++ [(const_int 1)]
++ ""
++{
++ expand_prologue ();
++ DONE;
++})
++
++(define_expand "epilogue"
++ [(return)]
++ ""
++{
++ expand_epilogue (false);
++ DONE;
++})
++
++(define_expand "sibcall_epilogue"
++ [(return)]
++ ""
++{
++ expand_epilogue (true);
++ DONE;
++})
++
++(define_insn "return"
++ [(return)]
++ "reload_completed && nios2_can_use_return_insn ()"
++ "ret\\t"
++)
++
++(define_insn "return_from_epilogue"
++ [(use (match_operand 0 "pmode_register_operand" ""))
++ (return)]
++ "reload_completed"
++ "ret\\t"
++)
++
++;; Block any insns from being moved before this point, since the
++;; profiling call to mcount can use various registers that aren't
++;; saved or used to pass arguments.
++
++(define_insn "blockage"
++ [(unspec_volatile [(const_int 0)] UNSPEC_BLOCKAGE)]
++ ""
++ ""
++ [(set_attr "type" "unknown")
++ (set_attr "length" "0")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Jumps and Calls
++;*
++;*****************************************************************************
++
++(define_insn "indirect_jump"
++ [(set (pc) (match_operand:SI 0 "register_operand" "r"))]
++ ""
++ "jmp\\t%0"
++ [(set_attr "type" "control")])
++
++(define_insn "jump"
++ [(set (pc)
++ (label_ref (match_operand 0 "" "")))]
++ ""
++ "br\\t%0"
++ [(set_attr "type" "control")])
++
++
++(define_insn "indirect_call"
++ [(call (mem:QI (match_operand:SI 0 "register_operand" "r"))
++ (match_operand 1 "" ""))
++ (clobber (reg:SI RA_REGNO))]
++ ""
++ "callr\\t%0"
++ [(set_attr "type" "control")])
++
++(define_insn "indirect_call_value"
++ [(set (match_operand 0 "" "")
++ (call (mem:QI (match_operand:SI 1 "register_operand" "r"))
++ (match_operand 2 "" "")))
++ (clobber (reg:SI RA_REGNO))]
++ ""
++ "callr\\t%1"
++)
++
++(define_expand "call"
++ [(parallel [(call (match_operand 0 "" "")
++ (match_operand 1 "" ""))
++ (clobber (reg:SI RA_REGNO))])]
++ ""
++ "")
++
++(define_expand "call_value"
++ [(parallel [(set (match_operand 0 "" "")
++ (call (match_operand 1 "" "")
++ (match_operand 2 "" "")))
++ (clobber (reg:SI RA_REGNO))])]
++ ""
++ "")
++
++(define_insn "*call"
++ [(call (mem:QI (match_operand:SI 0 "immediate_operand" "i"))
++ (match_operand 1 "" ""))
++ (clobber (match_operand:SI 2 "register_operand" "=r"))]
++ ""
++ "call\\t%0"
++ [(set_attr "type" "control")])
++
++(define_insn "*call_value"
++ [(set (match_operand 0 "" "")
++ (call (mem:QI (match_operand:SI 1 "immediate_operand" "i"))
++ (match_operand 2 "" "")))
++ (clobber (match_operand:SI 3 "register_operand" "=r"))]
++ ""
++ "call\\t%1"
++ [(set_attr "type" "control")])
++
++(define_expand "sibcall"
++ [(parallel [(call (match_operand 0 "" "")
++ (match_operand 1 "" ""))
++ (return)
++ (use (match_operand 2 "" ""))])]
++ ""
++ {
++ XEXP (operands[0], 0) = copy_to_mode_reg (SImode, XEXP (operands[0], 0));
++
++ if (operands[2] == NULL_RTX)
++ operands[2] = const0_rtx;
++ }
++)
++
++(define_expand "sibcall_value"
++ [(parallel [(set (match_operand 0 "" "")
++ (call (match_operand 1 "" "")
++ (match_operand 2 "" "")))
++ (return)
++ (use (match_operand 3 "" ""))])]
++ ""
++ {
++ XEXP (operands[1], 0) = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
++
++ if (operands[3] == NULL_RTX)
++ operands[3] = const0_rtx;
++ }
++)
++
++(define_insn "sibcall_insn"
++ [(call (mem:QI (match_operand:SI 0 "register_operand" "r"))
++ (match_operand 1 "" ""))
++ (return)
++ (use (match_operand 2 "" ""))]
++ ""
++ "jmp\\t%0"
++)
++
++(define_insn "sibcall_value_insn"
++ [(set (match_operand 0 "register_operand" "")
++ (call (mem:QI (match_operand:SI 1 "register_operand" "r"))
++ (match_operand 2 "" "")))
++ (return)
++ (use (match_operand 3 "" ""))]
++ ""
++ "jmp\\t%1"
++)
++
++
++
++
++(define_expand "tablejump"
++ [(parallel [(set (pc) (match_operand 0 "register_operand" "r"))
++ (use (label_ref (match_operand 1 "" "")))])]
++ ""
++ ""
++)
++
++(define_insn "*tablejump"
++ [(set (pc)
++ (match_operand:SI 0 "register_operand" "r"))
++ (use (label_ref (match_operand 1 "" "")))]
++ ""
++ "jmp\\t%0"
++ [(set_attr "type" "control")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Comparisons
++;*
++;*****************************************************************************
++;; Flow here is rather complex (based on MIPS):
++;;
++;; 1) The cmp{si,di,sf,df} routine is called. It deposits the
++;; arguments into the branch_cmp array, and the type into
++;; branch_type. No RTL is generated.
++;;
++;; 2) The appropriate branch define_expand is called, which then
++;; creates the appropriate RTL for the comparison and branch.
++;; Different CC modes are used, based on what type of branch is
++;; done, so that we can constrain things appropriately. There
++;; are assumptions in the rest of GCC that break if we fold the
++;; operands into the branchs for integer operations, and use cc0
++;; for floating point, so we use the fp status register instead.
++;; If needed, an appropriate temporary is created to hold the
++;; of the integer compare.
++
++(define_expand "cmpsi"
++ [(set (cc0)
++ (compare:CC (match_operand:SI 0 "register_operand" "")
++ (match_operand:SI 1 "arith_operand" "")))]
++ ""
++{
++ branch_cmp[0] = operands[0];
++ branch_cmp[1] = operands[1];
++ branch_type = CMP_SI;
++ DONE;
++})
++
++(define_expand "tstsi"
++ [(set (cc0)
++ (match_operand:SI 0 "register_operand" ""))]
++ ""
++{
++ branch_cmp[0] = operands[0];
++ branch_cmp[1] = const0_rtx;
++ branch_type = CMP_SI;
++ DONE;
++})
++
++\f
++;*****************************************************************************
++;*
++;* setting a register from a comparison
++;*
++;*****************************************************************************
++
++(define_expand "seq"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (eq:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (EQ, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*seq"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (eq:SI (match_operand:SI 1 "reg_or_0_operand" "%rM")
++ (match_operand:SI 2 "arith_operand" "rI")))]
++ ""
++ "cmpeq%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sne"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ne:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (NE, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sne"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ne:SI (match_operand:SI 1 "reg_or_0_operand" "%rM")
++ (match_operand:SI 2 "arith_operand" "rI")))]
++ ""
++ "cmpne%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sgt"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (gt:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (GT, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sgt"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (gt:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "reg_or_0_operand" "rM")))]
++ ""
++ "cmplt\\t%0, %z2, %z1"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sge"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ge:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (GE, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sge"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ge:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "arith_operand" "rI")))]
++ ""
++ "cmpge%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++(define_expand "sle"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (le:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (LE, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sle"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (le:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "reg_or_0_operand" "rM")))]
++ ""
++ "cmpge\\t%0, %z2, %z1"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "slt"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (lt:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (LT, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*slt"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (lt:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "arith_operand" "rI")))]
++ ""
++ "cmplt%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sgtu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (gtu:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (GTU, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sgtu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (gtu:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "reg_or_0_operand" "rM")))]
++ ""
++ "cmpltu\\t%0, %z2, %z1"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sgeu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (geu:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (GEU, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sgeu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (geu:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "uns_arith_operand" "rJ")))]
++ ""
++ "cmpgeu%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++(define_expand "sleu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (leu:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (LEU, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sleu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (leu:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "reg_or_0_operand" "rM")))]
++ ""
++ "cmpgeu\\t%0, %z2, %z1"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sltu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ltu:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (LTU, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sltu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ltu:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "uns_arith_operand" "rJ")))]
++ ""
++ "cmpltu%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++
++
++\f
++;*****************************************************************************
++;*
++;* branches
++;*
++;*****************************************************************************
++
++(define_insn "*cbranch"
++ [(set (pc)
++ (if_then_else
++ (match_operator:SI 0 "comparison_operator"
++ [(match_operand:SI 2 "reg_or_0_operand" "rM")
++ (match_operand:SI 3 "reg_or_0_operand" "rM")])
++ (label_ref (match_operand 1 "" ""))
++ (pc)))]
++ ""
++ "b%0\\t%z2, %z3, %l1"
++ [(set_attr "type" "control")])
++
++
++(define_expand "beq"
++ [(set (pc)
++ (if_then_else (eq:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (EQ, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++
++(define_expand "bne"
++ [(set (pc)
++ (if_then_else (ne:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (NE, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++
++(define_expand "bgt"
++ [(set (pc)
++ (if_then_else (gt:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (GT, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "bge"
++ [(set (pc)
++ (if_then_else (ge:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (GE, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "ble"
++ [(set (pc)
++ (if_then_else (le:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (LE, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "blt"
++ [(set (pc)
++ (if_then_else (lt:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (LT, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++
++(define_expand "bgtu"
++ [(set (pc)
++ (if_then_else (gtu:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (GTU, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "bgeu"
++ [(set (pc)
++ (if_then_else (geu:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (GEU, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "bleu"
++ [(set (pc)
++ (if_then_else (leu:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (LEU, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "bltu"
++ [(set (pc)
++ (if_then_else (ltu:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (LTU, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++\f
++;*****************************************************************************
++;*
++;* String and Block Operations
++;*
++;*****************************************************************************
++
++; ??? This is all really a hack to get Dhrystone to work as fast as possible
++; things to be fixed:
++; * let the compiler core handle all of this, for that to work the extra
++; aliasing needs to be addressed.
++; * we use three temporary registers for loading and storing to ensure no
++; ld use stalls, this is excessive, because after the first ld/st only
++; two are needed. Only two would be needed all the way through if
++; we could schedule with other code. Consider:
++; 1 ld $1, 0($src)
++; 2 ld $2, 4($src)
++; 3 ld $3, 8($src)
++; 4 st $1, 0($dest)
++; 5 ld $1, 12($src)
++; 6 st $2, 4($src)
++; 7 etc.
++; The first store has to wait until 4. If it does not there will be one
++; cycle of stalling. However, if any other instruction could be placed
++; between 1 and 4, $3 would not be needed.
++; * In small we probably don't want to ever do this ourself because there
++; is no ld use stall.
++
++(define_expand "movstrsi"
++ [(parallel [(set (match_operand:BLK 0 "general_operand" "")
++ (match_operand:BLK 1 "general_operand" ""))
++ (use (match_operand:SI 2 "const_int_operand" ""))
++ (use (match_operand:SI 3 "const_int_operand" ""))
++ (clobber (match_scratch:SI 4 "=&r"))
++ (clobber (match_scratch:SI 5 "=&r"))
++ (clobber (match_scratch:SI 6 "=&r"))])]
++ "TARGET_INLINE_MEMCPY"
++{
++ rtx ld_addr_reg, st_addr_reg;
++
++ /* If the predicate for op2 fails in expr.c:emit_block_move_via_movstr
++ it trys to copy to a register, but does not re-try the predicate.
++ ??? Intead of fixing expr.c, I fix it here. */
++ if (!const_int_operand (operands[2], SImode))
++ FAIL;
++
++ /* ??? there are some magic numbers which need to be sorted out here.
++ the basis for them is not increasing code size hugely or going
++ out of range of offset addressing */
++ if (INTVAL (operands[3]) < 4)
++ FAIL;
++ if (!optimize
++ || (optimize_size && INTVAL (operands[2]) > 12)
++ || (optimize < 3 && INTVAL (operands[2]) > 100)
++ || INTVAL (operands[2]) > 200)
++ FAIL;
++
++ st_addr_reg
++ = replace_equiv_address (operands[0],
++ copy_to_mode_reg (Pmode, XEXP (operands[0], 0)));
++ ld_addr_reg
++ = replace_equiv_address (operands[1],
++ copy_to_mode_reg (Pmode, XEXP (operands[1], 0)));
++ emit_insn (gen_movstrsi_internal (st_addr_reg, ld_addr_reg,
++ operands[2], operands[3]));
++
++ DONE;
++})
++
++
++(define_insn "movstrsi_internal"
++ [(set (match_operand:BLK 0 "memory_operand" "=o")
++ (match_operand:BLK 1 "memory_operand" "o"))
++ (use (match_operand:SI 2 "const_int_operand" "i"))
++ (use (match_operand:SI 3 "const_int_operand" "i"))
++ (clobber (match_scratch:SI 4 "=&r"))
++ (clobber (match_scratch:SI 5 "=&r"))
++ (clobber (match_scratch:SI 6 "=&r"))]
++ "TARGET_INLINE_MEMCPY"
++{
++ int ld_offset = INTVAL (operands[2]);
++ int ld_len = INTVAL (operands[2]);
++ int ld_reg = 0;
++ rtx ld_addr_reg = XEXP (operands[1], 0);
++ int st_offset = INTVAL (operands[2]);
++ int st_len = INTVAL (operands[2]);
++ int st_reg = 0;
++ rtx st_addr_reg = XEXP (operands[0], 0);
++ int delay_count = 0;
++
++ /* ops[0] is the address used by the insn
++ ops[1] is the register being loaded or stored */
++ rtx ops[2];
++
++ if (INTVAL (operands[3]) < 4)
++ abort ();
++
++ while (ld_offset >= 4)
++ {
++ /* if the load use delay has been met, I can start
++ storing */
++ if (delay_count >= 3)
++ {
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stw\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 4;
++ }
++
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (ld_addr_reg, ld_len - ld_offset));
++ ops[1] = operands[ld_reg + 4];
++ output_asm_insn ("ldw\t%1, %0", ops);
++
++ ld_reg = (ld_reg + 1) % 3;
++ ld_offset -= 4;
++ delay_count++;
++ }
++
++ if (ld_offset >= 2)
++ {
++ /* if the load use delay has been met, I can start
++ storing */
++ if (delay_count >= 3)
++ {
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stw\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 4;
++ }
++
++ ops[0] = gen_rtx (MEM, HImode,
++ plus_constant (ld_addr_reg, ld_len - ld_offset));
++ ops[1] = operands[ld_reg + 4];
++ output_asm_insn ("ldh\t%1, %0", ops);
++
++ ld_reg = (ld_reg + 1) % 3;
++ ld_offset -= 2;
++ delay_count++;
++ }
++
++ if (ld_offset >= 1)
++ {
++ /* if the load use delay has been met, I can start
++ storing */
++ if (delay_count >= 3)
++ {
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stw\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 4;
++ }
++
++ ops[0] = gen_rtx (MEM, QImode,
++ plus_constant (ld_addr_reg, ld_len - ld_offset));
++ ops[1] = operands[ld_reg + 4];
++ output_asm_insn ("ldb\t%1, %0", ops);
++
++ ld_reg = (ld_reg + 1) % 3;
++ ld_offset -= 1;
++ delay_count++;
++ }
++
++ while (st_offset >= 4)
++ {
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stw\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 4;
++ }
++
++ while (st_offset >= 2)
++ {
++ ops[0] = gen_rtx (MEM, HImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("sth\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 2;
++ }
++
++ while (st_offset >= 1)
++ {
++ ops[0] = gen_rtx (MEM, QImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stb\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 1;
++ }
++
++ return "";
++}
++; ??? lengths are not being used yet, but I will probably forget
++; to update this once I am using lengths, so set it to something
++; definetely big enough to cover it. 400 allows for 200 bytes
++; of motion.
++ [(set_attr "length" "400")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Custom instructions
++;*
++;*****************************************************************************
++
++(define_constants [
++ (CUSTOM_N 100)
++ (CUSTOM_NI 101)
++ (CUSTOM_NF 102)
++ (CUSTOM_NP 103)
++ (CUSTOM_NII 104)
++ (CUSTOM_NIF 105)
++ (CUSTOM_NIP 106)
++ (CUSTOM_NFI 107)
++ (CUSTOM_NFF 108)
++ (CUSTOM_NFP 109)
++ (CUSTOM_NPI 110)
++ (CUSTOM_NPF 111)
++ (CUSTOM_NPP 112)
++ (CUSTOM_IN 113)
++ (CUSTOM_INI 114)
++ (CUSTOM_INF 115)
++ (CUSTOM_INP 116)
++ (CUSTOM_INII 117)
++ (CUSTOM_INIF 118)
++ (CUSTOM_INIP 119)
++ (CUSTOM_INFI 120)
++ (CUSTOM_INFF 121)
++ (CUSTOM_INFP 122)
++ (CUSTOM_INPI 123)
++ (CUSTOM_INPF 124)
++ (CUSTOM_INPP 125)
++ (CUSTOM_FN 126)
++ (CUSTOM_FNI 127)
++ (CUSTOM_FNF 128)
++ (CUSTOM_FNP 129)
++ (CUSTOM_FNII 130)
++ (CUSTOM_FNIF 131)
++ (CUSTOM_FNIP 132)
++ (CUSTOM_FNFI 133)
++ (CUSTOM_FNFF 134)
++ (CUSTOM_FNFP 135)
++ (CUSTOM_FNPI 136)
++ (CUSTOM_FNPF 137)
++ (CUSTOM_FNPP 138)
++ (CUSTOM_PN 139)
++ (CUSTOM_PNI 140)
++ (CUSTOM_PNF 141)
++ (CUSTOM_PNP 142)
++ (CUSTOM_PNII 143)
++ (CUSTOM_PNIF 144)
++ (CUSTOM_PNIP 145)
++ (CUSTOM_PNFI 146)
++ (CUSTOM_PNFF 147)
++ (CUSTOM_PNFP 148)
++ (CUSTOM_PNPI 149)
++ (CUSTOM_PNPF 150)
++ (CUSTOM_PNPP 151)
++])
++
++
++(define_insn "custom_n"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")] CUSTOM_N)]
++ ""
++ "custom\\t%0, zero, zero, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_ni"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")] CUSTOM_NI)]
++ ""
++ "custom\\t%0, zero, %1, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nf"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SF 1 "register_operand" "r")] CUSTOM_NF)]
++ ""
++ "custom\\t%0, zero, %1, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_np"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")] CUSTOM_NP)]
++ ""
++ "custom\\t%0, zero, %1, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nii"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NII)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nif"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_NIF)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nip"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NIP)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nfi"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SF 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NFI)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nff"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SF 1 "register_operand" "r")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_NFF)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nfp"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SF 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NFP)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_npi"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NPI)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_npf"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_NPF)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_npp"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NPP)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++
++
++(define_insn "custom_in"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")] CUSTOM_IN))]
++ ""
++ "custom\\t%1, %0, zero, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_ini"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_INI))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inf"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_INF))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_INP))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inii"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INII))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inif"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_INIF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inip"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INIP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_infi"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INFI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inff"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_INFF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_infp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INFP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inpi"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INPI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inpf"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_INPF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inpp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INPP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++
++
++
++
++(define_insn "custom_fn"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")] CUSTOM_FN))]
++ ""
++ "custom\\t%1, %0, zero, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fni"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_FNI))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnf"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_FNF))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnp"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_FNP))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnii"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNII))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnif"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_FNIF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnip"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNIP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnfi"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNFI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnff"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_FNFF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnfp"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNFP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnpi"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNPI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnpf"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_FNPF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnpp"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNPP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++
++
++(define_insn "custom_pn"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")] CUSTOM_PN))]
++ ""
++ "custom\\t%1, %0, zero, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pni"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_PNI))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnf"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_PNF))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_PNP))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnii"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNII))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnif"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_PNIF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnip"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNIP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnfi"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNFI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnff"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_PNFF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnfp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNFP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnpi"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNPI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnpf"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_PNPF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnpp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNPP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++
++
++
++
++\f
++;*****************************************************************************
++;*
++;* Misc
++;*
++;*****************************************************************************
++
++(define_insn "nop"
++ [(const_int 0)]
++ ""
++ "nop\\t"
++ [(set_attr "type" "alu")])
++
++(define_insn "sync"
++ [(unspec_volatile [(const_int 0)] UNSPEC_SYNC)]
++ ""
++ "sync\\t"
++ [(set_attr "type" "control")])
++
++
++(define_insn "rdctl"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "rdwrctl_operand" "O")] UNSPEC_RDCTL))]
++ ""
++ "rdctl\\t%0, ctl%1"
++ [(set_attr "type" "control")])
++
++(define_insn "wrctl"
++ [(unspec_volatile:SI [(match_operand:SI 0 "rdwrctl_operand" "O")
++ (match_operand:SI 1 "register_operand" "r")] UNSPEC_WRCTL)]
++ ""
++ "wrctl\\tctl%0, %1"
++ [(set_attr "type" "control")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Peepholes
++;*
++;*****************************************************************************
++
++
+--- gcc-3.4.2/gcc/config/nios2/t-nios2
++++ gcc-3.4.2.nios2/gcc/config/nios2/t-nios2
+@@ -0,0 +1,123 @@
++##
++## Compiler flags to use when compiling libgcc2.c.
++##
++## LIB2FUNCS_EXTRA
++## A list of source file names to be compiled or assembled and inserted into libgcc.a.
++
++LIB2FUNCS_EXTRA=$(srcdir)/config/nios2/lib2-divmod.c \
++ $(srcdir)/config/nios2/lib2-divmod-hi.c \
++ $(srcdir)/config/nios2/lib2-divtable.c \
++ $(srcdir)/config/nios2/lib2-mul.c
++
++##
++## Floating Point Emulation
++## To have GCC include software floating point libraries in libgcc.a define FPBIT
++## and DPBIT along with a few rules as follows:
++##
++## # We want fine grained libraries, so use the new code
++## # to build the floating point emulation libraries.
++FPBIT=$(srcdir)/config/nios2/nios2-fp-bit.c
++DPBIT=$(srcdir)/config/nios2/nios2-dp-bit.c
++
++TARGET_LIBGCC2_CFLAGS = -O2
++
++# FLOAT_ONLY - no doubles
++# SMALL_MACHINE - QI/HI is faster than SI
++# Actually SMALL_MACHINE uses chars and shorts instead of ints
++# since ints (16-bit ones as they are today) are at least as fast
++# as chars and shorts, don't define SMALL_MACHINE
++# CMPtype - type returned by FP compare, i.e. INT (hard coded in fp-bit - see code )
++
++$(FPBIT): $(srcdir)/config/fp-bit.c Makefile
++ echo '#define FLOAT' > ${FPBIT}
++ cat $(srcdir)/config/fp-bit.c >> ${FPBIT}
++
++$(DPBIT): $(srcdir)/config/fp-bit.c Makefile
++ echo '' > ${DPBIT}
++ cat $(srcdir)/config/fp-bit.c >> ${DPBIT}
++
++EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
++
++# Assemble startup files.
++$(T)crti.o: $(srcdir)/config/nios2/crti.asm $(GCC_PASSES)
++ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
++ -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/nios2/crti.asm
++
++$(T)crtn.o: $(srcdir)/config/nios2/crtn.asm $(GCC_PASSES)
++ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
++ -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/nios2/crtn.asm
++
++
++## You may need to provide additional #defines at the beginning of
++## fp-bit.c and dp-bit.c to control target endianness and other options
++##
++## CRTSTUFF_T_CFLAGS
++## Special flags used when compiling crtstuff.c. See Initialization.
++##
++## CRTSTUFF_T_CFLAGS_S
++## Special flags used when compiling crtstuff.c for shared linking. Used
++## if you use crtbeginS.o and crtendS.o in EXTRA-PARTS. See Initialization.
++##
++## MULTILIB_OPTIONS
++## For some targets, invoking GCC in different ways produces objects that
++## can not be linked together. For example, for some targets GCC produces
++## both big and little endian code. For these targets, you must arrange
++## for multiple versions of libgcc.a to be compiled, one for each set of
++## incompatible options. When GCC invokes the linker, it arranges to link
++## in the right version of libgcc.a, based on the command line options
++## used.
++## The MULTILIB_OPTIONS macro lists the set of options for which special
++## versions of libgcc.a must be built. Write options that are mutually
++## incompatible side by side, separated by a slash. Write options that may
++## be used together separated by a space. The build procedure will build
++## all combinations of compatible options.
++##
++## For example, if you set MULTILIB_OPTIONS to m68000/m68020 msoft-float,
++## Makefile will build special versions of libgcc.a using the following
++## sets of options: -m68000, -m68020, -msoft-float, -m68000 -msoft-float,
++## and -m68020 -msoft-float.
++
++MULTILIB_OPTIONS = mno-hw-mul mhw-mulx
++
++## MULTILIB_DIRNAMES
++## If MULTILIB_OPTIONS is used, this variable specifies the directory names
++## that should be used to hold the various libraries. Write one element in
++## MULTILIB_DIRNAMES for each element in MULTILIB_OPTIONS. If
++## MULTILIB_DIRNAMES is not used, the default value will be
++## MULTILIB_OPTIONS, with all slashes treated as spaces.
++## For example, if MULTILIB_OPTIONS is set to m68000/m68020 msoft-float,
++## then the default value of MULTILIB_DIRNAMES is m68000 m68020
++## msoft-float. You may specify a different value if you desire a
++## different set of directory names.
++
++# MULTILIB_DIRNAMES =
++
++## MULTILIB_MATCHES
++## Sometimes the same option may be written in two different ways. If an
++## option is listed in MULTILIB_OPTIONS, GCC needs to know about any
++## synonyms. In that case, set MULTILIB_MATCHES to a list of items of the
++## form option=option to describe all relevant synonyms. For example,
++## m68000=mc68000 m68020=mc68020.
++##
++## MULTILIB_EXCEPTIONS
++## Sometimes when there are multiple sets of MULTILIB_OPTIONS being
++## specified, there are combinations that should not be built. In that
++## case, set MULTILIB_EXCEPTIONS to be all of the switch exceptions in
++## shell case syntax that should not be built.
++## For example, in the PowerPC embedded ABI support, it is not desirable to
++## build libraries compiled with the -mcall-aix option and either of the
++## -fleading-underscore or -mlittle options at the same time. Therefore
++## MULTILIB_EXCEPTIONS is set to
++##
++## *mcall-aix/*fleading-underscore* *mlittle/*mcall-aix*
++##
++
++MULTILIB_EXCEPTIONS = *mno-hw-mul/*mhw-mulx*
++
++##
++## MULTILIB_EXTRA_OPTS Sometimes it is desirable that when building
++## multiple versions of libgcc.a certain options should always be passed on
++## to the compiler. In that case, set MULTILIB_EXTRA_OPTS to be the list
++## of options to be used for all builds.
++##
++
+--- gcc-3.4.2/gcc/config.gcc
++++ gcc-3.4.2.nios2/gcc/config.gcc
+@@ -1321,6 +1321,10 @@ m32rle-*-linux*)
+ thread_file='posix'
+ fi
+ ;;
++# JBG
++nios2-*-* | nios2-*-*)
++ tm_file="elfos.h ${tm_file}"
++ ;;
+ # m68hc11 and m68hc12 share the same machine description.
+ m68hc11-*-*|m6811-*-*)
+ tm_file="dbxelf.h elfos.h m68hc11/m68hc11.h"
+--- gcc-3.4.2/gcc/cse.c
++++ gcc-3.4.2.nios2/gcc/cse.c
+@@ -3133,6 +3133,10 @@ find_comparison_args (enum rtx_code code
+ #ifdef FLOAT_STORE_FLAG_VALUE
+ REAL_VALUE_TYPE fsfv;
+ #endif
++#ifdef __nios2__
++ if (p->is_const)
++ break;
++#endif
+
+ /* If the entry isn't valid, skip it. */
+ if (! exp_equiv_p (p->exp, p->exp, 1, 0))
+--- gcc-3.4.2/gcc/doc/extend.texi
++++ gcc-3.4.2.nios2/gcc/doc/extend.texi
+@@ -5636,12 +5636,118 @@ to those machines. Generally these gene
+ instructions, but allow the compiler to schedule those calls.
+
+ @menu
++* Altera Nios II Built-in Functions::
+ * Alpha Built-in Functions::
+ * ARM Built-in Functions::
+ * X86 Built-in Functions::
+ * PowerPC AltiVec Built-in Functions::
+ @end menu
+
++@node Altera Nios II Built-in Functions
++@subsection Altera Nios II Built-in Functions
++
++These built-in functions are available for the Altera Nios II
++family of processors.
++
++The following built-in functions are always available. They
++all generate the machine instruction that is part of the name.
++
++@example
++int __builtin_ldbio (volatile const void *)
++int __builtin_ldbuio (volatile const void *)
++int __builtin_ldhio (volatile const void *)
++int __builtin_ldhuio (volatile const void *)
++int __builtin_ldwio (volatile const void *)
++void __builtin_stbio (volatile void *, int)
++void __builtin_sthio (volatile void *, int)
++void __builtin_stwio (volatile void *, int)
++void __builtin_sync (void)
++int __builtin_rdctl (int)
++void __builtin_wrctl (int, int)
++@end example
++
++The following built-in functions are always available. They
++all generate a Nios II Custom Instruction. The name of the
++function represents the types that the function takes and
++returns. The letter before the @code{n} is the return type
++or void if absent. The @code{n} represnts the first parameter
++to all the custom instructions, the custom instruction number.
++The two letters after the @code{n} represent the up to two
++parameters to the function.
++
++The letters reprsent the following data types:
++@table @code
++@item <no letter>
++@code{void} for return type and no parameter for parameter types.
++
++@item i
++@code{int} for return type and parameter type
++
++@item f
++@code{float} for return type and parameter type
++
++@item p
++@code{void *} for return type and parameter type
++
++@end table
++
++And the function names are:
++@example
++void __builtin_custom_n (void)
++void __builtin_custom_ni (int)
++void __builtin_custom_nf (float)
++void __builtin_custom_np (void *)
++void __builtin_custom_nii (int, int)
++void __builtin_custom_nif (int, float)
++void __builtin_custom_nip (int, void *)
++void __builtin_custom_nfi (float, int)
++void __builtin_custom_nff (float, float)
++void __builtin_custom_nfp (float, void *)
++void __builtin_custom_npi (void *, int)
++void __builtin_custom_npf (void *, float)
++void __builtin_custom_npp (void *, void *)
++int __builtin_custom_in (void)
++int __builtin_custom_ini (int)
++int __builtin_custom_inf (float)
++int __builtin_custom_inp (void *)
++int __builtin_custom_inii (int, int)
++int __builtin_custom_inif (int, float)
++int __builtin_custom_inip (int, void *)
++int __builtin_custom_infi (float, int)
++int __builtin_custom_inff (float, float)
++int __builtin_custom_infp (float, void *)
++int __builtin_custom_inpi (void *, int)
++int __builtin_custom_inpf (void *, float)
++int __builtin_custom_inpp (void *, void *)
++float __builtin_custom_fn (void)
++float __builtin_custom_fni (int)
++float __builtin_custom_fnf (float)
++float __builtin_custom_fnp (void *)
++float __builtin_custom_fnii (int, int)
++float __builtin_custom_fnif (int, float)
++float __builtin_custom_fnip (int, void *)
++float __builtin_custom_fnfi (float, int)
++float __builtin_custom_fnff (float, float)
++float __builtin_custom_fnfp (float, void *)
++float __builtin_custom_fnpi (void *, int)
++float __builtin_custom_fnpf (void *, float)
++float __builtin_custom_fnpp (void *, void *)
++void * __builtin_custom_pn (void)
++void * __builtin_custom_pni (int)
++void * __builtin_custom_pnf (float)
++void * __builtin_custom_pnp (void *)
++void * __builtin_custom_pnii (int, int)
++void * __builtin_custom_pnif (int, float)
++void * __builtin_custom_pnip (int, void *)
++void * __builtin_custom_pnfi (float, int)
++void * __builtin_custom_pnff (float, float)
++void * __builtin_custom_pnfp (float, void *)
++void * __builtin_custom_pnpi (void *, int)
++void * __builtin_custom_pnpf (void *, float)
++void * __builtin_custom_pnpp (void *, void *)
++@end example
++
++
+ @node Alpha Built-in Functions
+ @subsection Alpha Built-in Functions
+
+--- gcc-3.4.2/gcc/doc/invoke.texi
++++ gcc-3.4.2.nios2/gcc/doc/invoke.texi
+@@ -337,6 +337,14 @@ in the following sections.
+ @item Machine Dependent Options
+ @xref{Submodel Options,,Hardware Models and Configurations}.
+
++@emph{Altera Nios II Options}
++@gccoptlist{-msmallc -mno-bypass-cache -mbypass-cache @gol
++-mno-cache-volatile -mcache-volatile -mno-inline-memcpy @gol
++-minline-memcpy -mno-fast-sw-div -mfast-sw-div @gol
++-mhw-mul -mno-hw-mul -mhw-mulx -mno-hw-mulx @gol
++-mno-hw-div -mhw-div @gol
++-msys-crt0= -msys-lib= -msys=nosys }
++
+ @emph{M680x0 Options}
+ @gccoptlist{-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol
+ -m68060 -mcpu32 -m5200 -m68881 -mbitfield -mc68000 -mc68020 @gol
+@@ -5836,6 +5844,7 @@ machine description. The default for th
+ that macro, which enables you to change the defaults.
+
+ @menu
++* Altera Nios II Options::
+ * M680x0 Options::
+ * M68hc1x Options::
+ * VAX Options::
+@@ -5871,6 +5880,103 @@ that macro, which enables you to change
+ * FRV Options::
+ @end menu
+
++
++@node Altera Nios II Options
++@subsection Altera Nios II Options
++@cindex Altera Nios II options
++
++These are the @samp{-m} options defined for the Altera Nios II
++processor.
++
++@table @gcctabopt
++
++@item -msmallc
++@opindex msmallc
++
++Link with a limited version of the C library, -lsmallc. For more
++information see the C Library Documentation.
++
++
++@item -mbypass-cache
++@itemx -mno-bypass-cache
++@opindex mno-bypass-cache
++@opindex mbypass-cache
++
++Force all load and store instructions to always bypass cache by
++using io variants of the instructions. The default is to not
++bypass the cache.
++
++@item -mno-cache-volatile
++@itemx -mcache-volatile
++@opindex mcache-volatile
++@opindex mno-cache-volatile
++
++Volatile memory access bypass the cache using the io variants of
++the ld and st instructions. The default is to cache volatile
++accesses.
++
++-mno-cache-volatile is deprecated and will be deleted in a
++future GCC release.
++
++
++@item -mno-inline-memcpy
++@itemx -minline-memcpy
++@opindex mno-inline-memcpy
++@opindex minline-memcpy
++
++Do not inline memcpy. The default is to inline when -O is on.
++
++
++@item -mno-fast-sw-div
++@itemx -mfast-sw-div
++@opindex mno-fast-sw-div
++@opindex mfast-sw-div
++
++Do no use table based fast divide for small numbers. The default
++is to use the fast divide at -O3 and above.
++
++
++@item -mno-hw-mul
++@itemx -mhw-mul
++@itemx -mno-hw-mulx
++@itemx -mhw-mulx
++@itemx -mno-hw-div
++@itemx -mhw-div
++@opindex mno-hw-mul
++@opindex mhw-mul
++@opindex mno-hw-mulx
++@opindex mhw-mulx
++@opindex mno-hw-div
++@opindex mhw-div
++
++Enable or disable emitting @code{mul}, @code{mulx} and @code{div} family of
++instructions by the compiler. The default is to emit @code{mul}
++and not emit @code{div} and @code{mulx}.
++
++The different combinations of @code{mul} and @code{mulx} instructions
++generate a different multilib options.
++
++
++@item -msys-crt0=@var{startfile}
++@opindex msys-crt0
++
++@var{startfile} is the file name of the startfile (crt0) to use
++when linking. The default is crt0.o that comes with libgloss
++and is only suitable for use with the instruction set
++simulator.
++
++@item -msys-lib=@var{systemlib}
++@itemx -msys-lib=nosys
++@opindex msys-lib
++
++@var{systemlib} is the library name of the library which provides
++the system calls required by the C library, e.g. @code{read}, @code{write}
++etc. The default is to use nosys, this library provides
++stub implementations of the calls and is part of libgloss.
++
++@end table
++
++
+ @node M680x0 Options
+ @subsection M680x0 Options
+ @cindex M680x0 options
+--- gcc-3.4.2/gcc/doc/md.texi
++++ gcc-3.4.2.nios2/gcc/doc/md.texi
+@@ -1335,6 +1335,49 @@ However, here is a summary of the machin
+ available on some particular machines.
+
+ @table @emph
++
++@item Altera Nios II family---@file{nios2.h}
++@table @code
++
++@item I
++Integer that is valid as an immediate operand in an
++instruction taking a signed 16-bit number. Range
++@minus{}32768 to 32767.
++
++@item J
++Integer that is valid as an immediate operand in an
++instruction taking an unsigned 16-bit number. Range
++0 to 65535.
++
++@item K
++Integer that is valid as an immediate operand in an
++instruction taking only the upper 16-bits of a
++32-bit number. Range 32-bit numbers with the lower
++16-bits being 0.
++
++@item L
++Integer that is valid as an immediate operand for a
++shift instruction. Range 0 to 31.
++
++
++@item M
++Integer that is valid as an immediate operand for
++only the value 0. Can be used in conjunction with
++the format modifier @code{z} to use @code{r0}
++instead of @code{0} in the assembly output.
++
++@item N
++Integer that is valid as an immediate operand for
++a custom instruction opcode. Range 0 to 255.
++
++@item S
++Matches immediates which are addresses in the small
++data section and therefore can be added to @code{gp}
++as a 16-bit immediate to re-create their 32-bit value.
++
++@end table
++
++
+ @item ARM family---@file{arm.h}
+ @table @code
+ @item f
--- /dev/null
+--- gcc-3.4.3/gcc/Makefile.in
++++ gcc-3.4.3-nios2/gcc/Makefile.in
+@@ -3085,7 +3085,7 @@ install-mkheaders: stmp-int-hdrs $(STMP_
+ $(INSTALL_DATA) $(srcdir)/README-fixinc \
+ $(DESTDIR)$(itoolsdatadir)/include/README ; \
+ $(INSTALL_SCRIPT) fixinc.sh $(DESTDIR)$(itoolsdir)/fixinc.sh ; \
+- $(INSTALL_PROGRAM) fixinc/fixincl $(DESTDIR)$(itoolsdir)/fixincl ; \
++ $(INSTALL_PROGRAM) fixinc/fixincl$(build_exeext) $(DESTDIR)$(itoolsdir)/fixincl$(build_exeext) ; \
+ $(INSTALL_DATA) $(srcdir)/gsyslimits.h \
+ $(DESTDIR)$(itoolsdatadir)/gsyslimits.h ; \
+ else :; fi
+--- gcc-3.4.3/gcc/combine.c
++++ gcc-3.4.3-nios2/gcc/combine.c
+@@ -4380,6 +4380,14 @@ combine_simplify_rtx (rtx x, enum machin
+ mode);
+ }
+
++#ifndef __nios2__
++/* This screws up Nios II in this test case:
++
++if (x & 1)
++ return 2;
++else
++ return 3;
++*/
+ else if (STORE_FLAG_VALUE == 1
+ && new_code == EQ && GET_MODE_CLASS (mode) == MODE_INT
+ && op1 == const0_rtx
+@@ -4391,6 +4399,7 @@ combine_simplify_rtx (rtx x, enum machin
+ gen_lowpart_for_combine (mode, op0),
+ const1_rtx);
+ }
++#endif
+
+ else if (STORE_FLAG_VALUE == 1
+ && new_code == EQ && GET_MODE_CLASS (mode) == MODE_INT
+--- gcc-3.4.3/gcc/config/nios2/crti.asm
++++ gcc-3.4.3-nios2/gcc/config/nios2/crti.asm
+@@ -0,0 +1,88 @@
++/*
++ Copyright (C) 2003
++ by Jonah Graham (jgraham@altera.com)
++
++This file is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 2, or (at your option) any
++later version.
++
++In addition to the permissions in the GNU General Public License, the
++Free Software Foundation gives you unlimited permission to link the
++compiled version of this file with other programs, and to distribute
++those programs without any restriction coming from the use of this
++file. (The General Public License restrictions do apply in other
++respects; for example, they cover modification of the file, and
++distribution when not linked into another program.)
++
++This file is distributed in the hope that it will be useful, but
++WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA.
++
++ As a special exception, if you link this library with files
++ compiled with GCC to produce an executable, this does not cause
++ the resulting executable to be covered by the GNU General Public License.
++ This exception does not however invalidate any other reasons why
++ the executable file might be covered by the GNU General Public License.
++
++
++This file just make a stack frame for the contents of the .fini and
++.init sections. Users may put any desired instructions in those
++sections.
++
++
++While technically any code can be put in the init and fini sections
++most stuff will not work other than stuff which obeys the call frame
++and ABI. All the call-preserved registers are saved, the call clobbered
++registers should have been saved by the code calling init and fini.
++
++See crtstuff.c for an example of code that inserts itself in the
++init and fini sections.
++
++See crt0.s for the code that calls init and fini.
++*/
++
++ .file "crti.asm"
++
++ .section ".init"
++ .align 2
++ .global _init
++_init:
++ addi sp, sp, -48
++ stw ra, 44(sp)
++ stw r23, 40(sp)
++ stw r22, 36(sp)
++ stw r21, 32(sp)
++ stw r20, 28(sp)
++ stw r19, 24(sp)
++ stw r18, 20(sp)
++ stw r17, 16(sp)
++ stw r16, 12(sp)
++ stw fp, 8(sp)
++ mov fp, sp
++
++
++ .section ".fini"
++ .align 2
++ .global _fini
++_fini:
++ addi sp, sp, -48
++ stw ra, 44(sp)
++ stw r23, 40(sp)
++ stw r22, 36(sp)
++ stw r21, 32(sp)
++ stw r20, 28(sp)
++ stw r19, 24(sp)
++ stw r18, 20(sp)
++ stw r17, 16(sp)
++ stw r16, 12(sp)
++ stw fp, 8(sp)
++ mov fp, sp
++
++
+--- gcc-3.4.3/gcc/config/nios2/crtn.asm
++++ gcc-3.4.3-nios2/gcc/config/nios2/crtn.asm
+@@ -0,0 +1,70 @@
++/*
++ Copyright (C) 2003
++ by Jonah Graham (jgraham@altera.com)
++
++This file is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 2, or (at your option) any
++later version.
++
++In addition to the permissions in the GNU General Public License, the
++Free Software Foundation gives you unlimited permission to link the
++compiled version of this file with other programs, and to distribute
++those programs without any restriction coming from the use of this
++file. (The General Public License restrictions do apply in other
++respects; for example, they cover modification of the file, and
++distribution when not linked into another program.)
++
++This file is distributed in the hope that it will be useful, but
++WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA.
++
++ As a special exception, if you link this library with files
++ compiled with GCC to produce an executable, this does not cause
++ the resulting executable to be covered by the GNU General Public License.
++ This exception does not however invalidate any other reasons why
++ the executable file might be covered by the GNU General Public License.
++
++
++This file just makes sure that the .fini and .init sections do in
++fact return. Users may put any desired instructions in those sections.
++This file is the last thing linked into any executable.
++*/
++ .file "crtn.asm"
++
++
++
++ .section ".init"
++ ldw ra, 44(sp)
++ ldw r23, 40(sp)
++ ldw r22, 36(sp)
++ ldw r21, 32(sp)
++ ldw r20, 28(sp)
++ ldw r19, 24(sp)
++ ldw r18, 20(sp)
++ ldw r17, 16(sp)
++ ldw r16, 12(sp)
++ ldw fp, 8(sp)
++ addi sp, sp, -48
++ ret
++
++ .section ".fini"
++ ldw ra, 44(sp)
++ ldw r23, 40(sp)
++ ldw r22, 36(sp)
++ ldw r21, 32(sp)
++ ldw r20, 28(sp)
++ ldw r19, 24(sp)
++ ldw r18, 20(sp)
++ ldw r17, 16(sp)
++ ldw r16, 12(sp)
++ ldw fp, 8(sp)
++ addi sp, sp, -48
++ ret
++
+--- gcc-3.4.3/gcc/config/nios2/lib2-divmod-hi.c
++++ gcc-3.4.3-nios2/gcc/config/nios2/lib2-divmod-hi.c
+@@ -0,0 +1,123 @@
++
++/* We include auto-host.h here to get HAVE_GAS_HIDDEN. This is
++ supposedly valid even though this is a "target" file. */
++#include "auto-host.h"
++
++
++#include "tconfig.h"
++#include "tsystem.h"
++#include "coretypes.h"
++#include "tm.h"
++
++
++/* Don't use `fancy_abort' here even if config.h says to use it. */
++#ifdef abort
++#undef abort
++#endif
++
++
++#ifdef HAVE_GAS_HIDDEN
++#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__ ("hidden")))
++#else
++#define ATTRIBUTE_HIDDEN
++#endif
++
++#include "libgcc2.h"
++
++extern HItype __modhi3 (HItype, HItype);
++extern HItype __divhi3 (HItype, HItype);
++extern HItype __umodhi3 (HItype, HItype);
++extern HItype __udivhi3 (HItype, HItype);
++
++static UHItype udivmodhi4(UHItype, UHItype, word_type);
++
++static UHItype
++udivmodhi4(UHItype num, UHItype den, word_type modwanted)
++{
++ UHItype bit = 1;
++ UHItype res = 0;
++
++ while (den < num && bit && !(den & (1L<<15)))
++ {
++ den <<=1;
++ bit <<=1;
++ }
++ while (bit)
++ {
++ if (num >= den)
++ {
++ num -= den;
++ res |= bit;
++ }
++ bit >>=1;
++ den >>=1;
++ }
++ if (modwanted) return num;
++ return res;
++}
++
++
++HItype
++__divhi3 (HItype a, HItype b)
++{
++ word_type neg = 0;
++ HItype res;
++
++ if (a < 0)
++ {
++ a = -a;
++ neg = !neg;
++ }
++
++ if (b < 0)
++ {
++ b = -b;
++ neg = !neg;
++ }
++
++ res = udivmodhi4 (a, b, 0);
++
++ if (neg)
++ res = -res;
++
++ return res;
++}
++
++
++HItype
++__modhi3 (HItype a, HItype b)
++{
++ word_type neg = 0;
++ HItype res;
++
++ if (a < 0)
++ {
++ a = -a;
++ neg = 1;
++ }
++
++ if (b < 0)
++ b = -b;
++
++ res = udivmodhi4 (a, b, 1);
++
++ if (neg)
++ res = -res;
++
++ return res;
++}
++
++
++HItype
++__udivhi3 (HItype a, HItype b)
++{
++ return udivmodhi4 (a, b, 0);
++}
++
++
++HItype
++__umodhi3 (HItype a, HItype b)
++{
++ return udivmodhi4 (a, b, 1);
++}
++
+--- gcc-3.4.3/gcc/config/nios2/lib2-divmod.c
++++ gcc-3.4.3-nios2/gcc/config/nios2/lib2-divmod.c
+@@ -0,0 +1,126 @@
++
++/* We include auto-host.h here to get HAVE_GAS_HIDDEN. This is
++ supposedly valid even though this is a "target" file. */
++#include "auto-host.h"
++
++
++#include "tconfig.h"
++#include "tsystem.h"
++#include "coretypes.h"
++#include "tm.h"
++
++
++/* Don't use `fancy_abort' here even if config.h says to use it. */
++#ifdef abort
++#undef abort
++#endif
++
++
++#ifdef HAVE_GAS_HIDDEN
++#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__ ("hidden")))
++#else
++#define ATTRIBUTE_HIDDEN
++#endif
++
++#include "libgcc2.h"
++
++extern SItype __modsi3 (SItype, SItype);
++extern SItype __divsi3 (SItype, SItype);
++extern SItype __umodsi3 (SItype, SItype);
++extern SItype __udivsi3 (SItype, SItype);
++
++static USItype udivmodsi4(USItype, USItype, word_type);
++
++/* 16-bit SI divide and modulo as used in NIOS */
++
++
++static USItype
++udivmodsi4(USItype num, USItype den, word_type modwanted)
++{
++ USItype bit = 1;
++ USItype res = 0;
++
++ while (den < num && bit && !(den & (1L<<31)))
++ {
++ den <<=1;
++ bit <<=1;
++ }
++ while (bit)
++ {
++ if (num >= den)
++ {
++ num -= den;
++ res |= bit;
++ }
++ bit >>=1;
++ den >>=1;
++ }
++ if (modwanted) return num;
++ return res;
++}
++
++
++SItype
++__divsi3 (SItype a, SItype b)
++{
++ word_type neg = 0;
++ SItype res;
++
++ if (a < 0)
++ {
++ a = -a;
++ neg = !neg;
++ }
++
++ if (b < 0)
++ {
++ b = -b;
++ neg = !neg;
++ }
++
++ res = udivmodsi4 (a, b, 0);
++
++ if (neg)
++ res = -res;
++
++ return res;
++}
++
++
++SItype
++__modsi3 (SItype a, SItype b)
++{
++ word_type neg = 0;
++ SItype res;
++
++ if (a < 0)
++ {
++ a = -a;
++ neg = 1;
++ }
++
++ if (b < 0)
++ b = -b;
++
++ res = udivmodsi4 (a, b, 1);
++
++ if (neg)
++ res = -res;
++
++ return res;
++}
++
++
++SItype
++__udivsi3 (SItype a, SItype b)
++{
++ return udivmodsi4 (a, b, 0);
++}
++
++
++SItype
++__umodsi3 (SItype a, SItype b)
++{
++ return udivmodsi4 (a, b, 1);
++}
++
+--- gcc-3.4.3/gcc/config/nios2/lib2-divtable.c
++++ gcc-3.4.3-nios2/gcc/config/nios2/lib2-divtable.c
+@@ -0,0 +1,46 @@
++
++/* We include auto-host.h here to get HAVE_GAS_HIDDEN. This is
++ supposedly valid even though this is a "target" file. */
++#include "auto-host.h"
++
++
++#include "tconfig.h"
++#include "tsystem.h"
++#include "coretypes.h"
++#include "tm.h"
++
++
++/* Don't use `fancy_abort' here even if config.h says to use it. */
++#ifdef abort
++#undef abort
++#endif
++
++
++#ifdef HAVE_GAS_HIDDEN
++#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__ ("hidden")))
++#else
++#define ATTRIBUTE_HIDDEN
++#endif
++
++#include "libgcc2.h"
++
++UQItype __divsi3_table[] =
++{
++ 0, 0/1, 0/2, 0/3, 0/4, 0/5, 0/6, 0/7, 0/8, 0/9, 0/10, 0/11, 0/12, 0/13, 0/14, 0/15,
++ 0, 1/1, 1/2, 1/3, 1/4, 1/5, 1/6, 1/7, 1/8, 1/9, 1/10, 1/11, 1/12, 1/13, 1/14, 1/15,
++ 0, 2/1, 2/2, 2/3, 2/4, 2/5, 2/6, 2/7, 2/8, 2/9, 2/10, 2/11, 2/12, 2/13, 2/14, 2/15,
++ 0, 3/1, 3/2, 3/3, 3/4, 3/5, 3/6, 3/7, 3/8, 3/9, 3/10, 3/11, 3/12, 3/13, 3/14, 3/15,
++ 0, 4/1, 4/2, 4/3, 4/4, 4/5, 4/6, 4/7, 4/8, 4/9, 4/10, 4/11, 4/12, 4/13, 4/14, 4/15,
++ 0, 5/1, 5/2, 5/3, 5/4, 5/5, 5/6, 5/7, 5/8, 5/9, 5/10, 5/11, 5/12, 5/13, 5/14, 5/15,
++ 0, 6/1, 6/2, 6/3, 6/4, 6/5, 6/6, 6/7, 6/8, 6/9, 6/10, 6/11, 6/12, 6/13, 6/14, 6/15,
++ 0, 7/1, 7/2, 7/3, 7/4, 7/5, 7/6, 7/7, 7/8, 7/9, 7/10, 7/11, 7/12, 7/13, 7/14, 7/15,
++ 0, 8/1, 8/2, 8/3, 8/4, 8/5, 8/6, 8/7, 8/8, 8/9, 8/10, 8/11, 8/12, 8/13, 8/14, 8/15,
++ 0, 9/1, 9/2, 9/3, 9/4, 9/5, 9/6, 9/7, 9/8, 9/9, 9/10, 9/11, 9/12, 9/13, 9/14, 9/15,
++ 0, 10/1, 10/2, 10/3, 10/4, 10/5, 10/6, 10/7, 10/8, 10/9, 10/10, 10/11, 10/12, 10/13, 10/14, 10/15,
++ 0, 11/1, 11/2, 11/3, 11/4, 11/5, 11/6, 11/7, 11/8, 11/9, 11/10, 11/11, 11/12, 11/13, 11/14, 11/15,
++ 0, 12/1, 12/2, 12/3, 12/4, 12/5, 12/6, 12/7, 12/8, 12/9, 12/10, 12/11, 12/12, 12/13, 12/14, 12/15,
++ 0, 13/1, 13/2, 13/3, 13/4, 13/5, 13/6, 13/7, 13/8, 13/9, 13/10, 13/11, 13/12, 13/13, 13/14, 13/15,
++ 0, 14/1, 14/2, 14/3, 14/4, 14/5, 14/6, 14/7, 14/8, 14/9, 14/10, 14/11, 14/12, 14/13, 14/14, 14/15,
++ 0, 15/1, 15/2, 15/3, 15/4, 15/5, 15/6, 15/7, 15/8, 15/9, 15/10, 15/11, 15/12, 15/13, 15/14, 15/15,
++};
++
+--- gcc-3.4.3/gcc/config/nios2/lib2-mul.c
++++ gcc-3.4.3-nios2/gcc/config/nios2/lib2-mul.c
+@@ -0,0 +1,103 @@
++/* while we are debugging (ie compile outside of gcc build)
++ disable gcc specific headers */
++#ifndef DEBUG_MULSI3
++
++
++/* We include auto-host.h here to get HAVE_GAS_HIDDEN. This is
++ supposedly valid even though this is a "target" file. */
++#include "auto-host.h"
++
++
++#include "tconfig.h"
++#include "tsystem.h"
++#include "coretypes.h"
++#include "tm.h"
++
++
++/* Don't use `fancy_abort' here even if config.h says to use it. */
++#ifdef abort
++#undef abort
++#endif
++
++
++#ifdef HAVE_GAS_HIDDEN
++#define ATTRIBUTE_HIDDEN __attribute__ ((__visibility__ ("hidden")))
++#else
++#define ATTRIBUTE_HIDDEN
++#endif
++
++#include "libgcc2.h"
++
++#else
++#define SItype int
++#define USItype unsigned int
++#endif
++
++
++extern SItype __mulsi3 (SItype, SItype);
++
++SItype
++__mulsi3 (SItype a, SItype b)
++{
++ SItype res = 0;
++ USItype cnt = a;
++
++ while (cnt)
++ {
++ if (cnt & 1)
++ {
++ res += b;
++ }
++ b <<= 1;
++ cnt >>= 1;
++ }
++
++ return res;
++}
++/*
++TODO: Choose best alternative implementation.
++
++SItype
++__divsi3 (SItype a, SItype b)
++{
++ SItype res = 0;
++ USItype cnt = 0;
++
++ while (cnt < 32)
++ {
++ if (a & (1L << cnt))
++ {
++ res += b;
++ }
++ b <<= 1;
++ cnt++;
++ }
++
++ return res;
++}
++*/
++
++
++#ifdef DEBUG_MULSI3
++
++int
++main ()
++{
++ int i, j;
++ int error = 0;
++
++ for (i = -1000; i < 1000; i++)
++ for (j = -1000; j < 1000; j++)
++ {
++ int expect = i * j;
++ int actual = A__divsi3 (i, j);
++ if (expect != actual)
++ {
++ printf ("error: %d * %d = %d not %d\n", i, j, expect, actual);
++ error = 1;
++ }
++ }
++
++ return error;
++}
++#endif
+--- gcc-3.4.3/gcc/config/nios2/nios2-dp-bit.c
++++ gcc-3.4.3-nios2/gcc/config/nios2/nios2-dp-bit.c
+@@ -0,0 +1,1652 @@
++
++/* This is a software floating point library which can be used
++ for targets without hardware floating point.
++ Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2004
++ Free Software Foundation, Inc.
++
++This file is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 2, or (at your option) any
++later version.
++
++In addition to the permissions in the GNU General Public License, the
++Free Software Foundation gives you unlimited permission to link the
++compiled version of this file with other programs, and to distribute
++those programs without any restriction coming from the use of this
++file. (The General Public License restrictions do apply in other
++respects; for example, they cover modification of the file, and
++distribution when not linked into another program.)
++
++This file is distributed in the hope that it will be useful, but
++WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++/* As a special exception, if you link this library with other files,
++ some of which are compiled with GCC, to produce an executable,
++ this library does not by itself cause the resulting executable
++ to be covered by the GNU General Public License.
++ This exception does not however invalidate any other reasons why
++ the executable file might be covered by the GNU General Public License. */
++
++/* This implements IEEE 754 format arithmetic, but does not provide a
++ mechanism for setting the rounding mode, or for generating or handling
++ exceptions.
++
++ The original code by Steve Chamberlain, hacked by Mark Eichin and Jim
++ Wilson, all of Cygnus Support. */
++
++/* The intended way to use this file is to make two copies, add `#define FLOAT'
++ to one copy, then compile both copies and add them to libgcc.a. */
++
++#include "tconfig.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "config/fp-bit.h"
++
++/* The following macros can be defined to change the behavior of this file:
++ FLOAT: Implement a `float', aka SFmode, fp library. If this is not
++ defined, then this file implements a `double', aka DFmode, fp library.
++ FLOAT_ONLY: Used with FLOAT, to implement a `float' only library, i.e.
++ don't include float->double conversion which requires the double library.
++ This is useful only for machines which can't support doubles, e.g. some
++ 8-bit processors.
++ CMPtype: Specify the type that floating point compares should return.
++ This defaults to SItype, aka int.
++ US_SOFTWARE_GOFAST: This makes all entry points use the same names as the
++ US Software goFast library.
++ _DEBUG_BITFLOAT: This makes debugging the code a little easier, by adding
++ two integers to the FLO_union_type.
++ NO_DENORMALS: Disable handling of denormals.
++ NO_NANS: Disable nan and infinity handling
++ SMALL_MACHINE: Useful when operations on QIs and HIs are faster
++ than on an SI */
++
++/* We don't currently support extended floats (long doubles) on machines
++ without hardware to deal with them.
++
++ These stubs are just to keep the linker from complaining about unresolved
++ references which can be pulled in from libio & libstdc++, even if the
++ user isn't using long doubles. However, they may generate an unresolved
++ external to abort if abort is not used by the function, and the stubs
++ are referenced from within libc, since libgcc goes before and after the
++ system library. */
++
++#ifdef DECLARE_LIBRARY_RENAMES
++ DECLARE_LIBRARY_RENAMES
++#endif
++
++#ifdef EXTENDED_FLOAT_STUBS
++extern void abort (void);
++void __extendsfxf2 (void) { abort(); }
++void __extenddfxf2 (void) { abort(); }
++void __truncxfdf2 (void) { abort(); }
++void __truncxfsf2 (void) { abort(); }
++void __fixxfsi (void) { abort(); }
++void __floatsixf (void) { abort(); }
++void __addxf3 (void) { abort(); }
++void __subxf3 (void) { abort(); }
++void __mulxf3 (void) { abort(); }
++void __divxf3 (void) { abort(); }
++void __negxf2 (void) { abort(); }
++void __eqxf2 (void) { abort(); }
++void __nexf2 (void) { abort(); }
++void __gtxf2 (void) { abort(); }
++void __gexf2 (void) { abort(); }
++void __lexf2 (void) { abort(); }
++void __ltxf2 (void) { abort(); }
++
++void __extendsftf2 (void) { abort(); }
++void __extenddftf2 (void) { abort(); }
++void __trunctfdf2 (void) { abort(); }
++void __trunctfsf2 (void) { abort(); }
++void __fixtfsi (void) { abort(); }
++void __floatsitf (void) { abort(); }
++void __addtf3 (void) { abort(); }
++void __subtf3 (void) { abort(); }
++void __multf3 (void) { abort(); }
++void __divtf3 (void) { abort(); }
++void __negtf2 (void) { abort(); }
++void __eqtf2 (void) { abort(); }
++void __netf2 (void) { abort(); }
++void __gttf2 (void) { abort(); }
++void __getf2 (void) { abort(); }
++void __letf2 (void) { abort(); }
++void __lttf2 (void) { abort(); }
++#else /* !EXTENDED_FLOAT_STUBS, rest of file */
++
++/* IEEE "special" number predicates */
++
++#ifdef NO_NANS
++
++#define nan() 0
++#define isnan(x) 0
++#define isinf(x) 0
++#else
++
++#if defined L_thenan_sf
++const fp_number_type __thenan_sf = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined L_thenan_df
++const fp_number_type __thenan_df = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined L_thenan_tf
++const fp_number_type __thenan_tf = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined TFLOAT
++extern const fp_number_type __thenan_tf;
++#elif defined FLOAT
++extern const fp_number_type __thenan_sf;
++#else
++extern const fp_number_type __thenan_df;
++#endif
++
++INLINE
++static fp_number_type *
++nan (void)
++{
++ /* Discard the const qualifier... */
++#ifdef TFLOAT
++ return (fp_number_type *) (& __thenan_tf);
++#elif defined FLOAT
++ return (fp_number_type *) (& __thenan_sf);
++#else
++ return (fp_number_type *) (& __thenan_df);
++#endif
++}
++
++INLINE
++static int
++isnan ( fp_number_type * x)
++{
++ return x->class == CLASS_SNAN || x->class == CLASS_QNAN;
++}
++
++INLINE
++static int
++isinf ( fp_number_type * x)
++{
++ return x->class == CLASS_INFINITY;
++}
++
++#endif /* NO_NANS */
++
++INLINE
++static int
++iszero ( fp_number_type * x)
++{
++ return x->class == CLASS_ZERO;
++}
++
++INLINE
++static void
++flip_sign ( fp_number_type * x)
++{
++ x->sign = !x->sign;
++}
++
++extern FLO_type pack_d ( fp_number_type * );
++
++#if defined(L_pack_df) || defined(L_pack_sf) || defined(L_pack_tf)
++FLO_type
++pack_d ( fp_number_type * src)
++{
++ FLO_union_type dst;
++ fractype fraction = src->fraction.ll; /* wasn't unsigned before? */
++ int sign = src->sign;
++ int exp = 0;
++
++ if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && (isnan (src) || isinf (src)))
++ {
++ /* We can't represent these values accurately. By using the
++ largest possible magnitude, we guarantee that the conversion
++ of infinity is at least as big as any finite number. */
++ exp = EXPMAX;
++ fraction = ((fractype) 1 << FRACBITS) - 1;
++ }
++ else if (isnan (src))
++ {
++ exp = EXPMAX;
++ if (src->class == CLASS_QNAN || 1)
++ {
++#ifdef QUIET_NAN_NEGATED
++ fraction |= QUIET_NAN - 1;
++#else
++ fraction |= QUIET_NAN;
++#endif
++ }
++ }
++ else if (isinf (src))
++ {
++ exp = EXPMAX;
++ fraction = 0;
++ }
++ else if (iszero (src))
++ {
++ exp = 0;
++ fraction = 0;
++ }
++ else if (fraction == 0)
++ {
++ exp = 0;
++ }
++ else
++ {
++ if (src->normal_exp < NORMAL_EXPMIN)
++ {
++#ifdef NO_DENORMALS
++ /* Go straight to a zero representation if denormals are not
++ supported. The denormal handling would be harmless but
++ isn't unnecessary. */
++ exp = 0;
++ fraction = 0;
++#else /* NO_DENORMALS */
++ /* This number's exponent is too low to fit into the bits
++ available in the number, so we'll store 0 in the exponent and
++ shift the fraction to the right to make up for it. */
++
++ int shift = NORMAL_EXPMIN - src->normal_exp;
++
++ exp = 0;
++
++ if (shift > FRAC_NBITS - NGARDS)
++ {
++ /* No point shifting, since it's more that 64 out. */
++ fraction = 0;
++ }
++ else
++ {
++ int lowbit = (fraction & (((fractype)1 << shift) - 1)) ? 1 : 0;
++ fraction = (fraction >> shift) | lowbit;
++ }
++ if ((fraction & GARDMASK) == GARDMSB)
++ {
++ if ((fraction & (1 << NGARDS)))
++ fraction += GARDROUND + 1;
++ }
++ else
++ {
++ /* Add to the guards to round up. */
++ fraction += GARDROUND;
++ }
++ /* Perhaps the rounding means we now need to change the
++ exponent, because the fraction is no longer denormal. */
++ if (fraction >= IMPLICIT_1)
++ {
++ exp += 1;
++ }
++ fraction >>= NGARDS;
++#endif /* NO_DENORMALS */
++ }
++ else if (!LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS)
++ && src->normal_exp > EXPBIAS)
++ {
++ exp = EXPMAX;
++ fraction = 0;
++ }
++ else
++ {
++ exp = src->normal_exp + EXPBIAS;
++ if (!ROUND_TOWARDS_ZERO)
++ {
++ /* IF the gard bits are the all zero, but the first, then we're
++ half way between two numbers, choose the one which makes the
++ lsb of the answer 0. */
++ if ((fraction & GARDMASK) == GARDMSB)
++ {
++ if (fraction & (1 << NGARDS))
++ fraction += GARDROUND + 1;
++ }
++ else
++ {
++ /* Add a one to the guards to round up */
++ fraction += GARDROUND;
++ }
++ if (fraction >= IMPLICIT_2)
++ {
++ fraction >>= 1;
++ exp += 1;
++ }
++ }
++ fraction >>= NGARDS;
++
++ if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && exp > EXPMAX)
++ {
++ /* Saturate on overflow. */
++ exp = EXPMAX;
++ fraction = ((fractype) 1 << FRACBITS) - 1;
++ }
++ }
++ }
++
++ /* We previously used bitfields to store the number, but this doesn't
++ handle little/big endian systems conveniently, so use shifts and
++ masks */
++#ifdef FLOAT_BIT_ORDER_MISMATCH
++ dst.bits.fraction = fraction;
++ dst.bits.exp = exp;
++ dst.bits.sign = sign;
++#else
++# if defined TFLOAT && defined HALFFRACBITS
++ {
++ halffractype high, low, unity;
++ int lowsign, lowexp;
++
++ unity = (halffractype) 1 << HALFFRACBITS;
++
++ /* Set HIGH to the high double's significand, masking out the implicit 1.
++ Set LOW to the low double's full significand. */
++ high = (fraction >> (FRACBITS - HALFFRACBITS)) & (unity - 1);
++ low = fraction & (unity * 2 - 1);
++
++ /* Get the initial sign and exponent of the low double. */
++ lowexp = exp - HALFFRACBITS - 1;
++ lowsign = sign;
++
++ /* HIGH should be rounded like a normal double, making |LOW| <=
++ 0.5 ULP of HIGH. Assume round-to-nearest. */
++ if (exp < EXPMAX)
++ if (low > unity || (low == unity && (high & 1) == 1))
++ {
++ /* Round HIGH up and adjust LOW to match. */
++ high++;
++ if (high == unity)
++ {
++ /* May make it infinite, but that's OK. */
++ high = 0;
++ exp++;
++ }
++ low = unity * 2 - low;
++ lowsign ^= 1;
++ }
++
++ high |= (halffractype) exp << HALFFRACBITS;
++ high |= (halffractype) sign << (HALFFRACBITS + EXPBITS);
++
++ if (exp == EXPMAX || exp == 0 || low == 0)
++ low = 0;
++ else
++ {
++ while (lowexp > 0 && low < unity)
++ {
++ low <<= 1;
++ lowexp--;
++ }
++
++ if (lowexp <= 0)
++ {
++ halffractype roundmsb, round;
++ int shift;
++
++ shift = 1 - lowexp;
++ roundmsb = (1 << (shift - 1));
++ round = low & ((roundmsb << 1) - 1);
++
++ low >>= shift;
++ lowexp = 0;
++
++ if (round > roundmsb || (round == roundmsb && (low & 1) == 1))
++ {
++ low++;
++ if (low == unity)
++ /* LOW rounds up to the smallest normal number. */
++ lowexp++;
++ }
++ }
++
++ low &= unity - 1;
++ low |= (halffractype) lowexp << HALFFRACBITS;
++ low |= (halffractype) lowsign << (HALFFRACBITS + EXPBITS);
++ }
++ dst.value_raw = ((fractype) high << HALFSHIFT) | low;
++ }
++# else
++ dst.value_raw = fraction & ((((fractype)1) << FRACBITS) - (fractype)1);
++ dst.value_raw |= ((fractype) (exp & ((1 << EXPBITS) - 1))) << FRACBITS;
++ dst.value_raw |= ((fractype) (sign & 1)) << (FRACBITS | EXPBITS);
++# endif
++#endif
++
++#if defined(FLOAT_WORD_ORDER_MISMATCH) && !defined(FLOAT)
++#ifdef TFLOAT
++ {
++ qrtrfractype tmp1 = dst.words[0];
++ qrtrfractype tmp2 = dst.words[1];
++ dst.words[0] = dst.words[3];
++ dst.words[1] = dst.words[2];
++ dst.words[2] = tmp2;
++ dst.words[3] = tmp1;
++ }
++#else
++ {
++ halffractype tmp = dst.words[0];
++ dst.words[0] = dst.words[1];
++ dst.words[1] = tmp;
++ }
++#endif
++#endif
++
++ return dst.value;
++}
++#endif
++
++#if defined(L_unpack_df) || defined(L_unpack_sf) || defined(L_unpack_tf)
++void
++unpack_d (FLO_union_type * src, fp_number_type * dst)
++{
++ /* We previously used bitfields to store the number, but this doesn't
++ handle little/big endian systems conveniently, so use shifts and
++ masks */
++ fractype fraction;
++ int exp;
++ int sign;
++
++#if defined(FLOAT_WORD_ORDER_MISMATCH) && !defined(FLOAT)
++ FLO_union_type swapped;
++
++#ifdef TFLOAT
++ swapped.words[0] = src->words[3];
++ swapped.words[1] = src->words[2];
++ swapped.words[2] = src->words[1];
++ swapped.words[3] = src->words[0];
++#else
++ swapped.words[0] = src->words[1];
++ swapped.words[1] = src->words[0];
++#endif
++ src = &swapped;
++#endif
++
++#ifdef FLOAT_BIT_ORDER_MISMATCH
++ fraction = src->bits.fraction;
++ exp = src->bits.exp;
++ sign = src->bits.sign;
++#else
++# if defined TFLOAT && defined HALFFRACBITS
++ {
++ halffractype high, low;
++
++ high = src->value_raw >> HALFSHIFT;
++ low = src->value_raw & (((fractype)1 << HALFSHIFT) - 1);
++
++ fraction = high & ((((fractype)1) << HALFFRACBITS) - 1);
++ fraction <<= FRACBITS - HALFFRACBITS;
++ exp = ((int)(high >> HALFFRACBITS)) & ((1 << EXPBITS) - 1);
++ sign = ((int)(high >> (((HALFFRACBITS + EXPBITS))))) & 1;
++
++ if (exp != EXPMAX && exp != 0 && low != 0)
++ {
++ int lowexp = ((int)(low >> HALFFRACBITS)) & ((1 << EXPBITS) - 1);
++ int lowsign = ((int)(low >> (((HALFFRACBITS + EXPBITS))))) & 1;
++ int shift;
++ fractype xlow;
++
++ xlow = low & ((((fractype)1) << HALFFRACBITS) - 1);
++ if (lowexp)
++ xlow |= (((halffractype)1) << HALFFRACBITS);
++ else
++ lowexp = 1;
++ shift = (FRACBITS - HALFFRACBITS) - (exp - lowexp);
++ if (shift > 0)
++ xlow <<= shift;
++ else if (shift < 0)
++ xlow >>= -shift;
++ if (sign == lowsign)
++ fraction += xlow;
++ else if (fraction >= xlow)
++ fraction -= xlow;
++ else
++ {
++ /* The high part is a power of two but the full number is lower.
++ This code will leave the implicit 1 in FRACTION, but we'd
++ have added that below anyway. */
++ fraction = (((fractype) 1 << FRACBITS) - xlow) << 1;
++ exp--;
++ }
++ }
++ }
++# else
++ fraction = src->value_raw & ((((fractype)1) << FRACBITS) - 1);
++ exp = ((int)(src->value_raw >> FRACBITS)) & ((1 << EXPBITS) - 1);
++ sign = ((int)(src->value_raw >> (FRACBITS + EXPBITS))) & 1;
++# endif
++#endif
++
++ dst->sign = sign;
++ if (exp == 0)
++ {
++ /* Hmm. Looks like 0 */
++ if (fraction == 0
++#ifdef NO_DENORMALS
++ || 1
++#endif
++ )
++ {
++ /* tastes like zero */
++ dst->class = CLASS_ZERO;
++ }
++ else
++ {
++ /* Zero exponent with nonzero fraction - it's denormalized,
++ so there isn't a leading implicit one - we'll shift it so
++ it gets one. */
++ dst->normal_exp = exp - EXPBIAS + 1;
++ fraction <<= NGARDS;
++
++ dst->class = CLASS_NUMBER;
++#if 1
++ while (fraction < IMPLICIT_1)
++ {
++ fraction <<= 1;
++ dst->normal_exp--;
++ }
++#endif
++ dst->fraction.ll = fraction;
++ }
++ }
++ else if (!LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && exp == EXPMAX)
++ {
++ /* Huge exponent*/
++ if (fraction == 0)
++ {
++ /* Attached to a zero fraction - means infinity */
++ dst->class = CLASS_INFINITY;
++ }
++ else
++ {
++ /* Nonzero fraction, means nan */
++#ifdef QUIET_NAN_NEGATED
++ if ((fraction & QUIET_NAN) == 0)
++#else
++ if (fraction & QUIET_NAN)
++#endif
++ {
++ dst->class = CLASS_QNAN;
++ }
++ else
++ {
++ dst->class = CLASS_SNAN;
++ }
++ /* Keep the fraction part as the nan number */
++ dst->fraction.ll = fraction;
++ }
++ }
++ else
++ {
++ /* Nothing strange about this number */
++ dst->normal_exp = exp - EXPBIAS;
++ dst->class = CLASS_NUMBER;
++ dst->fraction.ll = (fraction << NGARDS) | IMPLICIT_1;
++ }
++}
++#endif /* L_unpack_df || L_unpack_sf */
++
++#if defined(L_addsub_sf) || defined(L_addsub_df) || defined(L_addsub_tf)
++static fp_number_type *
++_fpadd_parts (fp_number_type * a,
++ fp_number_type * b,
++ fp_number_type * tmp)
++{
++ intfrac tfraction;
++
++ /* Put commonly used fields in local variables. */
++ int a_normal_exp;
++ int b_normal_exp;
++ fractype a_fraction;
++ fractype b_fraction;
++
++ if (isnan (a))
++ {
++ return a;
++ }
++ if (isnan (b))
++ {
++ return b;
++ }
++ if (isinf (a))
++ {
++ /* Adding infinities with opposite signs yields a NaN. */
++ if (isinf (b) && a->sign != b->sign)
++ return nan ();
++ return a;
++ }
++ if (isinf (b))
++ {
++ return b;
++ }
++ if (iszero (b))
++ {
++ if (iszero (a))
++ {
++ *tmp = *a;
++ tmp->sign = a->sign & b->sign;
++ return tmp;
++ }
++ return a;
++ }
++ if (iszero (a))
++ {
++ return b;
++ }
++
++ /* Got two numbers. shift the smaller and increment the exponent till
++ they're the same */
++ {
++ int diff;
++
++ a_normal_exp = a->normal_exp;
++ b_normal_exp = b->normal_exp;
++ a_fraction = a->fraction.ll;
++ b_fraction = b->fraction.ll;
++
++ diff = a_normal_exp - b_normal_exp;
++
++ if (diff < 0)
++ diff = -diff;
++ if (diff < FRAC_NBITS)
++ {
++ /* ??? This does shifts one bit at a time. Optimize. */
++ while (a_normal_exp > b_normal_exp)
++ {
++ b_normal_exp++;
++ LSHIFT (b_fraction);
++ }
++ while (b_normal_exp > a_normal_exp)
++ {
++ a_normal_exp++;
++ LSHIFT (a_fraction);
++ }
++ }
++ else
++ {
++ /* Somethings's up.. choose the biggest */
++ if (a_normal_exp > b_normal_exp)
++ {
++ b_normal_exp = a_normal_exp;
++ b_fraction = 0;
++ }
++ else
++ {
++ a_normal_exp = b_normal_exp;
++ a_fraction = 0;
++ }
++ }
++ }
++
++ if (a->sign != b->sign)
++ {
++ if (a->sign)
++ {
++ tfraction = -a_fraction + b_fraction;
++ }
++ else
++ {
++ tfraction = a_fraction - b_fraction;
++ }
++ if (tfraction >= 0)
++ {
++ tmp->sign = 0;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = tfraction;
++ }
++ else
++ {
++ tmp->sign = 1;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = -tfraction;
++ }
++ /* and renormalize it */
++
++ while (tmp->fraction.ll < IMPLICIT_1 && tmp->fraction.ll)
++ {
++ tmp->fraction.ll <<= 1;
++ tmp->normal_exp--;
++ }
++ }
++ else
++ {
++ tmp->sign = a->sign;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = a_fraction + b_fraction;
++ }
++ tmp->class = CLASS_NUMBER;
++ /* Now the fraction is added, we have to shift down to renormalize the
++ number */
++
++ if (tmp->fraction.ll >= IMPLICIT_2)
++ {
++ LSHIFT (tmp->fraction.ll);
++ tmp->normal_exp++;
++ }
++ return tmp;
++
++}
++
++FLO_type
++add (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpadd_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++
++FLO_type
++sub (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ b.sign ^= 1;
++
++ res = _fpadd_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++#endif /* L_addsub_sf || L_addsub_df */
++
++#if defined(L_mul_sf) || defined(L_mul_df) || defined(L_mul_tf)
++static inline __attribute__ ((__always_inline__)) fp_number_type *
++_fpmul_parts ( fp_number_type * a,
++ fp_number_type * b,
++ fp_number_type * tmp)
++{
++ fractype low = 0;
++ fractype high = 0;
++
++ if (isnan (a))
++ {
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (isnan (b))
++ {
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++ if (isinf (a))
++ {
++ if (iszero (b))
++ return nan ();
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (isinf (b))
++ {
++ if (iszero (a))
++ {
++ return nan ();
++ }
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++ if (iszero (a))
++ {
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (iszero (b))
++ {
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++
++ /* Calculate the mantissa by multiplying both numbers to get a
++ twice-as-wide number. */
++ {
++#if defined(NO_DI_MODE) || defined(TFLOAT)
++ {
++ fractype x = a->fraction.ll;
++ fractype ylow = b->fraction.ll;
++ fractype yhigh = 0;
++ int bit;
++
++ /* ??? This does multiplies one bit at a time. Optimize. */
++ for (bit = 0; bit < FRAC_NBITS; bit++)
++ {
++ int carry;
++
++ if (x & 1)
++ {
++ carry = (low += ylow) < ylow;
++ high += yhigh + carry;
++ }
++ yhigh <<= 1;
++ if (ylow & FRACHIGH)
++ {
++ yhigh |= 1;
++ }
++ ylow <<= 1;
++ x >>= 1;
++ }
++ }
++#elif defined(FLOAT)
++ /* Multiplying two USIs to get a UDI, we're safe. */
++ {
++ UDItype answer = (UDItype)a->fraction.ll * (UDItype)b->fraction.ll;
++
++ high = answer >> BITS_PER_SI;
++ low = answer;
++ }
++#else
++ /* fractype is DImode, but we need the result to be twice as wide.
++ Assuming a widening multiply from DImode to TImode is not
++ available, build one by hand. */
++ {
++ USItype nl = a->fraction.ll;
++ USItype nh = a->fraction.ll >> BITS_PER_SI;
++ USItype ml = b->fraction.ll;
++ USItype mh = b->fraction.ll >> BITS_PER_SI;
++ UDItype pp_ll = (UDItype) ml * nl;
++ UDItype pp_hl = (UDItype) mh * nl;
++ UDItype pp_lh = (UDItype) ml * nh;
++ UDItype pp_hh = (UDItype) mh * nh;
++ UDItype res2 = 0;
++ UDItype res0 = 0;
++ UDItype ps_hh__ = pp_hl + pp_lh;
++ if (ps_hh__ < pp_hl)
++ res2 += (UDItype)1 << BITS_PER_SI;
++ pp_hl = (UDItype)(USItype)ps_hh__ << BITS_PER_SI;
++ res0 = pp_ll + pp_hl;
++ if (res0 < pp_ll)
++ res2++;
++ res2 += (ps_hh__ >> BITS_PER_SI) + pp_hh;
++ high = res2;
++ low = res0;
++ }
++#endif
++ }
++
++ tmp->normal_exp = a->normal_exp + b->normal_exp
++ + FRAC_NBITS - (FRACBITS + NGARDS);
++ tmp->sign = a->sign != b->sign;
++ while (high >= IMPLICIT_2)
++ {
++ tmp->normal_exp++;
++ if (high & 1)
++ {
++ low >>= 1;
++ low |= FRACHIGH;
++ }
++ high >>= 1;
++ }
++ while (high < IMPLICIT_1)
++ {
++ tmp->normal_exp--;
++
++ high <<= 1;
++ if (low & FRACHIGH)
++ high |= 1;
++ low <<= 1;
++ }
++ /* rounding is tricky. if we only round if it won't make us round later. */
++#if 0
++ if (low & FRACHIGH2)
++ {
++ if (((high & GARDMASK) != GARDMSB)
++ && (((high + 1) & GARDMASK) == GARDMSB))
++ {
++ /* don't round, it gets done again later. */
++ }
++ else
++ {
++ high++;
++ }
++ }
++#endif
++ if (!ROUND_TOWARDS_ZERO && (high & GARDMASK) == GARDMSB)
++ {
++ if (high & (1 << NGARDS))
++ {
++ /* half way, so round to even */
++ high += GARDROUND + 1;
++ }
++ else if (low)
++ {
++ /* but we really weren't half way */
++ high += GARDROUND + 1;
++ }
++ }
++ tmp->fraction.ll = high;
++ tmp->class = CLASS_NUMBER;
++ return tmp;
++}
++
++FLO_type
++multiply (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpmul_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++#endif /* L_mul_sf || L_mul_df */
++
++#if defined(L_div_sf) || defined(L_div_df) || defined(L_div_tf)
++static inline __attribute__ ((__always_inline__)) fp_number_type *
++_fpdiv_parts (fp_number_type * a,
++ fp_number_type * b)
++{
++ fractype bit;
++ fractype numerator;
++ fractype denominator;
++ fractype quotient;
++
++ if (isnan (a))
++ {
++ return a;
++ }
++ if (isnan (b))
++ {
++ return b;
++ }
++
++ a->sign = a->sign ^ b->sign;
++
++ if (isinf (a) || iszero (a))
++ {
++ if (a->class == b->class)
++ return nan ();
++ return a;
++ }
++
++ if (isinf (b))
++ {
++ a->fraction.ll = 0;
++ a->normal_exp = 0;
++ return a;
++ }
++ if (iszero (b))
++ {
++ a->class = CLASS_INFINITY;
++ return a;
++ }
++
++ /* Calculate the mantissa by multiplying both 64bit numbers to get a
++ 128 bit number */
++ {
++ /* quotient =
++ ( numerator / denominator) * 2^(numerator exponent - denominator exponent)
++ */
++
++ a->normal_exp = a->normal_exp - b->normal_exp;
++ numerator = a->fraction.ll;
++ denominator = b->fraction.ll;
++
++ if (numerator < denominator)
++ {
++ /* Fraction will be less than 1.0 */
++ numerator *= 2;
++ a->normal_exp--;
++ }
++ bit = IMPLICIT_1;
++ quotient = 0;
++ /* ??? Does divide one bit at a time. Optimize. */
++ while (bit)
++ {
++ if (numerator >= denominator)
++ {
++ quotient |= bit;
++ numerator -= denominator;
++ }
++ bit >>= 1;
++ numerator *= 2;
++ }
++
++ if (!ROUND_TOWARDS_ZERO && (quotient & GARDMASK) == GARDMSB)
++ {
++ if (quotient & (1 << NGARDS))
++ {
++ /* half way, so round to even */
++ quotient += GARDROUND + 1;
++ }
++ else if (numerator)
++ {
++ /* but we really weren't half way, more bits exist */
++ quotient += GARDROUND + 1;
++ }
++ }
++
++ a->fraction.ll = quotient;
++ return (a);
++ }
++}
++
++FLO_type
++divide (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpdiv_parts (&a, &b);
++
++ return pack_d (res);
++}
++#endif /* L_div_sf || L_div_df */
++
++#if defined(L_fpcmp_parts_sf) || defined(L_fpcmp_parts_df) \
++ || defined(L_fpcmp_parts_tf)
++/* according to the demo, fpcmp returns a comparison with 0... thus
++ a<b -> -1
++ a==b -> 0
++ a>b -> +1
++ */
++
++int
++__fpcmp_parts (fp_number_type * a, fp_number_type * b)
++{
++#if 0
++ /* either nan -> unordered. Must be checked outside of this routine. */
++ if (isnan (a) && isnan (b))
++ {
++ return 1; /* still unordered! */
++ }
++#endif
++
++ if (isnan (a) || isnan (b))
++ {
++ return 1; /* how to indicate unordered compare? */
++ }
++ if (isinf (a) && isinf (b))
++ {
++ /* +inf > -inf, but +inf != +inf */
++ /* b \a| +inf(0)| -inf(1)
++ ______\+--------+--------
++ +inf(0)| a==b(0)| a<b(-1)
++ -------+--------+--------
++ -inf(1)| a>b(1) | a==b(0)
++ -------+--------+--------
++ So since unordered must be nonzero, just line up the columns...
++ */
++ return b->sign - a->sign;
++ }
++ /* but not both... */
++ if (isinf (a))
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (isinf (b))
++ {
++ return b->sign ? 1 : -1;
++ }
++ if (iszero (a) && iszero (b))
++ {
++ return 0;
++ }
++ if (iszero (a))
++ {
++ return b->sign ? 1 : -1;
++ }
++ if (iszero (b))
++ {
++ return a->sign ? -1 : 1;
++ }
++ /* now both are "normal". */
++ if (a->sign != b->sign)
++ {
++ /* opposite signs */
++ return a->sign ? -1 : 1;
++ }
++ /* same sign; exponents? */
++ if (a->normal_exp > b->normal_exp)
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (a->normal_exp < b->normal_exp)
++ {
++ return a->sign ? 1 : -1;
++ }
++ /* same exponents; check size. */
++ if (a->fraction.ll > b->fraction.ll)
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (a->fraction.ll < b->fraction.ll)
++ {
++ return a->sign ? 1 : -1;
++ }
++ /* after all that, they're equal. */
++ return 0;
++}
++#endif
++
++#if defined(L_compare_sf) || defined(L_compare_df) || defined(L_compoare_tf)
++CMPtype
++compare (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_compare_sf || L_compare_df */
++
++#ifndef US_SOFTWARE_GOFAST
++
++/* These should be optimized for their specific tasks someday. */
++
++#if defined(L_eq_sf) || defined(L_eq_df) || defined(L_eq_tf)
++CMPtype
++_eq_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth == 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_eq_sf || L_eq_df */
++
++#if defined(L_ne_sf) || defined(L_ne_df) || defined(L_ne_tf)
++CMPtype
++_ne_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* true, truth != 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_ne_sf || L_ne_df */
++
++#if defined(L_gt_sf) || defined(L_gt_df) || defined(L_gt_tf)
++CMPtype
++_gt_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return -1; /* false, truth > 0 */
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_gt_sf || L_gt_df */
++
++#if defined(L_ge_sf) || defined(L_ge_df) || defined(L_ge_tf)
++CMPtype
++_ge_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return -1; /* false, truth >= 0 */
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_ge_sf || L_ge_df */
++
++#if defined(L_lt_sf) || defined(L_lt_df) || defined(L_lt_tf)
++CMPtype
++_lt_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth < 0 */
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_lt_sf || L_lt_df */
++
++#if defined(L_le_sf) || defined(L_le_df) || defined(L_le_tf)
++CMPtype
++_le_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth <= 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_le_sf || L_le_df */
++
++#endif /* ! US_SOFTWARE_GOFAST */
++
++#if defined(L_unord_sf) || defined(L_unord_df) || defined(L_unord_tf)
++CMPtype
++_unord_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ return (isnan (&a) || isnan (&b));
++}
++#endif /* L_unord_sf || L_unord_df */
++
++#if defined(L_si_to_sf) || defined(L_si_to_df) || defined(L_si_to_tf)
++FLO_type
++si_to_float (SItype arg_a)
++{
++ fp_number_type in;
++
++ in.class = CLASS_NUMBER;
++ in.sign = arg_a < 0;
++ if (!arg_a)
++ {
++ in.class = CLASS_ZERO;
++ }
++ else
++ {
++ in.normal_exp = FRACBITS + NGARDS;
++ if (in.sign)
++ {
++ /* Special case for minint, since there is no +ve integer
++ representation for it */
++ if (arg_a == (- MAX_SI_INT - 1))
++ {
++ return (FLO_type)(- MAX_SI_INT - 1);
++ }
++ in.fraction.ll = (-arg_a);
++ }
++ else
++ in.fraction.ll = arg_a;
++
++ while (in.fraction.ll < ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll <<= 1;
++ in.normal_exp -= 1;
++ }
++ }
++ return pack_d (&in);
++}
++#endif /* L_si_to_sf || L_si_to_df */
++
++#if defined(L_usi_to_sf) || defined(L_usi_to_df) || defined(L_usi_to_tf)
++FLO_type
++usi_to_float (USItype arg_a)
++{
++ fp_number_type in;
++
++ in.sign = 0;
++ if (!arg_a)
++ {
++ in.class = CLASS_ZERO;
++ }
++ else
++ {
++ in.class = CLASS_NUMBER;
++ in.normal_exp = FRACBITS + NGARDS;
++ in.fraction.ll = arg_a;
++
++ while (in.fraction.ll > ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll >>= 1;
++ in.normal_exp += 1;
++ }
++ while (in.fraction.ll < ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll <<= 1;
++ in.normal_exp -= 1;
++ }
++ }
++ return pack_d (&in);
++}
++#endif
++
++#if defined(L_sf_to_si) || defined(L_df_to_si) || defined(L_tf_to_si)
++SItype
++float_to_si (FLO_type arg_a)
++{
++ fp_number_type a;
++ SItype tmp;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ if (iszero (&a))
++ return 0;
++ if (isnan (&a))
++ return 0;
++ /* get reasonable MAX_SI_INT... */
++ if (isinf (&a))
++ return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
++ /* it is a number, but a small one */
++ if (a.normal_exp < 0)
++ return 0;
++ if (a.normal_exp > BITS_PER_SI - 2)
++ return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
++ tmp = a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
++ return a.sign ? (-tmp) : (tmp);
++}
++#endif /* L_sf_to_si || L_df_to_si */
++
++#if defined(L_sf_to_usi) || defined(L_df_to_usi) || defined(L_tf_to_usi)
++#if defined US_SOFTWARE_GOFAST || defined(L_tf_to_usi)
++/* While libgcc2.c defines its own __fixunssfsi and __fixunsdfsi routines,
++ we also define them for GOFAST because the ones in libgcc2.c have the
++ wrong names and I'd rather define these here and keep GOFAST CYG-LOC's
++ out of libgcc2.c. We can't define these here if not GOFAST because then
++ there'd be duplicate copies. */
++
++USItype
++float_to_usi (FLO_type arg_a)
++{
++ fp_number_type a;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ if (iszero (&a))
++ return 0;
++ if (isnan (&a))
++ return 0;
++ /* it is a negative number */
++ if (a.sign)
++ return 0;
++ /* get reasonable MAX_USI_INT... */
++ if (isinf (&a))
++ return MAX_USI_INT;
++ /* it is a number, but a small one */
++ if (a.normal_exp < 0)
++ return 0;
++ if (a.normal_exp > BITS_PER_SI - 1)
++ return MAX_USI_INT;
++ else if (a.normal_exp > (FRACBITS + NGARDS))
++ return a.fraction.ll << (a.normal_exp - (FRACBITS + NGARDS));
++ else
++ return a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
++}
++#endif /* US_SOFTWARE_GOFAST */
++#endif /* L_sf_to_usi || L_df_to_usi */
++
++#if defined(L_negate_sf) || defined(L_negate_df) || defined(L_negate_tf)
++FLO_type
++negate (FLO_type arg_a)
++{
++ fp_number_type a;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ flip_sign (&a);
++ return pack_d (&a);
++}
++#endif /* L_negate_sf || L_negate_df */
++
++#ifdef FLOAT
++
++#if defined(L_make_sf)
++SFtype
++__make_fp(fp_class_type class,
++ unsigned int sign,
++ int exp,
++ USItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_sf */
++
++#ifndef FLOAT_ONLY
++
++/* This enables one to build an fp library that supports float but not double.
++ Otherwise, we would get an undefined reference to __make_dp.
++ This is needed for some 8-bit ports that can't handle well values that
++ are 8-bytes in size, so we just don't support double for them at all. */
++
++#if defined(L_sf_to_df)
++DFtype
++sf_to_df (SFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_dp (in.class, in.sign, in.normal_exp,
++ ((UDItype) in.fraction.ll) << F_D_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#if defined(L_sf_to_tf) && defined(TMODES)
++TFtype
++sf_to_tf (SFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_tp (in.class, in.sign, in.normal_exp,
++ ((UTItype) in.fraction.ll) << F_T_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#endif /* ! FLOAT_ONLY */
++#endif /* FLOAT */
++
++#ifndef FLOAT
++
++extern SFtype __make_fp (fp_class_type, unsigned int, int, USItype);
++
++#if defined(L_make_df)
++DFtype
++__make_dp (fp_class_type class, unsigned int sign, int exp, UDItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_df */
++
++#if defined(L_df_to_sf)
++SFtype
++df_to_sf (DFtype arg_a)
++{
++ fp_number_type in;
++ USItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> F_D_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((USItype) 1 << F_D_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_fp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_df_to_sf */
++
++#if defined(L_df_to_tf) && defined(TMODES) \
++ && !defined(FLOAT) && !defined(TFLOAT)
++TFtype
++df_to_tf (DFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_tp (in.class, in.sign, in.normal_exp,
++ ((UTItype) in.fraction.ll) << D_T_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#ifdef TFLOAT
++#if defined(L_make_tf)
++TFtype
++__make_tp(fp_class_type class,
++ unsigned int sign,
++ int exp,
++ UTItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_tf */
++
++#if defined(L_tf_to_df)
++DFtype
++tf_to_df (TFtype arg_a)
++{
++ fp_number_type in;
++ UDItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> D_T_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((UTItype) 1 << D_T_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_dp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_tf_to_df */
++
++#if defined(L_tf_to_sf)
++SFtype
++tf_to_sf (TFtype arg_a)
++{
++ fp_number_type in;
++ USItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> F_T_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((UTItype) 1 << F_T_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_fp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_tf_to_sf */
++#endif /* TFLOAT */
++
++#endif /* ! FLOAT */
++#endif /* !EXTENDED_FLOAT_STUBS */
+--- gcc-3.4.3/gcc/config/nios2/nios2-fp-bit.c
++++ gcc-3.4.3-nios2/gcc/config/nios2/nios2-fp-bit.c
+@@ -0,0 +1,1652 @@
++#define FLOAT
++/* This is a software floating point library which can be used
++ for targets without hardware floating point.
++ Copyright (C) 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2004
++ Free Software Foundation, Inc.
++
++This file is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 2, or (at your option) any
++later version.
++
++In addition to the permissions in the GNU General Public License, the
++Free Software Foundation gives you unlimited permission to link the
++compiled version of this file with other programs, and to distribute
++those programs without any restriction coming from the use of this
++file. (The General Public License restrictions do apply in other
++respects; for example, they cover modification of the file, and
++distribution when not linked into another program.)
++
++This file is distributed in the hope that it will be useful, but
++WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with this program; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++/* As a special exception, if you link this library with other files,
++ some of which are compiled with GCC, to produce an executable,
++ this library does not by itself cause the resulting executable
++ to be covered by the GNU General Public License.
++ This exception does not however invalidate any other reasons why
++ the executable file might be covered by the GNU General Public License. */
++
++/* This implements IEEE 754 format arithmetic, but does not provide a
++ mechanism for setting the rounding mode, or for generating or handling
++ exceptions.
++
++ The original code by Steve Chamberlain, hacked by Mark Eichin and Jim
++ Wilson, all of Cygnus Support. */
++
++/* The intended way to use this file is to make two copies, add `#define FLOAT'
++ to one copy, then compile both copies and add them to libgcc.a. */
++
++#include "tconfig.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "config/fp-bit.h"
++
++/* The following macros can be defined to change the behavior of this file:
++ FLOAT: Implement a `float', aka SFmode, fp library. If this is not
++ defined, then this file implements a `double', aka DFmode, fp library.
++ FLOAT_ONLY: Used with FLOAT, to implement a `float' only library, i.e.
++ don't include float->double conversion which requires the double library.
++ This is useful only for machines which can't support doubles, e.g. some
++ 8-bit processors.
++ CMPtype: Specify the type that floating point compares should return.
++ This defaults to SItype, aka int.
++ US_SOFTWARE_GOFAST: This makes all entry points use the same names as the
++ US Software goFast library.
++ _DEBUG_BITFLOAT: This makes debugging the code a little easier, by adding
++ two integers to the FLO_union_type.
++ NO_DENORMALS: Disable handling of denormals.
++ NO_NANS: Disable nan and infinity handling
++ SMALL_MACHINE: Useful when operations on QIs and HIs are faster
++ than on an SI */
++
++/* We don't currently support extended floats (long doubles) on machines
++ without hardware to deal with them.
++
++ These stubs are just to keep the linker from complaining about unresolved
++ references which can be pulled in from libio & libstdc++, even if the
++ user isn't using long doubles. However, they may generate an unresolved
++ external to abort if abort is not used by the function, and the stubs
++ are referenced from within libc, since libgcc goes before and after the
++ system library. */
++
++#ifdef DECLARE_LIBRARY_RENAMES
++ DECLARE_LIBRARY_RENAMES
++#endif
++
++#ifdef EXTENDED_FLOAT_STUBS
++extern void abort (void);
++void __extendsfxf2 (void) { abort(); }
++void __extenddfxf2 (void) { abort(); }
++void __truncxfdf2 (void) { abort(); }
++void __truncxfsf2 (void) { abort(); }
++void __fixxfsi (void) { abort(); }
++void __floatsixf (void) { abort(); }
++void __addxf3 (void) { abort(); }
++void __subxf3 (void) { abort(); }
++void __mulxf3 (void) { abort(); }
++void __divxf3 (void) { abort(); }
++void __negxf2 (void) { abort(); }
++void __eqxf2 (void) { abort(); }
++void __nexf2 (void) { abort(); }
++void __gtxf2 (void) { abort(); }
++void __gexf2 (void) { abort(); }
++void __lexf2 (void) { abort(); }
++void __ltxf2 (void) { abort(); }
++
++void __extendsftf2 (void) { abort(); }
++void __extenddftf2 (void) { abort(); }
++void __trunctfdf2 (void) { abort(); }
++void __trunctfsf2 (void) { abort(); }
++void __fixtfsi (void) { abort(); }
++void __floatsitf (void) { abort(); }
++void __addtf3 (void) { abort(); }
++void __subtf3 (void) { abort(); }
++void __multf3 (void) { abort(); }
++void __divtf3 (void) { abort(); }
++void __negtf2 (void) { abort(); }
++void __eqtf2 (void) { abort(); }
++void __netf2 (void) { abort(); }
++void __gttf2 (void) { abort(); }
++void __getf2 (void) { abort(); }
++void __letf2 (void) { abort(); }
++void __lttf2 (void) { abort(); }
++#else /* !EXTENDED_FLOAT_STUBS, rest of file */
++
++/* IEEE "special" number predicates */
++
++#ifdef NO_NANS
++
++#define nan() 0
++#define isnan(x) 0
++#define isinf(x) 0
++#else
++
++#if defined L_thenan_sf
++const fp_number_type __thenan_sf = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined L_thenan_df
++const fp_number_type __thenan_df = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined L_thenan_tf
++const fp_number_type __thenan_tf = { CLASS_SNAN, 0, 0, {(fractype) 0} };
++#elif defined TFLOAT
++extern const fp_number_type __thenan_tf;
++#elif defined FLOAT
++extern const fp_number_type __thenan_sf;
++#else
++extern const fp_number_type __thenan_df;
++#endif
++
++INLINE
++static fp_number_type *
++nan (void)
++{
++ /* Discard the const qualifier... */
++#ifdef TFLOAT
++ return (fp_number_type *) (& __thenan_tf);
++#elif defined FLOAT
++ return (fp_number_type *) (& __thenan_sf);
++#else
++ return (fp_number_type *) (& __thenan_df);
++#endif
++}
++
++INLINE
++static int
++isnan ( fp_number_type * x)
++{
++ return x->class == CLASS_SNAN || x->class == CLASS_QNAN;
++}
++
++INLINE
++static int
++isinf ( fp_number_type * x)
++{
++ return x->class == CLASS_INFINITY;
++}
++
++#endif /* NO_NANS */
++
++INLINE
++static int
++iszero ( fp_number_type * x)
++{
++ return x->class == CLASS_ZERO;
++}
++
++INLINE
++static void
++flip_sign ( fp_number_type * x)
++{
++ x->sign = !x->sign;
++}
++
++extern FLO_type pack_d ( fp_number_type * );
++
++#if defined(L_pack_df) || defined(L_pack_sf) || defined(L_pack_tf)
++FLO_type
++pack_d ( fp_number_type * src)
++{
++ FLO_union_type dst;
++ fractype fraction = src->fraction.ll; /* wasn't unsigned before? */
++ int sign = src->sign;
++ int exp = 0;
++
++ if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && (isnan (src) || isinf (src)))
++ {
++ /* We can't represent these values accurately. By using the
++ largest possible magnitude, we guarantee that the conversion
++ of infinity is at least as big as any finite number. */
++ exp = EXPMAX;
++ fraction = ((fractype) 1 << FRACBITS) - 1;
++ }
++ else if (isnan (src))
++ {
++ exp = EXPMAX;
++ if (src->class == CLASS_QNAN || 1)
++ {
++#ifdef QUIET_NAN_NEGATED
++ fraction |= QUIET_NAN - 1;
++#else
++ fraction |= QUIET_NAN;
++#endif
++ }
++ }
++ else if (isinf (src))
++ {
++ exp = EXPMAX;
++ fraction = 0;
++ }
++ else if (iszero (src))
++ {
++ exp = 0;
++ fraction = 0;
++ }
++ else if (fraction == 0)
++ {
++ exp = 0;
++ }
++ else
++ {
++ if (src->normal_exp < NORMAL_EXPMIN)
++ {
++#ifdef NO_DENORMALS
++ /* Go straight to a zero representation if denormals are not
++ supported. The denormal handling would be harmless but
++ isn't unnecessary. */
++ exp = 0;
++ fraction = 0;
++#else /* NO_DENORMALS */
++ /* This number's exponent is too low to fit into the bits
++ available in the number, so we'll store 0 in the exponent and
++ shift the fraction to the right to make up for it. */
++
++ int shift = NORMAL_EXPMIN - src->normal_exp;
++
++ exp = 0;
++
++ if (shift > FRAC_NBITS - NGARDS)
++ {
++ /* No point shifting, since it's more that 64 out. */
++ fraction = 0;
++ }
++ else
++ {
++ int lowbit = (fraction & (((fractype)1 << shift) - 1)) ? 1 : 0;
++ fraction = (fraction >> shift) | lowbit;
++ }
++ if ((fraction & GARDMASK) == GARDMSB)
++ {
++ if ((fraction & (1 << NGARDS)))
++ fraction += GARDROUND + 1;
++ }
++ else
++ {
++ /* Add to the guards to round up. */
++ fraction += GARDROUND;
++ }
++ /* Perhaps the rounding means we now need to change the
++ exponent, because the fraction is no longer denormal. */
++ if (fraction >= IMPLICIT_1)
++ {
++ exp += 1;
++ }
++ fraction >>= NGARDS;
++#endif /* NO_DENORMALS */
++ }
++ else if (!LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS)
++ && src->normal_exp > EXPBIAS)
++ {
++ exp = EXPMAX;
++ fraction = 0;
++ }
++ else
++ {
++ exp = src->normal_exp + EXPBIAS;
++ if (!ROUND_TOWARDS_ZERO)
++ {
++ /* IF the gard bits are the all zero, but the first, then we're
++ half way between two numbers, choose the one which makes the
++ lsb of the answer 0. */
++ if ((fraction & GARDMASK) == GARDMSB)
++ {
++ if (fraction & (1 << NGARDS))
++ fraction += GARDROUND + 1;
++ }
++ else
++ {
++ /* Add a one to the guards to round up */
++ fraction += GARDROUND;
++ }
++ if (fraction >= IMPLICIT_2)
++ {
++ fraction >>= 1;
++ exp += 1;
++ }
++ }
++ fraction >>= NGARDS;
++
++ if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && exp > EXPMAX)
++ {
++ /* Saturate on overflow. */
++ exp = EXPMAX;
++ fraction = ((fractype) 1 << FRACBITS) - 1;
++ }
++ }
++ }
++
++ /* We previously used bitfields to store the number, but this doesn't
++ handle little/big endian systems conveniently, so use shifts and
++ masks */
++#ifdef FLOAT_BIT_ORDER_MISMATCH
++ dst.bits.fraction = fraction;
++ dst.bits.exp = exp;
++ dst.bits.sign = sign;
++#else
++# if defined TFLOAT && defined HALFFRACBITS
++ {
++ halffractype high, low, unity;
++ int lowsign, lowexp;
++
++ unity = (halffractype) 1 << HALFFRACBITS;
++
++ /* Set HIGH to the high double's significand, masking out the implicit 1.
++ Set LOW to the low double's full significand. */
++ high = (fraction >> (FRACBITS - HALFFRACBITS)) & (unity - 1);
++ low = fraction & (unity * 2 - 1);
++
++ /* Get the initial sign and exponent of the low double. */
++ lowexp = exp - HALFFRACBITS - 1;
++ lowsign = sign;
++
++ /* HIGH should be rounded like a normal double, making |LOW| <=
++ 0.5 ULP of HIGH. Assume round-to-nearest. */
++ if (exp < EXPMAX)
++ if (low > unity || (low == unity && (high & 1) == 1))
++ {
++ /* Round HIGH up and adjust LOW to match. */
++ high++;
++ if (high == unity)
++ {
++ /* May make it infinite, but that's OK. */
++ high = 0;
++ exp++;
++ }
++ low = unity * 2 - low;
++ lowsign ^= 1;
++ }
++
++ high |= (halffractype) exp << HALFFRACBITS;
++ high |= (halffractype) sign << (HALFFRACBITS + EXPBITS);
++
++ if (exp == EXPMAX || exp == 0 || low == 0)
++ low = 0;
++ else
++ {
++ while (lowexp > 0 && low < unity)
++ {
++ low <<= 1;
++ lowexp--;
++ }
++
++ if (lowexp <= 0)
++ {
++ halffractype roundmsb, round;
++ int shift;
++
++ shift = 1 - lowexp;
++ roundmsb = (1 << (shift - 1));
++ round = low & ((roundmsb << 1) - 1);
++
++ low >>= shift;
++ lowexp = 0;
++
++ if (round > roundmsb || (round == roundmsb && (low & 1) == 1))
++ {
++ low++;
++ if (low == unity)
++ /* LOW rounds up to the smallest normal number. */
++ lowexp++;
++ }
++ }
++
++ low &= unity - 1;
++ low |= (halffractype) lowexp << HALFFRACBITS;
++ low |= (halffractype) lowsign << (HALFFRACBITS + EXPBITS);
++ }
++ dst.value_raw = ((fractype) high << HALFSHIFT) | low;
++ }
++# else
++ dst.value_raw = fraction & ((((fractype)1) << FRACBITS) - (fractype)1);
++ dst.value_raw |= ((fractype) (exp & ((1 << EXPBITS) - 1))) << FRACBITS;
++ dst.value_raw |= ((fractype) (sign & 1)) << (FRACBITS | EXPBITS);
++# endif
++#endif
++
++#if defined(FLOAT_WORD_ORDER_MISMATCH) && !defined(FLOAT)
++#ifdef TFLOAT
++ {
++ qrtrfractype tmp1 = dst.words[0];
++ qrtrfractype tmp2 = dst.words[1];
++ dst.words[0] = dst.words[3];
++ dst.words[1] = dst.words[2];
++ dst.words[2] = tmp2;
++ dst.words[3] = tmp1;
++ }
++#else
++ {
++ halffractype tmp = dst.words[0];
++ dst.words[0] = dst.words[1];
++ dst.words[1] = tmp;
++ }
++#endif
++#endif
++
++ return dst.value;
++}
++#endif
++
++#if defined(L_unpack_df) || defined(L_unpack_sf) || defined(L_unpack_tf)
++void
++unpack_d (FLO_union_type * src, fp_number_type * dst)
++{
++ /* We previously used bitfields to store the number, but this doesn't
++ handle little/big endian systems conveniently, so use shifts and
++ masks */
++ fractype fraction;
++ int exp;
++ int sign;
++
++#if defined(FLOAT_WORD_ORDER_MISMATCH) && !defined(FLOAT)
++ FLO_union_type swapped;
++
++#ifdef TFLOAT
++ swapped.words[0] = src->words[3];
++ swapped.words[1] = src->words[2];
++ swapped.words[2] = src->words[1];
++ swapped.words[3] = src->words[0];
++#else
++ swapped.words[0] = src->words[1];
++ swapped.words[1] = src->words[0];
++#endif
++ src = &swapped;
++#endif
++
++#ifdef FLOAT_BIT_ORDER_MISMATCH
++ fraction = src->bits.fraction;
++ exp = src->bits.exp;
++ sign = src->bits.sign;
++#else
++# if defined TFLOAT && defined HALFFRACBITS
++ {
++ halffractype high, low;
++
++ high = src->value_raw >> HALFSHIFT;
++ low = src->value_raw & (((fractype)1 << HALFSHIFT) - 1);
++
++ fraction = high & ((((fractype)1) << HALFFRACBITS) - 1);
++ fraction <<= FRACBITS - HALFFRACBITS;
++ exp = ((int)(high >> HALFFRACBITS)) & ((1 << EXPBITS) - 1);
++ sign = ((int)(high >> (((HALFFRACBITS + EXPBITS))))) & 1;
++
++ if (exp != EXPMAX && exp != 0 && low != 0)
++ {
++ int lowexp = ((int)(low >> HALFFRACBITS)) & ((1 << EXPBITS) - 1);
++ int lowsign = ((int)(low >> (((HALFFRACBITS + EXPBITS))))) & 1;
++ int shift;
++ fractype xlow;
++
++ xlow = low & ((((fractype)1) << HALFFRACBITS) - 1);
++ if (lowexp)
++ xlow |= (((halffractype)1) << HALFFRACBITS);
++ else
++ lowexp = 1;
++ shift = (FRACBITS - HALFFRACBITS) - (exp - lowexp);
++ if (shift > 0)
++ xlow <<= shift;
++ else if (shift < 0)
++ xlow >>= -shift;
++ if (sign == lowsign)
++ fraction += xlow;
++ else if (fraction >= xlow)
++ fraction -= xlow;
++ else
++ {
++ /* The high part is a power of two but the full number is lower.
++ This code will leave the implicit 1 in FRACTION, but we'd
++ have added that below anyway. */
++ fraction = (((fractype) 1 << FRACBITS) - xlow) << 1;
++ exp--;
++ }
++ }
++ }
++# else
++ fraction = src->value_raw & ((((fractype)1) << FRACBITS) - 1);
++ exp = ((int)(src->value_raw >> FRACBITS)) & ((1 << EXPBITS) - 1);
++ sign = ((int)(src->value_raw >> (FRACBITS + EXPBITS))) & 1;
++# endif
++#endif
++
++ dst->sign = sign;
++ if (exp == 0)
++ {
++ /* Hmm. Looks like 0 */
++ if (fraction == 0
++#ifdef NO_DENORMALS
++ || 1
++#endif
++ )
++ {
++ /* tastes like zero */
++ dst->class = CLASS_ZERO;
++ }
++ else
++ {
++ /* Zero exponent with nonzero fraction - it's denormalized,
++ so there isn't a leading implicit one - we'll shift it so
++ it gets one. */
++ dst->normal_exp = exp - EXPBIAS + 1;
++ fraction <<= NGARDS;
++
++ dst->class = CLASS_NUMBER;
++#if 1
++ while (fraction < IMPLICIT_1)
++ {
++ fraction <<= 1;
++ dst->normal_exp--;
++ }
++#endif
++ dst->fraction.ll = fraction;
++ }
++ }
++ else if (!LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) && exp == EXPMAX)
++ {
++ /* Huge exponent*/
++ if (fraction == 0)
++ {
++ /* Attached to a zero fraction - means infinity */
++ dst->class = CLASS_INFINITY;
++ }
++ else
++ {
++ /* Nonzero fraction, means nan */
++#ifdef QUIET_NAN_NEGATED
++ if ((fraction & QUIET_NAN) == 0)
++#else
++ if (fraction & QUIET_NAN)
++#endif
++ {
++ dst->class = CLASS_QNAN;
++ }
++ else
++ {
++ dst->class = CLASS_SNAN;
++ }
++ /* Keep the fraction part as the nan number */
++ dst->fraction.ll = fraction;
++ }
++ }
++ else
++ {
++ /* Nothing strange about this number */
++ dst->normal_exp = exp - EXPBIAS;
++ dst->class = CLASS_NUMBER;
++ dst->fraction.ll = (fraction << NGARDS) | IMPLICIT_1;
++ }
++}
++#endif /* L_unpack_df || L_unpack_sf */
++
++#if defined(L_addsub_sf) || defined(L_addsub_df) || defined(L_addsub_tf)
++static fp_number_type *
++_fpadd_parts (fp_number_type * a,
++ fp_number_type * b,
++ fp_number_type * tmp)
++{
++ intfrac tfraction;
++
++ /* Put commonly used fields in local variables. */
++ int a_normal_exp;
++ int b_normal_exp;
++ fractype a_fraction;
++ fractype b_fraction;
++
++ if (isnan (a))
++ {
++ return a;
++ }
++ if (isnan (b))
++ {
++ return b;
++ }
++ if (isinf (a))
++ {
++ /* Adding infinities with opposite signs yields a NaN. */
++ if (isinf (b) && a->sign != b->sign)
++ return nan ();
++ return a;
++ }
++ if (isinf (b))
++ {
++ return b;
++ }
++ if (iszero (b))
++ {
++ if (iszero (a))
++ {
++ *tmp = *a;
++ tmp->sign = a->sign & b->sign;
++ return tmp;
++ }
++ return a;
++ }
++ if (iszero (a))
++ {
++ return b;
++ }
++
++ /* Got two numbers. shift the smaller and increment the exponent till
++ they're the same */
++ {
++ int diff;
++
++ a_normal_exp = a->normal_exp;
++ b_normal_exp = b->normal_exp;
++ a_fraction = a->fraction.ll;
++ b_fraction = b->fraction.ll;
++
++ diff = a_normal_exp - b_normal_exp;
++
++ if (diff < 0)
++ diff = -diff;
++ if (diff < FRAC_NBITS)
++ {
++ /* ??? This does shifts one bit at a time. Optimize. */
++ while (a_normal_exp > b_normal_exp)
++ {
++ b_normal_exp++;
++ LSHIFT (b_fraction);
++ }
++ while (b_normal_exp > a_normal_exp)
++ {
++ a_normal_exp++;
++ LSHIFT (a_fraction);
++ }
++ }
++ else
++ {
++ /* Somethings's up.. choose the biggest */
++ if (a_normal_exp > b_normal_exp)
++ {
++ b_normal_exp = a_normal_exp;
++ b_fraction = 0;
++ }
++ else
++ {
++ a_normal_exp = b_normal_exp;
++ a_fraction = 0;
++ }
++ }
++ }
++
++ if (a->sign != b->sign)
++ {
++ if (a->sign)
++ {
++ tfraction = -a_fraction + b_fraction;
++ }
++ else
++ {
++ tfraction = a_fraction - b_fraction;
++ }
++ if (tfraction >= 0)
++ {
++ tmp->sign = 0;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = tfraction;
++ }
++ else
++ {
++ tmp->sign = 1;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = -tfraction;
++ }
++ /* and renormalize it */
++
++ while (tmp->fraction.ll < IMPLICIT_1 && tmp->fraction.ll)
++ {
++ tmp->fraction.ll <<= 1;
++ tmp->normal_exp--;
++ }
++ }
++ else
++ {
++ tmp->sign = a->sign;
++ tmp->normal_exp = a_normal_exp;
++ tmp->fraction.ll = a_fraction + b_fraction;
++ }
++ tmp->class = CLASS_NUMBER;
++ /* Now the fraction is added, we have to shift down to renormalize the
++ number */
++
++ if (tmp->fraction.ll >= IMPLICIT_2)
++ {
++ LSHIFT (tmp->fraction.ll);
++ tmp->normal_exp++;
++ }
++ return tmp;
++
++}
++
++FLO_type
++add (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpadd_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++
++FLO_type
++sub (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ b.sign ^= 1;
++
++ res = _fpadd_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++#endif /* L_addsub_sf || L_addsub_df */
++
++#if defined(L_mul_sf) || defined(L_mul_df) || defined(L_mul_tf)
++static inline __attribute__ ((__always_inline__)) fp_number_type *
++_fpmul_parts ( fp_number_type * a,
++ fp_number_type * b,
++ fp_number_type * tmp)
++{
++ fractype low = 0;
++ fractype high = 0;
++
++ if (isnan (a))
++ {
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (isnan (b))
++ {
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++ if (isinf (a))
++ {
++ if (iszero (b))
++ return nan ();
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (isinf (b))
++ {
++ if (iszero (a))
++ {
++ return nan ();
++ }
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++ if (iszero (a))
++ {
++ a->sign = a->sign != b->sign;
++ return a;
++ }
++ if (iszero (b))
++ {
++ b->sign = a->sign != b->sign;
++ return b;
++ }
++
++ /* Calculate the mantissa by multiplying both numbers to get a
++ twice-as-wide number. */
++ {
++#if defined(NO_DI_MODE) || defined(TFLOAT)
++ {
++ fractype x = a->fraction.ll;
++ fractype ylow = b->fraction.ll;
++ fractype yhigh = 0;
++ int bit;
++
++ /* ??? This does multiplies one bit at a time. Optimize. */
++ for (bit = 0; bit < FRAC_NBITS; bit++)
++ {
++ int carry;
++
++ if (x & 1)
++ {
++ carry = (low += ylow) < ylow;
++ high += yhigh + carry;
++ }
++ yhigh <<= 1;
++ if (ylow & FRACHIGH)
++ {
++ yhigh |= 1;
++ }
++ ylow <<= 1;
++ x >>= 1;
++ }
++ }
++#elif defined(FLOAT)
++ /* Multiplying two USIs to get a UDI, we're safe. */
++ {
++ UDItype answer = (UDItype)a->fraction.ll * (UDItype)b->fraction.ll;
++
++ high = answer >> BITS_PER_SI;
++ low = answer;
++ }
++#else
++ /* fractype is DImode, but we need the result to be twice as wide.
++ Assuming a widening multiply from DImode to TImode is not
++ available, build one by hand. */
++ {
++ USItype nl = a->fraction.ll;
++ USItype nh = a->fraction.ll >> BITS_PER_SI;
++ USItype ml = b->fraction.ll;
++ USItype mh = b->fraction.ll >> BITS_PER_SI;
++ UDItype pp_ll = (UDItype) ml * nl;
++ UDItype pp_hl = (UDItype) mh * nl;
++ UDItype pp_lh = (UDItype) ml * nh;
++ UDItype pp_hh = (UDItype) mh * nh;
++ UDItype res2 = 0;
++ UDItype res0 = 0;
++ UDItype ps_hh__ = pp_hl + pp_lh;
++ if (ps_hh__ < pp_hl)
++ res2 += (UDItype)1 << BITS_PER_SI;
++ pp_hl = (UDItype)(USItype)ps_hh__ << BITS_PER_SI;
++ res0 = pp_ll + pp_hl;
++ if (res0 < pp_ll)
++ res2++;
++ res2 += (ps_hh__ >> BITS_PER_SI) + pp_hh;
++ high = res2;
++ low = res0;
++ }
++#endif
++ }
++
++ tmp->normal_exp = a->normal_exp + b->normal_exp
++ + FRAC_NBITS - (FRACBITS + NGARDS);
++ tmp->sign = a->sign != b->sign;
++ while (high >= IMPLICIT_2)
++ {
++ tmp->normal_exp++;
++ if (high & 1)
++ {
++ low >>= 1;
++ low |= FRACHIGH;
++ }
++ high >>= 1;
++ }
++ while (high < IMPLICIT_1)
++ {
++ tmp->normal_exp--;
++
++ high <<= 1;
++ if (low & FRACHIGH)
++ high |= 1;
++ low <<= 1;
++ }
++ /* rounding is tricky. if we only round if it won't make us round later. */
++#if 0
++ if (low & FRACHIGH2)
++ {
++ if (((high & GARDMASK) != GARDMSB)
++ && (((high + 1) & GARDMASK) == GARDMSB))
++ {
++ /* don't round, it gets done again later. */
++ }
++ else
++ {
++ high++;
++ }
++ }
++#endif
++ if (!ROUND_TOWARDS_ZERO && (high & GARDMASK) == GARDMSB)
++ {
++ if (high & (1 << NGARDS))
++ {
++ /* half way, so round to even */
++ high += GARDROUND + 1;
++ }
++ else if (low)
++ {
++ /* but we really weren't half way */
++ high += GARDROUND + 1;
++ }
++ }
++ tmp->fraction.ll = high;
++ tmp->class = CLASS_NUMBER;
++ return tmp;
++}
++
++FLO_type
++multiply (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type tmp;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpmul_parts (&a, &b, &tmp);
++
++ return pack_d (res);
++}
++#endif /* L_mul_sf || L_mul_df */
++
++#if defined(L_div_sf) || defined(L_div_df) || defined(L_div_tf)
++static inline __attribute__ ((__always_inline__)) fp_number_type *
++_fpdiv_parts (fp_number_type * a,
++ fp_number_type * b)
++{
++ fractype bit;
++ fractype numerator;
++ fractype denominator;
++ fractype quotient;
++
++ if (isnan (a))
++ {
++ return a;
++ }
++ if (isnan (b))
++ {
++ return b;
++ }
++
++ a->sign = a->sign ^ b->sign;
++
++ if (isinf (a) || iszero (a))
++ {
++ if (a->class == b->class)
++ return nan ();
++ return a;
++ }
++
++ if (isinf (b))
++ {
++ a->fraction.ll = 0;
++ a->normal_exp = 0;
++ return a;
++ }
++ if (iszero (b))
++ {
++ a->class = CLASS_INFINITY;
++ return a;
++ }
++
++ /* Calculate the mantissa by multiplying both 64bit numbers to get a
++ 128 bit number */
++ {
++ /* quotient =
++ ( numerator / denominator) * 2^(numerator exponent - denominator exponent)
++ */
++
++ a->normal_exp = a->normal_exp - b->normal_exp;
++ numerator = a->fraction.ll;
++ denominator = b->fraction.ll;
++
++ if (numerator < denominator)
++ {
++ /* Fraction will be less than 1.0 */
++ numerator *= 2;
++ a->normal_exp--;
++ }
++ bit = IMPLICIT_1;
++ quotient = 0;
++ /* ??? Does divide one bit at a time. Optimize. */
++ while (bit)
++ {
++ if (numerator >= denominator)
++ {
++ quotient |= bit;
++ numerator -= denominator;
++ }
++ bit >>= 1;
++ numerator *= 2;
++ }
++
++ if (!ROUND_TOWARDS_ZERO && (quotient & GARDMASK) == GARDMSB)
++ {
++ if (quotient & (1 << NGARDS))
++ {
++ /* half way, so round to even */
++ quotient += GARDROUND + 1;
++ }
++ else if (numerator)
++ {
++ /* but we really weren't half way, more bits exist */
++ quotient += GARDROUND + 1;
++ }
++ }
++
++ a->fraction.ll = quotient;
++ return (a);
++ }
++}
++
++FLO_type
++divide (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ fp_number_type *res;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ res = _fpdiv_parts (&a, &b);
++
++ return pack_d (res);
++}
++#endif /* L_div_sf || L_div_df */
++
++#if defined(L_fpcmp_parts_sf) || defined(L_fpcmp_parts_df) \
++ || defined(L_fpcmp_parts_tf)
++/* according to the demo, fpcmp returns a comparison with 0... thus
++ a<b -> -1
++ a==b -> 0
++ a>b -> +1
++ */
++
++int
++__fpcmp_parts (fp_number_type * a, fp_number_type * b)
++{
++#if 0
++ /* either nan -> unordered. Must be checked outside of this routine. */
++ if (isnan (a) && isnan (b))
++ {
++ return 1; /* still unordered! */
++ }
++#endif
++
++ if (isnan (a) || isnan (b))
++ {
++ return 1; /* how to indicate unordered compare? */
++ }
++ if (isinf (a) && isinf (b))
++ {
++ /* +inf > -inf, but +inf != +inf */
++ /* b \a| +inf(0)| -inf(1)
++ ______\+--------+--------
++ +inf(0)| a==b(0)| a<b(-1)
++ -------+--------+--------
++ -inf(1)| a>b(1) | a==b(0)
++ -------+--------+--------
++ So since unordered must be nonzero, just line up the columns...
++ */
++ return b->sign - a->sign;
++ }
++ /* but not both... */
++ if (isinf (a))
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (isinf (b))
++ {
++ return b->sign ? 1 : -1;
++ }
++ if (iszero (a) && iszero (b))
++ {
++ return 0;
++ }
++ if (iszero (a))
++ {
++ return b->sign ? 1 : -1;
++ }
++ if (iszero (b))
++ {
++ return a->sign ? -1 : 1;
++ }
++ /* now both are "normal". */
++ if (a->sign != b->sign)
++ {
++ /* opposite signs */
++ return a->sign ? -1 : 1;
++ }
++ /* same sign; exponents? */
++ if (a->normal_exp > b->normal_exp)
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (a->normal_exp < b->normal_exp)
++ {
++ return a->sign ? 1 : -1;
++ }
++ /* same exponents; check size. */
++ if (a->fraction.ll > b->fraction.ll)
++ {
++ return a->sign ? -1 : 1;
++ }
++ if (a->fraction.ll < b->fraction.ll)
++ {
++ return a->sign ? 1 : -1;
++ }
++ /* after all that, they're equal. */
++ return 0;
++}
++#endif
++
++#if defined(L_compare_sf) || defined(L_compare_df) || defined(L_compoare_tf)
++CMPtype
++compare (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_compare_sf || L_compare_df */
++
++#ifndef US_SOFTWARE_GOFAST
++
++/* These should be optimized for their specific tasks someday. */
++
++#if defined(L_eq_sf) || defined(L_eq_df) || defined(L_eq_tf)
++CMPtype
++_eq_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth == 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_eq_sf || L_eq_df */
++
++#if defined(L_ne_sf) || defined(L_ne_df) || defined(L_ne_tf)
++CMPtype
++_ne_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* true, truth != 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_ne_sf || L_ne_df */
++
++#if defined(L_gt_sf) || defined(L_gt_df) || defined(L_gt_tf)
++CMPtype
++_gt_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return -1; /* false, truth > 0 */
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_gt_sf || L_gt_df */
++
++#if defined(L_ge_sf) || defined(L_ge_df) || defined(L_ge_tf)
++CMPtype
++_ge_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return -1; /* false, truth >= 0 */
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_ge_sf || L_ge_df */
++
++#if defined(L_lt_sf) || defined(L_lt_df) || defined(L_lt_tf)
++CMPtype
++_lt_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth < 0 */
++
++ return __fpcmp_parts (&a, &b);
++}
++#endif /* L_lt_sf || L_lt_df */
++
++#if defined(L_le_sf) || defined(L_le_df) || defined(L_le_tf)
++CMPtype
++_le_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ if (isnan (&a) || isnan (&b))
++ return 1; /* false, truth <= 0 */
++
++ return __fpcmp_parts (&a, &b) ;
++}
++#endif /* L_le_sf || L_le_df */
++
++#endif /* ! US_SOFTWARE_GOFAST */
++
++#if defined(L_unord_sf) || defined(L_unord_df) || defined(L_unord_tf)
++CMPtype
++_unord_f2 (FLO_type arg_a, FLO_type arg_b)
++{
++ fp_number_type a;
++ fp_number_type b;
++ FLO_union_type au, bu;
++
++ au.value = arg_a;
++ bu.value = arg_b;
++
++ unpack_d (&au, &a);
++ unpack_d (&bu, &b);
++
++ return (isnan (&a) || isnan (&b));
++}
++#endif /* L_unord_sf || L_unord_df */
++
++#if defined(L_si_to_sf) || defined(L_si_to_df) || defined(L_si_to_tf)
++FLO_type
++si_to_float (SItype arg_a)
++{
++ fp_number_type in;
++
++ in.class = CLASS_NUMBER;
++ in.sign = arg_a < 0;
++ if (!arg_a)
++ {
++ in.class = CLASS_ZERO;
++ }
++ else
++ {
++ in.normal_exp = FRACBITS + NGARDS;
++ if (in.sign)
++ {
++ /* Special case for minint, since there is no +ve integer
++ representation for it */
++ if (arg_a == (- MAX_SI_INT - 1))
++ {
++ return (FLO_type)(- MAX_SI_INT - 1);
++ }
++ in.fraction.ll = (-arg_a);
++ }
++ else
++ in.fraction.ll = arg_a;
++
++ while (in.fraction.ll < ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll <<= 1;
++ in.normal_exp -= 1;
++ }
++ }
++ return pack_d (&in);
++}
++#endif /* L_si_to_sf || L_si_to_df */
++
++#if defined(L_usi_to_sf) || defined(L_usi_to_df) || defined(L_usi_to_tf)
++FLO_type
++usi_to_float (USItype arg_a)
++{
++ fp_number_type in;
++
++ in.sign = 0;
++ if (!arg_a)
++ {
++ in.class = CLASS_ZERO;
++ }
++ else
++ {
++ in.class = CLASS_NUMBER;
++ in.normal_exp = FRACBITS + NGARDS;
++ in.fraction.ll = arg_a;
++
++ while (in.fraction.ll > ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll >>= 1;
++ in.normal_exp += 1;
++ }
++ while (in.fraction.ll < ((fractype)1 << (FRACBITS + NGARDS)))
++ {
++ in.fraction.ll <<= 1;
++ in.normal_exp -= 1;
++ }
++ }
++ return pack_d (&in);
++}
++#endif
++
++#if defined(L_sf_to_si) || defined(L_df_to_si) || defined(L_tf_to_si)
++SItype
++float_to_si (FLO_type arg_a)
++{
++ fp_number_type a;
++ SItype tmp;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ if (iszero (&a))
++ return 0;
++ if (isnan (&a))
++ return 0;
++ /* get reasonable MAX_SI_INT... */
++ if (isinf (&a))
++ return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
++ /* it is a number, but a small one */
++ if (a.normal_exp < 0)
++ return 0;
++ if (a.normal_exp > BITS_PER_SI - 2)
++ return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
++ tmp = a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
++ return a.sign ? (-tmp) : (tmp);
++}
++#endif /* L_sf_to_si || L_df_to_si */
++
++#if defined(L_sf_to_usi) || defined(L_df_to_usi) || defined(L_tf_to_usi)
++#if defined US_SOFTWARE_GOFAST || defined(L_tf_to_usi)
++/* While libgcc2.c defines its own __fixunssfsi and __fixunsdfsi routines,
++ we also define them for GOFAST because the ones in libgcc2.c have the
++ wrong names and I'd rather define these here and keep GOFAST CYG-LOC's
++ out of libgcc2.c. We can't define these here if not GOFAST because then
++ there'd be duplicate copies. */
++
++USItype
++float_to_usi (FLO_type arg_a)
++{
++ fp_number_type a;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ if (iszero (&a))
++ return 0;
++ if (isnan (&a))
++ return 0;
++ /* it is a negative number */
++ if (a.sign)
++ return 0;
++ /* get reasonable MAX_USI_INT... */
++ if (isinf (&a))
++ return MAX_USI_INT;
++ /* it is a number, but a small one */
++ if (a.normal_exp < 0)
++ return 0;
++ if (a.normal_exp > BITS_PER_SI - 1)
++ return MAX_USI_INT;
++ else if (a.normal_exp > (FRACBITS + NGARDS))
++ return a.fraction.ll << (a.normal_exp - (FRACBITS + NGARDS));
++ else
++ return a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
++}
++#endif /* US_SOFTWARE_GOFAST */
++#endif /* L_sf_to_usi || L_df_to_usi */
++
++#if defined(L_negate_sf) || defined(L_negate_df) || defined(L_negate_tf)
++FLO_type
++negate (FLO_type arg_a)
++{
++ fp_number_type a;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &a);
++
++ flip_sign (&a);
++ return pack_d (&a);
++}
++#endif /* L_negate_sf || L_negate_df */
++
++#ifdef FLOAT
++
++#if defined(L_make_sf)
++SFtype
++__make_fp(fp_class_type class,
++ unsigned int sign,
++ int exp,
++ USItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_sf */
++
++#ifndef FLOAT_ONLY
++
++/* This enables one to build an fp library that supports float but not double.
++ Otherwise, we would get an undefined reference to __make_dp.
++ This is needed for some 8-bit ports that can't handle well values that
++ are 8-bytes in size, so we just don't support double for them at all. */
++
++#if defined(L_sf_to_df)
++DFtype
++sf_to_df (SFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_dp (in.class, in.sign, in.normal_exp,
++ ((UDItype) in.fraction.ll) << F_D_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#if defined(L_sf_to_tf) && defined(TMODES)
++TFtype
++sf_to_tf (SFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_tp (in.class, in.sign, in.normal_exp,
++ ((UTItype) in.fraction.ll) << F_T_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#endif /* ! FLOAT_ONLY */
++#endif /* FLOAT */
++
++#ifndef FLOAT
++
++extern SFtype __make_fp (fp_class_type, unsigned int, int, USItype);
++
++#if defined(L_make_df)
++DFtype
++__make_dp (fp_class_type class, unsigned int sign, int exp, UDItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_df */
++
++#if defined(L_df_to_sf)
++SFtype
++df_to_sf (DFtype arg_a)
++{
++ fp_number_type in;
++ USItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> F_D_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((USItype) 1 << F_D_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_fp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_df_to_sf */
++
++#if defined(L_df_to_tf) && defined(TMODES) \
++ && !defined(FLOAT) && !defined(TFLOAT)
++TFtype
++df_to_tf (DFtype arg_a)
++{
++ fp_number_type in;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ return __make_tp (in.class, in.sign, in.normal_exp,
++ ((UTItype) in.fraction.ll) << D_T_BITOFF);
++}
++#endif /* L_sf_to_df */
++
++#ifdef TFLOAT
++#if defined(L_make_tf)
++TFtype
++__make_tp(fp_class_type class,
++ unsigned int sign,
++ int exp,
++ UTItype frac)
++{
++ fp_number_type in;
++
++ in.class = class;
++ in.sign = sign;
++ in.normal_exp = exp;
++ in.fraction.ll = frac;
++ return pack_d (&in);
++}
++#endif /* L_make_tf */
++
++#if defined(L_tf_to_df)
++DFtype
++tf_to_df (TFtype arg_a)
++{
++ fp_number_type in;
++ UDItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> D_T_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((UTItype) 1 << D_T_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_dp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_tf_to_df */
++
++#if defined(L_tf_to_sf)
++SFtype
++tf_to_sf (TFtype arg_a)
++{
++ fp_number_type in;
++ USItype sffrac;
++ FLO_union_type au;
++
++ au.value = arg_a;
++ unpack_d (&au, &in);
++
++ sffrac = in.fraction.ll >> F_T_BITOFF;
++
++ /* We set the lowest guard bit in SFFRAC if we discarded any non
++ zero bits. */
++ if ((in.fraction.ll & (((UTItype) 1 << F_T_BITOFF) - 1)) != 0)
++ sffrac |= 1;
++
++ return __make_fp (in.class, in.sign, in.normal_exp, sffrac);
++}
++#endif /* L_tf_to_sf */
++#endif /* TFLOAT */
++
++#endif /* ! FLOAT */
++#endif /* !EXTENDED_FLOAT_STUBS */
+--- gcc-3.4.3/gcc/config/nios2/nios2-protos.h
++++ gcc-3.4.3-nios2/gcc/config/nios2/nios2-protos.h
+@@ -0,0 +1,70 @@
++/* Subroutines for assembler code output for Altera NIOS 2G NIOS2 version.
++ Copyright (C) 2003 Altera
++ Contributed by Jonah Graham (jgraham@altera.com).
++
++This file is part of GNU CC.
++
++GNU CC is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2, or (at your option)
++any later version.
++
++GNU CC is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with GNU CC; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++extern void dump_frame_size (FILE *);
++extern HOST_WIDE_INT compute_frame_size (void);
++extern int nios2_initial_elimination_offset (int, int);
++extern void override_options (void);
++extern void optimization_options (int, int);
++extern int nios2_can_use_return_insn (void);
++extern void expand_prologue (void);
++extern void expand_epilogue (bool);
++extern void function_profiler (FILE *, int);
++
++
++#ifdef RTX_CODE
++extern int nios2_legitimate_address (rtx, enum machine_mode, int);
++extern void nios2_print_operand (FILE *, rtx, int);
++extern void nios2_print_operand_address (FILE *, rtx);
++
++extern int nios2_emit_move_sequence (rtx *, enum machine_mode);
++extern int nios2_emit_expensive_div (rtx *, enum machine_mode);
++
++extern void gen_int_relational (enum rtx_code, rtx, rtx, rtx, rtx);
++extern void gen_conditional_move (rtx *, enum machine_mode);
++extern const char *asm_output_opcode (FILE *, const char *);
++
++/* predicates */
++extern int arith_operand (rtx, enum machine_mode);
++extern int uns_arith_operand (rtx, enum machine_mode);
++extern int logical_operand (rtx, enum machine_mode);
++extern int shift_operand (rtx, enum machine_mode);
++extern int reg_or_0_operand (rtx, enum machine_mode);
++extern int equality_op (rtx, enum machine_mode);
++extern int custom_insn_opcode (rtx, enum machine_mode);
++extern int rdwrctl_operand (rtx, enum machine_mode);
++
++# ifdef HAVE_MACHINE_MODES
++# if defined TREE_CODE
++extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
++extern rtx function_arg (const CUMULATIVE_ARGS *, enum machine_mode, tree, int);
++extern int function_arg_partial_nregs (const CUMULATIVE_ARGS *, enum machine_mode, tree, int);
++extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
++extern int nios2_setup_incoming_varargs (const CUMULATIVE_ARGS *, enum machine_mode, tree, int);
++
++# endif /* TREE_CODE */
++# endif /* HAVE_MACHINE_MODES */
++#endif
++
++#ifdef TREE_CODE
++extern int nios2_return_in_memory (tree);
++
++#endif /* TREE_CODE */
+--- gcc-3.4.3/gcc/config/nios2/nios2.c
++++ gcc-3.4.3-nios2/gcc/config/nios2/nios2.c
+@@ -0,0 +1,2853 @@
++/* Subroutines for assembler code output for Altera NIOS 2G NIOS2 version.
++ Copyright (C) 2003 Altera
++ Contributed by Jonah Graham (jgraham@altera.com).
++
++This file is part of GNU CC.
++
++GNU CC is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2, or (at your option)
++any later version.
++
++GNU CC is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with GNU CC; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++
++#include <stdio.h>
++#include "config.h"
++#include "system.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "rtl.h"
++#include "tree.h"
++#include "tm_p.h"
++#include "regs.h"
++#include "hard-reg-set.h"
++#include "real.h"
++#include "insn-config.h"
++#include "conditions.h"
++#include "output.h"
++#include "insn-attr.h"
++#include "flags.h"
++#include "recog.h"
++#include "expr.h"
++#include "toplev.h"
++#include "basic-block.h"
++#include "function.h"
++#include "ggc.h"
++#include "reload.h"
++#include "debug.h"
++#include "optabs.h"
++#include "target.h"
++#include "target-def.h"
++
++/* local prototypes */
++static bool nios2_rtx_costs (rtx, int, int, int *);
++
++static void nios2_asm_function_prologue (FILE *, HOST_WIDE_INT);
++static int nios2_use_dfa_pipeline_interface (void);
++static int nios2_issue_rate (void);
++static struct machine_function *nios2_init_machine_status (void);
++static bool nios2_in_small_data_p (tree);
++static rtx save_reg (int, HOST_WIDE_INT, rtx);
++static rtx restore_reg (int, HOST_WIDE_INT);
++static unsigned int nios2_section_type_flags (tree, const char *, int);
++static void nios2_init_builtins (void);
++static rtx nios2_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
++static bool nios2_function_ok_for_sibcall (tree, tree);
++static void nios2_encode_section_info (tree, rtx, int);
++
++/* Initialize the GCC target structure. */
++#undef TARGET_ASM_FUNCTION_PROLOGUE
++#define TARGET_ASM_FUNCTION_PROLOGUE nios2_asm_function_prologue
++
++#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
++#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE \
++ nios2_use_dfa_pipeline_interface
++#undef TARGET_SCHED_ISSUE_RATE
++#define TARGET_SCHED_ISSUE_RATE nios2_issue_rate
++#undef TARGET_IN_SMALL_DATA_P
++#define TARGET_IN_SMALL_DATA_P nios2_in_small_data_p
++#undef TARGET_ENCODE_SECTION_INFO
++#define TARGET_ENCODE_SECTION_INFO nios2_encode_section_info
++#undef TARGET_SECTION_TYPE_FLAGS
++#define TARGET_SECTION_TYPE_FLAGS nios2_section_type_flags
++
++#undef TARGET_INIT_BUILTINS
++#define TARGET_INIT_BUILTINS nios2_init_builtins
++#undef TARGET_EXPAND_BUILTIN
++#define TARGET_EXPAND_BUILTIN nios2_expand_builtin
++
++#undef TARGET_FUNCTION_OK_FOR_SIBCALL
++#define TARGET_FUNCTION_OK_FOR_SIBCALL nios2_function_ok_for_sibcall
++
++#undef TARGET_RTX_COSTS
++#define TARGET_RTX_COSTS nios2_rtx_costs
++
++
++struct gcc_target targetm = TARGET_INITIALIZER;
++\f
++
++
++/* Threshold for data being put into the small data/bss area, instead
++ of the normal data area (references to the small data/bss area take
++ 1 instruction, and use the global pointer, references to the normal
++ data area takes 2 instructions). */
++unsigned HOST_WIDE_INT nios2_section_threshold = NIOS2_DEFAULT_GVALUE;
++
++
++/* Structure to be filled in by compute_frame_size with register
++ save masks, and offsets for the current function. */
++
++struct nios2_frame_info
++GTY (())
++{
++ long total_size; /* # bytes that the entire frame takes up */
++ long var_size; /* # bytes that variables take up */
++ long args_size; /* # bytes that outgoing arguments take up */
++ int save_reg_size; /* # bytes needed to store gp regs */
++ int save_reg_rounded; /* # bytes needed to store gp regs */
++ long save_regs_offset; /* offset from new sp to store gp registers */
++ int initialized; /* != 0 if frame size already calculated */
++ int num_regs; /* number of gp registers saved */
++};
++
++struct machine_function
++GTY (())
++{
++
++ /* Current frame information, calculated by compute_frame_size. */
++ struct nios2_frame_info frame;
++};
++\f
++
++/***************************************
++ * Section encodings
++ ***************************************/
++\f
++
++
++
++
++/***************************************
++ * Stack Layout and Calling Conventions
++ ***************************************/
++
++
++#define TOO_BIG_OFFSET(X) ((X) > ((1 << 15) - 1))
++#define TEMP_REG_NUM 8
++
++static void
++nios2_asm_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
++{
++ if (flag_verbose_asm || flag_debug_asm)
++ {
++ compute_frame_size ();
++ dump_frame_size (file);
++ }
++}
++
++static rtx
++save_reg (int regno, HOST_WIDE_INT offset, rtx cfa_store_reg)
++{
++ rtx insn, stack_slot;
++
++ stack_slot = gen_rtx_PLUS (SImode,
++ cfa_store_reg,
++ GEN_INT (offset));
++
++ insn = emit_insn (gen_rtx_SET (SImode,
++ gen_rtx_MEM (SImode, stack_slot),
++ gen_rtx_REG (SImode, regno)));
++
++ RTX_FRAME_RELATED_P (insn) = 1;
++
++ return insn;
++}
++
++static rtx
++restore_reg (int regno, HOST_WIDE_INT offset)
++{
++ rtx insn, stack_slot;
++
++ if (TOO_BIG_OFFSET (offset))
++ {
++ stack_slot = gen_rtx_REG (SImode, TEMP_REG_NUM);
++ insn = emit_insn (gen_rtx_SET (SImode,
++ stack_slot,
++ GEN_INT (offset)));
++
++ insn = emit_insn (gen_rtx_SET (SImode,
++ stack_slot,
++ gen_rtx_PLUS (SImode,
++ stack_slot,
++ stack_pointer_rtx)));
++ }
++ else
++ {
++ stack_slot = gen_rtx_PLUS (SImode,
++ stack_pointer_rtx,
++ GEN_INT (offset));
++ }
++
++ stack_slot = gen_rtx_MEM (SImode, stack_slot);
++
++ insn = emit_move_insn (gen_rtx_REG (SImode, regno), stack_slot);
++
++ return insn;
++}
++
++
++/* There are two possible paths for prologue expansion,
++- the first is if the total frame size is < 2^15-1. In that
++case all the immediates will fit into the 16-bit immediate
++fields.
++- the second is when the frame size is too big, in that
++case an additional temporary register is used, first
++as a cfa_temp to offset the sp, second as the cfa_store
++register.
++
++See the comment above dwarf2out_frame_debug_expr in
++dwarf2out.c for more explanation of the "rules."
++
++
++Case 1:
++Rule # Example Insn Effect
++2 addi sp, sp, -total_frame_size cfa.reg=sp, cfa.offset=total_frame_size
++ cfa_store.reg=sp, cfa_store.offset=total_frame_size
++12 stw ra, offset(sp)
++12 stw r16, offset(sp)
++1 mov fp, sp
++
++Case 2:
++Rule # Example Insn Effect
++6 movi r8, total_frame_size cfa_temp.reg=r8, cfa_temp.offset=total_frame_size
++2 sub sp, sp, r8 cfa.reg=sp, cfa.offset=total_frame_size
++ cfa_store.reg=sp, cfa_store.offset=total_frame_size
++5 add r8, r8, sp cfa_store.reg=r8, cfa_store.offset=0
++12 stw ra, offset(r8)
++12 stw r16, offset(r8)
++1 mov fp, sp
++
++*/
++
++void
++expand_prologue ()
++{
++ int i;
++ HOST_WIDE_INT total_frame_size;
++ int cfa_store_offset;
++ rtx insn;
++ rtx cfa_store_reg = 0;
++
++ total_frame_size = compute_frame_size ();
++
++ if (total_frame_size)
++ {
++
++ if (TOO_BIG_OFFSET (total_frame_size))
++ {
++ /* cfa_temp and cfa_store_reg are the same register,
++ cfa_store_reg overwrites cfa_temp */
++ cfa_store_reg = gen_rtx_REG (SImode, TEMP_REG_NUM);
++ insn = emit_insn (gen_rtx_SET (SImode,
++ cfa_store_reg,
++ GEN_INT (total_frame_size)));
++
++ RTX_FRAME_RELATED_P (insn) = 1;
++
++
++ insn = gen_rtx_SET (SImode,
++ stack_pointer_rtx,
++ gen_rtx_MINUS (SImode,
++ stack_pointer_rtx,
++ cfa_store_reg));
++
++ insn = emit_insn (insn);
++ RTX_FRAME_RELATED_P (insn) = 1;
++
++
++ /* if there are no registers to save, I don't need to
++ create a cfa_store */
++ if (cfun->machine->frame.save_reg_size)
++ {
++ insn = gen_rtx_SET (SImode,
++ cfa_store_reg,
++ gen_rtx_PLUS (SImode,
++ cfa_store_reg,
++ stack_pointer_rtx));
++
++ insn = emit_insn (insn);
++ RTX_FRAME_RELATED_P (insn) = 1;
++ }
++
++ cfa_store_offset
++ = total_frame_size
++ - (cfun->machine->frame.save_regs_offset
++ + cfun->machine->frame.save_reg_rounded);
++ }
++ else
++ {
++ insn = gen_rtx_SET (SImode,
++ stack_pointer_rtx,
++ gen_rtx_PLUS (SImode,
++ stack_pointer_rtx,
++ GEN_INT (-total_frame_size)));
++ insn = emit_insn (insn);
++ RTX_FRAME_RELATED_P (insn) = 1;
++
++ cfa_store_reg = stack_pointer_rtx;
++ cfa_store_offset
++ = cfun->machine->frame.save_regs_offset
++ + cfun->machine->frame.save_reg_rounded;
++ }
++ }
++
++ if (MUST_SAVE_REGISTER (RA_REGNO))
++ {
++ cfa_store_offset -= 4;
++ save_reg (RA_REGNO, cfa_store_offset, cfa_store_reg);
++ }
++ if (MUST_SAVE_REGISTER (FP_REGNO))
++ {
++ cfa_store_offset -= 4;
++ save_reg (FP_REGNO, cfa_store_offset, cfa_store_reg);
++ }
++
++ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++ {
++ if (MUST_SAVE_REGISTER (i) && i != FP_REGNO && i != RA_REGNO)
++ {
++ cfa_store_offset -= 4;
++ save_reg (i, cfa_store_offset, cfa_store_reg);
++ }
++ }
++
++ if (frame_pointer_needed)
++ {
++ insn = emit_insn (gen_rtx_SET (SImode,
++ gen_rtx_REG (SImode, FP_REGNO),
++ gen_rtx_REG (SImode, SP_REGNO)));
++
++ RTX_FRAME_RELATED_P (insn) = 1;
++ }
++
++ /* If we are profiling, make sure no instructions are scheduled before
++ the call to mcount. */
++ if (current_function_profile)
++ emit_insn (gen_blockage ());
++}
++
++void
++expand_epilogue (bool sibcall_p)
++{
++ rtx insn;
++ int i;
++ HOST_WIDE_INT total_frame_size;
++ int register_store_offset;
++
++ total_frame_size = compute_frame_size ();
++
++ if (!sibcall_p && nios2_can_use_return_insn ())
++ {
++ insn = emit_jump_insn (gen_return ());
++ return;
++ }
++
++ emit_insn (gen_blockage ());
++
++ register_store_offset =
++ cfun->machine->frame.save_regs_offset +
++ cfun->machine->frame.save_reg_rounded;
++
++ if (MUST_SAVE_REGISTER (RA_REGNO))
++ {
++ register_store_offset -= 4;
++ restore_reg (RA_REGNO, register_store_offset);
++ }
++
++ if (MUST_SAVE_REGISTER (FP_REGNO))
++ {
++ register_store_offset -= 4;
++ restore_reg (FP_REGNO, register_store_offset);
++ }
++
++ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++ {
++ if (MUST_SAVE_REGISTER (i) && i != FP_REGNO && i != RA_REGNO)
++ {
++ register_store_offset -= 4;
++ restore_reg (i, register_store_offset);
++ }
++ }
++
++ if (total_frame_size)
++ {
++ rtx sp_adjust;
++
++ if (TOO_BIG_OFFSET (total_frame_size))
++ {
++ sp_adjust = gen_rtx_REG (SImode, TEMP_REG_NUM);
++ insn = emit_insn (gen_rtx_SET (SImode,
++ sp_adjust,
++ GEN_INT (total_frame_size)));
++
++ }
++ else
++ {
++ sp_adjust = GEN_INT (total_frame_size);
++ }
++
++ insn = gen_rtx_SET (SImode,
++ stack_pointer_rtx,
++ gen_rtx_PLUS (SImode,
++ stack_pointer_rtx,
++ sp_adjust));
++ insn = emit_insn (insn);
++ }
++
++
++ if (!sibcall_p)
++ {
++ insn = emit_jump_insn (gen_return_from_epilogue (gen_rtx (REG, Pmode,
++ RA_REGNO)));
++ }
++}
++
++
++bool
++nios2_function_ok_for_sibcall (tree a ATTRIBUTE_UNUSED, tree b ATTRIBUTE_UNUSED)
++{
++ return true;
++}
++
++
++
++\f
++
++/* ----------------------- *
++ * Profiling
++ * ----------------------- */
++
++void
++function_profiler (FILE *file, int labelno)
++{
++ fprintf (file, "\t%s mcount begin, label: .LP%d\n",
++ ASM_COMMENT_START, labelno);
++ fprintf (file, "\tnextpc\tr8\n");
++ fprintf (file, "\tmov\tr9, ra\n");
++ fprintf (file, "\tmovhi\tr10, %%hiadj(.LP%d)\n", labelno);
++ fprintf (file, "\taddi\tr10, r10, %%lo(.LP%d)\n", labelno);
++ fprintf (file, "\tcall\tmcount\n");
++ fprintf (file, "\tmov\tra, r9\n");
++ fprintf (file, "\t%s mcount end\n", ASM_COMMENT_START);
++}
++
++
++/***************************************
++ * Stack Layout
++ ***************************************/
++
++
++void
++dump_frame_size (FILE *file)
++{
++ fprintf (file, "\t%s Current Frame Info\n", ASM_COMMENT_START);
++
++ fprintf (file, "\t%s total_size = %ld\n", ASM_COMMENT_START,
++ cfun->machine->frame.total_size);
++ fprintf (file, "\t%s var_size = %ld\n", ASM_COMMENT_START,
++ cfun->machine->frame.var_size);
++ fprintf (file, "\t%s args_size = %ld\n", ASM_COMMENT_START,
++ cfun->machine->frame.args_size);
++ fprintf (file, "\t%s save_reg_size = %d\n", ASM_COMMENT_START,
++ cfun->machine->frame.save_reg_size);
++ fprintf (file, "\t%s save_reg_rounded = %d\n", ASM_COMMENT_START,
++ cfun->machine->frame.save_reg_rounded);
++ fprintf (file, "\t%s initialized = %d\n", ASM_COMMENT_START,
++ cfun->machine->frame.initialized);
++ fprintf (file, "\t%s num_regs = %d\n", ASM_COMMENT_START,
++ cfun->machine->frame.num_regs);
++ fprintf (file, "\t%s save_regs_offset = %ld\n", ASM_COMMENT_START,
++ cfun->machine->frame.save_regs_offset);
++ fprintf (file, "\t%s current_function_is_leaf = %d\n", ASM_COMMENT_START,
++ current_function_is_leaf);
++ fprintf (file, "\t%s frame_pointer_needed = %d\n", ASM_COMMENT_START,
++ frame_pointer_needed);
++ fprintf (file, "\t%s pretend_args_size = %d\n", ASM_COMMENT_START,
++ current_function_pretend_args_size);
++
++}
++
++
++/* Return the bytes needed to compute the frame pointer from the current
++ stack pointer.
++*/
++
++HOST_WIDE_INT
++compute_frame_size ()
++{
++ unsigned int regno;
++ HOST_WIDE_INT var_size; /* # of var. bytes allocated */
++ HOST_WIDE_INT total_size; /* # bytes that the entire frame takes up */
++ HOST_WIDE_INT save_reg_size; /* # bytes needed to store callee save regs */
++ HOST_WIDE_INT save_reg_rounded;
++ /* # bytes needed to store callee save regs (rounded) */
++ HOST_WIDE_INT out_args_size; /* # bytes needed for outgoing args */
++
++ save_reg_size = 0;
++ var_size = STACK_ALIGN (get_frame_size ());
++ out_args_size = STACK_ALIGN (current_function_outgoing_args_size);
++
++ total_size = var_size + out_args_size;
++
++ /* Calculate space needed for gp registers. */
++ for (regno = 0; regno <= FIRST_PSEUDO_REGISTER; regno++)
++ {
++ if (MUST_SAVE_REGISTER (regno))
++ {
++ save_reg_size += 4;
++ }
++ }
++
++ save_reg_rounded = STACK_ALIGN (save_reg_size);
++ total_size += save_reg_rounded;
++
++ total_size += STACK_ALIGN (current_function_pretend_args_size);
++
++ /* Save other computed information. */
++ cfun->machine->frame.total_size = total_size;
++ cfun->machine->frame.var_size = var_size;
++ cfun->machine->frame.args_size = current_function_outgoing_args_size;
++ cfun->machine->frame.save_reg_size = save_reg_size;
++ cfun->machine->frame.save_reg_rounded = save_reg_rounded;
++ cfun->machine->frame.initialized = reload_completed;
++ cfun->machine->frame.num_regs = save_reg_size / UNITS_PER_WORD;
++
++ cfun->machine->frame.save_regs_offset
++ = save_reg_rounded ? current_function_outgoing_args_size + var_size : 0;
++
++ return total_size;
++}
++
++
++int
++nios2_initial_elimination_offset (int from, int to ATTRIBUTE_UNUSED)
++{
++ int offset;
++
++ /* Set OFFSET to the offset from the stack pointer. */
++ switch (from)
++ {
++ case FRAME_POINTER_REGNUM:
++ offset = 0;
++ break;
++
++ case ARG_POINTER_REGNUM:
++ compute_frame_size ();
++ offset = cfun->machine->frame.total_size;
++ offset -= current_function_pretend_args_size;
++ break;
++
++ case RETURN_ADDRESS_POINTER_REGNUM:
++ compute_frame_size ();
++ /* since the return address is always the first of the
++ saved registers, return the offset to the beginning
++ of the saved registers block */
++ offset = cfun->machine->frame.save_regs_offset;
++ break;
++
++ default:
++ abort ();
++ }
++
++ return offset;
++}
++
++/* Return nonzero if this function is known to have a null epilogue.
++ This allows the optimizer to omit jumps to jumps if no stack
++ was created. */
++int
++nios2_can_use_return_insn ()
++{
++ if (!reload_completed)
++ return 0;
++
++ if (regs_ever_live[RA_REGNO] || current_function_profile)
++ return 0;
++
++ if (cfun->machine->frame.initialized)
++ return cfun->machine->frame.total_size == 0;
++
++ return compute_frame_size () == 0;
++}
++
++
++
++\f
++
++/***************************************
++ *
++ ***************************************/
++
++const char *nios2_sys_nosys_string; /* for -msys=nosys */
++const char *nios2_sys_lib_string; /* for -msys-lib= */
++const char *nios2_sys_crt0_string; /* for -msys-crt0= */
++
++void
++override_options ()
++{
++ /* Function to allocate machine-dependent function status. */
++ init_machine_status = &nios2_init_machine_status;
++
++ nios2_section_threshold
++ = g_switch_set ? g_switch_value : NIOS2_DEFAULT_GVALUE;
++
++ if (nios2_sys_nosys_string && *nios2_sys_nosys_string)
++ {
++ error ("invalid option '-msys=nosys%s'", nios2_sys_nosys_string);
++ }
++
++ /* If we don't have mul, we don't have mulx either! */
++ if (!TARGET_HAS_MUL && TARGET_HAS_MULX)
++ {
++ target_flags &= ~HAS_MULX_FLAG;
++ }
++
++}
++
++void
++optimization_options (int level, int size)
++{
++ if (level || size)
++ {
++ target_flags |= INLINE_MEMCPY_FLAG;
++ }
++
++ if (level >= 3 && !size)
++ {
++ target_flags |= FAST_SW_DIV_FLAG;
++ }
++}
++
++/* Allocate a chunk of memory for per-function machine-dependent data. */
++static struct machine_function *
++nios2_init_machine_status ()
++{
++ return ((struct machine_function *)
++ ggc_alloc_cleared (sizeof (struct machine_function)));
++}
++
++\f
++
++/*****************
++ * Describing Relative Costs of Operations
++ *****************/
++
++/* Compute a (partial) cost for rtx X. Return true if the complete
++ cost has been computed, and false if subexpressions should be
++ scanned. In either case, *TOTAL contains the cost result. */
++
++
++
++static bool
++nios2_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, int *total)
++{
++ switch (code)
++ {
++ case CONST_INT:
++ if (INTVAL (x) == 0)
++ {
++ *total = COSTS_N_INSNS (0);
++ return true;
++ }
++ else if (SMALL_INT (INTVAL (x))
++ || SMALL_INT_UNSIGNED (INTVAL (x))
++ || UPPER16_INT (INTVAL (x)))
++ {
++ *total = COSTS_N_INSNS (2);
++ return true;
++ }
++ else
++ {
++ *total = COSTS_N_INSNS (4);
++ return true;
++ }
++
++ case LABEL_REF:
++ case SYMBOL_REF:
++ /* ??? gp relative stuff will fit in here */
++ /* fall through */
++ case CONST:
++ case CONST_DOUBLE:
++ {
++ *total = COSTS_N_INSNS (4);
++ return true;
++ }
++
++ case MULT:
++ {
++ *total = COSTS_N_INSNS (1);
++ return false;
++ }
++ case SIGN_EXTEND:
++ {
++ *total = COSTS_N_INSNS (3);
++ return false;
++ }
++ case ZERO_EXTEND:
++ {
++ *total = COSTS_N_INSNS (1);
++ return false;
++ }
++
++ default:
++ return false;
++ }
++}
++
++
++/***************************************
++ * INSTRUCTION SUPPORT
++ *
++ * These functions are used within the Machine Description to
++ * handle common or complicated output and expansions from
++ * instructions.
++ ***************************************/
++
++int
++nios2_emit_move_sequence (rtx *operands, enum machine_mode mode)
++{
++ rtx to = operands[0];
++ rtx from = operands[1];
++
++ if (!register_operand (to, mode) && !reg_or_0_operand (from, mode))
++ {
++ if (no_new_pseudos)
++ internal_error ("Trying to force_reg no_new_pseudos == 1");
++ from = copy_to_mode_reg (mode, from);
++ }
++
++ operands[0] = to;
++ operands[1] = from;
++ return 0;
++}
++
++/* Divide Support */
++
++/*
++ If -O3 is used, we want to output a table lookup for
++ divides between small numbers (both num and den >= 0
++ and < 0x10). The overhead of this method in the worse
++ case is 40 bytes in the text section (10 insns) and
++ 256 bytes in the data section. Additional divides do
++ not incur additional penalties in the data section.
++
++ Code speed is improved for small divides by about 5x
++ when using this method in the worse case (~9 cycles
++ vs ~45). And in the worse case divides not within the
++ table are penalized by about 10% (~5 cycles vs ~45).
++ However in the typical case the penalty is not as bad
++ because doing the long divide in only 45 cycles is
++ quite optimistic.
++
++ ??? It would be nice to have some benchmarks other
++ than Dhrystone to back this up.
++
++ This bit of expansion is to create this instruction
++ sequence as rtl.
++ or $8, $4, $5
++ slli $9, $4, 4
++ cmpgeui $3, $8, 16
++ beq $3, $0, .L3
++ or $10, $9, $5
++ add $12, $11, divide_table
++ ldbu $2, 0($12)
++ br .L1
++.L3:
++ call slow_div
++.L1:
++# continue here with result in $2
++
++ ??? Ideally I would like the emit libcall block to contain
++ all of this code, but I don't know how to do that. What it
++ means is that if the divide can be eliminated, it may not
++ completely disappear.
++
++ ??? The __divsi3_table label should ideally be moved out
++ of this block and into a global. If it is placed into the
++ sdata section we can save even more cycles by doing things
++ gp relative.
++*/
++int
++nios2_emit_expensive_div (rtx *operands, enum machine_mode mode)
++{
++ rtx or_result, shift_left_result;
++ rtx lookup_value;
++ rtx lab1, lab3;
++ rtx insns;
++ rtx libfunc;
++ rtx final_result;
++ rtx tmp;
++
++ /* it may look a little generic, but only SImode
++ is supported for now */
++ if (mode != SImode)
++ abort ();
++
++ libfunc = sdiv_optab->handlers[(int) SImode].libfunc;
++
++
++
++ lab1 = gen_label_rtx ();
++ lab3 = gen_label_rtx ();
++
++ or_result = expand_simple_binop (SImode, IOR,
++ operands[1], operands[2],
++ 0, 0, OPTAB_LIB_WIDEN);
++
++ emit_cmp_and_jump_insns (or_result, GEN_INT (15), GTU, 0,
++ GET_MODE (or_result), 0, lab3);
++ JUMP_LABEL (get_last_insn ()) = lab3;
++
++ shift_left_result = expand_simple_binop (SImode, ASHIFT,
++ operands[1], GEN_INT (4),
++ 0, 0, OPTAB_LIB_WIDEN);
++
++ lookup_value = expand_simple_binop (SImode, IOR,
++ shift_left_result, operands[2],
++ 0, 0, OPTAB_LIB_WIDEN);
++
++ convert_move (operands[0],
++ gen_rtx (MEM, QImode,
++ gen_rtx (PLUS, SImode,
++ lookup_value,
++ gen_rtx_SYMBOL_REF (SImode, "__divsi3_table"))),
++ 1);
++
++
++ tmp = emit_jump_insn (gen_jump (lab1));
++ JUMP_LABEL (tmp) = lab1;
++ emit_barrier ();
++
++ emit_label (lab3);
++ LABEL_NUSES (lab3) = 1;
++
++ start_sequence ();
++ final_result = emit_library_call_value (libfunc, NULL_RTX,
++ LCT_CONST, SImode, 2,
++ operands[1], SImode,
++ operands[2], SImode);
++
++
++ insns = get_insns ();
++ end_sequence ();
++ emit_libcall_block (insns, operands[0], final_result,
++ gen_rtx (DIV, SImode, operands[1], operands[2]));
++
++ emit_label (lab1);
++ LABEL_NUSES (lab1) = 1;
++ return 1;
++}
++
++/* Branches/Compares */
++
++/* the way of handling branches/compares
++ in gcc is heavily borrowed from MIPS */
++
++enum internal_test
++{
++ ITEST_EQ,
++ ITEST_NE,
++ ITEST_GT,
++ ITEST_GE,
++ ITEST_LT,
++ ITEST_LE,
++ ITEST_GTU,
++ ITEST_GEU,
++ ITEST_LTU,
++ ITEST_LEU,
++ ITEST_MAX
++};
++
++static enum internal_test map_test_to_internal_test (enum rtx_code);
++
++/* Cached operands, and operator to compare for use in set/branch/trap
++ on condition codes. */
++rtx branch_cmp[2];
++enum cmp_type branch_type;
++
++/* Make normal rtx_code into something we can index from an array */
++
++static enum internal_test
++map_test_to_internal_test (enum rtx_code test_code)
++{
++ enum internal_test test = ITEST_MAX;
++
++ switch (test_code)
++ {
++ case EQ:
++ test = ITEST_EQ;
++ break;
++ case NE:
++ test = ITEST_NE;
++ break;
++ case GT:
++ test = ITEST_GT;
++ break;
++ case GE:
++ test = ITEST_GE;
++ break;
++ case LT:
++ test = ITEST_LT;
++ break;
++ case LE:
++ test = ITEST_LE;
++ break;
++ case GTU:
++ test = ITEST_GTU;
++ break;
++ case GEU:
++ test = ITEST_GEU;
++ break;
++ case LTU:
++ test = ITEST_LTU;
++ break;
++ case LEU:
++ test = ITEST_LEU;
++ break;
++ default:
++ break;
++ }
++
++ return test;
++}
++
++/* Generate the code to compare (and possibly branch) two integer values
++ TEST_CODE is the comparison code we are trying to emulate
++ (or implement directly)
++ RESULT is where to store the result of the comparison,
++ or null to emit a branch
++ CMP0 CMP1 are the two comparison operands
++ DESTINATION is the destination of the branch, or null to only compare
++ */
++
++void
++gen_int_relational (enum rtx_code test_code, /* relational test (EQ, etc) */
++ rtx result, /* result to store comp. or 0 if branch */
++ rtx cmp0, /* first operand to compare */
++ rtx cmp1, /* second operand to compare */
++ rtx destination) /* destination of the branch, or 0 if compare */
++{
++ struct cmp_info
++ {
++ /* for register (or 0) compares */
++ enum rtx_code test_code_reg; /* code to use in instruction (LT vs. LTU) */
++ int reverse_regs; /* reverse registers in test */
++
++ /* for immediate compares */
++ enum rtx_code test_code_const;
++ /* code to use in instruction (LT vs. LTU) */
++ int const_low; /* low bound of constant we can accept */
++ int const_high; /* high bound of constant we can accept */
++ int const_add; /* constant to add */
++
++ /* generic info */
++ int unsignedp; /* != 0 for unsigned comparisons. */
++ };
++
++ static const struct cmp_info info[(int) ITEST_MAX] = {
++
++ {EQ, 0, EQ, -32768, 32767, 0, 0}, /* EQ */
++ {NE, 0, NE, -32768, 32767, 0, 0}, /* NE */
++
++ {LT, 1, GE, -32769, 32766, 1, 0}, /* GT */
++ {GE, 0, GE, -32768, 32767, 0, 0}, /* GE */
++ {LT, 0, LT, -32768, 32767, 0, 0}, /* LT */
++ {GE, 1, LT, -32769, 32766, 1, 0}, /* LE */
++
++ {LTU, 1, GEU, 0, 65534, 1, 0}, /* GTU */
++ {GEU, 0, GEU, 0, 65535, 0, 0}, /* GEU */
++ {LTU, 0, LTU, 0, 65535, 0, 0}, /* LTU */
++ {GEU, 1, LTU, 0, 65534, 1, 0}, /* LEU */
++ };
++
++ enum internal_test test;
++ enum machine_mode mode;
++ const struct cmp_info *p_info;
++ int branch_p;
++
++
++
++
++ test = map_test_to_internal_test (test_code);
++ if (test == ITEST_MAX)
++ abort ();
++
++ p_info = &info[(int) test];
++
++ mode = GET_MODE (cmp0);
++ if (mode == VOIDmode)
++ mode = GET_MODE (cmp1);
++
++ branch_p = (destination != 0);
++
++ /* We can't, under any circumstances, have const_ints in cmp0
++ ??? Actually we could have const0 */
++ if (GET_CODE (cmp0) == CONST_INT)
++ cmp0 = force_reg (mode, cmp0);
++
++ /* if the comparison is against an int not in legal range
++ move it into a register */
++ if (GET_CODE (cmp1) == CONST_INT)
++ {
++ HOST_WIDE_INT value = INTVAL (cmp1);
++
++ if (value < p_info->const_low || value > p_info->const_high)
++ cmp1 = force_reg (mode, cmp1);
++ }
++
++ /* Comparison to constants, may involve adding 1 to change a GT into GE.
++ Comparison between two registers, may involve switching operands. */
++ if (GET_CODE (cmp1) == CONST_INT)
++ {
++ if (p_info->const_add != 0)
++ {
++ HOST_WIDE_INT new = INTVAL (cmp1) + p_info->const_add;
++
++ /* If modification of cmp1 caused overflow,
++ we would get the wrong answer if we follow the usual path;
++ thus, x > 0xffffffffU would turn into x > 0U. */
++ if ((p_info->unsignedp
++ ? (unsigned HOST_WIDE_INT) new >
++ (unsigned HOST_WIDE_INT) INTVAL (cmp1)
++ : new > INTVAL (cmp1)) != (p_info->const_add > 0))
++ {
++ /* ??? This case can never happen with the current numbers,
++ but I am paranoid and would rather an abort than
++ a bug I will never find */
++ abort ();
++ }
++ else
++ cmp1 = GEN_INT (new);
++ }
++ }
++
++ else if (p_info->reverse_regs)
++ {
++ rtx temp = cmp0;
++ cmp0 = cmp1;
++ cmp1 = temp;
++ }
++
++
++
++ if (branch_p)
++ {
++ if (register_operand (cmp0, mode) && register_operand (cmp1, mode))
++ {
++ rtx insn;
++ rtx cond = gen_rtx (p_info->test_code_reg, mode, cmp0, cmp1);
++ rtx label = gen_rtx_LABEL_REF (VOIDmode, destination);
++
++ insn = gen_rtx_SET (VOIDmode, pc_rtx,
++ gen_rtx_IF_THEN_ELSE (VOIDmode,
++ cond, label, pc_rtx));
++ emit_jump_insn (insn);
++ }
++ else
++ {
++ rtx cond, label;
++
++ result = gen_reg_rtx (mode);
++
++ emit_move_insn (result,
++ gen_rtx (p_info->test_code_const, mode, cmp0,
++ cmp1));
++
++ cond = gen_rtx (NE, mode, result, const0_rtx);
++ label = gen_rtx_LABEL_REF (VOIDmode, destination);
++
++ emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
++ gen_rtx_IF_THEN_ELSE (VOIDmode,
++ cond,
++ label, pc_rtx)));
++ }
++ }
++ else
++ {
++ if (register_operand (cmp0, mode) && register_operand (cmp1, mode))
++ {
++ emit_move_insn (result,
++ gen_rtx (p_info->test_code_reg, mode, cmp0, cmp1));
++ }
++ else
++ {
++ emit_move_insn (result,
++ gen_rtx (p_info->test_code_const, mode, cmp0,
++ cmp1));
++ }
++ }
++
++}
++
++
++/* ??? For now conditional moves are only supported
++ when the mode of the operands being compared are
++ the same as the ones being moved */
++
++void
++gen_conditional_move (rtx *operands, enum machine_mode mode)
++{
++ rtx insn, cond;
++ rtx cmp_reg = gen_reg_rtx (mode);
++ enum rtx_code cmp_code = GET_CODE (operands[1]);
++ enum rtx_code move_code = EQ;
++
++ /* emit a comparison if it is not "simple".
++ Simple comparisons are X eq 0 and X ne 0 */
++ if ((cmp_code == EQ || cmp_code == NE) && branch_cmp[1] == const0_rtx)
++ {
++ cmp_reg = branch_cmp[0];
++ move_code = cmp_code;
++ }
++ else if ((cmp_code == EQ || cmp_code == NE) && branch_cmp[0] == const0_rtx)
++ {
++ cmp_reg = branch_cmp[1];
++ move_code = cmp_code == EQ ? NE : EQ;
++ }
++ else
++ gen_int_relational (cmp_code, cmp_reg, branch_cmp[0], branch_cmp[1],
++ NULL_RTX);
++
++ cond = gen_rtx (move_code, VOIDmode, cmp_reg, CONST0_RTX (mode));
++ insn = gen_rtx_SET (mode, operands[0],
++ gen_rtx_IF_THEN_ELSE (mode,
++ cond, operands[2], operands[3]));
++ emit_insn (insn);
++}
++
++/*******************
++ * Addressing Modes
++ *******************/
++
++int
++nios2_legitimate_address (rtx operand, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int strict)
++{
++ int ret_val = 0;
++
++ switch (GET_CODE (operand))
++ {
++ /* direct. */
++ case SYMBOL_REF:
++ if (SYMBOL_REF_IN_NIOS2_SMALL_DATA_P (operand))
++ {
++ ret_val = 1;
++ break;
++ }
++ /* else, fall through */
++ case LABEL_REF:
++ case CONST_INT:
++ case CONST:
++ case CONST_DOUBLE:
++ /* ??? In here I need to add gp addressing */
++ ret_val = 0;
++
++ break;
++
++ /* Register indirect. */
++ case REG:
++ ret_val = REG_OK_FOR_BASE_P2 (operand, strict);
++ break;
++
++ /* Register indirect with displacement */
++ case PLUS:
++ {
++ rtx op0 = XEXP (operand, 0);
++ rtx op1 = XEXP (operand, 1);
++
++ if (REG_P (op0) && REG_P (op1))
++ ret_val = 0;
++ else if (REG_P (op0) && CONSTANT_P (op1))
++ ret_val = REG_OK_FOR_BASE_P2 (op0, strict)
++ && SMALL_INT (INTVAL (op1));
++ else if (REG_P (op1) && CONSTANT_P (op0))
++ ret_val = REG_OK_FOR_BASE_P2 (op1, strict)
++ && SMALL_INT (INTVAL (op0));
++ else
++ ret_val = 0;
++ }
++ break;
++
++ default:
++ ret_val = 0;
++ break;
++ }
++
++ return ret_val;
++}
++
++/* Return true if EXP should be placed in the small data section. */
++
++static bool
++nios2_in_small_data_p (tree exp)
++{
++ /* We want to merge strings, so we never consider them small data. */
++ if (TREE_CODE (exp) == STRING_CST)
++ return false;
++
++ if (TREE_CODE (exp) == VAR_DECL && DECL_SECTION_NAME (exp))
++ {
++ const char *section = TREE_STRING_POINTER (DECL_SECTION_NAME (exp));
++ /* ??? these string names need moving into
++ an array in some header file */
++ if (nios2_section_threshold > 0
++ && (strcmp (section, ".sbss") == 0
++ || strncmp (section, ".sbss.", 6) == 0
++ || strcmp (section, ".sdata") == 0
++ || strncmp (section, ".sdata.", 7) == 0))
++ return true;
++ }
++ else if (TREE_CODE (exp) == VAR_DECL)
++ {
++ HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
++
++ /* If this is an incomplete type with size 0, then we can't put it
++ in sdata because it might be too big when completed. */
++ if (size > 0 && size <= nios2_section_threshold)
++ return true;
++ }
++
++ return false;
++}
++
++static void
++nios2_encode_section_info (tree decl, rtx rtl, int first)
++{
++
++ rtx symbol;
++ int flags;
++
++ default_encode_section_info (decl, rtl, first);
++
++ /* Careful not to prod global register variables. */
++ if (GET_CODE (rtl) != MEM)
++ return;
++ symbol = XEXP (rtl, 0);
++ if (GET_CODE (symbol) != SYMBOL_REF)
++ return;
++
++ flags = SYMBOL_REF_FLAGS (symbol);
++
++ /* We don't want weak variables to be addressed with gp in case they end up with
++ value 0 which is not within 2^15 of $gp */
++ if (DECL_P (decl) && DECL_WEAK (decl))
++ flags |= SYMBOL_FLAG_WEAK_DECL;
++
++ SYMBOL_REF_FLAGS (symbol) = flags;
++}
++
++
++static unsigned int
++nios2_section_type_flags (tree decl, const char *name, int reloc)
++{
++ unsigned int flags;
++
++ flags = default_section_type_flags (decl, name, reloc);
++
++ /* ??? these string names need moving into an array in some header file */
++ if (strcmp (name, ".sbss") == 0
++ || strncmp (name, ".sbss.", 6) == 0
++ || strcmp (name, ".sdata") == 0
++ || strncmp (name, ".sdata.", 7) == 0)
++ flags |= SECTION_SMALL;
++
++ return flags;
++}
++
++
++
++
++/*****************************************
++ * Defining the Output Assembler Language
++ *****************************************/
++
++/* -------------- *
++ * Output of Data
++ * -------------- */
++
++
++/* -------------------------------- *
++ * Output of Assembler Instructions
++ * -------------------------------- */
++
++
++/* print the operand OP to file stream
++ FILE modified by LETTER. LETTER
++ can be one of:
++ i: print "i" if OP is an immediate, except 0
++ o: print "io" if OP is volatile
++
++ z: for const0_rtx print $0 instead of 0
++ H: for %hiadj
++ L: for %lo
++ U: for upper half of 32 bit value
++ */
++
++void
++nios2_print_operand (FILE *file, rtx op, int letter)
++{
++
++ switch (letter)
++ {
++ case 'i':
++ if (CONSTANT_P (op) && (op != const0_rtx))
++ fprintf (file, "i");
++ return;
++
++ case 'o':
++ if (GET_CODE (op) == MEM
++ && ((MEM_VOLATILE_P (op) && !TARGET_CACHE_VOLATILE)
++ || TARGET_BYPASS_CACHE))
++ fprintf (file, "io");
++ return;
++
++ default:
++ break;
++ }
++
++ if (comparison_operator (op, VOIDmode))
++ {
++ if (letter == 0)
++ {
++ fprintf (file, "%s", GET_RTX_NAME (GET_CODE (op)));
++ return;
++ }
++ }
++
++
++ switch (GET_CODE (op))
++ {
++ case REG:
++ if (letter == 0 || letter == 'z')
++ {
++ fprintf (file, "%s", reg_names[REGNO (op)]);
++ return;
++ }
++
++ case CONST_INT:
++ if (INTVAL (op) == 0 && letter == 'z')
++ {
++ fprintf (file, "zero");
++ return;
++ }
++ else if (letter == 'U')
++ {
++ HOST_WIDE_INT val = INTVAL (op);
++ rtx new_op;
++ val = (val / 65536) & 0xFFFF;
++ new_op = GEN_INT (val);
++ output_addr_const (file, new_op);
++ return;
++ }
++
++ /* else, fall through */
++ case CONST:
++ case LABEL_REF:
++ case SYMBOL_REF:
++ case CONST_DOUBLE:
++ if (letter == 0 || letter == 'z')
++ {
++ output_addr_const (file, op);
++ return;
++ }
++ else if (letter == 'H')
++ {
++ fprintf (file, "%%hiadj(");
++ output_addr_const (file, op);
++ fprintf (file, ")");
++ return;
++ }
++ else if (letter == 'L')
++ {
++ fprintf (file, "%%lo(");
++ output_addr_const (file, op);
++ fprintf (file, ")");
++ return;
++ }
++
++
++ case SUBREG:
++ case MEM:
++ if (letter == 0)
++ {
++ output_address (op);
++ return;
++ }
++
++ case CODE_LABEL:
++ if (letter == 0)
++ {
++ output_addr_const (file, op);
++ return;
++ }
++
++ default:
++ break;
++ }
++
++ fprintf (stderr, "Missing way to print (%c) ", letter);
++ debug_rtx (op);
++ abort ();
++}
++
++static int gprel_constant (rtx);
++
++static int
++gprel_constant (rtx op)
++{
++ if (GET_CODE (op) == SYMBOL_REF
++ && SYMBOL_REF_IN_NIOS2_SMALL_DATA_P (op))
++ {
++ return 1;
++ }
++ else if (GET_CODE (op) == CONST
++ && GET_CODE (XEXP (op, 0)) == PLUS)
++ {
++ return gprel_constant (XEXP (XEXP (op, 0), 0));
++ }
++ else
++ {
++ return 0;
++ }
++}
++
++void
++nios2_print_operand_address (FILE *file, rtx op)
++{
++ switch (GET_CODE (op))
++ {
++ case CONST:
++ case CONST_INT:
++ case LABEL_REF:
++ case CONST_DOUBLE:
++ case SYMBOL_REF:
++ if (gprel_constant (op))
++ {
++ fprintf (file, "%%gprel(");
++ output_addr_const (file, op);
++ fprintf (file, ")(%s)", reg_names[GP_REGNO]);
++ return;
++ }
++
++ break;
++
++ case PLUS:
++ {
++ rtx op0 = XEXP (op, 0);
++ rtx op1 = XEXP (op, 1);
++
++ if (REG_P (op0) && CONSTANT_P (op1))
++ {
++ output_addr_const (file, op1);
++ fprintf (file, "(%s)", reg_names[REGNO (op0)]);
++ return;
++ }
++ else if (REG_P (op1) && CONSTANT_P (op0))
++ {
++ output_addr_const (file, op0);
++ fprintf (file, "(%s)", reg_names[REGNO (op1)]);
++ return;
++ }
++ }
++ break;
++
++ case REG:
++ fprintf (file, "0(%s)", reg_names[REGNO (op)]);
++ return;
++
++ case MEM:
++ {
++ rtx base = XEXP (op, 0);
++ PRINT_OPERAND_ADDRESS (file, base);
++ return;
++ }
++ default:
++ break;
++ }
++
++ fprintf (stderr, "Missing way to print address\n");
++ debug_rtx (op);
++ abort ();
++}
++\f
++
++
++
++
++/****************************
++ * Predicates
++ ****************************/
++
++int
++arith_operand (rtx op, enum machine_mode mode)
++{
++ if (GET_CODE (op) == CONST_INT && SMALL_INT (INTVAL (op)))
++ return 1;
++
++ return register_operand (op, mode);
++}
++
++int
++uns_arith_operand (rtx op, enum machine_mode mode)
++{
++ if (GET_CODE (op) == CONST_INT && SMALL_INT_UNSIGNED (INTVAL (op)))
++ return 1;
++
++ return register_operand (op, mode);
++}
++
++int
++logical_operand (rtx op, enum machine_mode mode)
++{
++ if (GET_CODE (op) == CONST_INT
++ && (SMALL_INT_UNSIGNED (INTVAL (op)) || UPPER16_INT (INTVAL (op))))
++ return 1;
++
++ return register_operand (op, mode);
++}
++
++int
++shift_operand (rtx op, enum machine_mode mode)
++{
++ if (GET_CODE (op) == CONST_INT && SHIFT_INT (INTVAL (op)))
++ return 1;
++
++ return register_operand (op, mode);
++}
++
++int
++rdwrctl_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
++{
++ return GET_CODE (op) == CONST_INT && RDWRCTL_INT (INTVAL (op));
++}
++
++/* Return truth value of whether OP is a register or the constant 0. */
++
++int
++reg_or_0_operand (rtx op, enum machine_mode mode)
++{
++ switch (GET_CODE (op))
++ {
++ case CONST_INT:
++ return INTVAL (op) == 0;
++
++ case CONST_DOUBLE:
++ return op == CONST0_RTX (mode);
++
++ default:
++ break;
++ }
++
++ return register_operand (op, mode);
++}
++
++
++int
++equality_op (rtx op, enum machine_mode mode)
++{
++ if (mode != GET_MODE (op))
++ return 0;
++
++ return GET_CODE (op) == EQ || GET_CODE (op) == NE;
++}
++
++int
++custom_insn_opcode (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
++{
++ return GET_CODE (op) == CONST_INT && CUSTOM_INSN_OPCODE (INTVAL (op));
++}
++
++
++\f
++
++
++
++
++/*****************************************************************************
++**
++** instruction scheduler
++**
++*****************************************************************************/
++static int
++nios2_use_dfa_pipeline_interface ()
++{
++ return 1;
++}
++
++
++static int
++nios2_issue_rate ()
++{
++#ifdef MAX_DFA_ISSUE_RATE
++ return MAX_DFA_ISSUE_RATE;
++#else
++ return 1;
++#endif
++}
++
++
++const char *
++asm_output_opcode (FILE *file ATTRIBUTE_UNUSED,
++ const char *ptr ATTRIBUTE_UNUSED)
++{
++ const char *p;
++
++ p = ptr;
++ return ptr;
++}
++\f
++
++
++/*****************************************************************************
++**
++** function arguments
++**
++*****************************************************************************/
++
++void
++init_cumulative_args (CUMULATIVE_ARGS *cum,
++ tree fntype ATTRIBUTE_UNUSED,
++ rtx libname ATTRIBUTE_UNUSED,
++ tree fndecl ATTRIBUTE_UNUSED,
++ int n_named_args ATTRIBUTE_UNUSED)
++{
++ cum->regs_used = 0;
++}
++
++
++/* Update the data in CUM to advance over an argument
++ of mode MODE and data type TYPE.
++ (TYPE is null for libcalls where that information may not be available.) */
++
++void
++function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
++ tree type ATTRIBUTE_UNUSED, int named ATTRIBUTE_UNUSED)
++{
++ HOST_WIDE_INT param_size;
++
++ if (mode == BLKmode)
++ {
++ param_size = int_size_in_bytes (type);
++ if (param_size < 0)
++ internal_error
++ ("Do not know how to handle large structs or variable length types");
++ }
++ else
++ {
++ param_size = GET_MODE_SIZE (mode);
++ }
++
++ /* convert to words (round up) */
++ param_size = (3 + param_size) / 4;
++
++ if (cum->regs_used + param_size > NUM_ARG_REGS)
++ {
++ cum->regs_used = NUM_ARG_REGS;
++ }
++ else
++ {
++ cum->regs_used += param_size;
++ }
++
++ return;
++}
++
++/* Define where to put the arguments to a function. Value is zero to
++ push the argument on the stack, or a hard register in which to
++ store the argument.
++
++ MODE is the argument's machine mode.
++ TYPE is the data type of the argument (as a tree).
++ This is null for libcalls where that information may
++ not be available.
++ CUM is a variable of type CUMULATIVE_ARGS which gives info about
++ the preceding args and about the function being called.
++ NAMED is nonzero if this argument is a named parameter
++ (otherwise it is an extra parameter matching an ellipsis). */
++rtx
++function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
++ tree type ATTRIBUTE_UNUSED, int named ATTRIBUTE_UNUSED)
++{
++ rtx return_rtx = NULL_RTX;
++
++ if (cum->regs_used < NUM_ARG_REGS)
++ {
++ return_rtx = gen_rtx_REG (mode, FIRST_ARG_REGNO + cum->regs_used);
++ }
++
++ return return_rtx;
++}
++
++int
++function_arg_partial_nregs (const CUMULATIVE_ARGS *cum,
++ enum machine_mode mode, tree type,
++ int named ATTRIBUTE_UNUSED)
++{
++ HOST_WIDE_INT param_size;
++
++ if (mode == BLKmode)
++ {
++ param_size = int_size_in_bytes (type);
++ if (param_size < 0)
++ internal_error
++ ("Do not know how to handle large structs or variable length types");
++ }
++ else
++ {
++ param_size = GET_MODE_SIZE (mode);
++ }
++
++ /* convert to words (round up) */
++ param_size = (3 + param_size) / 4;
++
++ if (cum->regs_used < NUM_ARG_REGS
++ && cum->regs_used + param_size > NUM_ARG_REGS)
++ {
++ return NUM_ARG_REGS - cum->regs_used;
++ }
++ else
++ {
++ return 0;
++ }
++}
++
++
++int
++nios2_return_in_memory (tree type)
++{
++ int res = ((int_size_in_bytes (type) > (2 * UNITS_PER_WORD))
++ || (int_size_in_bytes (type) == -1));
++
++ return res;
++}
++
++/* ??? It may be possible to eliminate the copyback and implement
++ my own va_arg type, but that is more work for now. */
++int
++nios2_setup_incoming_varargs (const CUMULATIVE_ARGS *cum,
++ enum machine_mode mode, tree type,
++ int no_rtl)
++{
++ CUMULATIVE_ARGS local_cum;
++ int regs_to_push;
++
++ local_cum = *cum;
++ FUNCTION_ARG_ADVANCE (local_cum, mode, type, 1);
++
++ regs_to_push = NUM_ARG_REGS - local_cum.regs_used;
++
++ if (!no_rtl)
++ {
++ if (regs_to_push > 0)
++ {
++ rtx ptr, mem;
++
++ ptr = virtual_incoming_args_rtx;
++ mem = gen_rtx_MEM (BLKmode, ptr);
++
++ /* va_arg is an array access in this case, which causes
++ it to get MEM_IN_STRUCT_P set. We must set it here
++ so that the insn scheduler won't assume that these
++ stores can't possibly overlap with the va_arg loads. */
++ MEM_SET_IN_STRUCT_P (mem, 1);
++
++ emit_insn (gen_blockage ());
++ move_block_from_reg (local_cum.regs_used + FIRST_ARG_REGNO, mem,
++ regs_to_push);
++ emit_insn (gen_blockage ());
++ }
++ }
++
++ return regs_to_push * UNITS_PER_WORD;
++
++}
++
++
++\f
++/*****************************************************************************
++**
++** builtins
++**
++** This method for handling builtins is from CSP where _many_ more types of
++** expanders have already been written. Check there first before writing
++** new ones.
++**
++*****************************************************************************/
++
++enum nios2_builtins
++{
++ NIOS2_BUILTIN_LDBIO,
++ NIOS2_BUILTIN_LDBUIO,
++ NIOS2_BUILTIN_LDHIO,
++ NIOS2_BUILTIN_LDHUIO,
++ NIOS2_BUILTIN_LDWIO,
++ NIOS2_BUILTIN_STBIO,
++ NIOS2_BUILTIN_STHIO,
++ NIOS2_BUILTIN_STWIO,
++ NIOS2_BUILTIN_SYNC,
++ NIOS2_BUILTIN_RDCTL,
++ NIOS2_BUILTIN_WRCTL,
++
++ NIOS2_BUILTIN_CUSTOM_N,
++ NIOS2_BUILTIN_CUSTOM_NI,
++ NIOS2_BUILTIN_CUSTOM_NF,
++ NIOS2_BUILTIN_CUSTOM_NP,
++ NIOS2_BUILTIN_CUSTOM_NII,
++ NIOS2_BUILTIN_CUSTOM_NIF,
++ NIOS2_BUILTIN_CUSTOM_NIP,
++ NIOS2_BUILTIN_CUSTOM_NFI,
++ NIOS2_BUILTIN_CUSTOM_NFF,
++ NIOS2_BUILTIN_CUSTOM_NFP,
++ NIOS2_BUILTIN_CUSTOM_NPI,
++ NIOS2_BUILTIN_CUSTOM_NPF,
++ NIOS2_BUILTIN_CUSTOM_NPP,
++ NIOS2_BUILTIN_CUSTOM_IN,
++ NIOS2_BUILTIN_CUSTOM_INI,
++ NIOS2_BUILTIN_CUSTOM_INF,
++ NIOS2_BUILTIN_CUSTOM_INP,
++ NIOS2_BUILTIN_CUSTOM_INII,
++ NIOS2_BUILTIN_CUSTOM_INIF,
++ NIOS2_BUILTIN_CUSTOM_INIP,
++ NIOS2_BUILTIN_CUSTOM_INFI,
++ NIOS2_BUILTIN_CUSTOM_INFF,
++ NIOS2_BUILTIN_CUSTOM_INFP,
++ NIOS2_BUILTIN_CUSTOM_INPI,
++ NIOS2_BUILTIN_CUSTOM_INPF,
++ NIOS2_BUILTIN_CUSTOM_INPP,
++ NIOS2_BUILTIN_CUSTOM_FN,
++ NIOS2_BUILTIN_CUSTOM_FNI,
++ NIOS2_BUILTIN_CUSTOM_FNF,
++ NIOS2_BUILTIN_CUSTOM_FNP,
++ NIOS2_BUILTIN_CUSTOM_FNII,
++ NIOS2_BUILTIN_CUSTOM_FNIF,
++ NIOS2_BUILTIN_CUSTOM_FNIP,
++ NIOS2_BUILTIN_CUSTOM_FNFI,
++ NIOS2_BUILTIN_CUSTOM_FNFF,
++ NIOS2_BUILTIN_CUSTOM_FNFP,
++ NIOS2_BUILTIN_CUSTOM_FNPI,
++ NIOS2_BUILTIN_CUSTOM_FNPF,
++ NIOS2_BUILTIN_CUSTOM_FNPP,
++ NIOS2_BUILTIN_CUSTOM_PN,
++ NIOS2_BUILTIN_CUSTOM_PNI,
++ NIOS2_BUILTIN_CUSTOM_PNF,
++ NIOS2_BUILTIN_CUSTOM_PNP,
++ NIOS2_BUILTIN_CUSTOM_PNII,
++ NIOS2_BUILTIN_CUSTOM_PNIF,
++ NIOS2_BUILTIN_CUSTOM_PNIP,
++ NIOS2_BUILTIN_CUSTOM_PNFI,
++ NIOS2_BUILTIN_CUSTOM_PNFF,
++ NIOS2_BUILTIN_CUSTOM_PNFP,
++ NIOS2_BUILTIN_CUSTOM_PNPI,
++ NIOS2_BUILTIN_CUSTOM_PNPF,
++ NIOS2_BUILTIN_CUSTOM_PNPP,
++
++
++ LIM_NIOS2_BUILTINS
++};
++
++struct builtin_description
++{
++ const enum insn_code icode;
++ const char *const name;
++ const enum nios2_builtins code;
++ const tree *type;
++ rtx (* expander) PARAMS ((const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int));
++};
++
++static rtx nios2_expand_STXIO (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_LDXIO (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_sync (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_rdctl (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_wrctl (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++
++static rtx nios2_expand_custom_n (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_Xn (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_nX (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_XnX (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_nXX (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++static rtx nios2_expand_custom_XnXX (const struct builtin_description *,
++ tree, rtx, rtx, enum machine_mode, int);
++
++static tree endlink;
++
++/* int fn (volatile const void *)
++ */
++static tree int_ftype_volatile_const_void_p;
++
++/* int fn (int)
++ */
++static tree int_ftype_int;
++
++/* void fn (int, int)
++ */
++static tree void_ftype_int_int;
++
++/* void fn (volatile void *, int)
++ */
++static tree void_ftype_volatile_void_p_int;
++
++/* void fn (void)
++ */
++static tree void_ftype_void;
++
++static tree custom_n;
++static tree custom_ni;
++static tree custom_nf;
++static tree custom_np;
++static tree custom_nii;
++static tree custom_nif;
++static tree custom_nip;
++static tree custom_nfi;
++static tree custom_nff;
++static tree custom_nfp;
++static tree custom_npi;
++static tree custom_npf;
++static tree custom_npp;
++static tree custom_in;
++static tree custom_ini;
++static tree custom_inf;
++static tree custom_inp;
++static tree custom_inii;
++static tree custom_inif;
++static tree custom_inip;
++static tree custom_infi;
++static tree custom_inff;
++static tree custom_infp;
++static tree custom_inpi;
++static tree custom_inpf;
++static tree custom_inpp;
++static tree custom_fn;
++static tree custom_fni;
++static tree custom_fnf;
++static tree custom_fnp;
++static tree custom_fnii;
++static tree custom_fnif;
++static tree custom_fnip;
++static tree custom_fnfi;
++static tree custom_fnff;
++static tree custom_fnfp;
++static tree custom_fnpi;
++static tree custom_fnpf;
++static tree custom_fnpp;
++static tree custom_pn;
++static tree custom_pni;
++static tree custom_pnf;
++static tree custom_pnp;
++static tree custom_pnii;
++static tree custom_pnif;
++static tree custom_pnip;
++static tree custom_pnfi;
++static tree custom_pnff;
++static tree custom_pnfp;
++static tree custom_pnpi;
++static tree custom_pnpf;
++static tree custom_pnpp;
++
++
++static const struct builtin_description bdesc[] = {
++ {CODE_FOR_ldbio, "__builtin_ldbio", NIOS2_BUILTIN_LDBIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++ {CODE_FOR_ldbuio, "__builtin_ldbuio", NIOS2_BUILTIN_LDBUIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++ {CODE_FOR_ldhio, "__builtin_ldhio", NIOS2_BUILTIN_LDHIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++ {CODE_FOR_ldhuio, "__builtin_ldhuio", NIOS2_BUILTIN_LDHUIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++ {CODE_FOR_ldwio, "__builtin_ldwio", NIOS2_BUILTIN_LDWIO, &int_ftype_volatile_const_void_p, nios2_expand_LDXIO},
++
++ {CODE_FOR_stbio, "__builtin_stbio", NIOS2_BUILTIN_STBIO, &void_ftype_volatile_void_p_int, nios2_expand_STXIO},
++ {CODE_FOR_sthio, "__builtin_sthio", NIOS2_BUILTIN_STHIO, &void_ftype_volatile_void_p_int, nios2_expand_STXIO},
++ {CODE_FOR_stwio, "__builtin_stwio", NIOS2_BUILTIN_STWIO, &void_ftype_volatile_void_p_int, nios2_expand_STXIO},
++
++ {CODE_FOR_sync, "__builtin_sync", NIOS2_BUILTIN_SYNC, &void_ftype_void, nios2_expand_sync},
++ {CODE_FOR_rdctl, "__builtin_rdctl", NIOS2_BUILTIN_RDCTL, &int_ftype_int, nios2_expand_rdctl},
++ {CODE_FOR_wrctl, "__builtin_wrctl", NIOS2_BUILTIN_WRCTL, &void_ftype_int_int, nios2_expand_wrctl},
++
++ {CODE_FOR_custom_n, "__builtin_custom_n", NIOS2_BUILTIN_CUSTOM_N, &custom_n, nios2_expand_custom_n},
++ {CODE_FOR_custom_ni, "__builtin_custom_ni", NIOS2_BUILTIN_CUSTOM_NI, &custom_ni, nios2_expand_custom_nX},
++ {CODE_FOR_custom_nf, "__builtin_custom_nf", NIOS2_BUILTIN_CUSTOM_NF, &custom_nf, nios2_expand_custom_nX},
++ {CODE_FOR_custom_np, "__builtin_custom_np", NIOS2_BUILTIN_CUSTOM_NP, &custom_np, nios2_expand_custom_nX},
++ {CODE_FOR_custom_nii, "__builtin_custom_nii", NIOS2_BUILTIN_CUSTOM_NII, &custom_nii, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nif, "__builtin_custom_nif", NIOS2_BUILTIN_CUSTOM_NIF, &custom_nif, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nip, "__builtin_custom_nip", NIOS2_BUILTIN_CUSTOM_NIP, &custom_nip, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nfi, "__builtin_custom_nfi", NIOS2_BUILTIN_CUSTOM_NFI, &custom_nfi, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nff, "__builtin_custom_nff", NIOS2_BUILTIN_CUSTOM_NFF, &custom_nff, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_nfp, "__builtin_custom_nfp", NIOS2_BUILTIN_CUSTOM_NFP, &custom_nfp, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_npi, "__builtin_custom_npi", NIOS2_BUILTIN_CUSTOM_NPI, &custom_npi, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_npf, "__builtin_custom_npf", NIOS2_BUILTIN_CUSTOM_NPF, &custom_npf, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_npp, "__builtin_custom_npp", NIOS2_BUILTIN_CUSTOM_NPP, &custom_npp, nios2_expand_custom_nXX},
++ {CODE_FOR_custom_in, "__builtin_custom_in", NIOS2_BUILTIN_CUSTOM_IN, &custom_in, nios2_expand_custom_Xn},
++ {CODE_FOR_custom_ini, "__builtin_custom_ini", NIOS2_BUILTIN_CUSTOM_INI, &custom_ini, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_inf, "__builtin_custom_inf", NIOS2_BUILTIN_CUSTOM_INF, &custom_inf, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_inp, "__builtin_custom_inp", NIOS2_BUILTIN_CUSTOM_INP, &custom_inp, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_inii, "__builtin_custom_inii", NIOS2_BUILTIN_CUSTOM_INII, &custom_inii, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inif, "__builtin_custom_inif", NIOS2_BUILTIN_CUSTOM_INIF, &custom_inif, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inip, "__builtin_custom_inip", NIOS2_BUILTIN_CUSTOM_INIP, &custom_inip, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_infi, "__builtin_custom_infi", NIOS2_BUILTIN_CUSTOM_INFI, &custom_infi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inff, "__builtin_custom_inff", NIOS2_BUILTIN_CUSTOM_INFF, &custom_inff, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_infp, "__builtin_custom_infp", NIOS2_BUILTIN_CUSTOM_INFP, &custom_infp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inpi, "__builtin_custom_inpi", NIOS2_BUILTIN_CUSTOM_INPI, &custom_inpi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inpf, "__builtin_custom_inpf", NIOS2_BUILTIN_CUSTOM_INPF, &custom_inpf, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_inpp, "__builtin_custom_inpp", NIOS2_BUILTIN_CUSTOM_INPP, &custom_inpp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fn, "__builtin_custom_fn", NIOS2_BUILTIN_CUSTOM_FN, &custom_fn, nios2_expand_custom_Xn},
++ {CODE_FOR_custom_fni, "__builtin_custom_fni", NIOS2_BUILTIN_CUSTOM_FNI, &custom_fni, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_fnf, "__builtin_custom_fnf", NIOS2_BUILTIN_CUSTOM_FNF, &custom_fnf, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_fnp, "__builtin_custom_fnp", NIOS2_BUILTIN_CUSTOM_FNP, &custom_fnp, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_fnii, "__builtin_custom_fnii", NIOS2_BUILTIN_CUSTOM_FNII, &custom_fnii, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnif, "__builtin_custom_fnif", NIOS2_BUILTIN_CUSTOM_FNIF, &custom_fnif, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnip, "__builtin_custom_fnip", NIOS2_BUILTIN_CUSTOM_FNIP, &custom_fnip, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnfi, "__builtin_custom_fnfi", NIOS2_BUILTIN_CUSTOM_FNFI, &custom_fnfi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnff, "__builtin_custom_fnff", NIOS2_BUILTIN_CUSTOM_FNFF, &custom_fnff, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnfp, "__builtin_custom_fnfp", NIOS2_BUILTIN_CUSTOM_FNFP, &custom_fnfp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnpi, "__builtin_custom_fnpi", NIOS2_BUILTIN_CUSTOM_FNPI, &custom_fnpi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnpf, "__builtin_custom_fnpf", NIOS2_BUILTIN_CUSTOM_FNPF, &custom_fnpf, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_fnpp, "__builtin_custom_fnpp", NIOS2_BUILTIN_CUSTOM_FNPP, &custom_fnpp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pn, "__builtin_custom_pn", NIOS2_BUILTIN_CUSTOM_PN, &custom_pn, nios2_expand_custom_Xn},
++ {CODE_FOR_custom_pni, "__builtin_custom_pni", NIOS2_BUILTIN_CUSTOM_PNI, &custom_pni, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_pnf, "__builtin_custom_pnf", NIOS2_BUILTIN_CUSTOM_PNF, &custom_pnf, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_pnp, "__builtin_custom_pnp", NIOS2_BUILTIN_CUSTOM_PNP, &custom_pnp, nios2_expand_custom_XnX},
++ {CODE_FOR_custom_pnii, "__builtin_custom_pnii", NIOS2_BUILTIN_CUSTOM_PNII, &custom_pnii, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnif, "__builtin_custom_pnif", NIOS2_BUILTIN_CUSTOM_PNIF, &custom_pnif, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnip, "__builtin_custom_pnip", NIOS2_BUILTIN_CUSTOM_PNIP, &custom_pnip, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnfi, "__builtin_custom_pnfi", NIOS2_BUILTIN_CUSTOM_PNFI, &custom_pnfi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnff, "__builtin_custom_pnff", NIOS2_BUILTIN_CUSTOM_PNFF, &custom_pnff, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnfp, "__builtin_custom_pnfp", NIOS2_BUILTIN_CUSTOM_PNFP, &custom_pnfp, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnpi, "__builtin_custom_pnpi", NIOS2_BUILTIN_CUSTOM_PNPI, &custom_pnpi, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnpf, "__builtin_custom_pnpf", NIOS2_BUILTIN_CUSTOM_PNPF, &custom_pnpf, nios2_expand_custom_XnXX},
++ {CODE_FOR_custom_pnpp, "__builtin_custom_pnpp", NIOS2_BUILTIN_CUSTOM_PNPP, &custom_pnpp, nios2_expand_custom_XnXX},
++
++
++ {0, 0, 0, 0, 0},
++};
++
++/* This does not have a closing bracket on purpose (see use) */
++#define def_param(TYPE) \
++ tree_cons (NULL_TREE, TYPE,
++
++static void
++nios2_init_builtins ()
++{
++ const struct builtin_description *d;
++
++
++ endlink = void_list_node;
++
++ /* Special indenting here because one of the brackets is in def_param */
++ /* *INDENT-OFF* */
++
++ /* int fn (volatile const void *)
++ */
++ int_ftype_volatile_const_void_p
++ = build_function_type (integer_type_node,
++ def_param (build_qualified_type (ptr_type_node,
++ TYPE_QUAL_CONST | TYPE_QUAL_VOLATILE))
++ endlink));
++
++
++ /* void fn (volatile void *, int)
++ */
++ void_ftype_volatile_void_p_int
++ = build_function_type (void_type_node,
++ def_param (build_qualified_type (ptr_type_node,
++ TYPE_QUAL_VOLATILE))
++ def_param (integer_type_node)
++ endlink)));
++
++ /* void fn (void)
++ */
++ void_ftype_void
++ = build_function_type (void_type_node,
++ endlink);
++
++ /* int fn (int)
++ */
++ int_ftype_int
++ = build_function_type (integer_type_node,
++ def_param (integer_type_node)
++ endlink));
++
++ /* void fn (int, int)
++ */
++ void_ftype_int_int
++ = build_function_type (void_type_node,
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink)));
++
++
++#define CUSTOM_NUM def_param (integer_type_node)
++
++ custom_n
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ endlink));
++ custom_ni
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ endlink)));
++ custom_nf
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ endlink)));
++ custom_np
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ endlink)));
++ custom_nii
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_nif
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_nip
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_nfi
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_nff
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_nfp
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_npi
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_npf
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_npp
++ = build_function_type (void_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++
++ custom_in
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ endlink));
++ custom_ini
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ endlink)));
++ custom_inf
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ endlink)));
++ custom_inp
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ endlink)));
++ custom_inii
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_inif
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_inip
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_infi
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_inff
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_infp
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_inpi
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_inpf
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_inpp
++ = build_function_type (integer_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++
++ custom_fn
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ endlink));
++ custom_fni
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ endlink)));
++ custom_fnf
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ endlink)));
++ custom_fnp
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ endlink)));
++ custom_fnii
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_fnif
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_fnip
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_fnfi
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_fnff
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_fnfp
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_fnpi
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_fnpf
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_fnpp
++ = build_function_type (float_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++
++
++ custom_pn
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ endlink));
++ custom_pni
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ endlink)));
++ custom_pnf
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ endlink)));
++ custom_pnp
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ endlink)));
++ custom_pnii
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_pnif
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_pnip
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (integer_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_pnfi
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_pnff
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_pnfp
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (float_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++ custom_pnpi
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (integer_type_node)
++ endlink))));
++ custom_pnpf
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (float_type_node)
++ endlink))));
++ custom_pnpp
++ = build_function_type (ptr_type_node,
++ CUSTOM_NUM
++ def_param (ptr_type_node)
++ def_param (ptr_type_node)
++ endlink))));
++
++
++
++ /* *INDENT-ON* */
++
++
++ for (d = bdesc; d->name; d++)
++ {
++ builtin_function (d->name, *d->type, d->code,
++ BUILT_IN_MD, NULL, NULL);
++ }
++}
++
++/* Expand an expression EXP that calls a built-in function,
++ with result going to TARGET if that's convenient
++ (and in mode MODE if that's convenient).
++ SUBTARGET may be used as the target for computing one of EXP's operands.
++ IGNORE is nonzero if the value is to be ignored. */
++
++static rtx
++nios2_expand_builtin (tree exp, rtx target, rtx subtarget,
++ enum machine_mode mode, int ignore)
++{
++ const struct builtin_description *d;
++ tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
++ unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
++
++ for (d = bdesc; d->name; d++)
++ if (d->code == fcode)
++ return (d->expander) (d, exp, target, subtarget, mode, ignore);
++
++ /* we should have seen one of the functins we registered */
++ abort ();
++}
++
++static rtx nios2_create_target (const struct builtin_description *, rtx);
++
++
++static rtx
++nios2_create_target (const struct builtin_description *d, rtx target)
++{
++ if (!target
++ || !(*insn_data[d->icode].operand[0].predicate) (target,
++ insn_data[d->icode].operand[0].mode))
++ {
++ target = gen_reg_rtx (insn_data[d->icode].operand[0].mode);
++ }
++
++ return target;
++}
++
++
++static rtx nios2_extract_opcode (const struct builtin_description *, int, tree);
++static rtx nios2_extract_operand (const struct builtin_description *, int, int, tree);
++
++static rtx
++nios2_extract_opcode (const struct builtin_description *d, int op, tree arglist)
++{
++ enum machine_mode mode = insn_data[d->icode].operand[op].mode;
++ tree arg = TREE_VALUE (arglist);
++ rtx opcode = expand_expr (arg, NULL_RTX, mode, 0);
++ opcode = protect_from_queue (opcode, 0);
++
++ if (!(*insn_data[d->icode].operand[op].predicate) (opcode, mode))
++ error ("Custom instruction opcode must be compile time constant in the range 0-255 for %s", d->name);
++
++ return opcode;
++}
++
++static rtx
++nios2_extract_operand (const struct builtin_description *d, int op, int argnum, tree arglist)
++{
++ enum machine_mode mode = insn_data[d->icode].operand[op].mode;
++ tree arg = TREE_VALUE (arglist);
++ rtx operand = expand_expr (arg, NULL_RTX, mode, 0);
++ operand = protect_from_queue (operand, 0);
++
++ if (!(*insn_data[d->icode].operand[op].predicate) (operand, mode))
++ operand = copy_to_mode_reg (mode, operand);
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[d->icode].operand[op].predicate) (operand, mode))
++ error ("Invalid argument %d to %s", argnum, d->name);
++
++ return operand;
++}
++
++
++static rtx
++nios2_expand_custom_n (const struct builtin_description *d, tree exp,
++ rtx target ATTRIBUTE_UNUSED, rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++
++ /* custom_n should have exactly one operand */
++ if (insn_data[d->icode].n_operands != 1)
++ abort ();
++
++ opcode = nios2_extract_opcode (d, 0, arglist);
++
++ pat = GEN_FCN (d->icode) (opcode);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++static rtx
++nios2_expand_custom_Xn (const struct builtin_description *d, tree exp,
++ rtx target, rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++
++ /* custom_Xn should have exactly two operands */
++ if (insn_data[d->icode].n_operands != 2)
++ abort ();
++
++ target = nios2_create_target (d, target);
++ opcode = nios2_extract_opcode (d, 1, arglist);
++
++ pat = GEN_FCN (d->icode) (target, opcode);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++static rtx
++nios2_expand_custom_nX (const struct builtin_description *d, tree exp,
++ rtx target ATTRIBUTE_UNUSED, rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++ rtx operands[1];
++ int i;
++
++
++ /* custom_nX should have exactly two operands */
++ if (insn_data[d->icode].n_operands != 2)
++ abort ();
++
++ opcode = nios2_extract_opcode (d, 0, arglist);
++ for (i = 0; i < 1; i++)
++ {
++ arglist = TREE_CHAIN (arglist);
++ operands[i] = nios2_extract_operand (d, i + 1, i + 1, arglist);
++ }
++
++ pat = GEN_FCN (d->icode) (opcode, operands[0]);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++static rtx
++nios2_expand_custom_XnX (const struct builtin_description *d, tree exp, rtx target,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++ rtx operands[1];
++ int i;
++
++ /* custom_Xn should have exactly three operands */
++ if (insn_data[d->icode].n_operands != 3)
++ abort ();
++
++ target = nios2_create_target (d, target);
++ opcode = nios2_extract_opcode (d, 1, arglist);
++
++ for (i = 0; i < 1; i++)
++ {
++ arglist = TREE_CHAIN (arglist);
++ operands[i] = nios2_extract_operand (d, i + 2, i + 1, arglist);
++ }
++
++ pat = GEN_FCN (d->icode) (target, opcode, operands[0]);
++
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++static rtx
++nios2_expand_custom_nXX (const struct builtin_description *d, tree exp, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++ rtx operands[2];
++ int i;
++
++
++ /* custom_nX should have exactly three operands */
++ if (insn_data[d->icode].n_operands != 3)
++ abort ();
++
++ opcode = nios2_extract_opcode (d, 0, arglist);
++ for (i = 0; i < 2; i++)
++ {
++ arglist = TREE_CHAIN (arglist);
++ operands[i] = nios2_extract_operand (d, i + 1, i + 1, arglist);
++ }
++
++ pat = GEN_FCN (d->icode) (opcode, operands[0], operands[1]);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++static rtx
++nios2_expand_custom_XnXX (const struct builtin_description *d, tree exp, rtx target,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx opcode;
++ rtx operands[2];
++ int i;
++
++
++ /* custom_XnX should have exactly four operands */
++ if (insn_data[d->icode].n_operands != 4)
++ abort ();
++
++ target = nios2_create_target (d, target);
++ opcode = nios2_extract_opcode (d, 1, arglist);
++ for (i = 0; i < 2; i++)
++ {
++ arglist = TREE_CHAIN (arglist);
++ operands[i] = nios2_extract_operand (d, i + 2, i + 1, arglist);
++ }
++
++ pat = GEN_FCN (d->icode) (target, opcode, operands[0], operands[1]);
++
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++
++
++static rtx
++nios2_expand_STXIO (const struct builtin_description *d, tree exp, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx store_dest, store_val;
++ enum insn_code icode = d->icode;
++
++ /* stores should have exactly two operands */
++ if (insn_data[icode].n_operands != 2)
++ abort ();
++
++ /* process the destination of the store */
++ {
++ enum machine_mode mode = insn_data[icode].operand[0].mode;
++ tree arg = TREE_VALUE (arglist);
++ store_dest = expand_expr (arg, NULL_RTX, VOIDmode, 0);
++ store_dest = protect_from_queue (store_dest, 0);
++
++ store_dest = gen_rtx_MEM (mode, copy_to_mode_reg (Pmode, store_dest));
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[icode].operand[0].predicate) (store_dest, mode))
++ error ("Invalid argument 1 to %s", d->name);
++ }
++
++
++ /* process the value to store */
++ {
++ enum machine_mode mode = insn_data[icode].operand[1].mode;
++ tree arg = TREE_VALUE (TREE_CHAIN (arglist));
++ store_val = expand_expr (arg, NULL_RTX, mode, 0);
++ store_val = protect_from_queue (store_val, 0);
++
++ if (!(*insn_data[icode].operand[1].predicate) (store_val, mode))
++ store_val = copy_to_mode_reg (mode, store_val);
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[icode].operand[1].predicate) (store_val, mode))
++ error ("Invalid argument 2 to %s", d->name);
++ }
++
++ pat = GEN_FCN (d->icode) (store_dest, store_val);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++
++static rtx
++nios2_expand_LDXIO (const struct builtin_description * d, tree exp, rtx target,
++ rtx subtarget ATTRIBUTE_UNUSED, enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx ld_src;
++ enum insn_code icode = d->icode;
++
++ /* loads should have exactly two operands */
++ if (insn_data[icode].n_operands != 2)
++ abort ();
++
++ target = nios2_create_target (d, target);
++
++ {
++ enum machine_mode mode = insn_data[icode].operand[1].mode;
++ tree arg = TREE_VALUE (arglist);
++ ld_src = expand_expr (arg, NULL_RTX, VOIDmode, 0);
++ ld_src = protect_from_queue (ld_src, 0);
++
++ ld_src = gen_rtx_MEM (mode, copy_to_mode_reg (Pmode, ld_src));
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[icode].operand[1].predicate) (ld_src, mode))
++ {
++ error ("Invalid argument 1 to %s", d->name);
++ }
++ }
++
++ pat = GEN_FCN (d->icode) (target, ld_src);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++
++static rtx
++nios2_expand_sync (const struct builtin_description * d ATTRIBUTE_UNUSED,
++ tree exp ATTRIBUTE_UNUSED, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ emit_insn (gen_sync ());
++ return 0;
++}
++
++static rtx
++nios2_expand_rdctl (const struct builtin_description * d ATTRIBUTE_UNUSED,
++ tree exp ATTRIBUTE_UNUSED, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx rdctl_reg;
++ enum insn_code icode = d->icode;
++
++ /* rdctl should have exactly two operands */
++ if (insn_data[icode].n_operands != 2)
++ abort ();
++
++ target = nios2_create_target (d, target);
++
++ {
++ enum machine_mode mode = insn_data[icode].operand[1].mode;
++ tree arg = TREE_VALUE (arglist);
++ rdctl_reg = expand_expr (arg, NULL_RTX, VOIDmode, 0);
++ rdctl_reg = protect_from_queue (rdctl_reg, 0);
++
++ if (!(*insn_data[icode].operand[1].predicate) (rdctl_reg, mode))
++ {
++ error ("Control register number must be in range 0-31 for %s", d->name);
++ }
++ }
++
++ pat = GEN_FCN (d->icode) (target, rdctl_reg);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return target;
++}
++
++static rtx
++nios2_expand_wrctl (const struct builtin_description * d ATTRIBUTE_UNUSED,
++ tree exp ATTRIBUTE_UNUSED, rtx target ATTRIBUTE_UNUSED,
++ rtx subtarget ATTRIBUTE_UNUSED,
++ enum machine_mode mode ATTRIBUTE_UNUSED,
++ int ignore ATTRIBUTE_UNUSED)
++{
++ tree arglist = TREE_OPERAND (exp, 1);
++ rtx pat;
++ rtx wrctl_reg, store_val;
++ enum insn_code icode = d->icode;
++
++ /* stores should have exactly two operands */
++ if (insn_data[icode].n_operands != 2)
++ abort ();
++
++ /* process the destination of the store */
++ {
++ enum machine_mode mode = insn_data[icode].operand[0].mode;
++ tree arg = TREE_VALUE (arglist);
++ wrctl_reg = expand_expr (arg, NULL_RTX, VOIDmode, 0);
++ wrctl_reg = protect_from_queue (wrctl_reg, 0);
++
++ if (!(*insn_data[icode].operand[0].predicate) (wrctl_reg, mode))
++ error ("Control register number must be in range 0-31 for %s", d->name);
++ }
++
++
++ /* process the value to store */
++ {
++ enum machine_mode mode = insn_data[icode].operand[1].mode;
++ tree arg = TREE_VALUE (TREE_CHAIN (arglist));
++ store_val = expand_expr (arg, NULL_RTX, mode, 0);
++ store_val = protect_from_queue (store_val, 0);
++
++ if (!(*insn_data[icode].operand[1].predicate) (store_val, mode))
++ store_val = copy_to_mode_reg (mode, store_val);
++
++ /* ??? Better errors would be nice */
++ if (!(*insn_data[icode].operand[1].predicate) (store_val, mode))
++ error ("Invalid argument 2 to %s", d->name);
++ }
++
++ pat = GEN_FCN (d->icode) (wrctl_reg, store_val);
++ if (!pat)
++ return 0;
++ emit_insn (pat);
++ return 0;
++}
++
++
++#include "gt-nios2.h"
++
+--- gcc-3.4.3/gcc/config/nios2/nios2.h
++++ gcc-3.4.3-nios2/gcc/config/nios2/nios2.h
+@@ -0,0 +1,823 @@
++/* Definitions of target machine for Altera NIOS 2G NIOS2 version.
++ Copyright (C) 2003 Altera
++ Contributed by Jonah Graham (jgraham@altera.com).
++
++This file is part of GNU CC.
++
++GNU CC is free software; you can redistribute it and/or modify
++it under the terms of the GNU General Public License as published by
++the Free Software Foundation; either version 2, or (at your option)
++any later version.
++
++GNU CC is distributed in the hope that it will be useful,
++but WITHOUT ANY WARRANTY; without even the implied warranty of
++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++GNU General Public License for more details.
++
++You should have received a copy of the GNU General Public License
++along with GNU CC; see the file COPYING. If not, write to
++the Free Software Foundation, 59 Temple Place - Suite 330,
++Boston, MA 02111-1307, USA. */
++
++
++
++#define TARGET_CPU_CPP_BUILTINS() \
++ do \
++ { \
++ builtin_define_std ("NIOS2"); \
++ builtin_define_std ("nios2"); \
++ } \
++ while (0)
++#define TARGET_VERSION fprintf (stderr, " (Altera Nios II)")
++
++
++
++
++
++/*********************************
++ * Run-time Target Specification
++ *********************************/
++
++#define HAS_DIV_FLAG 0x0001
++#define HAS_MUL_FLAG 0x0002
++#define HAS_MULX_FLAG 0x0004
++#define FAST_SW_DIV_FLAG 0x0008
++#define INLINE_MEMCPY_FLAG 0x00010
++#define CACHE_VOLATILE_FLAG 0x0020
++#define BYPASS_CACHE_FLAG 0x0040
++
++extern int target_flags;
++#define TARGET_HAS_DIV (target_flags & HAS_DIV_FLAG)
++#define TARGET_HAS_MUL (target_flags & HAS_MUL_FLAG)
++#define TARGET_HAS_MULX (target_flags & HAS_MULX_FLAG)
++#define TARGET_FAST_SW_DIV (target_flags & FAST_SW_DIV_FLAG)
++#define TARGET_INLINE_MEMCPY (target_flags & INLINE_MEMCPY_FLAG)
++#define TARGET_CACHE_VOLATILE (target_flags & CACHE_VOLATILE_FLAG)
++#define TARGET_BYPASS_CACHE (target_flags & BYPASS_CACHE_FLAG)
++
++#define TARGET_SWITCHES \
++{ \
++ { "hw-div", HAS_DIV_FLAG, \
++ N_("Enable DIV, DIVU") }, \
++ { "no-hw-div", -HAS_DIV_FLAG, \
++ N_("Disable DIV, DIVU (default)") }, \
++ { "hw-mul", HAS_MUL_FLAG, \
++ N_("Enable MUL instructions (default)") }, \
++ { "hw-mulx", HAS_MULX_FLAG, \
++ N_("Enable MULX instructions, assume fast shifter") }, \
++ { "no-hw-mul", -HAS_MUL_FLAG, \
++ N_("Disable MUL instructions") }, \
++ { "no-hw-mulx", -HAS_MULX_FLAG, \
++ N_("Disable MULX instructions, assume slow shifter (default and implied by -mno-hw-mul)") }, \
++ { "fast-sw-div", FAST_SW_DIV_FLAG, \
++ N_("Use table based fast divide (default at -O3)") }, \
++ { "no-fast-sw-div", -FAST_SW_DIV_FLAG, \
++ N_("Don't use table based fast divide ever") }, \
++ { "inline-memcpy", INLINE_MEMCPY_FLAG, \
++ N_("Inline small memcpy (default when optimizing)") }, \
++ { "no-inline-memcpy", -INLINE_MEMCPY_FLAG, \
++ N_("Don't Inline small memcpy") }, \
++ { "cache-volatile", CACHE_VOLATILE_FLAG, \
++ N_("Volatile accesses use non-io variants of instructions (default)") }, \
++ { "no-cache-volatile", -CACHE_VOLATILE_FLAG, \
++ N_("Volatile accesses use io variants of instructions") }, \
++ { "bypass-cache", BYPASS_CACHE_FLAG, \
++ N_("All ld/st instructins use io variants") }, \
++ { "no-bypass-cache", -BYPASS_CACHE_FLAG, \
++ N_("All ld/st instructins do not use io variants (default)") }, \
++ { "smallc", 0, \
++ N_("Link with a limited version of the C library") }, \
++ { "ctors-in-init", 0, \
++ "" /* undocumented: N_("Link with static constructors and destructors in init") */ }, \
++ { "", TARGET_DEFAULT, 0 } \
++}
++
++
++extern const char *nios2_sys_nosys_string; /* for -msys=nosys */
++extern const char *nios2_sys_lib_string; /* for -msys-lib= */
++extern const char *nios2_sys_crt0_string; /* for -msys-crt0= */
++
++#define TARGET_OPTIONS \
++{ \
++ { "sys=nosys", &nios2_sys_nosys_string, \
++ N_("Use stub versions of OS library calls (default)"), 0}, \
++ { "sys-lib=", &nios2_sys_lib_string, \
++ N_("Name of System Library to link against. (Converted to a -l option)"), 0}, \
++ { "sys-crt0=", &nios2_sys_crt0_string, \
++ N_("Name of the startfile. (default is a crt0 for the ISS only)"), 0}, \
++}
++
++
++/* Default target_flags if no switches specified. */
++#ifndef TARGET_DEFAULT
++# define TARGET_DEFAULT (HAS_MUL_FLAG | CACHE_VOLATILE_FLAG)
++#endif
++
++/* Switch Recognition by gcc.c. Add -G xx support */
++#undef SWITCH_TAKES_ARG
++#define SWITCH_TAKES_ARG(CHAR) \
++ (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
++
++#define OVERRIDE_OPTIONS override_options ()
++#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options (LEVEL, SIZE)
++#define CAN_DEBUG_WITHOUT_FP
++
++#define CC1_SPEC "\
++%{G*}"
++
++#undef LIB_SPEC
++#define LIB_SPEC \
++"--start-group %{msmallc: -lsmallc} %{!msmallc: -lc} -lgcc \
++ %{msys-lib=*: -l%*} \
++ %{!msys-lib=*: -lc } \
++ --end-group \
++ %{msys-lib=: %eYou need a library name for -msys-lib=} \
++"
++
++
++#undef STARTFILE_SPEC
++#define STARTFILE_SPEC \
++"%{msys-crt0=*: %*} %{!msys-crt0=*: crt0%O%s} \
++ %{msys-crt0=: %eYou need a C startup file for -msys-crt0=} \
++ %{mctors-in-init: crti%O%s crtbegin%O%s} \
++"
++
++#undef ENDFILE_SPEC
++#define ENDFILE_SPEC \
++ "%{mctors-in-init: crtend%O%s crtn%O%s}"
++
++
++/***********************
++ * Storage Layout
++ ***********************/
++
++#define DEFAULT_SIGNED_CHAR 1
++#define BITS_BIG_ENDIAN 0
++#define BYTES_BIG_ENDIAN 0
++#define WORDS_BIG_ENDIAN 0
++#define BITS_PER_UNIT 8
++#define BITS_PER_WORD 32
++#define UNITS_PER_WORD 4
++#define POINTER_SIZE 32
++#define BIGGEST_ALIGNMENT 32
++#define STRICT_ALIGNMENT 1
++#define FUNCTION_BOUNDARY 32
++#define PARM_BOUNDARY 32
++#define STACK_BOUNDARY 32
++#define PREFERRED_STACK_BOUNDARY 32
++#define MAX_FIXED_MODE_SIZE 64
++
++#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
++ ((TREE_CODE (EXP) == STRING_CST) \
++ && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
++
++
++/**********************
++ * Layout of Source Language Data Types
++ **********************/
++
++#define INT_TYPE_SIZE 32
++#define SHORT_TYPE_SIZE 16
++#define LONG_TYPE_SIZE 32
++#define LONG_LONG_TYPE_SIZE 64
++#define FLOAT_TYPE_SIZE 32
++#define DOUBLE_TYPE_SIZE 64
++#define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
++
++
++/*************************
++ * Condition Code Status
++ ************************/
++
++/* comparison type */
++/* ??? currently only CMP_SI is used */
++enum cmp_type {
++ CMP_SI, /* compare four byte integers */
++ CMP_DI, /* compare eight byte integers */
++ CMP_SF, /* compare single precision floats */
++ CMP_DF, /* compare double precision floats */
++ CMP_MAX /* max comparison type */
++};
++
++extern GTY(()) rtx branch_cmp[2]; /* operands for compare */
++extern enum cmp_type branch_type; /* what type of branch to use */
++
++/**********************
++ * Register Usage
++ **********************/
++
++/* ---------------------------------- *
++ * Basic Characteristics of Registers
++ * ---------------------------------- */
++
++/*
++Register Number
++ Register Name
++ Alternate Name
++ Purpose
++0 r0 zero always zero
++1 r1 at Assembler Temporary
++2-3 r2-r3 Return Location
++4-7 r4-r7 Register Arguments
++8-15 r8-r15 Caller Saved Registers
++16-22 r16-r22 Callee Saved Registers
++23 r23 sc Static Chain (Callee Saved)
++ ??? Does $sc want to be caller or callee
++ saved. If caller, 15, else 23.
++24 r24 Exception Temporary
++25 r25 Breakpoint Temporary
++26 r26 gp Global Pointer
++27 r27 sp Stack Pointer
++28 r28 fp Frame Pointer
++29 r29 ea Exception Return Address
++30 r30 ba Breakpoint Return Address
++31 r31 ra Return Address
++
++32 ctl0 status
++33 ctl1 estatus STATUS saved by exception ?
++34 ctl2 bstatus STATUS saved by break ?
++35 ctl3 ipri Interrupt Priority Mask ?
++36 ctl4 ecause Exception Cause ?
++
++37 pc Not an actual register
++
++38 rap Return address pointer, this does not
++ actually exist and will be eliminated
++
++39 fake_fp Fake Frame Pointer which will always be eliminated.
++40 fake_ap Fake Argument Pointer which will always be eliminated.
++
++41 First Pseudo Register
++
++
++The definitions for all the hard register numbers
++are located in nios2.md.
++*/
++
++#define FIRST_PSEUDO_REGISTER 41
++#define NUM_ARG_REGS (LAST_ARG_REGNO - FIRST_ARG_REGNO + 1)
++
++
++
++/* also see CONDITIONAL_REGISTER_USAGE */
++#define FIXED_REGISTERS \
++ { \
++/* +0 1 2 3 4 5 6 7 8 9 */ \
++/* 0 */ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
++/* 10 */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
++/* 20 */ 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
++/* 30 */ 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
++/* 40 */ 1, \
++ }
++
++/* call used is the same as caller saved
++ + fixed regs + args + ret vals */
++#define CALL_USED_REGISTERS \
++ { \
++/* +0 1 2 3 4 5 6 7 8 9 */ \
++/* 0 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
++/* 10 */ 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
++/* 20 */ 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
++/* 30 */ 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
++/* 40 */ 1, \
++ }
++
++#define HARD_REGNO_NREGS(REGNO, MODE) \
++ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
++ / UNITS_PER_WORD)
++
++/* --------------------------- *
++ * How Values Fit in Registers
++ * --------------------------- */
++
++#define HARD_REGNO_MODE_OK(REGNO, MODE) 1
++
++#define MODES_TIEABLE_P(MODE1, MODE2) 1
++
++
++/*************************
++ * Register Classes
++ *************************/
++
++enum reg_class
++{
++ NO_REGS,
++ ALL_REGS,
++ LIM_REG_CLASSES
++};
++
++#define N_REG_CLASSES (int) LIM_REG_CLASSES
++
++#define REG_CLASS_NAMES \
++ {"NO_REGS", \
++ "ALL_REGS"}
++
++#define GENERAL_REGS ALL_REGS
++
++#define REG_CLASS_CONTENTS \
++/* NO_REGS */ {{ 0, 0}, \
++/* ALL_REGS */ {~0,~0}} \
++
++#define REGNO_REG_CLASS(REGNO) ALL_REGS
++
++#define BASE_REG_CLASS ALL_REGS
++#define INDEX_REG_CLASS ALL_REGS
++
++/* only one reg class, 'r', is handled automatically */
++#define REG_CLASS_FROM_LETTER(CHAR) NO_REGS
++
++#define REGNO_OK_FOR_BASE_P2(REGNO, STRICT) \
++ ((STRICT) \
++ ? (REGNO) < FIRST_PSEUDO_REGISTER \
++ : (REGNO) < FIRST_PSEUDO_REGISTER || (reg_renumber && reg_renumber[REGNO] < FIRST_PSEUDO_REGISTER))
++
++#define REGNO_OK_FOR_INDEX_P2(REGNO, STRICT) \
++ (REGNO_OK_FOR_BASE_P2 (REGNO, STRICT))
++
++#define REGNO_OK_FOR_BASE_P(REGNO) \
++ (REGNO_OK_FOR_BASE_P2 (REGNO, 1))
++
++#define REGNO_OK_FOR_INDEX_P(REGNO) \
++ (REGNO_OK_FOR_INDEX_P2 (REGNO, 1))
++
++#define REG_OK_FOR_BASE_P2(X, STRICT) \
++ (STRICT \
++ ? REGNO_OK_FOR_BASE_P2 (REGNO (X), 1) \
++ : REGNO_OK_FOR_BASE_P2 (REGNO (X), 1) || REGNO(X) >= FIRST_PSEUDO_REGISTER)
++
++#define REG_OK_FOR_INDEX_P2(X, STRICT) \
++ (STRICT \
++ ? REGNO_OK_FOR_INDEX_P2 (REGNO (X), 1) \
++ : REGNO_OK_FOR_INDEX_P2 (REGNO (X), 1) || REGNO(X) >= FIRST_PSEUDO_REGISTER)
++
++#define CLASS_MAX_NREGS(CLASS, MODE) \
++ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \
++ / UNITS_PER_WORD)
++
++
++#define SMALL_INT(X) ((unsigned HOST_WIDE_INT) ((X) + 0x8000) < 0x10000)
++#define SMALL_INT_UNSIGNED(X) ((unsigned HOST_WIDE_INT) (X) < 0x10000)
++#define UPPER16_INT(X) (((X) & 0xffff) == 0)
++#define SHIFT_INT(X) ((X) >= 0 && (X) <= 31)
++#define RDWRCTL_INT(X) ((X) >= 0 && (X) <= 31)
++#define CUSTOM_INSN_OPCODE(X) ((X) >= 0 && (X) <= 255)
++
++#define CONST_OK_FOR_LETTER_P(VALUE, C) \
++ ( \
++ (C) == 'I' ? SMALL_INT (VALUE) : \
++ (C) == 'J' ? SMALL_INT_UNSIGNED (VALUE) : \
++ (C) == 'K' ? UPPER16_INT (VALUE) : \
++ (C) == 'L' ? SHIFT_INT (VALUE) : \
++ (C) == 'M' ? (VALUE) == 0 : \
++ (C) == 'N' ? CUSTOM_INSN_OPCODE (VALUE) : \
++ (C) == 'O' ? RDWRCTL_INT (VALUE) : \
++ 0)
++
++#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
++
++#define PREFERRED_RELOAD_CLASS(X, CLASS) \
++ ((CLASS) == NO_REGS ? GENERAL_REGS : (CLASS))
++
++/* 'S' matches immediates which are in small data
++ and therefore can be added to gp to create a
++ 32-bit value. */
++#define EXTRA_CONSTRAINT(VALUE, C) \
++ ((C) == 'S' \
++ && (GET_CODE (VALUE) == SYMBOL_REF) \
++ && SYMBOL_REF_IN_NIOS2_SMALL_DATA_P (VALUE))
++
++
++
++
++/* Say that the epilogue uses the return address register. Note that
++ in the case of sibcalls, the values "used by the epilogue" are
++ considered live at the start of the called function. */
++#define EPILOGUE_USES(REGNO) ((REGNO) == RA_REGNO)
++
++
++#define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
++
++/**********************************
++ * Trampolines for Nested Functions
++ ***********************************/
++
++#define TRAMPOLINE_TEMPLATE(FILE) \
++ error ("trampolines not yet implemented")
++#define TRAMPOLINE_SIZE 20
++#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
++ error ("trampolines not yet implemented")
++
++/***************************
++ * Stack Layout and Calling Conventions
++ ***************************/
++
++/* ------------------ *
++ * Basic Stack Layout
++ * ------------------ */
++
++/* The downward variants are used by the compiler,
++ the upward ones serve as documentation */
++#define STACK_GROWS_DOWNWARD
++#define FRAME_GROWS_UPWARD
++#define ARGS_GROW_UPWARD
++
++#define STARTING_FRAME_OFFSET current_function_outgoing_args_size
++#define FIRST_PARM_OFFSET(FUNDECL) 0
++
++/* Before the prologue, RA lives in r31. */
++#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNO)
++
++/* -------------------------------------- *
++ * Registers That Address the Stack Frame
++ * -------------------------------------- */
++
++#define STACK_POINTER_REGNUM SP_REGNO
++#define STATIC_CHAIN_REGNUM SC_REGNO
++#define PC_REGNUM PC_REGNO
++#define DWARF_FRAME_RETURN_COLUMN RA_REGNO
++
++/* Base register for access to local variables of the function. We
++ pretend that the frame pointer is a non-existent hard register, and
++ then eliminate it to HARD_FRAME_POINTER_REGNUM. */
++#define FRAME_POINTER_REGNUM FAKE_FP_REGNO
++
++#define HARD_FRAME_POINTER_REGNUM FP_REGNO
++#define RETURN_ADDRESS_POINTER_REGNUM RAP_REGNO
++/* the argumnet pointer needs to always be eliminated
++ so it is set to a fake hard register. */
++#define ARG_POINTER_REGNUM FAKE_AP_REGNO
++
++/* ----------------------------------------- *
++ * Eliminating Frame Pointer and Arg Pointer
++ * ----------------------------------------- */
++
++#define FRAME_POINTER_REQUIRED 0
++
++#define ELIMINABLE_REGS \
++{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
++ { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
++ { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
++ { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
++ { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
++ { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
++
++#define CAN_ELIMINATE(FROM, TO) 1
++
++#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
++ (OFFSET) = nios2_initial_elimination_offset ((FROM), (TO))
++
++#define MUST_SAVE_REGISTER(regno) \
++ ((regs_ever_live[regno] && !call_used_regs[regno]) \
++ || (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) \
++ || (regno == RA_REGNO && regs_ever_live[RA_REGNO]))
++
++/* Treat LOC as a byte offset from the stack pointer and round it up
++ to the next fully-aligned offset. */
++#define STACK_ALIGN(LOC) \
++ (((LOC) + ((PREFERRED_STACK_BOUNDARY / 8) - 1)) & ~((PREFERRED_STACK_BOUNDARY / 8) - 1))
++
++
++/* ------------------------------ *
++ * Passing Arguments in Registers
++ * ------------------------------ */
++
++/* see nios2.c */
++#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
++ (function_arg (&CUM, MODE, TYPE, NAMED))
++
++#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
++ (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
++
++#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0
++
++#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) 0
++
++typedef struct nios2_args
++{
++ int regs_used;
++} CUMULATIVE_ARGS;
++
++/* This is to initialize the above unused CUM data type */
++#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
++ (init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS))
++
++#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
++ (function_arg_advance (&CUM, MODE, TYPE, NAMED))
++
++#define FUNCTION_ARG_REGNO_P(REGNO) \
++ ((REGNO) >= FIRST_ARG_REGNO && (REGNO) <= LAST_ARG_REGNO)
++
++#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
++ { \
++ int pret_size = nios2_setup_incoming_varargs (&(CUM), (MODE), \
++ (TYPE), (NO_RTL)); \
++ if (pret_size) \
++ (PRETEND_SIZE) = pret_size; \
++ }
++
++/* ----------------------------- *
++ * Generating Code for Profiling
++ * ----------------------------- */
++
++#define PROFILE_BEFORE_PROLOGUE
++
++#define FUNCTION_PROFILER(FILE, LABELNO) \
++ function_profiler ((FILE), (LABELNO))
++
++/* --------------------------------------- *
++ * Passing Function Arguments on the Stack
++ * --------------------------------------- */
++
++#define PROMOTE_PROTOTYPES 1
++
++#define PUSH_ARGS 0
++#define ACCUMULATE_OUTGOING_ARGS 1
++
++#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACKSIZE) 0
++
++/* --------------------------------------- *
++ * How Scalar Function Values Are Returned
++ * --------------------------------------- */
++
++#define FUNCTION_VALUE(VALTYPE, FUNC) \
++ gen_rtx(REG, TYPE_MODE(VALTYPE), FIRST_RETVAL_REGNO)
++
++#define LIBCALL_VALUE(MODE) \
++ gen_rtx(REG, MODE, FIRST_RETVAL_REGNO)
++
++#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == FIRST_RETVAL_REGNO)
++
++/* ----------------------------- *
++ * How Large Values Are Returned
++ * ----------------------------- */
++
++
++#define RETURN_IN_MEMORY(TYPE) \
++ nios2_return_in_memory (TYPE)
++
++
++#define STRUCT_VALUE 0
++
++#define DEFAULT_PCC_STRUCT_RETURN 0
++
++/*******************
++ * Addressing Modes
++ *******************/
++
++
++#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
++
++#define CONSTANT_ADDRESS_P(X) (CONSTANT_P (X))
++
++#define MAX_REGS_PER_ADDRESS 1
++
++/* Go to ADDR if X is a valid address. */
++#ifndef REG_OK_STRICT
++#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
++ { \
++ if (nios2_legitimate_address ((X), (MODE), 0)) \
++ goto ADDR; \
++ }
++#else
++#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
++ { \
++ if (nios2_legitimate_address ((X), (MODE), 1)) \
++ goto ADDR; \
++ }
++#endif
++
++#ifndef REG_OK_STRICT
++#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P2 (REGNO (X), 0)
++#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P2 (REGNO (X), 0)
++#else
++#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P2 (REGNO (X), 1)
++#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P2 (REGNO (X), 1)
++#endif
++
++#define LEGITIMATE_CONSTANT_P(X) 1
++
++/* Nios II has no mode dependent addresses. */
++#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
++
++/* Set if this has a weak declaration */
++#define SYMBOL_FLAG_WEAK_DECL (1 << SYMBOL_FLAG_MACH_DEP_SHIFT)
++#define SYMBOL_REF_WEAK_DECL_P(RTX) \
++ ((SYMBOL_REF_FLAGS (RTX) & SYMBOL_FLAG_WEAK_DECL) != 0)
++
++
++/* true if a symbol is both small and not weak. In this case, gp
++ relative access can be used */
++#define SYMBOL_REF_IN_NIOS2_SMALL_DATA_P(RTX) \
++ (SYMBOL_REF_SMALL_P(RTX) && !SYMBOL_REF_WEAK_DECL_P(RTX))
++
++/*****************
++ * Describing Relative Costs of Operations
++ *****************/
++
++#define SLOW_BYTE_ACCESS 1
++
++/* It is as good to call a constant function address as to call an address
++ kept in a register.
++ ??? Not true anymore really. Now that call cannot address full range
++ of memory callr may need to be used */
++
++#define NO_FUNCTION_CSE
++#define NO_RECURSIVE_FUNCTION_CSE
++
++
++
++/*****************************************
++ * Defining the Output Assembler Language
++ *****************************************/
++
++/* ------------------------------------------ *
++ * The Overall Framework of an Assembler File
++ * ------------------------------------------ */
++
++#define ASM_APP_ON "#APP\n"
++#define ASM_APP_OFF "#NO_APP\n"
++
++#define ASM_COMMENT_START "# "
++
++/* ------------------------------- *
++ * Output and Generation of Labels
++ * ------------------------------- */
++
++#define GLOBAL_ASM_OP "\t.global\t"
++
++
++/* -------------- *
++ * Output of Data
++ * -------------- */
++
++#define DWARF2_UNWIND_INFO 0
++
++
++/* -------------------------------- *
++ * Assembler Commands for Alignment
++ * -------------------------------- */
++
++#define ASM_OUTPUT_ALIGN(FILE, LOG) \
++ do { \
++ fprintf ((FILE), "%s%d\n", ALIGN_ASM_OP, (LOG)); \
++ } while (0)
++
++
++/* -------------------------------- *
++ * Output of Assembler Instructions
++ * -------------------------------- */
++
++#define REGISTER_NAMES \
++{ \
++ "zero", \
++ "at", \
++ "r2", \
++ "r3", \
++ "r4", \
++ "r5", \
++ "r6", \
++ "r7", \
++ "r8", \
++ "r9", \
++ "r10", \
++ "r11", \
++ "r12", \
++ "r13", \
++ "r14", \
++ "r15", \
++ "r16", \
++ "r17", \
++ "r18", \
++ "r19", \
++ "r20", \
++ "r21", \
++ "r22", \
++ "r23", \
++ "r24", \
++ "r25", \
++ "gp", \
++ "sp", \
++ "fp", \
++ "ta", \
++ "ba", \
++ "ra", \
++ "status", \
++ "estatus", \
++ "bstatus", \
++ "ipri", \
++ "ecause", \
++ "pc", \
++ "rap", \
++ "fake_fp", \
++ "fake_ap", \
++}
++
++#define ASM_OUTPUT_OPCODE(STREAM, PTR)\
++ (PTR) = asm_output_opcode (STREAM, PTR)
++
++#define PRINT_OPERAND(STREAM, X, CODE) \
++ nios2_print_operand (STREAM, X, CODE)
++
++#define PRINT_OPERAND_ADDRESS(STREAM, X) \
++ nios2_print_operand_address (STREAM, X)
++
++#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
++do { fputs (integer_asm_op (POINTER_SIZE / BITS_PER_UNIT, TRUE), FILE); \
++ fprintf (FILE, ".L%u\n", (unsigned) (VALUE)); \
++ } while (0)
++
++
++/* ------------ *
++ * Label Output
++ * ------------ */
++
++
++/* ---------------------------------------------------- *
++ * Dividing the Output into Sections (Texts, Data, ...)
++ * ---------------------------------------------------- */
++
++/* Output before read-only data. */
++#define TEXT_SECTION_ASM_OP ("\t.section\t.text")
++
++/* Output before writable data. */
++#define DATA_SECTION_ASM_OP ("\t.section\t.data")
++
++
++/* Default the definition of "small data" to 8 bytes. */
++/* ??? How come I can't use HOST_WIDE_INT here? */
++extern unsigned long nios2_section_threshold;
++#define NIOS2_DEFAULT_GVALUE 8
++
++
++
++/* This says how to output assembler code to declare an
++ uninitialized external linkage data object. Under SVR4,
++ the linker seems to want the alignment of data objects
++ to depend on their types. We do exactly that here. */
++
++#undef COMMON_ASM_OP
++#define COMMON_ASM_OP "\t.comm\t"
++
++#undef ASM_OUTPUT_ALIGNED_COMMON
++#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
++do \
++{ \
++ if ((SIZE) <= nios2_section_threshold) \
++ { \
++ named_section (0, ".sbss", 0); \
++ (*targetm.asm_out.globalize_label) (FILE, NAME); \
++ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
++ if (!flag_inhibit_size_directive) \
++ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \
++ ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT)); \
++ ASM_OUTPUT_LABEL(FILE, NAME); \
++ ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1); \
++ } \
++ else \
++ { \
++ fprintf ((FILE), "%s", COMMON_ASM_OP); \
++ assemble_name ((FILE), (NAME)); \
++ fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \
++ } \
++} \
++while (0)
++
++
++/* This says how to output assembler code to declare an
++ uninitialized internal linkage data object. Under SVR4,
++ the linker seems to want the alignment of data objects
++ to depend on their types. We do exactly that here. */
++
++#undef ASM_OUTPUT_ALIGNED_LOCAL
++#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
++do { \
++ if ((SIZE) <= nios2_section_threshold) \
++ named_section (0, ".sbss", 0); \
++ else \
++ named_section (0, ".bss", 0); \
++ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
++ if (!flag_inhibit_size_directive) \
++ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \
++ ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT)); \
++ ASM_OUTPUT_LABEL(FILE, NAME); \
++ ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1); \
++} while (0)
++
++
++
++/***************************
++ * Miscellaneous Parameters
++ ***************************/
++
++#define MOVE_MAX 4
++
++#define Pmode SImode
++#define FUNCTION_MODE QImode
++
++#define CASE_VECTOR_MODE Pmode
++
++#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
++
++#define LOAD_EXTEND_OP(MODE) (ZERO_EXTEND)
++
++#define WORD_REGISTER_OPERATIONS
+--- gcc-3.4.3/gcc/config/nios2/nios2.md
++++ gcc-3.4.3-nios2/gcc/config/nios2/nios2.md
+@@ -0,0 +1,2078 @@
++;; Machine Description for Altera NIOS 2G NIOS2 version.
++;; Copyright (C) 2003 Altera
++;; Contributed by Jonah Graham (jgraham@altera.com).
++;;
++;; This file is part of GNU CC.
++;;
++;; GNU CC is free software; you can redistribute it and/or modify
++;; it under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 2, or (at your option)
++;; any later version.
++;;
++;; GNU CC is distributed in the hope that it will be useful,
++;; but WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++;; GNU General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GNU CC; see the file COPYING. If not, write to
++;; the Free Software Foundation, 59 Temple Place - Suite 330,
++;; Boston, MA 02111-1307, USA. */
++
++
++\f
++;*****************************************************************************
++;*
++;* constants
++;*
++;*****************************************************************************
++(define_constants [
++ (GP_REGNO 26)
++ (SP_REGNO 27)
++ (FP_REGNO 28)
++ (RA_REGNO 31)
++ (RAP_REGNO 38)
++ (FIRST_RETVAL_REGNO 2)
++ (LAST_RETVAL_REGNO 3)
++ (FIRST_ARG_REGNO 4)
++ (LAST_ARG_REGNO 7)
++ (SC_REGNO 23)
++ (PC_REGNO 37)
++ (FAKE_FP_REGNO 39)
++ (FAKE_AP_REGNO 40)
++
++
++ (UNSPEC_BLOCKAGE 0)
++ (UNSPEC_LDBIO 1)
++ (UNSPEC_LDBUIO 2)
++ (UNSPEC_LDHIO 3)
++ (UNSPEC_LDHUIO 4)
++ (UNSPEC_LDWIO 5)
++ (UNSPEC_STBIO 6)
++ (UNSPEC_STHIO 7)
++ (UNSPEC_STWIO 8)
++ (UNSPEC_SYNC 9)
++ (UNSPEC_WRCTL 10)
++ (UNSPEC_RDCTL 11)
++
++])
++
++
++\f
++;*****************************************************************************
++;*
++;* instruction scheduler
++;*
++;*****************************************************************************
++
++; No schedule info is currently available, using an assumption that no
++; instruction can use the results of the previous instruction without
++; incuring a stall.
++
++; length of an instruction (in bytes)
++(define_attr "length" "" (const_int 4))
++(define_attr "type" "unknown,complex,control,alu,cond_alu,st,ld,shift,mul,div,custom" (const_string "complex"))
++
++(define_asm_attributes
++ [(set_attr "length" "4")
++ (set_attr "type" "complex")])
++
++(define_automaton "nios2")
++(automata_option "v")
++;(automata_option "no-minimization")
++(automata_option "ndfa")
++
++; The nios2 pipeline is fairly straightforward for the fast model.
++; Every alu operation is pipelined so that an instruction can
++; be issued every cycle. However, there are still potential
++; stalls which this description tries to deal with.
++
++(define_cpu_unit "cpu" "nios2")
++
++(define_insn_reservation "complex" 1
++ (eq_attr "type" "complex")
++ "cpu")
++
++(define_insn_reservation "control" 1
++ (eq_attr "type" "control")
++ "cpu")
++
++(define_insn_reservation "alu" 1
++ (eq_attr "type" "alu")
++ "cpu")
++
++(define_insn_reservation "cond_alu" 1
++ (eq_attr "type" "cond_alu")
++ "cpu")
++
++(define_insn_reservation "st" 1
++ (eq_attr "type" "st")
++ "cpu")
++
++(define_insn_reservation "custom" 1
++ (eq_attr "type" "custom")
++ "cpu")
++
++; shifts, muls and lds have three cycle latency
++(define_insn_reservation "ld" 3
++ (eq_attr "type" "ld")
++ "cpu")
++
++(define_insn_reservation "shift" 3
++ (eq_attr "type" "shift")
++ "cpu")
++
++(define_insn_reservation "mul" 3
++ (eq_attr "type" "mul")
++ "cpu")
++
++(define_insn_reservation "div" 1
++ (eq_attr "type" "div")
++ "cpu")
++
++\f
++;*****************************************************************************
++;*
++;* MOV Instructions
++;*
++;*****************************************************************************
++
++(define_expand "movqi"
++ [(set (match_operand:QI 0 "nonimmediate_operand" "")
++ (match_operand:QI 1 "general_operand" ""))]
++ ""
++{
++ if (nios2_emit_move_sequence (operands, QImode))
++ DONE;
++})
++
++(define_insn "movqi_internal"
++ [(set (match_operand:QI 0 "nonimmediate_operand" "=m, r,r, r")
++ (match_operand:QI 1 "general_operand" "rM,m,rM,I"))]
++ "(register_operand (operands[0], QImode)
++ || register_operand (operands[1], QImode)
++ || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
++ "@
++ stb%o0\\t%z1, %0
++ ldbu%o1\\t%0, %1
++ mov\\t%0, %z1
++ movi\\t%0, %1"
++ [(set_attr "type" "st,ld,alu,alu")])
++
++(define_insn "ldbio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDBIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldbio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "ldbuio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDBUIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldbuio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "stbio"
++ [(set (match_operand:SI 0 "memory_operand" "=m")
++ (match_operand:SI 1 "register_operand" "r"))
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_STBIO)]
++ ""
++ "stbio\\t%z1, %0"
++ [(set_attr "type" "st")])
++
++
++(define_expand "movhi"
++ [(set (match_operand:HI 0 "nonimmediate_operand" "")
++ (match_operand:HI 1 "general_operand" ""))]
++ ""
++{
++ if (nios2_emit_move_sequence (operands, HImode))
++ DONE;
++})
++
++(define_insn "movhi_internal"
++ [(set (match_operand:HI 0 "nonimmediate_operand" "=m, r,r, r,r")
++ (match_operand:HI 1 "general_operand" "rM,m,rM,I,J"))]
++ "(register_operand (operands[0], HImode)
++ || register_operand (operands[1], HImode)
++ || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
++ "@
++ sth%o0\\t%z1, %0
++ ldhu%o1\\t%0, %1
++ mov\\t%0, %z1
++ movi\\t%0, %1
++ movui\\t%0, %1"
++ [(set_attr "type" "st,ld,alu,alu,alu")])
++
++(define_insn "ldhio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDHIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldhio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "ldhuio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDHUIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldhuio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "sthio"
++ [(set (match_operand:SI 0 "memory_operand" "=m")
++ (match_operand:SI 1 "register_operand" "r"))
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_STHIO)]
++ ""
++ "sthio\\t%z1, %0"
++ [(set_attr "type" "st")])
++
++(define_expand "movsi"
++ [(set (match_operand:SI 0 "nonimmediate_operand" "")
++ (match_operand:SI 1 "general_operand" ""))]
++ ""
++{
++ if (nios2_emit_move_sequence (operands, SImode))
++ DONE;
++})
++
++(define_insn "movsi_internal"
++ [(set (match_operand:SI 0 "nonimmediate_operand" "=m, r,r, r,r,r,r")
++ (match_operand:SI 1 "general_operand" "rM,m,rM,I,J,S,i"))]
++ "(register_operand (operands[0], SImode)
++ || register_operand (operands[1], SImode)
++ || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0))"
++ "@
++ stw%o0\\t%z1, %0
++ ldw%o1\\t%0, %1
++ mov\\t%0, %z1
++ movi\\t%0, %1
++ movui\\t%0, %1
++ addi\\t%0, gp, %%gprel(%1)
++ movhi\\t%0, %H1\;addi\\t%0, %0, %L1"
++ [(set_attr "type" "st,ld,alu,alu,alu,alu,alu")])
++
++(define_insn "ldwio"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_LDWIO))
++ (use (match_operand:SI 1 "memory_operand" "m"))]
++ ""
++ "ldwio\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_insn "stwio"
++ [(set (match_operand:SI 0 "memory_operand" "=m")
++ (match_operand:SI 1 "register_operand" "r"))
++ (unspec_volatile:SI [(const_int 0)] UNSPEC_STWIO)]
++ ""
++ "stwio\\t%z1, %0"
++ [(set_attr "type" "st")])
++
++
++\f
++;*****************************************************************************
++;*
++;* zero extension
++;*
++;*****************************************************************************
++
++
++(define_insn "zero_extendhisi2"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r,m")))]
++ ""
++ "@
++ andi\\t%0, %1, 0xffff
++ ldhu%o1\\t%0, %1"
++ [(set_attr "type" "alu,ld")])
++
++(define_insn "zero_extendqihi2"
++ [(set (match_operand:HI 0 "register_operand" "=r,r")
++ (zero_extend:HI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
++ ""
++ "@
++ andi\\t%0, %1, 0xff
++ ldbu%o1\\t%0, %1"
++ [(set_attr "type" "alu,ld")])
++
++(define_insn "zero_extendqisi2"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
++ ""
++ "@
++ andi\\t%0, %1, 0xff
++ ldbu%o1\\t%0, %1"
++ [(set_attr "type" "alu,ld")])
++
++
++\f
++;*****************************************************************************
++;*
++;* sign extension
++;*
++;*****************************************************************************
++
++(define_expand "extendhisi2"
++ [(set (match_operand:SI 0 "register_operand" "")
++ (sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
++ ""
++{
++ if (optimize && GET_CODE (operands[1]) == MEM)
++ operands[1] = force_not_mem (operands[1]);
++
++ if (GET_CODE (operands[1]) != MEM)
++ {
++ rtx op1 = gen_lowpart (SImode, operands[1]);
++ rtx temp = gen_reg_rtx (SImode);
++ rtx shift = GEN_INT (16);
++
++ emit_insn (gen_ashlsi3 (temp, op1, shift));
++ emit_insn (gen_ashrsi3 (operands[0], temp, shift));
++ DONE;
++ }
++})
++
++(define_insn "extendhisi2_internal"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (sign_extend:SI (match_operand:HI 1 "memory_operand" "m")))]
++ ""
++ "ldh%o1\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++(define_expand "extendqihi2"
++ [(set (match_operand:HI 0 "register_operand" "")
++ (sign_extend:HI (match_operand:QI 1 "nonimmediate_operand" "")))]
++ ""
++{
++ if (optimize && GET_CODE (operands[1]) == MEM)
++ operands[1] = force_not_mem (operands[1]);
++
++ if (GET_CODE (operands[1]) != MEM)
++ {
++ rtx op0 = gen_lowpart (SImode, operands[0]);
++ rtx op1 = gen_lowpart (SImode, operands[1]);
++ rtx temp = gen_reg_rtx (SImode);
++ rtx shift = GEN_INT (24);
++
++ emit_insn (gen_ashlsi3 (temp, op1, shift));
++ emit_insn (gen_ashrsi3 (op0, temp, shift));
++ DONE;
++ }
++})
++
++(define_insn "extendqihi2_internal"
++ [(set (match_operand:HI 0 "register_operand" "=r")
++ (sign_extend:HI (match_operand:QI 1 "memory_operand" "m")))]
++ ""
++ "ldb%o1\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++
++(define_expand "extendqisi2"
++ [(set (match_operand:SI 0 "register_operand" "")
++ (sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "")))]
++ ""
++{
++ if (optimize && GET_CODE (operands[1]) == MEM)
++ operands[1] = force_not_mem (operands[1]);
++
++ if (GET_CODE (operands[1]) != MEM)
++ {
++ rtx op1 = gen_lowpart (SImode, operands[1]);
++ rtx temp = gen_reg_rtx (SImode);
++ rtx shift = GEN_INT (24);
++
++ emit_insn (gen_ashlsi3 (temp, op1, shift));
++ emit_insn (gen_ashrsi3 (operands[0], temp, shift));
++ DONE;
++ }
++})
++
++(define_insn "extendqisi2_insn"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (sign_extend:SI (match_operand:QI 1 "memory_operand" "m")))]
++ ""
++ "ldb%o1\\t%0, %1"
++ [(set_attr "type" "ld")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Arithmetic Operations
++;*
++;*****************************************************************************
++
++(define_insn "addsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (plus:SI (match_operand:SI 1 "register_operand" "%r,r")
++ (match_operand:SI 2 "arith_operand" "r,I")))]
++ ""
++ "add%i2\\t%0, %1, %z2"
++ [(set_attr "type" "alu")])
++
++(define_insn "subsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (minus:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "register_operand" "r")))]
++ ""
++ "sub\\t%0, %z1, %2"
++ [(set_attr "type" "alu")])
++
++(define_insn "mulsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (mult:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "arith_operand" "r,I")))]
++ "TARGET_HAS_MUL"
++ "mul%i2\\t%0, %1, %z2"
++ [(set_attr "type" "mul")])
++
++(define_expand "divsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (div:SI (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")))]
++ ""
++{
++ if (!TARGET_HAS_DIV)
++ {
++ if (!TARGET_FAST_SW_DIV)
++ FAIL;
++ else
++ {
++ if (nios2_emit_expensive_div (operands, SImode))
++ DONE;
++ }
++ }
++})
++
++(define_insn "divsi3_insn"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (div:SI (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")))]
++ "TARGET_HAS_DIV"
++ "div\\t%0, %1, %2"
++ [(set_attr "type" "div")])
++
++(define_insn "udivsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (udiv:SI (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")))]
++ "TARGET_HAS_DIV"
++ "divu\\t%0, %1, %2"
++ [(set_attr "type" "div")])
++
++(define_insn "smulsi3_highpart"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (truncate:SI
++ (lshiftrt:DI
++ (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r"))
++ (sign_extend:DI (match_operand:SI 2 "register_operand" "r")))
++ (const_int 32))))]
++ "TARGET_HAS_MULX"
++ "mulxss\\t%0, %1, %2"
++ [(set_attr "type" "mul")])
++
++(define_insn "umulsi3_highpart"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (truncate:SI
++ (lshiftrt:DI
++ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
++ (zero_extend:DI (match_operand:SI 2 "register_operand" "r")))
++ (const_int 32))))]
++ "TARGET_HAS_MULX"
++ "mulxuu\\t%0, %1, %2"
++ [(set_attr "type" "mul")])
++
++
++(define_expand "mulsidi3"
++ [(set (subreg:SI (match_operand:DI 0 "register_operand" "") 0)
++ (mult:SI (match_operand:SI 1 "register_operand" "")
++ (match_operand:SI 2 "register_operand" "")))
++ (set (subreg:SI (match_dup 0) 4)
++ (truncate:SI (lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1))
++ (sign_extend:DI (match_dup 2)))
++ (const_int 32))))]
++ "TARGET_HAS_MULX"
++ "")
++
++(define_expand "umulsidi3"
++ [(set (subreg:SI (match_operand:DI 0 "register_operand" "") 0)
++ (mult:SI (match_operand:SI 1 "register_operand" "")
++ (match_operand:SI 2 "register_operand" "")))
++ (set (subreg:SI (match_dup 0) 4)
++ (truncate:SI (lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1))
++ (zero_extend:DI (match_dup 2)))
++ (const_int 32))))]
++ "TARGET_HAS_MULX"
++ "")
++
++
++\f
++;*****************************************************************************
++;*
++;* Negate and ones complement
++;*
++;*****************************************************************************
++
++(define_insn "negsi2"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (neg:SI (match_operand:SI 1 "register_operand" "r")))]
++ ""
++{
++ operands[2] = const0_rtx;
++ return "sub\\t%0, %z2, %1";
++}
++ [(set_attr "type" "alu")])
++
++(define_insn "one_cmplsi2"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (not:SI (match_operand:SI 1 "register_operand" "r")))]
++ ""
++{
++ operands[2] = const0_rtx;
++ return "nor\\t%0, %z2, %1";
++}
++ [(set_attr "type" "alu")])
++
++
++
++; Logical Operantions
++
++(define_insn "andsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r, r,r")
++ (and:SI (match_operand:SI 1 "register_operand" "%r, r,r")
++ (match_operand:SI 2 "logical_operand" "rM,J,K")))]
++ ""
++ "@
++ and\\t%0, %1, %z2
++ and%i2\\t%0, %1, %2
++ andh%i2\\t%0, %1, %U2"
++ [(set_attr "type" "alu")])
++
++(define_insn "iorsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r, r,r")
++ (ior:SI (match_operand:SI 1 "register_operand" "%r, r,r")
++ (match_operand:SI 2 "logical_operand" "rM,J,K")))]
++ ""
++ "@
++ or\\t%0, %1, %z2
++ or%i2\\t%0, %1, %2
++ orh%i2\\t%0, %1, %U2"
++ [(set_attr "type" "alu")])
++
++(define_insn "*norsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (and:SI (not:SI (match_operand:SI 1 "register_operand" "%r"))
++ (not:SI (match_operand:SI 2 "reg_or_0_operand" "rM"))))]
++ ""
++ "nor\\t%0, %1, %z2"
++ [(set_attr "type" "alu")])
++
++(define_insn "xorsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r, r,r")
++ (xor:SI (match_operand:SI 1 "register_operand" "%r, r,r")
++ (match_operand:SI 2 "logical_operand" "rM,J,K")))]
++ ""
++ "@
++ xor\\t%0, %1, %z2
++ xor%i2\\t%0, %1, %2
++ xorh%i2\\t%0, %1, %U2"
++ [(set_attr "type" "alu")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Shifts
++;*
++;*****************************************************************************
++
++(define_insn "ashlsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (ashift:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "shift_operand" "r,L")))]
++ ""
++ "sll%i2\\t%0, %1, %z2"
++ [(set_attr "type" "shift")])
++
++(define_insn "ashrsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (ashiftrt:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "shift_operand" "r,L")))]
++ ""
++ "sra%i2\\t%0, %1, %z2"
++ [(set_attr "type" "shift")])
++
++(define_insn "lshrsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (lshiftrt:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "shift_operand" "r,L")))]
++ ""
++ "srl%i2\\t%0, %1, %z2"
++ [(set_attr "type" "shift")])
++
++(define_insn "rotlsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (rotate:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "shift_operand" "r,L")))]
++ ""
++ "rol%i2\\t%0, %1, %z2"
++ [(set_attr "type" "shift")])
++
++(define_insn "rotrsi3"
++ [(set (match_operand:SI 0 "register_operand" "=r,r")
++ (rotatert:SI (match_operand:SI 1 "register_operand" "r,r")
++ (match_operand:SI 2 "register_operand" "r,r")))]
++ ""
++ "ror\\t%0, %1, %2"
++ [(set_attr "type" "shift")])
++
++(define_insn "*shift_mul_constants"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ashift:SI (mult:SI (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "const_int_operand" "I"))
++ (match_operand:SI 3 "const_int_operand" "I")))]
++ "TARGET_HAS_MUL && SMALL_INT (INTVAL (operands[2]) << INTVAL (operands[3]))"
++{
++ HOST_WIDE_INT mul = INTVAL (operands[2]) << INTVAL (operands[3]);
++ rtx ops[3];
++
++ ops[0] = operands[0];
++ ops[1] = operands[1];
++ ops[2] = GEN_INT (mul);
++
++ output_asm_insn ("muli\t%0, %1, %2", ops);
++ return "";
++}
++ [(set_attr "type" "mul")])
++
++
++
++\f
++;*****************************************************************************
++;*
++;* Prologue, Epilogue and Return
++;*
++;*****************************************************************************
++
++(define_expand "prologue"
++ [(const_int 1)]
++ ""
++{
++ expand_prologue ();
++ DONE;
++})
++
++(define_expand "epilogue"
++ [(return)]
++ ""
++{
++ expand_epilogue (false);
++ DONE;
++})
++
++(define_expand "sibcall_epilogue"
++ [(return)]
++ ""
++{
++ expand_epilogue (true);
++ DONE;
++})
++
++(define_insn "return"
++ [(return)]
++ "reload_completed && nios2_can_use_return_insn ()"
++ "ret\\t"
++)
++
++(define_insn "return_from_epilogue"
++ [(use (match_operand 0 "pmode_register_operand" ""))
++ (return)]
++ "reload_completed"
++ "ret\\t"
++)
++
++;; Block any insns from being moved before this point, since the
++;; profiling call to mcount can use various registers that aren't
++;; saved or used to pass arguments.
++
++(define_insn "blockage"
++ [(unspec_volatile [(const_int 0)] UNSPEC_BLOCKAGE)]
++ ""
++ ""
++ [(set_attr "type" "unknown")
++ (set_attr "length" "0")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Jumps and Calls
++;*
++;*****************************************************************************
++
++(define_insn "indirect_jump"
++ [(set (pc) (match_operand:SI 0 "register_operand" "r"))]
++ ""
++ "jmp\\t%0"
++ [(set_attr "type" "control")])
++
++(define_insn "jump"
++ [(set (pc)
++ (label_ref (match_operand 0 "" "")))]
++ ""
++ "br\\t%0"
++ [(set_attr "type" "control")])
++
++
++(define_insn "indirect_call"
++ [(call (mem:QI (match_operand:SI 0 "register_operand" "r"))
++ (match_operand 1 "" ""))
++ (clobber (reg:SI RA_REGNO))]
++ ""
++ "callr\\t%0"
++ [(set_attr "type" "control")])
++
++(define_insn "indirect_call_value"
++ [(set (match_operand 0 "" "")
++ (call (mem:QI (match_operand:SI 1 "register_operand" "r"))
++ (match_operand 2 "" "")))
++ (clobber (reg:SI RA_REGNO))]
++ ""
++ "callr\\t%1"
++)
++
++(define_expand "call"
++ [(parallel [(call (match_operand 0 "" "")
++ (match_operand 1 "" ""))
++ (clobber (reg:SI RA_REGNO))])]
++ ""
++ "")
++
++(define_expand "call_value"
++ [(parallel [(set (match_operand 0 "" "")
++ (call (match_operand 1 "" "")
++ (match_operand 2 "" "")))
++ (clobber (reg:SI RA_REGNO))])]
++ ""
++ "")
++
++(define_insn "*call"
++ [(call (mem:QI (match_operand:SI 0 "immediate_operand" "i"))
++ (match_operand 1 "" ""))
++ (clobber (match_operand:SI 2 "register_operand" "=r"))]
++ ""
++ "call\\t%0"
++ [(set_attr "type" "control")])
++
++(define_insn "*call_value"
++ [(set (match_operand 0 "" "")
++ (call (mem:QI (match_operand:SI 1 "immediate_operand" "i"))
++ (match_operand 2 "" "")))
++ (clobber (match_operand:SI 3 "register_operand" "=r"))]
++ ""
++ "call\\t%1"
++ [(set_attr "type" "control")])
++
++(define_expand "sibcall"
++ [(parallel [(call (match_operand 0 "" "")
++ (match_operand 1 "" ""))
++ (return)
++ (use (match_operand 2 "" ""))])]
++ ""
++ {
++ XEXP (operands[0], 0) = copy_to_mode_reg (SImode, XEXP (operands[0], 0));
++
++ if (operands[2] == NULL_RTX)
++ operands[2] = const0_rtx;
++ }
++)
++
++(define_expand "sibcall_value"
++ [(parallel [(set (match_operand 0 "" "")
++ (call (match_operand 1 "" "")
++ (match_operand 2 "" "")))
++ (return)
++ (use (match_operand 3 "" ""))])]
++ ""
++ {
++ XEXP (operands[1], 0) = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
++
++ if (operands[3] == NULL_RTX)
++ operands[3] = const0_rtx;
++ }
++)
++
++(define_insn "sibcall_insn"
++ [(call (mem:QI (match_operand:SI 0 "register_operand" "r"))
++ (match_operand 1 "" ""))
++ (return)
++ (use (match_operand 2 "" ""))]
++ ""
++ "jmp\\t%0"
++)
++
++(define_insn "sibcall_value_insn"
++ [(set (match_operand 0 "register_operand" "")
++ (call (mem:QI (match_operand:SI 1 "register_operand" "r"))
++ (match_operand 2 "" "")))
++ (return)
++ (use (match_operand 3 "" ""))]
++ ""
++ "jmp\\t%1"
++)
++
++
++
++
++(define_expand "tablejump"
++ [(parallel [(set (pc) (match_operand 0 "register_operand" "r"))
++ (use (label_ref (match_operand 1 "" "")))])]
++ ""
++ ""
++)
++
++(define_insn "*tablejump"
++ [(set (pc)
++ (match_operand:SI 0 "register_operand" "r"))
++ (use (label_ref (match_operand 1 "" "")))]
++ ""
++ "jmp\\t%0"
++ [(set_attr "type" "control")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Comparisons
++;*
++;*****************************************************************************
++;; Flow here is rather complex (based on MIPS):
++;;
++;; 1) The cmp{si,di,sf,df} routine is called. It deposits the
++;; arguments into the branch_cmp array, and the type into
++;; branch_type. No RTL is generated.
++;;
++;; 2) The appropriate branch define_expand is called, which then
++;; creates the appropriate RTL for the comparison and branch.
++;; Different CC modes are used, based on what type of branch is
++;; done, so that we can constrain things appropriately. There
++;; are assumptions in the rest of GCC that break if we fold the
++;; operands into the branchs for integer operations, and use cc0
++;; for floating point, so we use the fp status register instead.
++;; If needed, an appropriate temporary is created to hold the
++;; of the integer compare.
++
++(define_expand "cmpsi"
++ [(set (cc0)
++ (compare:CC (match_operand:SI 0 "register_operand" "")
++ (match_operand:SI 1 "arith_operand" "")))]
++ ""
++{
++ branch_cmp[0] = operands[0];
++ branch_cmp[1] = operands[1];
++ branch_type = CMP_SI;
++ DONE;
++})
++
++(define_expand "tstsi"
++ [(set (cc0)
++ (match_operand:SI 0 "register_operand" ""))]
++ ""
++{
++ branch_cmp[0] = operands[0];
++ branch_cmp[1] = const0_rtx;
++ branch_type = CMP_SI;
++ DONE;
++})
++
++\f
++;*****************************************************************************
++;*
++;* setting a register from a comparison
++;*
++;*****************************************************************************
++
++(define_expand "seq"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (eq:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (EQ, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*seq"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (eq:SI (match_operand:SI 1 "reg_or_0_operand" "%rM")
++ (match_operand:SI 2 "arith_operand" "rI")))]
++ ""
++ "cmpeq%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sne"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ne:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (NE, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sne"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ne:SI (match_operand:SI 1 "reg_or_0_operand" "%rM")
++ (match_operand:SI 2 "arith_operand" "rI")))]
++ ""
++ "cmpne%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sgt"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (gt:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (GT, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sgt"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (gt:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "reg_or_0_operand" "rM")))]
++ ""
++ "cmplt\\t%0, %z2, %z1"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sge"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ge:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (GE, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sge"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ge:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "arith_operand" "rI")))]
++ ""
++ "cmpge%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++(define_expand "sle"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (le:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (LE, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sle"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (le:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "reg_or_0_operand" "rM")))]
++ ""
++ "cmpge\\t%0, %z2, %z1"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "slt"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (lt:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (LT, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*slt"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (lt:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "arith_operand" "rI")))]
++ ""
++ "cmplt%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sgtu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (gtu:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (GTU, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sgtu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (gtu:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "reg_or_0_operand" "rM")))]
++ ""
++ "cmpltu\\t%0, %z2, %z1"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sgeu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (geu:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (GEU, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sgeu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (geu:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "uns_arith_operand" "rJ")))]
++ ""
++ "cmpgeu%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++(define_expand "sleu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (leu:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (LEU, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sleu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (leu:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "reg_or_0_operand" "rM")))]
++ ""
++ "cmpgeu\\t%0, %z2, %z1"
++ [(set_attr "type" "alu")])
++
++
++(define_expand "sltu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ltu:SI (match_dup 1)
++ (match_dup 2)))]
++ ""
++{
++ if (branch_type != CMP_SI)
++ FAIL;
++
++ /* set up operands from compare. */
++ operands[1] = branch_cmp[0];
++ operands[2] = branch_cmp[1];
++
++ gen_int_relational (LTU, operands[0], operands[1], operands[2], NULL_RTX);
++ DONE;
++})
++
++
++(define_insn "*sltu"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (ltu:SI (match_operand:SI 1 "reg_or_0_operand" "rM")
++ (match_operand:SI 2 "uns_arith_operand" "rJ")))]
++ ""
++ "cmpltu%i2\\t%0, %z1, %z2"
++ [(set_attr "type" "alu")])
++
++
++
++\f
++;*****************************************************************************
++;*
++;* branches
++;*
++;*****************************************************************************
++
++(define_insn "*cbranch"
++ [(set (pc)
++ (if_then_else
++ (match_operator:SI 0 "comparison_operator"
++ [(match_operand:SI 2 "reg_or_0_operand" "rM")
++ (match_operand:SI 3 "reg_or_0_operand" "rM")])
++ (label_ref (match_operand 1 "" ""))
++ (pc)))]
++ ""
++ "b%0\\t%z2, %z3, %l1"
++ [(set_attr "type" "control")])
++
++
++(define_expand "beq"
++ [(set (pc)
++ (if_then_else (eq:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (EQ, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++
++(define_expand "bne"
++ [(set (pc)
++ (if_then_else (ne:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (NE, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++
++(define_expand "bgt"
++ [(set (pc)
++ (if_then_else (gt:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (GT, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "bge"
++ [(set (pc)
++ (if_then_else (ge:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (GE, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "ble"
++ [(set (pc)
++ (if_then_else (le:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (LE, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "blt"
++ [(set (pc)
++ (if_then_else (lt:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (LT, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++
++(define_expand "bgtu"
++ [(set (pc)
++ (if_then_else (gtu:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (GTU, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "bgeu"
++ [(set (pc)
++ (if_then_else (geu:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (GEU, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "bleu"
++ [(set (pc)
++ (if_then_else (leu:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (LEU, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++(define_expand "bltu"
++ [(set (pc)
++ (if_then_else (ltu:CC (cc0)
++ (const_int 0))
++ (label_ref (match_operand 0 "" ""))
++ (pc)))]
++ ""
++{
++ gen_int_relational (LTU, NULL_RTX, branch_cmp[0], branch_cmp[1], operands[0]);
++ DONE;
++})
++
++\f
++;*****************************************************************************
++;*
++;* String and Block Operations
++;*
++;*****************************************************************************
++
++; ??? This is all really a hack to get Dhrystone to work as fast as possible
++; things to be fixed:
++; * let the compiler core handle all of this, for that to work the extra
++; aliasing needs to be addressed.
++; * we use three temporary registers for loading and storing to ensure no
++; ld use stalls, this is excessive, because after the first ld/st only
++; two are needed. Only two would be needed all the way through if
++; we could schedule with other code. Consider:
++; 1 ld $1, 0($src)
++; 2 ld $2, 4($src)
++; 3 ld $3, 8($src)
++; 4 st $1, 0($dest)
++; 5 ld $1, 12($src)
++; 6 st $2, 4($src)
++; 7 etc.
++; The first store has to wait until 4. If it does not there will be one
++; cycle of stalling. However, if any other instruction could be placed
++; between 1 and 4, $3 would not be needed.
++; * In small we probably don't want to ever do this ourself because there
++; is no ld use stall.
++
++(define_expand "movstrsi"
++ [(parallel [(set (match_operand:BLK 0 "general_operand" "")
++ (match_operand:BLK 1 "general_operand" ""))
++ (use (match_operand:SI 2 "const_int_operand" ""))
++ (use (match_operand:SI 3 "const_int_operand" ""))
++ (clobber (match_scratch:SI 4 "=&r"))
++ (clobber (match_scratch:SI 5 "=&r"))
++ (clobber (match_scratch:SI 6 "=&r"))])]
++ "TARGET_INLINE_MEMCPY"
++{
++ rtx ld_addr_reg, st_addr_reg;
++
++ /* If the predicate for op2 fails in expr.c:emit_block_move_via_movstr
++ it trys to copy to a register, but does not re-try the predicate.
++ ??? Intead of fixing expr.c, I fix it here. */
++ if (!const_int_operand (operands[2], SImode))
++ FAIL;
++
++ /* ??? there are some magic numbers which need to be sorted out here.
++ the basis for them is not increasing code size hugely or going
++ out of range of offset addressing */
++ if (INTVAL (operands[3]) < 4)
++ FAIL;
++ if (!optimize
++ || (optimize_size && INTVAL (operands[2]) > 12)
++ || (optimize < 3 && INTVAL (operands[2]) > 100)
++ || INTVAL (operands[2]) > 200)
++ FAIL;
++
++ st_addr_reg
++ = replace_equiv_address (operands[0],
++ copy_to_mode_reg (Pmode, XEXP (operands[0], 0)));
++ ld_addr_reg
++ = replace_equiv_address (operands[1],
++ copy_to_mode_reg (Pmode, XEXP (operands[1], 0)));
++ emit_insn (gen_movstrsi_internal (st_addr_reg, ld_addr_reg,
++ operands[2], operands[3]));
++
++ DONE;
++})
++
++
++(define_insn "movstrsi_internal"
++ [(set (match_operand:BLK 0 "memory_operand" "=o")
++ (match_operand:BLK 1 "memory_operand" "o"))
++ (use (match_operand:SI 2 "const_int_operand" "i"))
++ (use (match_operand:SI 3 "const_int_operand" "i"))
++ (clobber (match_scratch:SI 4 "=&r"))
++ (clobber (match_scratch:SI 5 "=&r"))
++ (clobber (match_scratch:SI 6 "=&r"))]
++ "TARGET_INLINE_MEMCPY"
++{
++ int ld_offset = INTVAL (operands[2]);
++ int ld_len = INTVAL (operands[2]);
++ int ld_reg = 0;
++ rtx ld_addr_reg = XEXP (operands[1], 0);
++ int st_offset = INTVAL (operands[2]);
++ int st_len = INTVAL (operands[2]);
++ int st_reg = 0;
++ rtx st_addr_reg = XEXP (operands[0], 0);
++ int delay_count = 0;
++
++ /* ops[0] is the address used by the insn
++ ops[1] is the register being loaded or stored */
++ rtx ops[2];
++
++ if (INTVAL (operands[3]) < 4)
++ abort ();
++
++ while (ld_offset >= 4)
++ {
++ /* if the load use delay has been met, I can start
++ storing */
++ if (delay_count >= 3)
++ {
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stw\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 4;
++ }
++
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (ld_addr_reg, ld_len - ld_offset));
++ ops[1] = operands[ld_reg + 4];
++ output_asm_insn ("ldw\t%1, %0", ops);
++
++ ld_reg = (ld_reg + 1) % 3;
++ ld_offset -= 4;
++ delay_count++;
++ }
++
++ if (ld_offset >= 2)
++ {
++ /* if the load use delay has been met, I can start
++ storing */
++ if (delay_count >= 3)
++ {
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stw\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 4;
++ }
++
++ ops[0] = gen_rtx (MEM, HImode,
++ plus_constant (ld_addr_reg, ld_len - ld_offset));
++ ops[1] = operands[ld_reg + 4];
++ output_asm_insn ("ldh\t%1, %0", ops);
++
++ ld_reg = (ld_reg + 1) % 3;
++ ld_offset -= 2;
++ delay_count++;
++ }
++
++ if (ld_offset >= 1)
++ {
++ /* if the load use delay has been met, I can start
++ storing */
++ if (delay_count >= 3)
++ {
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stw\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 4;
++ }
++
++ ops[0] = gen_rtx (MEM, QImode,
++ plus_constant (ld_addr_reg, ld_len - ld_offset));
++ ops[1] = operands[ld_reg + 4];
++ output_asm_insn ("ldb\t%1, %0", ops);
++
++ ld_reg = (ld_reg + 1) % 3;
++ ld_offset -= 1;
++ delay_count++;
++ }
++
++ while (st_offset >= 4)
++ {
++ ops[0] = gen_rtx (MEM, SImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stw\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 4;
++ }
++
++ while (st_offset >= 2)
++ {
++ ops[0] = gen_rtx (MEM, HImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("sth\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 2;
++ }
++
++ while (st_offset >= 1)
++ {
++ ops[0] = gen_rtx (MEM, QImode,
++ plus_constant (st_addr_reg, st_len - st_offset));
++ ops[1] = operands[st_reg + 4];
++ output_asm_insn ("stb\t%1, %0", ops);
++
++ st_reg = (st_reg + 1) % 3;
++ st_offset -= 1;
++ }
++
++ return "";
++}
++; ??? lengths are not being used yet, but I will probably forget
++; to update this once I am using lengths, so set it to something
++; definetely big enough to cover it. 400 allows for 200 bytes
++; of motion.
++ [(set_attr "length" "400")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Custom instructions
++;*
++;*****************************************************************************
++
++(define_constants [
++ (CUSTOM_N 100)
++ (CUSTOM_NI 101)
++ (CUSTOM_NF 102)
++ (CUSTOM_NP 103)
++ (CUSTOM_NII 104)
++ (CUSTOM_NIF 105)
++ (CUSTOM_NIP 106)
++ (CUSTOM_NFI 107)
++ (CUSTOM_NFF 108)
++ (CUSTOM_NFP 109)
++ (CUSTOM_NPI 110)
++ (CUSTOM_NPF 111)
++ (CUSTOM_NPP 112)
++ (CUSTOM_IN 113)
++ (CUSTOM_INI 114)
++ (CUSTOM_INF 115)
++ (CUSTOM_INP 116)
++ (CUSTOM_INII 117)
++ (CUSTOM_INIF 118)
++ (CUSTOM_INIP 119)
++ (CUSTOM_INFI 120)
++ (CUSTOM_INFF 121)
++ (CUSTOM_INFP 122)
++ (CUSTOM_INPI 123)
++ (CUSTOM_INPF 124)
++ (CUSTOM_INPP 125)
++ (CUSTOM_FN 126)
++ (CUSTOM_FNI 127)
++ (CUSTOM_FNF 128)
++ (CUSTOM_FNP 129)
++ (CUSTOM_FNII 130)
++ (CUSTOM_FNIF 131)
++ (CUSTOM_FNIP 132)
++ (CUSTOM_FNFI 133)
++ (CUSTOM_FNFF 134)
++ (CUSTOM_FNFP 135)
++ (CUSTOM_FNPI 136)
++ (CUSTOM_FNPF 137)
++ (CUSTOM_FNPP 138)
++ (CUSTOM_PN 139)
++ (CUSTOM_PNI 140)
++ (CUSTOM_PNF 141)
++ (CUSTOM_PNP 142)
++ (CUSTOM_PNII 143)
++ (CUSTOM_PNIF 144)
++ (CUSTOM_PNIP 145)
++ (CUSTOM_PNFI 146)
++ (CUSTOM_PNFF 147)
++ (CUSTOM_PNFP 148)
++ (CUSTOM_PNPI 149)
++ (CUSTOM_PNPF 150)
++ (CUSTOM_PNPP 151)
++])
++
++
++(define_insn "custom_n"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")] CUSTOM_N)]
++ ""
++ "custom\\t%0, zero, zero, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_ni"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")] CUSTOM_NI)]
++ ""
++ "custom\\t%0, zero, %1, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nf"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SF 1 "register_operand" "r")] CUSTOM_NF)]
++ ""
++ "custom\\t%0, zero, %1, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_np"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")] CUSTOM_NP)]
++ ""
++ "custom\\t%0, zero, %1, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nii"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NII)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nif"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_NIF)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nip"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NIP)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nfi"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SF 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NFI)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nff"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SF 1 "register_operand" "r")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_NFF)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_nfp"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SF 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NFP)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_npi"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NPI)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_npf"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_NPF)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_npp"
++ [(unspec_volatile [(match_operand:SI 0 "custom_insn_opcode" "N")
++ (match_operand:SI 1 "register_operand" "r")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_NPP)]
++ ""
++ "custom\\t%0, zero, %1, %2"
++ [(set_attr "type" "custom")])
++
++
++
++(define_insn "custom_in"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")] CUSTOM_IN))]
++ ""
++ "custom\\t%1, %0, zero, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_ini"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_INI))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inf"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_INF))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_INP))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inii"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INII))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inif"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_INIF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inip"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INIP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_infi"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INFI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inff"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_INFF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_infp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INFP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inpi"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INPI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inpf"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_INPF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_inpp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_INPP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++
++
++
++
++(define_insn "custom_fn"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")] CUSTOM_FN))]
++ ""
++ "custom\\t%1, %0, zero, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fni"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_FNI))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnf"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_FNF))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnp"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_FNP))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnii"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNII))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnif"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_FNIF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnip"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNIP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnfi"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNFI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnff"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_FNFF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnfp"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNFP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnpi"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNPI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnpf"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_FNPF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_fnpp"
++ [(set (match_operand:SF 0 "register_operand" "=r")
++ (unspec_volatile:SF [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_FNPP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++
++
++(define_insn "custom_pn"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")] CUSTOM_PN))]
++ ""
++ "custom\\t%1, %0, zero, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pni"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_PNI))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnf"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")] CUSTOM_PNF))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")] CUSTOM_PNP))]
++ ""
++ "custom\\t%1, %0, %2, zero"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnii"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNII))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnif"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_PNIF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnip"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNIP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnfi"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNFI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnff"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_PNFF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnfp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SF 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNFP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnpi"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNPI))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnpf"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SF 3 "register_operand" "r")] CUSTOM_PNPF))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++(define_insn "custom_pnpp"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "custom_insn_opcode" "N")
++ (match_operand:SI 2 "register_operand" "r")
++ (match_operand:SI 3 "register_operand" "r")] CUSTOM_PNPP))]
++ ""
++ "custom\\t%1, %0, %2, %3"
++ [(set_attr "type" "custom")])
++
++
++
++
++
++\f
++;*****************************************************************************
++;*
++;* Misc
++;*
++;*****************************************************************************
++
++(define_insn "nop"
++ [(const_int 0)]
++ ""
++ "nop\\t"
++ [(set_attr "type" "alu")])
++
++(define_insn "sync"
++ [(unspec_volatile [(const_int 0)] UNSPEC_SYNC)]
++ ""
++ "sync\\t"
++ [(set_attr "type" "control")])
++
++
++(define_insn "rdctl"
++ [(set (match_operand:SI 0 "register_operand" "=r")
++ (unspec_volatile:SI [(match_operand:SI 1 "rdwrctl_operand" "O")] UNSPEC_RDCTL))]
++ ""
++ "rdctl\\t%0, ctl%1"
++ [(set_attr "type" "control")])
++
++(define_insn "wrctl"
++ [(unspec_volatile:SI [(match_operand:SI 0 "rdwrctl_operand" "O")
++ (match_operand:SI 1 "register_operand" "r")] UNSPEC_WRCTL)]
++ ""
++ "wrctl\\tctl%0, %1"
++ [(set_attr "type" "control")])
++
++
++\f
++;*****************************************************************************
++;*
++;* Peepholes
++;*
++;*****************************************************************************
++
++
+--- gcc-3.4.3/gcc/config/nios2/t-nios2
++++ gcc-3.4.3-nios2/gcc/config/nios2/t-nios2
+@@ -0,0 +1,123 @@
++##
++## Compiler flags to use when compiling libgcc2.c.
++##
++## LIB2FUNCS_EXTRA
++## A list of source file names to be compiled or assembled and inserted into libgcc.a.
++
++LIB2FUNCS_EXTRA=$(srcdir)/config/nios2/lib2-divmod.c \
++ $(srcdir)/config/nios2/lib2-divmod-hi.c \
++ $(srcdir)/config/nios2/lib2-divtable.c \
++ $(srcdir)/config/nios2/lib2-mul.c
++
++##
++## Floating Point Emulation
++## To have GCC include software floating point libraries in libgcc.a define FPBIT
++## and DPBIT along with a few rules as follows:
++##
++## # We want fine grained libraries, so use the new code
++## # to build the floating point emulation libraries.
++FPBIT=$(srcdir)/config/nios2/nios2-fp-bit.c
++DPBIT=$(srcdir)/config/nios2/nios2-dp-bit.c
++
++TARGET_LIBGCC2_CFLAGS = -O2
++
++# FLOAT_ONLY - no doubles
++# SMALL_MACHINE - QI/HI is faster than SI
++# Actually SMALL_MACHINE uses chars and shorts instead of ints
++# since ints (16-bit ones as they are today) are at least as fast
++# as chars and shorts, don't define SMALL_MACHINE
++# CMPtype - type returned by FP compare, i.e. INT (hard coded in fp-bit - see code )
++
++$(FPBIT): $(srcdir)/config/fp-bit.c Makefile
++ echo '#define FLOAT' > ${FPBIT}
++ cat $(srcdir)/config/fp-bit.c >> ${FPBIT}
++
++$(DPBIT): $(srcdir)/config/fp-bit.c Makefile
++ echo '' > ${DPBIT}
++ cat $(srcdir)/config/fp-bit.c >> ${DPBIT}
++
++EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
++
++# Assemble startup files.
++$(T)crti.o: $(srcdir)/config/nios2/crti.asm $(GCC_PASSES)
++ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
++ -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/nios2/crti.asm
++
++$(T)crtn.o: $(srcdir)/config/nios2/crtn.asm $(GCC_PASSES)
++ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
++ -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/nios2/crtn.asm
++
++
++## You may need to provide additional #defines at the beginning of
++## fp-bit.c and dp-bit.c to control target endianness and other options
++##
++## CRTSTUFF_T_CFLAGS
++## Special flags used when compiling crtstuff.c. See Initialization.
++##
++## CRTSTUFF_T_CFLAGS_S
++## Special flags used when compiling crtstuff.c for shared linking. Used
++## if you use crtbeginS.o and crtendS.o in EXTRA-PARTS. See Initialization.
++##
++## MULTILIB_OPTIONS
++## For some targets, invoking GCC in different ways produces objects that
++## can not be linked together. For example, for some targets GCC produces
++## both big and little endian code. For these targets, you must arrange
++## for multiple versions of libgcc.a to be compiled, one for each set of
++## incompatible options. When GCC invokes the linker, it arranges to link
++## in the right version of libgcc.a, based on the command line options
++## used.
++## The MULTILIB_OPTIONS macro lists the set of options for which special
++## versions of libgcc.a must be built. Write options that are mutually
++## incompatible side by side, separated by a slash. Write options that may
++## be used together separated by a space. The build procedure will build
++## all combinations of compatible options.
++##
++## For example, if you set MULTILIB_OPTIONS to m68000/m68020 msoft-float,
++## Makefile will build special versions of libgcc.a using the following
++## sets of options: -m68000, -m68020, -msoft-float, -m68000 -msoft-float,
++## and -m68020 -msoft-float.
++
++MULTILIB_OPTIONS = mno-hw-mul mhw-mulx
++
++## MULTILIB_DIRNAMES
++## If MULTILIB_OPTIONS is used, this variable specifies the directory names
++## that should be used to hold the various libraries. Write one element in
++## MULTILIB_DIRNAMES for each element in MULTILIB_OPTIONS. If
++## MULTILIB_DIRNAMES is not used, the default value will be
++## MULTILIB_OPTIONS, with all slashes treated as spaces.
++## For example, if MULTILIB_OPTIONS is set to m68000/m68020 msoft-float,
++## then the default value of MULTILIB_DIRNAMES is m68000 m68020
++## msoft-float. You may specify a different value if you desire a
++## different set of directory names.
++
++# MULTILIB_DIRNAMES =
++
++## MULTILIB_MATCHES
++## Sometimes the same option may be written in two different ways. If an
++## option is listed in MULTILIB_OPTIONS, GCC needs to know about any
++## synonyms. In that case, set MULTILIB_MATCHES to a list of items of the
++## form option=option to describe all relevant synonyms. For example,
++## m68000=mc68000 m68020=mc68020.
++##
++## MULTILIB_EXCEPTIONS
++## Sometimes when there are multiple sets of MULTILIB_OPTIONS being
++## specified, there are combinations that should not be built. In that
++## case, set MULTILIB_EXCEPTIONS to be all of the switch exceptions in
++## shell case syntax that should not be built.
++## For example, in the PowerPC embedded ABI support, it is not desirable to
++## build libraries compiled with the -mcall-aix option and either of the
++## -fleading-underscore or -mlittle options at the same time. Therefore
++## MULTILIB_EXCEPTIONS is set to
++##
++## *mcall-aix/*fleading-underscore* *mlittle/*mcall-aix*
++##
++
++MULTILIB_EXCEPTIONS = *mno-hw-mul/*mhw-mulx*
++
++##
++## MULTILIB_EXTRA_OPTS Sometimes it is desirable that when building
++## multiple versions of libgcc.a certain options should always be passed on
++## to the compiler. In that case, set MULTILIB_EXTRA_OPTS to be the list
++## of options to be used for all builds.
++##
++
+--- gcc-3.4.3/gcc/config.gcc
++++ gcc-3.4.3-nios2/gcc/config.gcc
+@@ -1321,6 +1321,10 @@ m32rle-*-linux*)
+ thread_file='posix'
+ fi
+ ;;
++# JBG
++nios2-*-* | nios2-*-*)
++ tm_file="elfos.h ${tm_file}"
++ ;;
+ # m68hc11 and m68hc12 share the same machine description.
+ m68hc11-*-*|m6811-*-*)
+ tm_file="dbxelf.h elfos.h m68hc11/m68hc11.h"
+--- gcc-3.4.3/gcc/cse.c
++++ gcc-3.4.3-nios2/gcc/cse.c
+@@ -3134,6 +3134,10 @@ find_comparison_args (enum rtx_code code
+ #ifdef FLOAT_STORE_FLAG_VALUE
+ REAL_VALUE_TYPE fsfv;
+ #endif
++#ifdef __nios2__
++ if (p->is_const)
++ break;
++#endif
+
+ /* If the entry isn't valid, skip it. */
+ if (! exp_equiv_p (p->exp, p->exp, 1, 0))
+--- gcc-3.4.3/gcc/doc/extend.texi
++++ gcc-3.4.3-nios2/gcc/doc/extend.texi
+@@ -5636,12 +5636,118 @@ to those machines. Generally these gene
+ instructions, but allow the compiler to schedule those calls.
+
+ @menu
++* Altera Nios II Built-in Functions::
+ * Alpha Built-in Functions::
+ * ARM Built-in Functions::
+ * X86 Built-in Functions::
+ * PowerPC AltiVec Built-in Functions::
+ @end menu
+
++@node Altera Nios II Built-in Functions
++@subsection Altera Nios II Built-in Functions
++
++These built-in functions are available for the Altera Nios II
++family of processors.
++
++The following built-in functions are always available. They
++all generate the machine instruction that is part of the name.
++
++@example
++int __builtin_ldbio (volatile const void *)
++int __builtin_ldbuio (volatile const void *)
++int __builtin_ldhio (volatile const void *)
++int __builtin_ldhuio (volatile const void *)
++int __builtin_ldwio (volatile const void *)
++void __builtin_stbio (volatile void *, int)
++void __builtin_sthio (volatile void *, int)
++void __builtin_stwio (volatile void *, int)
++void __builtin_sync (void)
++int __builtin_rdctl (int)
++void __builtin_wrctl (int, int)
++@end example
++
++The following built-in functions are always available. They
++all generate a Nios II Custom Instruction. The name of the
++function represents the types that the function takes and
++returns. The letter before the @code{n} is the return type
++or void if absent. The @code{n} represnts the first parameter
++to all the custom instructions, the custom instruction number.
++The two letters after the @code{n} represent the up to two
++parameters to the function.
++
++The letters reprsent the following data types:
++@table @code
++@item <no letter>
++@code{void} for return type and no parameter for parameter types.
++
++@item i
++@code{int} for return type and parameter type
++
++@item f
++@code{float} for return type and parameter type
++
++@item p
++@code{void *} for return type and parameter type
++
++@end table
++
++And the function names are:
++@example
++void __builtin_custom_n (void)
++void __builtin_custom_ni (int)
++void __builtin_custom_nf (float)
++void __builtin_custom_np (void *)
++void __builtin_custom_nii (int, int)
++void __builtin_custom_nif (int, float)
++void __builtin_custom_nip (int, void *)
++void __builtin_custom_nfi (float, int)
++void __builtin_custom_nff (float, float)
++void __builtin_custom_nfp (float, void *)
++void __builtin_custom_npi (void *, int)
++void __builtin_custom_npf (void *, float)
++void __builtin_custom_npp (void *, void *)
++int __builtin_custom_in (void)
++int __builtin_custom_ini (int)
++int __builtin_custom_inf (float)
++int __builtin_custom_inp (void *)
++int __builtin_custom_inii (int, int)
++int __builtin_custom_inif (int, float)
++int __builtin_custom_inip (int, void *)
++int __builtin_custom_infi (float, int)
++int __builtin_custom_inff (float, float)
++int __builtin_custom_infp (float, void *)
++int __builtin_custom_inpi (void *, int)
++int __builtin_custom_inpf (void *, float)
++int __builtin_custom_inpp (void *, void *)
++float __builtin_custom_fn (void)
++float __builtin_custom_fni (int)
++float __builtin_custom_fnf (float)
++float __builtin_custom_fnp (void *)
++float __builtin_custom_fnii (int, int)
++float __builtin_custom_fnif (int, float)
++float __builtin_custom_fnip (int, void *)
++float __builtin_custom_fnfi (float, int)
++float __builtin_custom_fnff (float, float)
++float __builtin_custom_fnfp (float, void *)
++float __builtin_custom_fnpi (void *, int)
++float __builtin_custom_fnpf (void *, float)
++float __builtin_custom_fnpp (void *, void *)
++void * __builtin_custom_pn (void)
++void * __builtin_custom_pni (int)
++void * __builtin_custom_pnf (float)
++void * __builtin_custom_pnp (void *)
++void * __builtin_custom_pnii (int, int)
++void * __builtin_custom_pnif (int, float)
++void * __builtin_custom_pnip (int, void *)
++void * __builtin_custom_pnfi (float, int)
++void * __builtin_custom_pnff (float, float)
++void * __builtin_custom_pnfp (float, void *)
++void * __builtin_custom_pnpi (void *, int)
++void * __builtin_custom_pnpf (void *, float)
++void * __builtin_custom_pnpp (void *, void *)
++@end example
++
++
+ @node Alpha Built-in Functions
+ @subsection Alpha Built-in Functions
+
+--- gcc-3.4.3/gcc/doc/invoke.texi
++++ gcc-3.4.3-nios2/gcc/doc/invoke.texi
+@@ -337,6 +337,14 @@ in the following sections.
+ @item Machine Dependent Options
+ @xref{Submodel Options,,Hardware Models and Configurations}.
+
++@emph{Altera Nios II Options}
++@gccoptlist{-msmallc -mno-bypass-cache -mbypass-cache @gol
++-mno-cache-volatile -mcache-volatile -mno-inline-memcpy @gol
++-minline-memcpy -mno-fast-sw-div -mfast-sw-div @gol
++-mhw-mul -mno-hw-mul -mhw-mulx -mno-hw-mulx @gol
++-mno-hw-div -mhw-div @gol
++-msys-crt0= -msys-lib= -msys=nosys }
++
+ @emph{M680x0 Options}
+ @gccoptlist{-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol
+ -m68060 -mcpu32 -m5200 -m68881 -mbitfield -mc68000 -mc68020 @gol
+@@ -5836,6 +5844,7 @@ machine description. The default for th
+ that macro, which enables you to change the defaults.
+
+ @menu
++* Altera Nios II Options::
+ * M680x0 Options::
+ * M68hc1x Options::
+ * VAX Options::
+@@ -5871,6 +5880,103 @@ that macro, which enables you to change
+ * FRV Options::
+ @end menu
+
++
++@node Altera Nios II Options
++@subsection Altera Nios II Options
++@cindex Altera Nios II options
++
++These are the @samp{-m} options defined for the Altera Nios II
++processor.
++
++@table @gcctabopt
++
++@item -msmallc
++@opindex msmallc
++
++Link with a limited version of the C library, -lsmallc. For more
++information see the C Library Documentation.
++
++
++@item -mbypass-cache
++@itemx -mno-bypass-cache
++@opindex mno-bypass-cache
++@opindex mbypass-cache
++
++Force all load and store instructions to always bypass cache by
++using io variants of the instructions. The default is to not
++bypass the cache.
++
++@item -mno-cache-volatile
++@itemx -mcache-volatile
++@opindex mcache-volatile
++@opindex mno-cache-volatile
++
++Volatile memory access bypass the cache using the io variants of
++the ld and st instructions. The default is to cache volatile
++accesses.
++
++-mno-cache-volatile is deprecated and will be deleted in a
++future GCC release.
++
++
++@item -mno-inline-memcpy
++@itemx -minline-memcpy
++@opindex mno-inline-memcpy
++@opindex minline-memcpy
++
++Do not inline memcpy. The default is to inline when -O is on.
++
++
++@item -mno-fast-sw-div
++@itemx -mfast-sw-div
++@opindex mno-fast-sw-div
++@opindex mfast-sw-div
++
++Do no use table based fast divide for small numbers. The default
++is to use the fast divide at -O3 and above.
++
++
++@item -mno-hw-mul
++@itemx -mhw-mul
++@itemx -mno-hw-mulx
++@itemx -mhw-mulx
++@itemx -mno-hw-div
++@itemx -mhw-div
++@opindex mno-hw-mul
++@opindex mhw-mul
++@opindex mno-hw-mulx
++@opindex mhw-mulx
++@opindex mno-hw-div
++@opindex mhw-div
++
++Enable or disable emitting @code{mul}, @code{mulx} and @code{div} family of
++instructions by the compiler. The default is to emit @code{mul}
++and not emit @code{div} and @code{mulx}.
++
++The different combinations of @code{mul} and @code{mulx} instructions
++generate a different multilib options.
++
++
++@item -msys-crt0=@var{startfile}
++@opindex msys-crt0
++
++@var{startfile} is the file name of the startfile (crt0) to use
++when linking. The default is crt0.o that comes with libgloss
++and is only suitable for use with the instruction set
++simulator.
++
++@item -msys-lib=@var{systemlib}
++@itemx -msys-lib=nosys
++@opindex msys-lib
++
++@var{systemlib} is the library name of the library which provides
++the system calls required by the C library, e.g. @code{read}, @code{write}
++etc. The default is to use nosys, this library provides
++stub implementations of the calls and is part of libgloss.
++
++@end table
++
++
+ @node M680x0 Options
+ @subsection M680x0 Options
+ @cindex M680x0 options
+--- gcc-3.4.3/gcc/doc/md.texi
++++ gcc-3.4.3-nios2/gcc/doc/md.texi
+@@ -1335,6 +1335,49 @@ However, here is a summary of the machin
+ available on some particular machines.
+
+ @table @emph
++
++@item Altera Nios II family---@file{nios2.h}
++@table @code
++
++@item I
++Integer that is valid as an immediate operand in an
++instruction taking a signed 16-bit number. Range
++@minus{}32768 to 32767.
++
++@item J
++Integer that is valid as an immediate operand in an
++instruction taking an unsigned 16-bit number. Range
++0 to 65535.
++
++@item K
++Integer that is valid as an immediate operand in an
++instruction taking only the upper 16-bits of a
++32-bit number. Range 32-bit numbers with the lower
++16-bits being 0.
++
++@item L
++Integer that is valid as an immediate operand for a
++shift instruction. Range 0 to 31.
++
++
++@item M
++Integer that is valid as an immediate operand for
++only the value 0. Can be used in conjunction with
++the format modifier @code{z} to use @code{r0}
++instead of @code{0} in the assembly output.
++
++@item N
++Integer that is valid as an immediate operand for
++a custom instruction opcode. Range 0 to 255.
++
++@item S
++Matches immediates which are addresses in the small
++data section and therefore can be added to @code{gp}
++as a 16-bit immediate to re-create their 32-bit value.
++
++@end table
++
++
+ @item ARM family---@file{arm.h}
+ @table @code
+ @item f
Select the version of gcc you wish to use.
config BR2_GCC_VERSION_3_3_5
+ depends !BR2_nios2
bool "gcc 3.3.5"
config BR2_GCC_VERSION_3_3_6
+ depends !BR2_nios2
bool "gcc 3.3.6"
config BR2_GCC_VERSION_3_4_2
bool "gcc 3.4.3"
config BR2_GCC_VERSION_3_4_4
+ depends !BR2_nios2
bool "gcc 3.4.4"
config BR2_GCC_VERSION_3_4_5
+ depends !BR2_nios2
bool "gcc 3.4.5"
config BR2_GCC_VERSION_4_0_0
+ depends !BR2_nios2
bool "gcc 4.0.0"
config BR2_GCC_VERSION_4_0_1
+ depends !BR2_nios2
bool "gcc 4.0.1"
config BR2_GCC_VERSION_4_0_2
+ depends !BR2_nios2
bool "gcc 4.0.2"
config BR2_GCC_VERSION_4_1_0
+ depends !BR2_nios2
bool "gcc 4.1.0"
config BR2_GCC_VERSION_4_2_0
+ depends !BR2_nios2
bool "gcc 4.2.0"
endchoice
the kernel you intend to use on your target system.
config BR2_KERNEL_HEADERS_2_4_25
+ depends !BR2_nios2
bool "Linux 2.4.25 kernel headers"
config BR2_KERNEL_HEADERS_2_4_27
+ depends !BR2_nios2
bool "Linux 2.4.27 kernel headers"
config BR2_KERNEL_HEADERS_2_4_29
+ depends !BR2_nios2
bool "Linux 2.4.29 kernel headers"
config BR2_KERNEL_HEADERS_2_4_31
+ depends !BR2_nios2
bool "Linux 2.4.31 kernel headers"
+ config BR2_KERNEL_HEADERS_2_6_9
+ bool "Linux 2.6.9 kernel headers"
+
config BR2_KERNEL_HEADERS_2_6_11
+ depends !BR2_nios2
bool "Linux 2.6.11 kernel headers"
config BR2_KERNEL_HEADERS_2_6_12
+ depends !BR2_nios2
bool "Linux 2.6.12 kernel headers"
endchoice
default "2.4.27" if BR2_KERNEL_HEADERS_2_4_27
default "2.4.29" if BR2_KERNEL_HEADERS_2_4_29
default "2.4.31" if BR2_KERNEL_HEADERS_2_4_31
+ default "2.6.9" if BR2_KERNEL_HEADERS_2_6_9
default "2.6.11" if BR2_KERNEL_HEADERS_2_6_11
default "2.6.12" if BR2_KERNEL_HEADERS_2_6_12
-
$(LINUX_HEADERS_DIR)/.patched: $(LINUX_HEADERS_DIR)/.unpacked
toolchain/patch-kernel.sh $(LINUX_HEADERS_DIR) toolchain/kernel-headers linux-libc-headers-$(LINUX_VERSION)\*.patch
+ifeq ($(strip $(ARCH)),nios2)
+ toolchain/patch-kernel.sh $(LINUX_HEADERS_DIR) toolchain/kernel-headers linux-libc-headers-$(LINUX_VERSION)-nios2nommu.patch.conditional
+endif
touch $(LINUX_HEADERS_DIR)/.patched
$(LINUX_HEADERS_DIR)/.configured: $(LINUX_HEADERS_DIR)/.patched
(cd $(LINUX_HEADERS_DIR)/include; ln -fs asm-mips$(NOMMU) asm;) \
elif [ "$(ARCH)" = "mipsel" ];then \
(cd $(LINUX_HEADERS_DIR)/include; ln -fs asm-mips$(NOMMU) asm;) \
+ elif [ "$(ARCH)" = "nios2" ];then \
+ (cd $(LINUX_HEADERS_DIR)/include; ln -fs asm-nios2nommu asm;) \
elif [ "$(ARCH)" = "arm" ];then \
(cd $(LINUX_HEADERS_DIR)/include; ln -fs asm-arm$(NOMMU) asm; \
cd asm; \
--- /dev/null
+--- linux-libc-headers-2.6.9.1/include/asm-generic/bitops.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/bitops.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,81 @@
++#ifndef _ASM_GENERIC_BITOPS_H_
++#define _ASM_GENERIC_BITOPS_H_
++
++/*
++ * For the benefit of those who are trying to port Linux to another
++ * architecture, here are some C-language equivalents. You should
++ * recode these in the native assembly language, if at all possible.
++ * To guarantee atomicity, these routines call cli() and sti() to
++ * disable interrupts while they operate. (You have to provide inline
++ * routines to cli() and sti().)
++ *
++ * Also note, these routines assume that you have 32 bit longs.
++ * You will have to change this if you are trying to port Linux to the
++ * Alpha architecture or to a Cray. :-)
++ *
++ * C language equivalents written by Theodore Ts'o, 9/26/92
++ */
++
++extern __inline__ int set_bit(int nr,long * addr)
++{
++ int mask, retval;
++
++ addr += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ cli();
++ retval = (mask & *addr) != 0;
++ *addr |= mask;
++ sti();
++ return retval;
++}
++
++extern __inline__ int clear_bit(int nr, long * addr)
++{
++ int mask, retval;
++
++ addr += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ cli();
++ retval = (mask & *addr) != 0;
++ *addr &= ~mask;
++ sti();
++ return retval;
++}
++
++extern __inline__ int test_bit(int nr, const unsigned long * addr)
++{
++ int mask;
++
++ addr += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ return ((mask & *addr) != 0);
++}
++
++/*
++ * fls: find last bit set.
++ */
++
++#define fls(x) generic_fls(x)
++
++#ifdef __KERNEL__
++
++/*
++ * ffs: find first bit set. This is defined the same way as
++ * the libc and compiler builtin ffs routines, therefore
++ * differs in spirit from the above ffz (man ffs).
++ */
++
++#define ffs(x) generic_ffs(x)
++
++/*
++ * hweightN: returns the hamming weight (i.e. the number
++ * of bits set) of a N-bit word
++ */
++
++#define hweight32(x) generic_hweight32(x)
++#define hweight16(x) generic_hweight16(x)
++#define hweight8(x) generic_hweight8(x)
++
++#endif /* __KERNEL__ */
++
++#endif /* _ASM_GENERIC_BITOPS_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/bug.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/bug.h 2005-05-18 20:34:55.000000000 +0200
+@@ -0,0 +1,34 @@
++#ifndef _ASM_GENERIC_BUG_H
++#define _ASM_GENERIC_BUG_H
++
++#include <linux/compiler.h>
++// #include <linux/config.h>
++
++#ifndef HAVE_ARCH_BUG
++#define BUG() do { \
++ printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
++ panic("BUG!"); \
++} while (0)
++#endif
++
++#ifndef HAVE_ARCH_PAGE_BUG
++#define PAGE_BUG(page) do { \
++ printk("page BUG for page at %p\n", page); \
++ BUG(); \
++} while (0)
++#endif
++
++#ifndef HAVE_ARCH_BUG_ON
++#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
++#endif
++
++#ifndef HAVE_ARCH_WARN_ON
++#define WARN_ON(condition) do { \
++ if (unlikely((condition)!=0)) { \
++ printk("Badness in %s at %s:%d\n", __FUNCTION__, __FILE__, __LINE__); \
++ dump_stack(); \
++ } \
++} while (0)
++#endif
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-generic/cpumask.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/cpumask.h 2005-05-18 20:35:01.000000000 +0200
+@@ -0,0 +1,40 @@
++#ifndef __ASM_GENERIC_CPUMASK_H
++#define __ASM_GENERIC_CPUMASK_H
++
++// #include <linux/config.h>
++#include <linux/kernel.h>
++#include <linux/threads.h>
++#include <linux/types.h>
++#include <linux/bitmap.h>
++
++#if NR_CPUS > BITS_PER_LONG && NR_CPUS != 1
++#define CPU_ARRAY_SIZE BITS_TO_LONGS(NR_CPUS)
++
++struct cpumask
++{
++ unsigned long mask[CPU_ARRAY_SIZE];
++};
++
++typedef struct cpumask cpumask_t;
++
++#else
++typedef unsigned long cpumask_t;
++#endif
++
++#ifdef CONFIG_SMP
++#if NR_CPUS > BITS_PER_LONG
++#include <asm-generic/cpumask_array.h>
++#else
++#include <asm-generic/cpumask_arith.h>
++#endif
++#else
++#include <asm-generic/cpumask_up.h>
++#endif
++
++#if NR_CPUS <= 4*BITS_PER_LONG
++#include <asm-generic/cpumask_const_value.h>
++#else
++#include <asm-generic/cpumask_const_reference.h>
++#endif
++
++#endif /* __ASM_GENERIC_CPUMASK_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/cpumask_arith.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/cpumask_arith.h 2004-01-25 14:35:16.000000000 +0100
+@@ -0,0 +1,49 @@
++#ifndef __ASM_GENERIC_CPUMASK_ARITH_H
++#define __ASM_GENERIC_CPUMASK_ARITH_H
++
++/*
++ * Arithmetic type -based cpu bitmaps. A single unsigned long is used
++ * to contain the whole cpu bitmap.
++ */
++
++#define cpu_set(cpu, map) set_bit(cpu, &(map))
++#define cpu_clear(cpu, map) clear_bit(cpu, &(map))
++#define cpu_isset(cpu, map) test_bit(cpu, &(map))
++#define cpu_test_and_set(cpu, map) test_and_set_bit(cpu, &(map))
++
++#define cpus_and(dst,src1,src2) do { dst = (src1) & (src2); } while (0)
++#define cpus_or(dst,src1,src2) do { dst = (src1) | (src2); } while (0)
++#define cpus_clear(map) do { map = 0; } while (0)
++#define cpus_complement(map) do { map = ~(map); } while (0)
++#define cpus_equal(map1, map2) ((map1) == (map2))
++#define cpus_empty(map) ((map) == 0)
++#define cpus_addr(map) (&(map))
++
++#if BITS_PER_LONG == 32
++#define cpus_weight(map) hweight32(map)
++#elif BITS_PER_LONG == 64
++#define cpus_weight(map) hweight64(map)
++#endif
++
++#define cpus_shift_right(dst, src, n) do { dst = (src) >> (n); } while (0)
++#define cpus_shift_left(dst, src, n) do { dst = (src) << (n); } while (0)
++
++#define any_online_cpu(map) \
++({ \
++ cpumask_t __tmp__; \
++ cpus_and(__tmp__, map, cpu_online_map); \
++ __tmp__ ? first_cpu(__tmp__) : NR_CPUS; \
++})
++
++#define CPU_MASK_ALL (~((cpumask_t)0) >> (8*sizeof(cpumask_t) - NR_CPUS))
++#define CPU_MASK_NONE ((cpumask_t)0)
++
++/* only ever use this for things that are _never_ used on large boxen */
++#define cpus_coerce(map) ((unsigned long)(map))
++#define cpus_promote(map) ({ map; })
++#define cpumask_of_cpu(cpu) ({ ((cpumask_t)1) << (cpu); })
++
++#define first_cpu(map) __ffs(map)
++#define next_cpu(cpu, map) find_next_bit(&(map), NR_CPUS, cpu + 1)
++
++#endif /* __ASM_GENERIC_CPUMASK_ARITH_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/cpumask_array.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/cpumask_array.h 2004-01-25 14:35:16.000000000 +0100
+@@ -0,0 +1,54 @@
++#ifndef __ASM_GENERIC_CPUMASK_ARRAY_H
++#define __ASM_GENERIC_CPUMASK_ARRAY_H
++
++/*
++ * Array-based cpu bitmaps. An array of unsigned longs is used to contain
++ * the bitmap, and then contained in a structure so it may be passed by
++ * value.
++ */
++
++#define CPU_ARRAY_SIZE BITS_TO_LONGS(NR_CPUS)
++
++#define cpu_set(cpu, map) set_bit(cpu, (map).mask)
++#define cpu_clear(cpu, map) clear_bit(cpu, (map).mask)
++#define cpu_isset(cpu, map) test_bit(cpu, (map).mask)
++#define cpu_test_and_set(cpu, map) test_and_set_bit(cpu, (map).mask)
++
++#define cpus_and(dst,src1,src2) bitmap_and((dst).mask,(src1).mask, (src2).mask, NR_CPUS)
++#define cpus_or(dst,src1,src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, NR_CPUS)
++#define cpus_clear(map) bitmap_clear((map).mask, NR_CPUS)
++#define cpus_complement(map) bitmap_complement((map).mask, NR_CPUS)
++#define cpus_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, NR_CPUS)
++#define cpus_empty(map) bitmap_empty(map.mask, NR_CPUS)
++#define cpus_addr(map) ((map).mask)
++#define cpus_weight(map) bitmap_weight((map).mask, NR_CPUS)
++#define cpus_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, NR_CPUS)
++#define cpus_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, NR_CPUS)
++#define first_cpu(map) find_first_bit((map).mask, NR_CPUS)
++#define next_cpu(cpu, map) find_next_bit((map).mask, NR_CPUS, cpu + 1)
++
++/* only ever use this for things that are _never_ used on large boxen */
++#define cpus_coerce(map) ((map).mask[0])
++#define cpus_promote(map) ({ cpumask_t __cpu_mask = CPU_MASK_NONE;\
++ __cpu_mask.mask[0] = map; \
++ __cpu_mask; \
++ })
++#define cpumask_of_cpu(cpu) ({ cpumask_t __cpu_mask = CPU_MASK_NONE;\
++ cpu_set(cpu, __cpu_mask); \
++ __cpu_mask; \
++ })
++#define any_online_cpu(map) \
++({ \
++ cpumask_t __tmp__; \
++ cpus_and(__tmp__, map, cpu_online_map); \
++ find_first_bit(__tmp__.mask, NR_CPUS); \
++})
++
++
++/*
++ * um, these need to be usable as static initializers
++ */
++#define CPU_MASK_ALL { {[0 ... CPU_ARRAY_SIZE-1] = ~0UL} }
++#define CPU_MASK_NONE { {[0 ... CPU_ARRAY_SIZE-1] = 0UL} }
++
++#endif /* __ASM_GENERIC_CPUMASK_ARRAY_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/cpumask_const_reference.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/cpumask_const_reference.h 2004-01-16 16:00:38.000000000 +0100
+@@ -0,0 +1,29 @@
++#ifndef __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H
++#define __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H
++
++struct cpumask_ref {
++ const cpumask_t *val;
++};
++
++typedef const struct cpumask_ref cpumask_const_t;
++
++#define mk_cpumask_const(map) ((cpumask_const_t){ &(map) })
++#define cpu_isset_const(cpu, map) cpu_isset(cpu, *(map).val)
++
++#define cpus_and_const(dst,src1,src2) cpus_and(dst,*(src1).val,*(src2).val)
++#define cpus_or_const(dst,src1,src2) cpus_or(dst,*(src1).val,*(src2).val)
++
++#define cpus_equal_const(map1, map2) cpus_equal(*(map1).val, *(map2).val)
++
++#define cpus_copy_const(map1, map2) bitmap_copy((map1).mask, (map2).val->mask, NR_CPUS)
++
++#define cpus_empty_const(map) cpus_empty(*(map).val)
++#define cpus_weight_const(map) cpus_weight(*(map).val)
++#define first_cpu_const(map) first_cpu(*(map).val)
++#define next_cpu_const(cpu, map) next_cpu(cpu, *(map).val)
++
++/* only ever use this for things that are _never_ used on large boxen */
++#define cpus_coerce_const(map) cpus_coerce(*(map).val)
++#define any_online_cpu_const(map) any_online_cpu(*(map).val)
++
++#endif /* __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/cpumask_const_value.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/cpumask_const_value.h 2004-01-25 14:35:16.000000000 +0100
+@@ -0,0 +1,21 @@
++#ifndef __ASM_GENERIC_CPUMASK_CONST_VALUE_H
++#define __ASM_GENERIC_CPUMASK_CONST_VALUE_H
++
++typedef const cpumask_t cpumask_const_t;
++
++#define mk_cpumask_const(map) (map)
++#define cpu_isset_const(cpu, map) cpu_isset(cpu, map)
++#define cpus_and_const(dst,src1,src2) cpus_and(dst, src1, src2)
++#define cpus_or_const(dst,src1,src2) cpus_or(dst, src1, src2)
++#define cpus_equal_const(map1, map2) cpus_equal(map1, map2)
++#define cpus_empty_const(map) cpus_empty(map)
++#define cpus_copy_const(map1, map2) do { map1 = (cpumask_t)map2; } while (0)
++#define cpus_weight_const(map) cpus_weight(map)
++#define first_cpu_const(map) first_cpu(map)
++#define next_cpu_const(cpu, map) next_cpu(cpu, map)
++
++/* only ever use this for things that are _never_ used on large boxen */
++#define cpus_coerce_const(map) cpus_coerce(map)
++#define any_online_cpu_const(map) any_online_cpu(map)
++
++#endif /* __ASM_GENERIC_CPUMASK_CONST_VALUE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/cpumask_up.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/cpumask_up.h 2004-01-25 14:35:16.000000000 +0100
+@@ -0,0 +1,59 @@
++#ifndef __ASM_GENERIC_CPUMASK_UP_H
++#define __ASM_GENERIC_CPUMASK_UP_H
++
++#define cpus_coerce(map) (map)
++
++#define cpu_set(cpu, map) do { (void)(cpu); cpus_coerce(map) = 1UL; } while (0)
++#define cpu_clear(cpu, map) do { (void)(cpu); cpus_coerce(map) = 0UL; } while (0)
++#define cpu_isset(cpu, map) ((void)(cpu), cpus_coerce(map) != 0UL)
++#define cpu_test_and_set(cpu, map) ((void)(cpu), test_and_set_bit(0, &(map)))
++
++#define cpus_and(dst, src1, src2) \
++ do { \
++ if (cpus_coerce(src1) && cpus_coerce(src2)) \
++ cpus_coerce(dst) = 1UL; \
++ else \
++ cpus_coerce(dst) = 0UL; \
++ } while (0)
++
++#define cpus_or(dst, src1, src2) \
++ do { \
++ if (cpus_coerce(src1) || cpus_coerce(src2)) \
++ cpus_coerce(dst) = 1UL; \
++ else \
++ cpus_coerce(dst) = 0UL; \
++ } while (0)
++
++#define cpus_clear(map) do { cpus_coerce(map) = 0UL; } while (0)
++
++#define cpus_complement(map) \
++ do { \
++ cpus_coerce(map) = !cpus_coerce(map); \
++ } while (0)
++
++#define cpus_equal(map1, map2) (cpus_coerce(map1) == cpus_coerce(map2))
++#define cpus_empty(map) (cpus_coerce(map) == 0UL)
++#define cpus_addr(map) (&(map))
++#define cpus_weight(map) (cpus_coerce(map) ? 1UL : 0UL)
++#define cpus_shift_right(d, s, n) do { cpus_coerce(d) = 0UL; } while (0)
++#define cpus_shift_left(d, s, n) do { cpus_coerce(d) = 0UL; } while (0)
++#define first_cpu(map) (cpus_coerce(map) ? 0 : 1)
++#define next_cpu(cpu, map) 1
++
++/* only ever use this for things that are _never_ used on large boxen */
++#define cpus_promote(map) \
++ ({ \
++ cpumask_t __tmp__; \
++ cpus_coerce(__tmp__) = map; \
++ __tmp__; \
++ })
++#define cpumask_of_cpu(cpu) ((void)(cpu), cpus_promote(1))
++#define any_online_cpu(map) (cpus_coerce(map) ? 0 : 1)
++
++/*
++ * um, these need to be usable as static initializers
++ */
++#define CPU_MASK_ALL 1UL
++#define CPU_MASK_NONE 0UL
++
++#endif /* __ASM_GENERIC_CPUMASK_UP_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/div64.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/div64.h 2004-01-16 16:00:38.000000000 +0100
+@@ -0,0 +1,58 @@
++#ifndef _ASM_GENERIC_DIV64_H
++#define _ASM_GENERIC_DIV64_H
++/*
++ * Copyright (C) 2003 Bernardo Innocenti <bernie@develer.com>
++ * Based on former asm-ppc/div64.h and asm-m68knommu/div64.h
++ *
++ * The semantics of do_div() are:
++ *
++ * uint32_t do_div(uint64_t *n, uint32_t base)
++ * {
++ * uint32_t remainder = *n % base;
++ * *n = *n / base;
++ * return remainder;
++ * }
++ *
++ * NOTE: macro parameter n is evaluated multiple times,
++ * beware of side effects!
++ */
++
++#include <linux/types.h>
++#include <linux/compiler.h>
++
++#if BITS_PER_LONG == 64
++
++# define do_div(n,base) ({ \
++ uint32_t __base = (base); \
++ uint32_t __rem; \
++ __rem = ((uint64_t)(n)) % __base; \
++ (n) = ((uint64_t)(n)) / __base; \
++ __rem; \
++ })
++
++#elif BITS_PER_LONG == 32
++
++extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
++
++/* The unnecessary pointer compare is there
++ * to check for type safety (n must be 64bit)
++ */
++# define do_div(n,base) ({ \
++ uint32_t __base = (base); \
++ uint32_t __rem; \
++ (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \
++ if (likely(((n) >> 32) == 0)) { \
++ __rem = (uint32_t)(n) % __base; \
++ (n) = (uint32_t)(n) / __base; \
++ } else \
++ __rem = __div64_32(&(n), __base); \
++ __rem; \
++ })
++
++#else /* BITS_PER_LONG == ?? */
++
++# error do_div() does not yet support the C64
++
++#endif /* BITS_PER_LONG */
++
++#endif /* _ASM_GENERIC_DIV64_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/dma-mapping-broken.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/dma-mapping-broken.h 2004-05-01 15:23:26.000000000 +0200
+@@ -0,0 +1,22 @@
++#ifndef _ASM_GENERIC_DMA_MAPPING_H
++#define _ASM_GENERIC_DMA_MAPPING_H
++
++/* This is used for archs that do not support DMA */
++
++
++static inline void *
++dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
++ int flag)
++{
++ BUG();
++ return 0;
++}
++
++static inline void
++dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
++ dma_addr_t dma_handle)
++{
++ BUG();
++}
++
++#endif /* _ASM_GENERIC_DMA_MAPPING_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/dma-mapping.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/dma-mapping.h 2005-05-18 20:35:06.000000000 +0200
+@@ -0,0 +1,309 @@
++/* Copyright (C) 2002 by James.Bottomley@HansenPartnership.com
++ *
++ * Implements the generic device dma API via the existing pci_ one
++ * for unconverted architectures
++ */
++
++#ifndef _ASM_GENERIC_DMA_MAPPING_H
++#define _ASM_GENERIC_DMA_MAPPING_H
++
++// #include <linux/config.h>
++
++#ifdef CONFIG_PCI
++
++/* we implement the API below in terms of the existing PCI one,
++ * so include it */
++#include <linux/pci.h>
++/* need struct page definitions */
++#include <linux/mm.h>
++
++static inline int
++dma_supported(struct device *dev, u64 mask)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ return pci_dma_supported(to_pci_dev(dev), mask);
++}
++
++static inline int
++dma_set_mask(struct device *dev, u64 dma_mask)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
++}
++
++static inline void *
++dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
++ int flag)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ return pci_alloc_consistent(to_pci_dev(dev), size, dma_handle);
++}
++
++static inline void
++dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
++ dma_addr_t dma_handle)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ pci_free_consistent(to_pci_dev(dev), size, cpu_addr, dma_handle);
++}
++
++static inline dma_addr_t
++dma_map_single(struct device *dev, void *cpu_addr, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ return pci_map_single(to_pci_dev(dev), cpu_addr, size, (int)direction);
++}
++
++static inline void
++dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ pci_unmap_single(to_pci_dev(dev), dma_addr, size, (int)direction);
++}
++
++static inline dma_addr_t
++dma_map_page(struct device *dev, struct page *page,
++ unsigned long offset, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ return pci_map_page(to_pci_dev(dev), page, offset, size, (int)direction);
++}
++
++static inline void
++dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ pci_unmap_page(to_pci_dev(dev), dma_address, size, (int)direction);
++}
++
++static inline int
++dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction);
++}
++
++static inline void
++dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ pci_unmap_sg(to_pci_dev(dev), sg, nhwentries, (int)direction);
++}
++
++static inline void
++dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle,
++ size, (int)direction);
++}
++
++static inline void
++dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle,
++ size, (int)direction);
++}
++
++static inline void
++dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, nelems, (int)direction);
++}
++
++static inline void
++dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
++ enum dma_data_direction direction)
++{
++ BUG_ON(dev->bus != &pci_bus_type);
++
++ pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, nelems, (int)direction);
++}
++
++static inline int
++dma_mapping_error(dma_addr_t dma_addr)
++{
++ return pci_dma_mapping_error(dma_addr);
++}
++
++
++#else
++
++static inline int
++dma_supported(struct device *dev, u64 mask)
++{
++ return 0;
++}
++
++static inline int
++dma_set_mask(struct device *dev, u64 dma_mask)
++{
++ BUG();
++ return 0;
++}
++
++static inline void *
++dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
++ int flag)
++{
++ BUG();
++ return NULL;
++}
++
++static inline void
++dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
++ dma_addr_t dma_handle)
++{
++ BUG();
++}
++
++static inline dma_addr_t
++dma_map_single(struct device *dev, void *cpu_addr, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG();
++ return 0;
++}
++
++static inline void
++dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG();
++}
++
++static inline dma_addr_t
++dma_map_page(struct device *dev, struct page *page,
++ unsigned long offset, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG();
++ return 0;
++}
++
++static inline void
++dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG();
++}
++
++static inline int
++dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
++ enum dma_data_direction direction)
++{
++ BUG();
++ return 0;
++}
++
++static inline void
++dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
++ enum dma_data_direction direction)
++{
++ BUG();
++}
++
++static inline void
++dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG();
++}
++
++static inline void
++dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
++ enum dma_data_direction direction)
++{
++ BUG();
++}
++
++static inline void
++dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
++ enum dma_data_direction direction)
++{
++ BUG();
++}
++
++static inline void
++dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
++ enum dma_data_direction direction)
++{
++ BUG();
++}
++
++static inline int
++dma_error(dma_addr_t dma_addr)
++{
++ return 0;
++}
++
++#endif
++
++/* Now for the API extensions over the pci_ one */
++
++#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
++#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
++#define dma_is_consistent(d) (1)
++
++static inline int
++dma_get_cache_alignment(void)
++{
++ /* no easy way to get cache size on all processors, so return
++ * the maximum possible, to be safe */
++ return (1 << L1_CACHE_SHIFT_MAX);
++}
++
++static inline void
++dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
++ unsigned long offset, size_t size,
++ enum dma_data_direction direction)
++{
++ /* just sync everything, that's all the pci API can do */
++ dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
++}
++
++static inline void
++dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
++ unsigned long offset, size_t size,
++ enum dma_data_direction direction)
++{
++ /* just sync everything, that's all the pci API can do */
++ dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
++}
++
++static inline void
++dma_cache_sync(void *vaddr, size_t size,
++ enum dma_data_direction direction)
++{
++ /* could define this in terms of the dma_cache ... operations,
++ * but if you get this on a platform, you should convert the platform
++ * to using the generic device DMA API */
++ BUG();
++}
++
++#endif
++
+--- linux-libc-headers-2.6.9.1/include/asm-generic/errno-base.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/errno-base.h 2004-01-16 16:00:38.000000000 +0100
+@@ -0,0 +1,39 @@
++#ifndef _ASM_GENERIC_ERRNO_BASE_H
++#define _ASM_GENERIC_ERRNO_BASE_H
++
++#define EPERM 1 /* Operation not permitted */
++#define ENOENT 2 /* No such file or directory */
++#define ESRCH 3 /* No such process */
++#define EINTR 4 /* Interrupted system call */
++#define EIO 5 /* I/O error */
++#define ENXIO 6 /* No such device or address */
++#define E2BIG 7 /* Argument list too long */
++#define ENOEXEC 8 /* Exec format error */
++#define EBADF 9 /* Bad file number */
++#define ECHILD 10 /* No child processes */
++#define EAGAIN 11 /* Try again */
++#define ENOMEM 12 /* Out of memory */
++#define EACCES 13 /* Permission denied */
++#define EFAULT 14 /* Bad address */
++#define ENOTBLK 15 /* Block device required */
++#define EBUSY 16 /* Device or resource busy */
++#define EEXIST 17 /* File exists */
++#define EXDEV 18 /* Cross-device link */
++#define ENODEV 19 /* No such device */
++#define ENOTDIR 20 /* Not a directory */
++#define EISDIR 21 /* Is a directory */
++#define EINVAL 22 /* Invalid argument */
++#define ENFILE 23 /* File table overflow */
++#define EMFILE 24 /* Too many open files */
++#define ENOTTY 25 /* Not a typewriter */
++#define ETXTBSY 26 /* Text file busy */
++#define EFBIG 27 /* File too large */
++#define ENOSPC 28 /* No space left on device */
++#define ESPIPE 29 /* Illegal seek */
++#define EROFS 30 /* Read-only file system */
++#define EMLINK 31 /* Too many links */
++#define EPIPE 32 /* Broken pipe */
++#define EDOM 33 /* Math argument out of domain of func */
++#define ERANGE 34 /* Math result not representable */
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-generic/errno.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/errno.h 2004-01-16 16:00:38.000000000 +0100
+@@ -0,0 +1,100 @@
++#ifndef _ASM_GENERIC_ERRNO_H
++#define _ASM_GENERIC_ERRNO_H
++
++#include <asm-generic/errno-base.h>
++
++#define EDEADLK 35 /* Resource deadlock would occur */
++#define ENAMETOOLONG 36 /* File name too long */
++#define ENOLCK 37 /* No record locks available */
++#define ENOSYS 38 /* Function not implemented */
++#define ENOTEMPTY 39 /* Directory not empty */
++#define ELOOP 40 /* Too many symbolic links encountered */
++#define EWOULDBLOCK EAGAIN /* Operation would block */
++#define ENOMSG 42 /* No message of desired type */
++#define EIDRM 43 /* Identifier removed */
++#define ECHRNG 44 /* Channel number out of range */
++#define EL2NSYNC 45 /* Level 2 not synchronized */
++#define EL3HLT 46 /* Level 3 halted */
++#define EL3RST 47 /* Level 3 reset */
++#define ELNRNG 48 /* Link number out of range */
++#define EUNATCH 49 /* Protocol driver not attached */
++#define ENOCSI 50 /* No CSI structure available */
++#define EL2HLT 51 /* Level 2 halted */
++#define EBADE 52 /* Invalid exchange */
++#define EBADR 53 /* Invalid request descriptor */
++#define EXFULL 54 /* Exchange full */
++#define ENOANO 55 /* No anode */
++#define EBADRQC 56 /* Invalid request code */
++#define EBADSLT 57 /* Invalid slot */
++
++#define EDEADLOCK EDEADLK
++
++#define EBFONT 59 /* Bad font file format */
++#define ENOSTR 60 /* Device not a stream */
++#define ENODATA 61 /* No data available */
++#define ETIME 62 /* Timer expired */
++#define ENOSR 63 /* Out of streams resources */
++#define ENONET 64 /* Machine is not on the network */
++#define ENOPKG 65 /* Package not installed */
++#define EREMOTE 66 /* Object is remote */
++#define ENOLINK 67 /* Link has been severed */
++#define EADV 68 /* Advertise error */
++#define ESRMNT 69 /* Srmount error */
++#define ECOMM 70 /* Communication error on send */
++#define EPROTO 71 /* Protocol error */
++#define EMULTIHOP 72 /* Multihop attempted */
++#define EDOTDOT 73 /* RFS specific error */
++#define EBADMSG 74 /* Not a data message */
++#define EOVERFLOW 75 /* Value too large for defined data type */
++#define ENOTUNIQ 76 /* Name not unique on network */
++#define EBADFD 77 /* File descriptor in bad state */
++#define EREMCHG 78 /* Remote address changed */
++#define ELIBACC 79 /* Can not access a needed shared library */
++#define ELIBBAD 80 /* Accessing a corrupted shared library */
++#define ELIBSCN 81 /* .lib section in a.out corrupted */
++#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
++#define ELIBEXEC 83 /* Cannot exec a shared library directly */
++#define EILSEQ 84 /* Illegal byte sequence */
++#define ERESTART 85 /* Interrupted system call should be restarted */
++#define ESTRPIPE 86 /* Streams pipe error */
++#define EUSERS 87 /* Too many users */
++#define ENOTSOCK 88 /* Socket operation on non-socket */
++#define EDESTADDRREQ 89 /* Destination address required */
++#define EMSGSIZE 90 /* Message too long */
++#define EPROTOTYPE 91 /* Protocol wrong type for socket */
++#define ENOPROTOOPT 92 /* Protocol not available */
++#define EPROTONOSUPPORT 93 /* Protocol not supported */
++#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
++#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
++#define EPFNOSUPPORT 96 /* Protocol family not supported */
++#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
++#define EADDRINUSE 98 /* Address already in use */
++#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
++#define ENETDOWN 100 /* Network is down */
++#define ENETUNREACH 101 /* Network is unreachable */
++#define ENETRESET 102 /* Network dropped connection because of reset */
++#define ECONNABORTED 103 /* Software caused connection abort */
++#define ECONNRESET 104 /* Connection reset by peer */
++#define ENOBUFS 105 /* No buffer space available */
++#define EISCONN 106 /* Transport endpoint is already connected */
++#define ENOTCONN 107 /* Transport endpoint is not connected */
++#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
++#define ETOOMANYREFS 109 /* Too many references: cannot splice */
++#define ETIMEDOUT 110 /* Connection timed out */
++#define ECONNREFUSED 111 /* Connection refused */
++#define EHOSTDOWN 112 /* Host is down */
++#define EHOSTUNREACH 113 /* No route to host */
++#define EALREADY 114 /* Operation already in progress */
++#define EINPROGRESS 115 /* Operation now in progress */
++#define ESTALE 116 /* Stale NFS file handle */
++#define EUCLEAN 117 /* Structure needs cleaning */
++#define ENOTNAM 118 /* Not a XENIX named type file */
++#define ENAVAIL 119 /* No XENIX semaphores available */
++#define EISNAM 120 /* Is a named type file */
++#define EREMOTEIO 121 /* Remote I/O error */
++#define EDQUOT 122 /* Quota exceeded */
++
++#define ENOMEDIUM 123 /* No medium found */
++#define EMEDIUMTYPE 124 /* Wrong medium type */
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-generic/hdreg.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/hdreg.h 2004-11-27 15:04:26.000000000 +0100
+@@ -0,0 +1,8 @@
++#warning <asm/hdreg.h> is obsolete, please do not use it
++
++#ifndef __ASM_GENERIC_HDREG_H
++#define __ASM_GENERIC_HDREG_H
++
++typedef unsigned long ide_ioreg_t;
++
++#endif /* __ASM_GENERIC_HDREG_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/ide_iops.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/ide_iops.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,38 @@
++/* Generic I/O and MEMIO string operations. */
++
++#define __ide_insw insw
++#define __ide_insl insl
++#define __ide_outsw outsw
++#define __ide_outsl outsl
++
++static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
++{
++ while (count--) {
++ *(u16 *)addr = readw(port);
++ addr += 2;
++ }
++}
++
++static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
++{
++ while (count--) {
++ *(u32 *)addr = readl(port);
++ addr += 4;
++ }
++}
++
++static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
++{
++ while (count--) {
++ writew(*(u16 *)addr, port);
++ addr += 2;
++ }
++}
++
++static __inline__ void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
++{
++ while (count--) {
++ writel(*(u32 *)addr, port);
++ addr += 4;
++ }
++}
+--- linux-libc-headers-2.6.9.1/include/asm-generic/iomap.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/iomap.h 2004-11-27 15:04:26.000000000 +0100
+@@ -0,0 +1,63 @@
++#ifndef __GENERIC_IO_H
++#define __GENERIC_IO_H
++
++#include <linux/linkage.h>
++
++/*
++ * These are the "generic" interfaces for doing new-style
++ * memory-mapped or PIO accesses. Architectures may do
++ * their own arch-optimized versions, these just act as
++ * wrappers around the old-style IO register access functions:
++ * read[bwl]/write[bwl]/in[bwl]/out[bwl]
++ *
++ * Don't include this directly, include it from <asm/io.h>.
++ */
++
++/*
++ * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
++ * access or a MMIO access, these functions don't care. The info is
++ * encoded in the hardware mapping set up by the mapping functions
++ * (or the cookie itself, depending on implementation and hw).
++ *
++ * The generic routines just encode the PIO/MMIO as part of the
++ * cookie, and coldly assume that the MMIO IO mappings are not
++ * in the low address range. Architectures for which this is not
++ * true can't use this generic implementation.
++ */
++extern unsigned int fastcall ioread8(void __iomem *);
++extern unsigned int fastcall ioread16(void __iomem *);
++extern unsigned int fastcall ioread32(void __iomem *);
++
++extern void fastcall iowrite8(u8, void __iomem *);
++extern void fastcall iowrite16(u16, void __iomem *);
++extern void fastcall iowrite32(u32, void __iomem *);
++
++/*
++ * "string" versions of the above. Note that they
++ * use native byte ordering for the accesses (on
++ * the assumption that IO and memory agree on a
++ * byte order, and CPU byteorder is irrelevant).
++ *
++ * They do _not_ update the port address. If you
++ * want MMIO that copies stuff laid out in MMIO
++ * memory across multiple ports, use "memcpy_toio()"
++ * and friends.
++ */
++extern void fastcall ioread8_rep(void __iomem *port, void *buf, unsigned long count);
++extern void fastcall ioread16_rep(void __iomem *port, void *buf, unsigned long count);
++extern void fastcall ioread32_rep(void __iomem *port, void *buf, unsigned long count);
++
++extern void fastcall iowrite8_rep(void __iomem *port, const void *buf, unsigned long count);
++extern void fastcall iowrite16_rep(void __iomem *port, const void *buf, unsigned long count);
++extern void fastcall iowrite32_rep(void __iomem *port, const void *buf, unsigned long count);
++
++/* Create a virtual mapping cookie for an IO port range */
++extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
++extern void ioport_unmap(void __iomem *);
++
++/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
++struct pci_dev;
++extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
++extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-generic/local.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/local.h 2005-05-18 20:35:10.000000000 +0200
+@@ -0,0 +1,118 @@
++#ifndef _ASM_GENERIC_LOCAL_H
++#define _ASM_GENERIC_LOCAL_H
++
++// #include <linux/config.h>
++#include <linux/percpu.h>
++#include <linux/hardirq.h>
++#include <asm/types.h>
++
++/* An unsigned long type for operations which are atomic for a single
++ * CPU. Usually used in combination with per-cpu variables. */
++
++#if BITS_PER_LONG == 32
++/* Implement in terms of atomics. */
++
++/* Don't use typedef: don't want them to be mixed with atomic_t's. */
++typedef struct
++{
++ atomic_t a;
++} local_t;
++
++#define LOCAL_INIT(i) { ATOMIC_INIT(i) }
++
++#define local_read(l) ((unsigned long)atomic_read(&(l)->a))
++#define local_set(l,i) atomic_set((&(l)->a),(i))
++#define local_inc(l) atomic_inc(&(l)->a)
++#define local_dec(l) atomic_dec(&(l)->a)
++#define local_add(i,l) atomic_add((i),(&(l)->a))
++#define local_sub(i,l) atomic_sub((i),(&(l)->a))
++
++/* Non-atomic variants, ie. preemption disabled and won't be touched
++ * in interrupt, etc. Some archs can optimize this case well. */
++#define __local_inc(l) local_set((l), local_read(l) + 1)
++#define __local_dec(l) local_set((l), local_read(l) - 1)
++#define __local_add(i,l) local_set((l), local_read(l) + (i))
++#define __local_sub(i,l) local_set((l), local_read(l) - (i))
++
++#else /* ... can't use atomics. */
++/* Implement in terms of three variables.
++ Another option would be to use local_irq_save/restore. */
++
++typedef struct
++{
++ /* 0 = in hardirq, 1 = in softirq, 2 = usermode. */
++ unsigned long v[3];
++} local_t;
++
++#define _LOCAL_VAR(l) ((l)->v[!in_interrupt() + !in_irq()])
++
++#define LOCAL_INIT(i) { { (i), 0, 0 } }
++
++static inline unsigned long local_read(local_t *l)
++{
++ return l->v[0] + l->v[1] + l->v[2];
++}
++
++static inline void local_set(local_t *l, unsigned long v)
++{
++ l->v[0] = v;
++ l->v[1] = l->v[2] = 0;
++}
++
++static inline void local_inc(local_t *l)
++{
++ preempt_disable();
++ _LOCAL_VAR(l)++;
++ preempt_enable();
++}
++
++static inline void local_dec(local_t *l)
++{
++ preempt_disable();
++ _LOCAL_VAR(l)--;
++ preempt_enable();
++}
++
++static inline void local_add(unsigned long v, local_t *l)
++{
++ preempt_disable();
++ _LOCAL_VAR(l) += v;
++ preempt_enable();
++}
++
++static inline void local_sub(unsigned long v, local_t *l)
++{
++ preempt_disable();
++ _LOCAL_VAR(l) -= v;
++ preempt_enable();
++}
++
++/* Non-atomic variants, ie. preemption disabled and won't be touched
++ * in interrupt, etc. Some archs can optimize this case well. */
++#define __local_inc(l) ((l)->v[0]++)
++#define __local_dec(l) ((l)->v[0]--)
++#define __local_add(i,l) ((l)->v[0] += (i))
++#define __local_sub(i,l) ((l)->v[0] -= (i))
++
++#endif /* Non-atomic implementation */
++
++/* Use these for per-cpu local_t variables: on some archs they are
++ * much more efficient than these naive implementations. Note they take
++ * a variable (eg. mystruct.foo), not an address.
++ */
++#define cpu_local_read(v) local_read(&__get_cpu_var(v))
++#define cpu_local_set(v, i) local_set(&__get_cpu_var(v), (i))
++#define cpu_local_inc(v) local_inc(&__get_cpu_var(v))
++#define cpu_local_dec(v) local_dec(&__get_cpu_var(v))
++#define cpu_local_add(i, v) local_add((i), &__get_cpu_var(v))
++#define cpu_local_sub(i, v) local_sub((i), &__get_cpu_var(v))
++
++/* Non-atomic increments, ie. preemption disabled and won't be touched
++ * in interrupt, etc. Some archs can optimize this case well.
++ */
++#define __cpu_local_inc(v) __local_inc(&__get_cpu_var(v))
++#define __cpu_local_dec(v) __local_dec(&__get_cpu_var(v))
++#define __cpu_local_add(i, v) __local_add((i), &__get_cpu_var(v))
++#define __cpu_local_sub(i, v) __local_sub((i), &__get_cpu_var(v))
++
++#endif /* _ASM_GENERIC_LOCAL_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/pci-dma-compat.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/pci-dma-compat.h 2004-05-07 15:36:24.000000000 +0200
+@@ -0,0 +1,107 @@
++/* include this file if the platform implements the dma_ DMA Mapping API
++ * and wants to provide the pci_ DMA Mapping API in terms of it */
++
++#ifndef _ASM_GENERIC_PCI_DMA_COMPAT_H
++#define _ASM_GENERIC_PCI_DMA_COMPAT_H
++
++#include <linux/dma-mapping.h>
++
++/* note pci_set_dma_mask isn't here, since it's a public function
++ * exported from drivers/pci, use dma_supported instead */
++
++static inline int
++pci_dma_supported(struct pci_dev *hwdev, u64 mask)
++{
++ return dma_supported(hwdev == NULL ? NULL : &hwdev->dev, mask);
++}
++
++static inline void *
++pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
++ dma_addr_t *dma_handle)
++{
++ return dma_alloc_coherent(hwdev == NULL ? NULL : &hwdev->dev, size, dma_handle, GFP_ATOMIC);
++}
++
++static inline void
++pci_free_consistent(struct pci_dev *hwdev, size_t size,
++ void *vaddr, dma_addr_t dma_handle)
++{
++ dma_free_coherent(hwdev == NULL ? NULL : &hwdev->dev, size, vaddr, dma_handle);
++}
++
++static inline dma_addr_t
++pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction)
++{
++ return dma_map_single(hwdev == NULL ? NULL : &hwdev->dev, ptr, size, (enum dma_data_direction)direction);
++}
++
++static inline void
++pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,
++ size_t size, int direction)
++{
++ dma_unmap_single(hwdev == NULL ? NULL : &hwdev->dev, dma_addr, size, (enum dma_data_direction)direction);
++}
++
++static inline dma_addr_t
++pci_map_page(struct pci_dev *hwdev, struct page *page,
++ unsigned long offset, size_t size, int direction)
++{
++ return dma_map_page(hwdev == NULL ? NULL : &hwdev->dev, page, offset, size, (enum dma_data_direction)direction);
++}
++
++static inline void
++pci_unmap_page(struct pci_dev *hwdev, dma_addr_t dma_address,
++ size_t size, int direction)
++{
++ dma_unmap_page(hwdev == NULL ? NULL : &hwdev->dev, dma_address, size, (enum dma_data_direction)direction);
++}
++
++static inline int
++pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
++ int nents, int direction)
++{
++ return dma_map_sg(hwdev == NULL ? NULL : &hwdev->dev, sg, nents, (enum dma_data_direction)direction);
++}
++
++static inline void
++pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
++ int nents, int direction)
++{
++ dma_unmap_sg(hwdev == NULL ? NULL : &hwdev->dev, sg, nents, (enum dma_data_direction)direction);
++}
++
++static inline void
++pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle,
++ size_t size, int direction)
++{
++ dma_sync_single_for_cpu(hwdev == NULL ? NULL : &hwdev->dev, dma_handle, size, (enum dma_data_direction)direction);
++}
++
++static inline void
++pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle,
++ size_t size, int direction)
++{
++ dma_sync_single_for_device(hwdev == NULL ? NULL : &hwdev->dev, dma_handle, size, (enum dma_data_direction)direction);
++}
++
++static inline void
++pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg,
++ int nelems, int direction)
++{
++ dma_sync_sg_for_cpu(hwdev == NULL ? NULL : &hwdev->dev, sg, nelems, (enum dma_data_direction)direction);
++}
++
++static inline void
++pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg,
++ int nelems, int direction)
++{
++ dma_sync_sg_for_device(hwdev == NULL ? NULL : &hwdev->dev, sg, nelems, (enum dma_data_direction)direction);
++}
++
++static inline int
++pci_dma_mapping_error(dma_addr_t dma_addr)
++{
++ return dma_mapping_error(dma_addr);
++}
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-generic/pci.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/pci.h 2004-05-07 15:36:24.000000000 +0200
+@@ -0,0 +1,27 @@
++/*
++ * linux/include/asm-generic/pci.h
++ *
++ * Copyright (C) 2003 Russell King
++ */
++#ifndef _ASM_GENERIC_PCI_H
++#define _ASM_GENERIC_PCI_H
++
++/**
++ * pcibios_resource_to_bus - convert resource to PCI bus address
++ * @dev: device which owns this resource
++ * @region: converted bus-centric region (start,end)
++ * @res: resource to convert
++ *
++ * Convert a resource to a PCI device bus address or bus window.
++ */
++static inline void
++pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
++ struct resource *res)
++{
++ region->start = res->start;
++ region->end = res->end;
++}
++
++#define pcibios_scan_all_fns(a, b) 0
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-generic/percpu.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/percpu.h 2004-02-08 17:04:22.000000000 +0100
+@@ -0,0 +1,42 @@
++#ifndef _ASM_GENERIC_PERCPU_H_
++#define _ASM_GENERIC_PERCPU_H_
++#include <linux/compiler.h>
++
++#define __GENERIC_PER_CPU
++#ifdef CONFIG_SMP
++
++extern unsigned long __per_cpu_offset[NR_CPUS];
++
++/* Separate out the type, so (int[3], foo) works. */
++#define DEFINE_PER_CPU(type, name) \
++ __attribute__((__section__(".data.percpu"))) __typeof__(type) per_cpu__##name
++
++/* var is in discarded region: offset to particular copy we want */
++#define per_cpu(var, cpu) (*RELOC_HIDE(&per_cpu__##var, __per_cpu_offset[cpu]))
++#define __get_cpu_var(var) per_cpu(var, smp_processor_id())
++
++/* A macro to avoid #include hell... */
++#define percpu_modcopy(pcpudst, src, size) \
++do { \
++ unsigned int __i; \
++ for (__i = 0; __i < NR_CPUS; __i++) \
++ if (cpu_possible(__i)) \
++ memcpy((pcpudst)+__per_cpu_offset[__i], \
++ (src), (size)); \
++} while (0)
++#else /* ! SMP */
++
++#define DEFINE_PER_CPU(type, name) \
++ __typeof__(type) per_cpu__##name
++
++#define per_cpu(var, cpu) (*((void)cpu, &per_cpu__##var))
++#define __get_cpu_var(var) per_cpu__##var
++
++#endif /* SMP */
++
++#define DECLARE_PER_CPU(type, name) extern __typeof__(type) per_cpu__##name
++
++#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var)
++#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var)
++
++#endif /* _ASM_GENERIC_PERCPU_H_ */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/pgtable.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/pgtable.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,137 @@
++#ifndef _ASM_GENERIC_PGTABLE_H
++#define _ASM_GENERIC_PGTABLE_H
++
++#ifndef __HAVE_ARCH_PTEP_ESTABLISH
++/*
++ * Establish a new mapping:
++ * - flush the old one
++ * - update the page tables
++ * - inform the TLB about the new one
++ *
++ * We hold the mm semaphore for reading and vma->vm_mm->page_table_lock.
++ *
++ * Note: the old pte is known to not be writable, so we don't need to
++ * worry about dirty bits etc getting lost.
++ */
++#ifndef __HAVE_ARCH_SET_PTE_ATOMIC
++#define ptep_establish(__vma, __address, __ptep, __entry) \
++do { \
++ set_pte(__ptep, __entry); \
++ flush_tlb_page(__vma, __address); \
++} while (0)
++#else /* __HAVE_ARCH_SET_PTE_ATOMIC */
++#define ptep_establish(__vma, __address, __ptep, __entry) \
++do { \
++ set_pte_atomic(__ptep, __entry); \
++ flush_tlb_page(__vma, __address); \
++} while (0)
++#endif /* __HAVE_ARCH_SET_PTE_ATOMIC */
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
++/*
++ * Largely same as above, but only sets the access flags (dirty,
++ * accessed, and writable). Furthermore, we know it always gets set
++ * to a "more permissive" setting, which allows most architectures
++ * to optimize this.
++ */
++#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
++do { \
++ set_pte(__ptep, __entry); \
++ flush_tlb_page(__vma, __address); \
++} while (0)
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
++static inline int ptep_test_and_clear_young(pte_t *ptep)
++{
++ pte_t pte = *ptep;
++ if (!pte_young(pte))
++ return 0;
++ set_pte(ptep, pte_mkold(pte));
++ return 1;
++}
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
++#define ptep_clear_flush_young(__vma, __address, __ptep) \
++({ \
++ int __young = ptep_test_and_clear_young(__ptep); \
++ if (__young) \
++ flush_tlb_page(__vma, __address); \
++ __young; \
++})
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
++static inline int ptep_test_and_clear_dirty(pte_t *ptep)
++{
++ pte_t pte = *ptep;
++ if (!pte_dirty(pte))
++ return 0;
++ set_pte(ptep, pte_mkclean(pte));
++ return 1;
++}
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
++#define ptep_clear_flush_dirty(__vma, __address, __ptep) \
++({ \
++ int __dirty = ptep_test_and_clear_dirty(__ptep); \
++ if (__dirty) \
++ flush_tlb_page(__vma, __address); \
++ __dirty; \
++})
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
++static inline pte_t ptep_get_and_clear(pte_t *ptep)
++{
++ pte_t pte = *ptep;
++ pte_clear(ptep);
++ return pte;
++}
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
++#define ptep_clear_flush(__vma, __address, __ptep) \
++({ \
++ pte_t __pte = ptep_get_and_clear(__ptep); \
++ flush_tlb_page(__vma, __address); \
++ __pte; \
++})
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
++static inline void ptep_set_wrprotect(pte_t *ptep)
++{
++ pte_t old_pte = *ptep;
++ set_pte(ptep, pte_wrprotect(old_pte));
++}
++#endif
++
++#ifndef __HAVE_ARCH_PTEP_MKDIRTY
++static inline void ptep_mkdirty(pte_t *ptep)
++{
++ pte_t old_pte = *ptep;
++ set_pte(ptep, pte_mkdirty(old_pte));
++}
++#endif
++
++#ifndef __HAVE_ARCH_PTE_SAME
++#define pte_same(A,B) (pte_val(A) == pte_val(B))
++#endif
++
++#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
++#define page_test_and_clear_dirty(page) (0)
++#endif
++
++#ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
++#define page_test_and_clear_young(page) (0)
++#endif
++
++#ifndef __HAVE_ARCH_PGD_OFFSET_GATE
++#define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
++#endif
++
++#endif /* _ASM_GENERIC_PGTABLE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/rmap.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/rmap.h 2004-01-16 16:00:38.000000000 +0100
+@@ -0,0 +1,90 @@
++#ifndef _GENERIC_RMAP_H
++#define _GENERIC_RMAP_H
++/*
++ * linux/include/asm-generic/rmap.h
++ *
++ * Architecture dependent parts of the reverse mapping code,
++ * this version should work for most architectures with a
++ * 'normal' page table layout.
++ *
++ * We use the struct page of the page table page to find out
++ * the process and full address of a page table entry:
++ * - page->mapping points to the process' mm_struct
++ * - page->index has the high bits of the address
++ * - the lower bits of the address are calculated from the
++ * offset of the page table entry within the page table page
++ *
++ * For CONFIG_HIGHPTE, we need to represent the address of a pte in a
++ * scalar pte_addr_t. The pfn of the pte's page is shifted left by PAGE_SIZE
++ * bits and is then ORed with the byte offset of the pte within its page.
++ *
++ * For CONFIG_HIGHMEM4G, the pte_addr_t is 32 bits. 20 for the pfn, 12 for
++ * the offset.
++ *
++ * For CONFIG_HIGHMEM64G, the pte_addr_t is 64 bits. 52 for the pfn, 12 for
++ * the offset.
++ */
++#include <linux/mm.h>
++
++static inline void pgtable_add_rmap(struct page * page, struct mm_struct * mm, unsigned long address)
++{
++#ifdef BROKEN_PPC_PTE_ALLOC_ONE
++ /* OK, so PPC calls pte_alloc() before mem_map[] is setup ... ;( */
++ extern int mem_init_done;
++
++ if (!mem_init_done)
++ return;
++#endif
++ page->mapping = (void *)mm;
++ page->index = address & ~((PTRS_PER_PTE * PAGE_SIZE) - 1);
++ inc_page_state(nr_page_table_pages);
++}
++
++static inline void pgtable_remove_rmap(struct page * page)
++{
++ page->mapping = NULL;
++ page->index = 0;
++ dec_page_state(nr_page_table_pages);
++}
++
++static inline struct mm_struct * ptep_to_mm(pte_t * ptep)
++{
++ struct page * page = kmap_atomic_to_page(ptep);
++ return (struct mm_struct *) page->mapping;
++}
++
++static inline unsigned long ptep_to_address(pte_t * ptep)
++{
++ struct page * page = kmap_atomic_to_page(ptep);
++ unsigned long low_bits;
++ low_bits = ((unsigned long)ptep & ~PAGE_MASK) * PTRS_PER_PTE;
++ return page->index + low_bits;
++}
++
++#ifdef CONFIG_HIGHPTE
++static inline pte_addr_t ptep_to_paddr(pte_t *ptep)
++{
++ pte_addr_t paddr;
++ paddr = ((pte_addr_t)page_to_pfn(kmap_atomic_to_page(ptep))) << PAGE_SHIFT;
++ return paddr + (pte_addr_t)((unsigned long)ptep & ~PAGE_MASK);
++}
++#else
++static inline pte_addr_t ptep_to_paddr(pte_t *ptep)
++{
++ return (pte_addr_t)ptep;
++}
++#endif
++
++#ifndef CONFIG_HIGHPTE
++static inline pte_t *rmap_ptep_map(pte_addr_t pte_paddr)
++{
++ return (pte_t *)pte_paddr;
++}
++
++static inline void rmap_ptep_unmap(pte_t *pte)
++{
++ return;
++}
++#endif
++
++#endif /* _GENERIC_RMAP_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/rtc.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/rtc.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,213 @@
++/*
++ * inclue/asm-generic/rtc.h
++ *
++ * Author: Tom Rini <trini@mvista.com>
++ *
++ * Based on:
++ * drivers/char/rtc.c
++ *
++ * Please read the COPYING file for all license details.
++ */
++
++#ifndef __ASM_RTC_H__
++#define __ASM_RTC_H__
++
++#ifdef __KERNEL__
++
++#include <linux/mc146818rtc.h>
++#include <linux/rtc.h>
++#include <linux/bcd.h>
++
++#define RTC_PIE 0x40 /* periodic interrupt enable */
++#define RTC_AIE 0x20 /* alarm interrupt enable */
++#define RTC_UIE 0x10 /* update-finished interrupt enable */
++
++/* some dummy definitions */
++#define RTC_BATT_BAD 0x100 /* battery bad */
++#define RTC_SQWE 0x08 /* enable square-wave output */
++#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
++#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
++#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
++
++/*
++ * Returns true if a clock update is in progress
++ */
++static inline unsigned char rtc_is_updating(void)
++{
++ unsigned char uip;
++
++ spin_lock_irq(&rtc_lock);
++ uip = (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP);
++ spin_unlock_irq(&rtc_lock);
++ return uip;
++}
++
++static inline unsigned int get_rtc_time(struct rtc_time *time)
++{
++ unsigned long uip_watchdog = jiffies;
++ unsigned char ctrl;
++#ifdef CONFIG_MACH_DECSTATION
++ unsigned int real_year;
++#endif
++
++ /*
++ * read RTC once any update in progress is done. The update
++ * can take just over 2ms. We wait 10 to 20ms. There is no need to
++ * to poll-wait (up to 1s - eeccch) for the falling edge of RTC_UIP.
++ * If you need to know *exactly* when a second has started, enable
++ * periodic update complete interrupts, (via ioctl) and then
++ * immediately read /dev/rtc which will block until you get the IRQ.
++ * Once the read clears, read the RTC time (again via ioctl). Easy.
++ */
++
++ if (rtc_is_updating() != 0)
++ while (jiffies - uip_watchdog < 2*HZ/100) {
++ barrier();
++ cpu_relax();
++ }
++
++ /*
++ * Only the values that we read from the RTC are set. We leave
++ * tm_wday, tm_yday and tm_isdst untouched. Even though the
++ * RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated
++ * by the RTC when initially set to a non-zero value.
++ */
++ spin_lock_irq(&rtc_lock);
++ time->tm_sec = CMOS_READ(RTC_SECONDS);
++ time->tm_min = CMOS_READ(RTC_MINUTES);
++ time->tm_hour = CMOS_READ(RTC_HOURS);
++ time->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
++ time->tm_mon = CMOS_READ(RTC_MONTH);
++ time->tm_year = CMOS_READ(RTC_YEAR);
++#ifdef CONFIG_MACH_DECSTATION
++ real_year = CMOS_READ(RTC_DEC_YEAR);
++#endif
++ ctrl = CMOS_READ(RTC_CONTROL);
++ spin_unlock_irq(&rtc_lock);
++
++ if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
++ {
++ BCD_TO_BIN(time->tm_sec);
++ BCD_TO_BIN(time->tm_min);
++ BCD_TO_BIN(time->tm_hour);
++ BCD_TO_BIN(time->tm_mday);
++ BCD_TO_BIN(time->tm_mon);
++ BCD_TO_BIN(time->tm_year);
++ }
++
++#ifdef CONFIG_MACH_DECSTATION
++ time->tm_year += real_year - 72;
++#endif
++
++ /*
++ * Account for differences between how the RTC uses the values
++ * and how they are defined in a struct rtc_time;
++ */
++ if (time->tm_year <= 69)
++ time->tm_year += 100;
++
++ time->tm_mon--;
++
++ return RTC_24H;
++}
++
++/* Set the current date and time in the real time clock. */
++static inline int set_rtc_time(struct rtc_time *time)
++{
++ unsigned char mon, day, hrs, min, sec;
++ unsigned char save_control, save_freq_select;
++ unsigned int yrs;
++#ifdef CONFIG_MACH_DECSTATION
++ unsigned int real_yrs, leap_yr;
++#endif
++
++ yrs = time->tm_year;
++ mon = time->tm_mon + 1; /* tm_mon starts at zero */
++ day = time->tm_mday;
++ hrs = time->tm_hour;
++ min = time->tm_min;
++ sec = time->tm_sec;
++
++ if (yrs > 255) /* They are unsigned */
++ return -EINVAL;
++
++ spin_lock_irq(&rtc_lock);
++#ifdef CONFIG_MACH_DECSTATION
++ real_yrs = yrs;
++ leap_yr = ((!((yrs + 1900) % 4) && ((yrs + 1900) % 100)) ||
++ !((yrs + 1900) % 400));
++ yrs = 72;
++
++ /*
++ * We want to keep the year set to 73 until March
++ * for non-leap years, so that Feb, 29th is handled
++ * correctly.
++ */
++ if (!leap_yr && mon < 3) {
++ real_yrs--;
++ yrs = 73;
++ }
++#endif
++ /* These limits and adjustments are independent of
++ * whether the chip is in binary mode or not.
++ */
++ if (yrs > 169) {
++ spin_unlock_irq(&rtc_lock);
++ return -EINVAL;
++ }
++
++ if (yrs >= 100)
++ yrs -= 100;
++
++ if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY)
++ || RTC_ALWAYS_BCD) {
++ BIN_TO_BCD(sec);
++ BIN_TO_BCD(min);
++ BIN_TO_BCD(hrs);
++ BIN_TO_BCD(day);
++ BIN_TO_BCD(mon);
++ BIN_TO_BCD(yrs);
++ }
++
++ save_control = CMOS_READ(RTC_CONTROL);
++ CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
++ save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
++ CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
++
++#ifdef CONFIG_MACH_DECSTATION
++ CMOS_WRITE(real_yrs, RTC_DEC_YEAR);
++#endif
++ CMOS_WRITE(yrs, RTC_YEAR);
++ CMOS_WRITE(mon, RTC_MONTH);
++ CMOS_WRITE(day, RTC_DAY_OF_MONTH);
++ CMOS_WRITE(hrs, RTC_HOURS);
++ CMOS_WRITE(min, RTC_MINUTES);
++ CMOS_WRITE(sec, RTC_SECONDS);
++
++ CMOS_WRITE(save_control, RTC_CONTROL);
++ CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
++
++ spin_unlock_irq(&rtc_lock);
++
++ return 0;
++}
++
++static inline unsigned int get_rtc_ss(void)
++{
++ struct rtc_time h;
++
++ get_rtc_time(&h);
++ return h.tm_sec;
++}
++
++static inline int get_rtc_pll(struct rtc_pll_info *pll)
++{
++ return -EINVAL;
++}
++static inline int set_rtc_pll(struct rtc_pll_info *pll)
++{
++ return -EINVAL;
++}
++
++#endif /* __KERNEL__ */
++#endif /* __ASM_RTC_H__ */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/sections.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/sections.h 2004-01-25 14:35:16.000000000 +0100
+@@ -0,0 +1,12 @@
++#ifndef _ASM_GENERIC_SECTIONS_H_
++#define _ASM_GENERIC_SECTIONS_H_
++
++/* References to section boundaries */
++
++extern char _text[], _stext[], _etext[];
++extern char _data[], _sdata[], _edata[];
++extern char __bss_start[], __bss_stop[];
++extern char __init_begin[], __init_end[];
++extern char _sinittext[], _einittext[];
++
++#endif /* _ASM_GENERIC_SECTIONS_H_ */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/siginfo.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/siginfo.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,295 @@
++#ifndef _ASM_GENERIC_SIGINFO_H
++#define _ASM_GENERIC_SIGINFO_H
++
++#include <linux/compiler.h>
++#include <linux/types.h>
++#include <linux/resource.h>
++
++typedef union sigval {
++ int sival_int;
++ void __user *sival_ptr;
++} sigval_t;
++
++/*
++ * This is the size (including padding) of the part of the
++ * struct siginfo that is before the union.
++ */
++#ifndef __ARCH_SI_PREAMBLE_SIZE
++#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
++#endif
++
++#define SI_MAX_SIZE 128
++#ifndef SI_PAD_SIZE
++#define SI_PAD_SIZE ((SI_MAX_SIZE - __ARCH_SI_PREAMBLE_SIZE) / sizeof(int))
++#endif
++
++#ifndef __ARCH_SI_UID_T
++#define __ARCH_SI_UID_T uid_t
++#endif
++
++/*
++ * The default "si_band" type is "long", as specified by POSIX.
++ * However, some architectures want to override this to "int"
++ * for historical compatibility reasons, so we allow that.
++ */
++#ifndef __ARCH_SI_BAND_T
++#define __ARCH_SI_BAND_T long
++#endif
++
++#ifndef HAVE_ARCH_SIGINFO_T
++
++typedef struct siginfo {
++ int si_signo;
++ int si_errno;
++ int si_code;
++
++ union {
++ int _pad[SI_PAD_SIZE];
++
++ /* kill() */
++ struct {
++ pid_t _pid; /* sender's pid */
++ __ARCH_SI_UID_T _uid; /* sender's uid */
++ } _kill;
++
++ /* POSIX.1b timers */
++ struct {
++ timer_t _tid; /* timer id */
++ int _overrun; /* overrun count */
++ char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
++ sigval_t _sigval; /* same as below */
++ int _sys_private; /* not to be passed to user */
++ } _timer;
++
++ /* POSIX.1b signals */
++ struct {
++ pid_t _pid; /* sender's pid */
++ __ARCH_SI_UID_T _uid; /* sender's uid */
++ sigval_t _sigval;
++ } _rt;
++
++ /* SIGCHLD */
++ struct {
++ pid_t _pid; /* which child */
++ __ARCH_SI_UID_T _uid; /* sender's uid */
++ int _status; /* exit code */
++ clock_t _utime;
++ clock_t _stime;
++ } _sigchld;
++
++ /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
++ struct {
++ void __user *_addr; /* faulting insn/memory ref. */
++#ifdef __ARCH_SI_TRAPNO
++ int _trapno; /* TRAP # which caused the signal */
++#endif
++ } _sigfault;
++
++ /* SIGPOLL */
++ struct {
++ __ARCH_SI_BAND_T _band; /* POLL_IN, POLL_OUT, POLL_MSG */
++ int _fd;
++ } _sigpoll;
++ } _sifields;
++} siginfo_t;
++
++#endif
++
++/*
++ * How these fields are to be accessed.
++ */
++#define si_pid _sifields._kill._pid
++#define si_uid _sifields._kill._uid
++#define si_tid _sifields._timer._tid
++#define si_overrun _sifields._timer._overrun
++#define si_sys_private _sifields._timer._sys_private
++#define si_status _sifields._sigchld._status
++#define si_utime _sifields._sigchld._utime
++#define si_stime _sifields._sigchld._stime
++#define si_value _sifields._rt._sigval
++#define si_int _sifields._rt._sigval.sival_int
++#define si_ptr _sifields._rt._sigval.sival_ptr
++#define si_addr _sifields._sigfault._addr
++#ifdef __ARCH_SI_TRAPNO
++#define si_trapno _sifields._sigfault._trapno
++#endif
++#define si_band _sifields._sigpoll._band
++#define si_fd _sifields._sigpoll._fd
++
++#ifdef __KERNEL__
++#define __SI_MASK 0xffff0000u
++#define __SI_KILL (0 << 16)
++#define __SI_TIMER (1 << 16)
++#define __SI_POLL (2 << 16)
++#define __SI_FAULT (3 << 16)
++#define __SI_CHLD (4 << 16)
++#define __SI_RT (5 << 16)
++#define __SI_MESGQ (6 << 16)
++#define __SI_CODE(T,N) ((T) | ((N) & 0xffff))
++#else
++#define __SI_KILL 0
++#define __SI_TIMER 0
++#define __SI_POLL 0
++#define __SI_FAULT 0
++#define __SI_CHLD 0
++#define __SI_RT 0
++#define __SI_MESGQ 0
++#define __SI_CODE(T,N) (N)
++#endif
++
++/*
++ * si_code values
++ * Digital reserves positive values for kernel-generated signals.
++ */
++#define SI_USER 0 /* sent by kill, sigsend, raise */
++#define SI_KERNEL 0x80 /* sent by the kernel from somewhere */
++#define SI_QUEUE -1 /* sent by sigqueue */
++#define SI_TIMER __SI_CODE(__SI_TIMER,-2) /* sent by timer expiration */
++#define SI_MESGQ __SI_CODE(__SI_MESGQ,-3) /* sent by real time mesq state change */
++#define SI_ASYNCIO -4 /* sent by AIO completion */
++#define SI_SIGIO -5 /* sent by queued SIGIO */
++#define SI_TKILL -6 /* sent by tkill system call */
++#define SI_DETHREAD -7 /* sent by execve() killing subsidiary threads */
++
++#define SI_FROMUSER(siptr) ((siptr)->si_code <= 0)
++#define SI_FROMKERNEL(siptr) ((siptr)->si_code > 0)
++
++#ifndef HAVE_ARCH_SI_CODES
++/*
++ * SIGILL si_codes
++ */
++#define ILL_ILLOPC (__SI_FAULT|1) /* illegal opcode */
++#define ILL_ILLOPN (__SI_FAULT|2) /* illegal operand */
++#define ILL_ILLADR (__SI_FAULT|3) /* illegal addressing mode */
++#define ILL_ILLTRP (__SI_FAULT|4) /* illegal trap */
++#define ILL_PRVOPC (__SI_FAULT|5) /* privileged opcode */
++#define ILL_PRVREG (__SI_FAULT|6) /* privileged register */
++#define ILL_COPROC (__SI_FAULT|7) /* coprocessor error */
++#define ILL_BADSTK (__SI_FAULT|8) /* internal stack error */
++#define NSIGILL 8
++
++/*
++ * SIGFPE si_codes
++ */
++#define FPE_INTDIV (__SI_FAULT|1) /* integer divide by zero */
++#define FPE_INTOVF (__SI_FAULT|2) /* integer overflow */
++#define FPE_FLTDIV (__SI_FAULT|3) /* floating point divide by zero */
++#define FPE_FLTOVF (__SI_FAULT|4) /* floating point overflow */
++#define FPE_FLTUND (__SI_FAULT|5) /* floating point underflow */
++#define FPE_FLTRES (__SI_FAULT|6) /* floating point inexact result */
++#define FPE_FLTINV (__SI_FAULT|7) /* floating point invalid operation */
++#define FPE_FLTSUB (__SI_FAULT|8) /* subscript out of range */
++#define NSIGFPE 8
++
++/*
++ * SIGSEGV si_codes
++ */
++#define SEGV_MAPERR (__SI_FAULT|1) /* address not mapped to object */
++#define SEGV_ACCERR (__SI_FAULT|2) /* invalid permissions for mapped object */
++#define NSIGSEGV 2
++
++/*
++ * SIGBUS si_codes
++ */
++#define BUS_ADRALN (__SI_FAULT|1) /* invalid address alignment */
++#define BUS_ADRERR (__SI_FAULT|2) /* non-existant physical address */
++#define BUS_OBJERR (__SI_FAULT|3) /* object specific hardware error */
++#define NSIGBUS 3
++
++/*
++ * SIGTRAP si_codes
++ */
++#define TRAP_BRKPT (__SI_FAULT|1) /* process breakpoint */
++#define TRAP_TRACE (__SI_FAULT|2) /* process trace trap */
++#define NSIGTRAP 2
++
++/*
++ * SIGCHLD si_codes
++ */
++#define CLD_EXITED (__SI_CHLD|1) /* child has exited */
++#define CLD_KILLED (__SI_CHLD|2) /* child was killed */
++#define CLD_DUMPED (__SI_CHLD|3) /* child terminated abnormally */
++#define CLD_TRAPPED (__SI_CHLD|4) /* traced child has trapped */
++#define CLD_STOPPED (__SI_CHLD|5) /* child has stopped */
++#define CLD_CONTINUED (__SI_CHLD|6) /* stopped child has continued */
++#define NSIGCHLD 6
++
++/*
++ * SIGPOLL si_codes
++ */
++#define POLL_IN (__SI_POLL|1) /* data input available */
++#define POLL_OUT (__SI_POLL|2) /* output buffers available */
++#define POLL_MSG (__SI_POLL|3) /* input message available */
++#define POLL_ERR (__SI_POLL|4) /* i/o error */
++#define POLL_PRI (__SI_POLL|5) /* high priority input available */
++#define POLL_HUP (__SI_POLL|6) /* device disconnected */
++#define NSIGPOLL 6
++
++#endif
++
++/*
++ * sigevent definitions
++ *
++ * It seems likely that SIGEV_THREAD will have to be handled from
++ * userspace, libpthread transmuting it to SIGEV_SIGNAL, which the
++ * thread manager then catches and does the appropriate nonsense.
++ * However, everything is written out here so as to not get lost.
++ */
++#define SIGEV_SIGNAL 0 /* notify via signal */
++#define SIGEV_NONE 1 /* other notification: meaningless */
++#define SIGEV_THREAD 2 /* deliver via thread creation */
++#define SIGEV_THREAD_ID 4 /* deliver to thread */
++
++#define SIGEV_MAX_SIZE 64
++#ifndef SIGEV_PAD_SIZE
++#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE/sizeof(int)) - 3)
++#endif
++
++#ifndef HAVE_ARCH_SIGEVENT_T
++
++typedef struct sigevent {
++ sigval_t sigev_value;
++ int sigev_signo;
++ int sigev_notify;
++ union {
++ int _pad[SIGEV_PAD_SIZE];
++ int _tid;
++
++ struct {
++ void (*_function)(sigval_t);
++ void *_attribute; /* really pthread_attr_t */
++ } _sigev_thread;
++ } _sigev_un;
++} sigevent_t;
++
++#endif
++
++#define sigev_notify_function _sigev_un._sigev_thread._function
++#define sigev_notify_attributes _sigev_un._sigev_thread._attribute
++#define sigev_notify_thread_id _sigev_un._tid
++
++#ifdef __KERNEL__
++
++struct siginfo;
++void do_schedule_next_timer(struct siginfo *info);
++
++#ifndef HAVE_ARCH_COPY_SIGINFO
++
++#include <linux/string.h>
++
++static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
++{
++ if (from->si_code < 0)
++ memcpy(to, from, sizeof(*to));
++ else
++ /* _sigchld is currently the largest know union member */
++ memcpy(to, from, __ARCH_SI_PREAMBLE_SIZE + sizeof(from->_sifields._sigchld));
++}
++
++#endif
++
++extern int copy_siginfo_to_user(struct siginfo __user *to, struct siginfo *from);
++
++#endif /* __KERNEL__ */
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-generic/statfs.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/statfs.h 2004-01-25 14:35:16.000000000 +0100
+@@ -0,0 +1,51 @@
++#ifndef _GENERIC_STATFS_H
++#define _GENERIC_STATFS_H
++
++#ifndef __KERNEL_STRICT_NAMES
++# include <linux/types.h>
++typedef __kernel_fsid_t fsid_t;
++#endif
++
++struct statfs {
++ __u32 f_type;
++ __u32 f_bsize;
++ __u32 f_blocks;
++ __u32 f_bfree;
++ __u32 f_bavail;
++ __u32 f_files;
++ __u32 f_ffree;
++ __kernel_fsid_t f_fsid;
++ __u32 f_namelen;
++ __u32 f_frsize;
++ __u32 f_spare[5];
++};
++
++struct statfs64 {
++ __u32 f_type;
++ __u32 f_bsize;
++ __u64 f_blocks;
++ __u64 f_bfree;
++ __u64 f_bavail;
++ __u64 f_files;
++ __u64 f_ffree;
++ __kernel_fsid_t f_fsid;
++ __u32 f_namelen;
++ __u32 f_frsize;
++ __u32 f_spare[5];
++};
++
++struct compat_statfs64 {
++ __u32 f_type;
++ __u32 f_bsize;
++ __u64 f_blocks;
++ __u64 f_bfree;
++ __u64 f_bavail;
++ __u64 f_files;
++ __u64 f_ffree;
++ __kernel_fsid_t f_fsid;
++ __u32 f_namelen;
++ __u32 f_frsize;
++ __u32 f_spare[5];
++};
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-generic/tlb.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/tlb.h 2005-05-18 20:35:14.000000000 +0200
+@@ -0,0 +1,152 @@
++/* asm-generic/tlb.h
++ *
++ * Generic TLB shootdown code
++ *
++ * Copyright 2001 Red Hat, Inc.
++ * Based on code from mm/memory.c Copyright Linus Torvalds and others.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++#ifndef _ASM_GENERIC__TLB_H
++#define _ASM_GENERIC__TLB_H
++
++// #include <linux/config.h>
++#include <linux/swap.h>
++#include <asm/pgalloc.h>
++#include <asm/tlbflush.h>
++
++/*
++ * For UP we don't need to worry about TLB flush
++ * and page free order so much..
++ */
++#ifdef CONFIG_SMP
++ #define FREE_PTE_NR 506
++ #define tlb_fast_mode(tlb) ((tlb)->nr == ~0U)
++#else
++ #define FREE_PTE_NR 1
++ #define tlb_fast_mode(tlb) 1
++#endif
++
++/* struct mmu_gather is an opaque type used by the mm code for passing around
++ * any data needed by arch specific code for tlb_remove_page. This structure
++ * can be per-CPU or per-MM as the page table lock is held for the duration of
++ * TLB shootdown.
++ */
++struct mmu_gather {
++ struct mm_struct *mm;
++ unsigned int nr; /* set to ~0U means fast mode */
++ unsigned int need_flush;/* Really unmapped some ptes? */
++ unsigned int fullmm; /* non-zero means full mm flush */
++ unsigned long freed;
++ struct page * pages[FREE_PTE_NR];
++};
++
++/* Users of the generic TLB shootdown code must declare this storage space. */
++DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
++
++/* tlb_gather_mmu
++ * Return a pointer to an initialized struct mmu_gather.
++ */
++static inline struct mmu_gather *
++tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
++{
++ struct mmu_gather *tlb = &per_cpu(mmu_gathers, smp_processor_id());
++
++ tlb->mm = mm;
++
++ /* Use fast mode if only one CPU is online */
++ tlb->nr = num_online_cpus() > 1 ? 0U : ~0U;
++
++ tlb->fullmm = full_mm_flush;
++ tlb->freed = 0;
++
++ return tlb;
++}
++
++static inline void
++tlb_flush_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
++{
++ if (!tlb->need_flush)
++ return;
++ tlb->need_flush = 0;
++ tlb_flush(tlb);
++ if (!tlb_fast_mode(tlb)) {
++ free_pages_and_swap_cache(tlb->pages, tlb->nr);
++ tlb->nr = 0;
++ }
++}
++
++/* tlb_finish_mmu
++ * Called at the end of the shootdown operation to free up any resources
++ * that were required. The page table lock is still held at this point.
++ */
++static inline void
++tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
++{
++ int freed = tlb->freed;
++ struct mm_struct *mm = tlb->mm;
++ int rss = mm->rss;
++
++ if (rss < freed)
++ freed = rss;
++ mm->rss = rss - freed;
++ tlb_flush_mmu(tlb, start, end);
++
++ /* keep the page table cache within bounds */
++ check_pgt_cache();
++}
++
++static inline unsigned int
++tlb_is_full_mm(struct mmu_gather *tlb)
++{
++ return tlb->fullmm;
++}
++
++/* tlb_remove_page
++ * Must perform the equivalent to __free_pte(pte_get_and_clear(ptep)), while
++ * handling the additional races in SMP caused by other CPUs caching valid
++ * mappings in their TLBs.
++ */
++static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
++{
++ tlb->need_flush = 1;
++ if (tlb_fast_mode(tlb)) {
++ free_page_and_swap_cache(page);
++ return;
++ }
++ tlb->pages[tlb->nr++] = page;
++ if (tlb->nr >= FREE_PTE_NR)
++ tlb_flush_mmu(tlb, 0, 0);
++}
++
++/**
++ * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
++ *
++ * Record the fact that pte's were really umapped in ->need_flush, so we can
++ * later optimise away the tlb invalidate. This helps when userspace is
++ * unmapping already-unmapped pages, which happens quite a lot.
++ */
++#define tlb_remove_tlb_entry(tlb, ptep, address) \
++ do { \
++ tlb->need_flush = 1; \
++ __tlb_remove_tlb_entry(tlb, ptep, address); \
++ } while (0)
++
++#define pte_free_tlb(tlb, ptep) \
++ do { \
++ tlb->need_flush = 1; \
++ __pte_free_tlb(tlb, ptep); \
++ } while (0)
++
++#define pmd_free_tlb(tlb, pmdp) \
++ do { \
++ tlb->need_flush = 1; \
++ __pmd_free_tlb(tlb, pmdp); \
++ } while (0)
++
++#define tlb_migrate_finish(mm) do {} while (0)
++
++#endif /* _ASM_GENERIC__TLB_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/topology.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/topology.h 2004-05-07 15:36:24.000000000 +0200
+@@ -0,0 +1,53 @@
++/*
++ * linux/include/asm-generic/topology.h
++ *
++ * Written by: Matthew Dobson, IBM Corporation
++ *
++ * Copyright (C) 2002, IBM Corp.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ * Send feedback to <colpatch@us.ibm.com>
++ */
++#ifndef _ASM_GENERIC_TOPOLOGY_H
++#define _ASM_GENERIC_TOPOLOGY_H
++
++/* Other architectures wishing to use this simple topology API should fill
++ in the below functions as appropriate in their own <asm/topology.h> file. */
++#ifndef cpu_to_node
++#define cpu_to_node(cpu) (0)
++#endif
++#ifndef parent_node
++#define parent_node(node) (0)
++#endif
++#ifndef node_to_cpumask
++#define node_to_cpumask(node) (cpu_online_map)
++#endif
++#ifndef node_to_first_cpu
++#define node_to_first_cpu(node) (0)
++#endif
++#ifndef pcibus_to_cpumask
++#define pcibus_to_cpumask(bus) (cpu_online_map)
++#endif
++
++/* Cross-node load balancing interval. */
++#ifndef NODE_BALANCE_RATE
++#define NODE_BALANCE_RATE 10
++#endif
++
++#endif /* _ASM_GENERIC_TOPOLOGY_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/uaccess.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/uaccess.h 2004-11-27 15:04:26.000000000 +0100
+@@ -0,0 +1,26 @@
++#ifndef _ASM_GENERIC_UACCESS_H_
++#define _ASM_GENERIC_UACCESS_H_
++
++/*
++ * This macro should be used instead of __get_user() when accessing
++ * values at locations that are not known to be aligned.
++ */
++#define __get_user_unaligned(x, ptr) \
++({ \
++ __typeof__ (*(ptr)) __x; \
++ __copy_from_user(&__x, (ptr), sizeof(*(ptr))) ? -EFAULT : 0; \
++ (x) = __x; \
++})
++
++
++/*
++ * This macro should be used instead of __put_user() when accessing
++ * values at locations that are not known to be aligned.
++ */
++#define __put_user_unaligned(x, ptr) \
++({ \
++ __typeof__ (*(ptr)) __x = (x); \
++ __copy_to_user((ptr), &__x, sizeof(*(ptr))) ? -EFAULT : 0; \
++})
++
++#endif /* _ASM_GENERIC_UACCESS_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/unaligned.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/unaligned.h 2004-01-16 16:00:38.000000000 +0100
+@@ -0,0 +1,20 @@
++#ifndef _ASM_GENERIC_UNALIGNED_H_
++#define _ASM_GENERIC_UNALIGNED_H_
++
++/*
++ * For the benefit of those who are trying to port Linux to another
++ * architecture, here are some C-language equivalents.
++ */
++
++#include <asm/string.h>
++
++
++#define get_unaligned(ptr) \
++ ({ __typeof__(*(ptr)) __tmp; memcpy(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
++
++#define put_unaligned(val, ptr) \
++ ({ __typeof__(*(ptr)) __tmp = (val); \
++ memcpy((ptr), &__tmp, sizeof(*(ptr))); \
++ (void)0; })
++
++#endif /* _ASM_GENERIC_UNALIGNED_H */
+--- linux-libc-headers-2.6.9.1/include/asm-generic/vmlinux.lds.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/vmlinux.lds.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,84 @@
++#ifndef LOAD_OFFSET
++#define LOAD_OFFSET 0
++#endif
++
++#ifndef VMLINUX_SYMBOL
++#define VMLINUX_SYMBOL(_sym_) _sym_
++#endif
++
++#define RODATA \
++ .rodata : AT(ADDR(.rodata) - LOAD_OFFSET) { \
++ *(.rodata) *(.rodata.*) \
++ *(__vermagic) /* Kernel version magic */ \
++ } \
++ \
++ .rodata1 : AT(ADDR(.rodata1) - LOAD_OFFSET) { \
++ *(.rodata1) \
++ } \
++ \
++ /* PCI quirks */ \
++ .pci_fixup : AT(ADDR(.pci_fixup) - LOAD_OFFSET) { \
++ VMLINUX_SYMBOL(__start_pci_fixups_header) = .; \
++ *(.pci_fixup_header) \
++ VMLINUX_SYMBOL(__end_pci_fixups_header) = .; \
++ VMLINUX_SYMBOL(__start_pci_fixups_final) = .; \
++ *(.pci_fixup_final) \
++ VMLINUX_SYMBOL(__end_pci_fixups_final) = .; \
++ } \
++ \
++ /* Kernel symbol table: Normal symbols */ \
++ __ksymtab : AT(ADDR(__ksymtab) - LOAD_OFFSET) { \
++ VMLINUX_SYMBOL(__start___ksymtab) = .; \
++ *(__ksymtab) \
++ VMLINUX_SYMBOL(__stop___ksymtab) = .; \
++ } \
++ \
++ /* Kernel symbol table: GPL-only symbols */ \
++ __ksymtab_gpl : AT(ADDR(__ksymtab_gpl) - LOAD_OFFSET) { \
++ VMLINUX_SYMBOL(__start___ksymtab_gpl) = .; \
++ *(__ksymtab_gpl) \
++ VMLINUX_SYMBOL(__stop___ksymtab_gpl) = .; \
++ } \
++ \
++ /* Kernel symbol table: Normal symbols */ \
++ __kcrctab : AT(ADDR(__kcrctab) - LOAD_OFFSET) { \
++ VMLINUX_SYMBOL(__start___kcrctab) = .; \
++ *(__kcrctab) \
++ VMLINUX_SYMBOL(__stop___kcrctab) = .; \
++ } \
++ \
++ /* Kernel symbol table: GPL-only symbols */ \
++ __kcrctab_gpl : AT(ADDR(__kcrctab_gpl) - LOAD_OFFSET) { \
++ VMLINUX_SYMBOL(__start___kcrctab_gpl) = .; \
++ *(__kcrctab_gpl) \
++ VMLINUX_SYMBOL(__stop___kcrctab_gpl) = .; \
++ } \
++ \
++ /* Kernel symbol table: strings */ \
++ __ksymtab_strings : AT(ADDR(__ksymtab_strings) - LOAD_OFFSET) { \
++ *(__ksymtab_strings) \
++ } \
++ \
++ /* Built-in module parameters. */ \
++ __param : AT(ADDR(__param) - LOAD_OFFSET) { \
++ VMLINUX_SYMBOL(__start___param) = .; \
++ *(__param) \
++ VMLINUX_SYMBOL(__stop___param) = .; \
++ }
++
++#define SECURITY_INIT \
++ .security_initcall.init : { \
++ VMLINUX_SYMBOL(__security_initcall_start) = .; \
++ *(.security_initcall.init) \
++ VMLINUX_SYMBOL(__security_initcall_end) = .; \
++ }
++
++#define SCHED_TEXT \
++ VMLINUX_SYMBOL(__sched_text_start) = .; \
++ *(.sched.text) \
++ VMLINUX_SYMBOL(__sched_text_end) = .;
++
++#define LOCK_TEXT \
++ VMLINUX_SYMBOL(__lock_text_start) = .; \
++ *(.spinlock.text) \
++ VMLINUX_SYMBOL(__lock_text_end) = .;
+--- linux-libc-headers-2.6.9.1/include/asm-generic/xor.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-generic/xor.h 2004-01-16 16:00:38.000000000 +0100
+@@ -0,0 +1,718 @@
++/*
++ * include/asm-generic/xor.h
++ *
++ * Generic optimized RAID-5 checksumming functions.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2, or (at your option)
++ * any later version.
++ *
++ * You should have received a copy of the GNU General Public License
++ * (for example /usr/src/linux/COPYING); if not, write to the Free
++ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#include <asm/processor.h>
++
++static void
++xor_8regs_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
++{
++ long lines = bytes / (sizeof (long)) / 8;
++
++ do {
++ p1[0] ^= p2[0];
++ p1[1] ^= p2[1];
++ p1[2] ^= p2[2];
++ p1[3] ^= p2[3];
++ p1[4] ^= p2[4];
++ p1[5] ^= p2[5];
++ p1[6] ^= p2[6];
++ p1[7] ^= p2[7];
++ p1 += 8;
++ p2 += 8;
++ } while (--lines > 0);
++}
++
++static void
++xor_8regs_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3)
++{
++ long lines = bytes / (sizeof (long)) / 8;
++
++ do {
++ p1[0] ^= p2[0] ^ p3[0];
++ p1[1] ^= p2[1] ^ p3[1];
++ p1[2] ^= p2[2] ^ p3[2];
++ p1[3] ^= p2[3] ^ p3[3];
++ p1[4] ^= p2[4] ^ p3[4];
++ p1[5] ^= p2[5] ^ p3[5];
++ p1[6] ^= p2[6] ^ p3[6];
++ p1[7] ^= p2[7] ^ p3[7];
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ } while (--lines > 0);
++}
++
++static void
++xor_8regs_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3, unsigned long *p4)
++{
++ long lines = bytes / (sizeof (long)) / 8;
++
++ do {
++ p1[0] ^= p2[0] ^ p3[0] ^ p4[0];
++ p1[1] ^= p2[1] ^ p3[1] ^ p4[1];
++ p1[2] ^= p2[2] ^ p3[2] ^ p4[2];
++ p1[3] ^= p2[3] ^ p3[3] ^ p4[3];
++ p1[4] ^= p2[4] ^ p3[4] ^ p4[4];
++ p1[5] ^= p2[5] ^ p3[5] ^ p4[5];
++ p1[6] ^= p2[6] ^ p3[6] ^ p4[6];
++ p1[7] ^= p2[7] ^ p3[7] ^ p4[7];
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ p4 += 8;
++ } while (--lines > 0);
++}
++
++static void
++xor_8regs_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3, unsigned long *p4, unsigned long *p5)
++{
++ long lines = bytes / (sizeof (long)) / 8;
++
++ do {
++ p1[0] ^= p2[0] ^ p3[0] ^ p4[0] ^ p5[0];
++ p1[1] ^= p2[1] ^ p3[1] ^ p4[1] ^ p5[1];
++ p1[2] ^= p2[2] ^ p3[2] ^ p4[2] ^ p5[2];
++ p1[3] ^= p2[3] ^ p3[3] ^ p4[3] ^ p5[3];
++ p1[4] ^= p2[4] ^ p3[4] ^ p4[4] ^ p5[4];
++ p1[5] ^= p2[5] ^ p3[5] ^ p4[5] ^ p5[5];
++ p1[6] ^= p2[6] ^ p3[6] ^ p4[6] ^ p5[6];
++ p1[7] ^= p2[7] ^ p3[7] ^ p4[7] ^ p5[7];
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ p4 += 8;
++ p5 += 8;
++ } while (--lines > 0);
++}
++
++static void
++xor_32regs_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
++{
++ long lines = bytes / (sizeof (long)) / 8;
++
++ do {
++ register long d0, d1, d2, d3, d4, d5, d6, d7;
++ d0 = p1[0]; /* Pull the stuff into registers */
++ d1 = p1[1]; /* ... in bursts, if possible. */
++ d2 = p1[2];
++ d3 = p1[3];
++ d4 = p1[4];
++ d5 = p1[5];
++ d6 = p1[6];
++ d7 = p1[7];
++ d0 ^= p2[0];
++ d1 ^= p2[1];
++ d2 ^= p2[2];
++ d3 ^= p2[3];
++ d4 ^= p2[4];
++ d5 ^= p2[5];
++ d6 ^= p2[6];
++ d7 ^= p2[7];
++ p1[0] = d0; /* Store the result (in bursts) */
++ p1[1] = d1;
++ p1[2] = d2;
++ p1[3] = d3;
++ p1[4] = d4;
++ p1[5] = d5;
++ p1[6] = d6;
++ p1[7] = d7;
++ p1 += 8;
++ p2 += 8;
++ } while (--lines > 0);
++}
++
++static void
++xor_32regs_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3)
++{
++ long lines = bytes / (sizeof (long)) / 8;
++
++ do {
++ register long d0, d1, d2, d3, d4, d5, d6, d7;
++ d0 = p1[0]; /* Pull the stuff into registers */
++ d1 = p1[1]; /* ... in bursts, if possible. */
++ d2 = p1[2];
++ d3 = p1[3];
++ d4 = p1[4];
++ d5 = p1[5];
++ d6 = p1[6];
++ d7 = p1[7];
++ d0 ^= p2[0];
++ d1 ^= p2[1];
++ d2 ^= p2[2];
++ d3 ^= p2[3];
++ d4 ^= p2[4];
++ d5 ^= p2[5];
++ d6 ^= p2[6];
++ d7 ^= p2[7];
++ d0 ^= p3[0];
++ d1 ^= p3[1];
++ d2 ^= p3[2];
++ d3 ^= p3[3];
++ d4 ^= p3[4];
++ d5 ^= p3[5];
++ d6 ^= p3[6];
++ d7 ^= p3[7];
++ p1[0] = d0; /* Store the result (in bursts) */
++ p1[1] = d1;
++ p1[2] = d2;
++ p1[3] = d3;
++ p1[4] = d4;
++ p1[5] = d5;
++ p1[6] = d6;
++ p1[7] = d7;
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ } while (--lines > 0);
++}
++
++static void
++xor_32regs_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3, unsigned long *p4)
++{
++ long lines = bytes / (sizeof (long)) / 8;
++
++ do {
++ register long d0, d1, d2, d3, d4, d5, d6, d7;
++ d0 = p1[0]; /* Pull the stuff into registers */
++ d1 = p1[1]; /* ... in bursts, if possible. */
++ d2 = p1[2];
++ d3 = p1[3];
++ d4 = p1[4];
++ d5 = p1[5];
++ d6 = p1[6];
++ d7 = p1[7];
++ d0 ^= p2[0];
++ d1 ^= p2[1];
++ d2 ^= p2[2];
++ d3 ^= p2[3];
++ d4 ^= p2[4];
++ d5 ^= p2[5];
++ d6 ^= p2[6];
++ d7 ^= p2[7];
++ d0 ^= p3[0];
++ d1 ^= p3[1];
++ d2 ^= p3[2];
++ d3 ^= p3[3];
++ d4 ^= p3[4];
++ d5 ^= p3[5];
++ d6 ^= p3[6];
++ d7 ^= p3[7];
++ d0 ^= p4[0];
++ d1 ^= p4[1];
++ d2 ^= p4[2];
++ d3 ^= p4[3];
++ d4 ^= p4[4];
++ d5 ^= p4[5];
++ d6 ^= p4[6];
++ d7 ^= p4[7];
++ p1[0] = d0; /* Store the result (in bursts) */
++ p1[1] = d1;
++ p1[2] = d2;
++ p1[3] = d3;
++ p1[4] = d4;
++ p1[5] = d5;
++ p1[6] = d6;
++ p1[7] = d7;
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ p4 += 8;
++ } while (--lines > 0);
++}
++
++static void
++xor_32regs_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3, unsigned long *p4, unsigned long *p5)
++{
++ long lines = bytes / (sizeof (long)) / 8;
++
++ do {
++ register long d0, d1, d2, d3, d4, d5, d6, d7;
++ d0 = p1[0]; /* Pull the stuff into registers */
++ d1 = p1[1]; /* ... in bursts, if possible. */
++ d2 = p1[2];
++ d3 = p1[3];
++ d4 = p1[4];
++ d5 = p1[5];
++ d6 = p1[6];
++ d7 = p1[7];
++ d0 ^= p2[0];
++ d1 ^= p2[1];
++ d2 ^= p2[2];
++ d3 ^= p2[3];
++ d4 ^= p2[4];
++ d5 ^= p2[5];
++ d6 ^= p2[6];
++ d7 ^= p2[7];
++ d0 ^= p3[0];
++ d1 ^= p3[1];
++ d2 ^= p3[2];
++ d3 ^= p3[3];
++ d4 ^= p3[4];
++ d5 ^= p3[5];
++ d6 ^= p3[6];
++ d7 ^= p3[7];
++ d0 ^= p4[0];
++ d1 ^= p4[1];
++ d2 ^= p4[2];
++ d3 ^= p4[3];
++ d4 ^= p4[4];
++ d5 ^= p4[5];
++ d6 ^= p4[6];
++ d7 ^= p4[7];
++ d0 ^= p5[0];
++ d1 ^= p5[1];
++ d2 ^= p5[2];
++ d3 ^= p5[3];
++ d4 ^= p5[4];
++ d5 ^= p5[5];
++ d6 ^= p5[6];
++ d7 ^= p5[7];
++ p1[0] = d0; /* Store the result (in bursts) */
++ p1[1] = d1;
++ p1[2] = d2;
++ p1[3] = d3;
++ p1[4] = d4;
++ p1[5] = d5;
++ p1[6] = d6;
++ p1[7] = d7;
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ p4 += 8;
++ p5 += 8;
++ } while (--lines > 0);
++}
++
++static void
++xor_8regs_p_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
++{
++ long lines = bytes / (sizeof (long)) / 8 - 1;
++ prefetchw(p1);
++ prefetch(p2);
++
++ do {
++ prefetchw(p1+8);
++ prefetch(p2+8);
++ once_more:
++ p1[0] ^= p2[0];
++ p1[1] ^= p2[1];
++ p1[2] ^= p2[2];
++ p1[3] ^= p2[3];
++ p1[4] ^= p2[4];
++ p1[5] ^= p2[5];
++ p1[6] ^= p2[6];
++ p1[7] ^= p2[7];
++ p1 += 8;
++ p2 += 8;
++ } while (--lines > 0);
++ if (lines == 0)
++ goto once_more;
++}
++
++static void
++xor_8regs_p_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3)
++{
++ long lines = bytes / (sizeof (long)) / 8 - 1;
++ prefetchw(p1);
++ prefetch(p2);
++ prefetch(p3);
++
++ do {
++ prefetchw(p1+8);
++ prefetch(p2+8);
++ prefetch(p3+8);
++ once_more:
++ p1[0] ^= p2[0] ^ p3[0];
++ p1[1] ^= p2[1] ^ p3[1];
++ p1[2] ^= p2[2] ^ p3[2];
++ p1[3] ^= p2[3] ^ p3[3];
++ p1[4] ^= p2[4] ^ p3[4];
++ p1[5] ^= p2[5] ^ p3[5];
++ p1[6] ^= p2[6] ^ p3[6];
++ p1[7] ^= p2[7] ^ p3[7];
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ } while (--lines > 0);
++ if (lines == 0)
++ goto once_more;
++}
++
++static void
++xor_8regs_p_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3, unsigned long *p4)
++{
++ long lines = bytes / (sizeof (long)) / 8 - 1;
++
++ prefetchw(p1);
++ prefetch(p2);
++ prefetch(p3);
++ prefetch(p4);
++
++ do {
++ prefetchw(p1+8);
++ prefetch(p2+8);
++ prefetch(p3+8);
++ prefetch(p4+8);
++ once_more:
++ p1[0] ^= p2[0] ^ p3[0] ^ p4[0];
++ p1[1] ^= p2[1] ^ p3[1] ^ p4[1];
++ p1[2] ^= p2[2] ^ p3[2] ^ p4[2];
++ p1[3] ^= p2[3] ^ p3[3] ^ p4[3];
++ p1[4] ^= p2[4] ^ p3[4] ^ p4[4];
++ p1[5] ^= p2[5] ^ p3[5] ^ p4[5];
++ p1[6] ^= p2[6] ^ p3[6] ^ p4[6];
++ p1[7] ^= p2[7] ^ p3[7] ^ p4[7];
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ p4 += 8;
++ } while (--lines > 0);
++ if (lines == 0)
++ goto once_more;
++}
++
++static void
++xor_8regs_p_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3, unsigned long *p4, unsigned long *p5)
++{
++ long lines = bytes / (sizeof (long)) / 8 - 1;
++
++ prefetchw(p1);
++ prefetch(p2);
++ prefetch(p3);
++ prefetch(p4);
++ prefetch(p5);
++
++ do {
++ prefetchw(p1+8);
++ prefetch(p2+8);
++ prefetch(p3+8);
++ prefetch(p4+8);
++ prefetch(p5+8);
++ once_more:
++ p1[0] ^= p2[0] ^ p3[0] ^ p4[0] ^ p5[0];
++ p1[1] ^= p2[1] ^ p3[1] ^ p4[1] ^ p5[1];
++ p1[2] ^= p2[2] ^ p3[2] ^ p4[2] ^ p5[2];
++ p1[3] ^= p2[3] ^ p3[3] ^ p4[3] ^ p5[3];
++ p1[4] ^= p2[4] ^ p3[4] ^ p4[4] ^ p5[4];
++ p1[5] ^= p2[5] ^ p3[5] ^ p4[5] ^ p5[5];
++ p1[6] ^= p2[6] ^ p3[6] ^ p4[6] ^ p5[6];
++ p1[7] ^= p2[7] ^ p3[7] ^ p4[7] ^ p5[7];
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ p4 += 8;
++ p5 += 8;
++ } while (--lines > 0);
++ if (lines == 0)
++ goto once_more;
++}
++
++static void
++xor_32regs_p_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
++{
++ long lines = bytes / (sizeof (long)) / 8 - 1;
++
++ prefetchw(p1);
++ prefetch(p2);
++
++ do {
++ register long d0, d1, d2, d3, d4, d5, d6, d7;
++
++ prefetchw(p1+8);
++ prefetch(p2+8);
++ once_more:
++ d0 = p1[0]; /* Pull the stuff into registers */
++ d1 = p1[1]; /* ... in bursts, if possible. */
++ d2 = p1[2];
++ d3 = p1[3];
++ d4 = p1[4];
++ d5 = p1[5];
++ d6 = p1[6];
++ d7 = p1[7];
++ d0 ^= p2[0];
++ d1 ^= p2[1];
++ d2 ^= p2[2];
++ d3 ^= p2[3];
++ d4 ^= p2[4];
++ d5 ^= p2[5];
++ d6 ^= p2[6];
++ d7 ^= p2[7];
++ p1[0] = d0; /* Store the result (in bursts) */
++ p1[1] = d1;
++ p1[2] = d2;
++ p1[3] = d3;
++ p1[4] = d4;
++ p1[5] = d5;
++ p1[6] = d6;
++ p1[7] = d7;
++ p1 += 8;
++ p2 += 8;
++ } while (--lines > 0);
++ if (lines == 0)
++ goto once_more;
++}
++
++static void
++xor_32regs_p_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3)
++{
++ long lines = bytes / (sizeof (long)) / 8 - 1;
++
++ prefetchw(p1);
++ prefetch(p2);
++ prefetch(p3);
++
++ do {
++ register long d0, d1, d2, d3, d4, d5, d6, d7;
++
++ prefetchw(p1+8);
++ prefetch(p2+8);
++ prefetch(p3+8);
++ once_more:
++ d0 = p1[0]; /* Pull the stuff into registers */
++ d1 = p1[1]; /* ... in bursts, if possible. */
++ d2 = p1[2];
++ d3 = p1[3];
++ d4 = p1[4];
++ d5 = p1[5];
++ d6 = p1[6];
++ d7 = p1[7];
++ d0 ^= p2[0];
++ d1 ^= p2[1];
++ d2 ^= p2[2];
++ d3 ^= p2[3];
++ d4 ^= p2[4];
++ d5 ^= p2[5];
++ d6 ^= p2[6];
++ d7 ^= p2[7];
++ d0 ^= p3[0];
++ d1 ^= p3[1];
++ d2 ^= p3[2];
++ d3 ^= p3[3];
++ d4 ^= p3[4];
++ d5 ^= p3[5];
++ d6 ^= p3[6];
++ d7 ^= p3[7];
++ p1[0] = d0; /* Store the result (in bursts) */
++ p1[1] = d1;
++ p1[2] = d2;
++ p1[3] = d3;
++ p1[4] = d4;
++ p1[5] = d5;
++ p1[6] = d6;
++ p1[7] = d7;
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ } while (--lines > 0);
++ if (lines == 0)
++ goto once_more;
++}
++
++static void
++xor_32regs_p_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3, unsigned long *p4)
++{
++ long lines = bytes / (sizeof (long)) / 8 - 1;
++
++ prefetchw(p1);
++ prefetch(p2);
++ prefetch(p3);
++ prefetch(p4);
++
++ do {
++ register long d0, d1, d2, d3, d4, d5, d6, d7;
++
++ prefetchw(p1+8);
++ prefetch(p2+8);
++ prefetch(p3+8);
++ prefetch(p4+8);
++ once_more:
++ d0 = p1[0]; /* Pull the stuff into registers */
++ d1 = p1[1]; /* ... in bursts, if possible. */
++ d2 = p1[2];
++ d3 = p1[3];
++ d4 = p1[4];
++ d5 = p1[5];
++ d6 = p1[6];
++ d7 = p1[7];
++ d0 ^= p2[0];
++ d1 ^= p2[1];
++ d2 ^= p2[2];
++ d3 ^= p2[3];
++ d4 ^= p2[4];
++ d5 ^= p2[5];
++ d6 ^= p2[6];
++ d7 ^= p2[7];
++ d0 ^= p3[0];
++ d1 ^= p3[1];
++ d2 ^= p3[2];
++ d3 ^= p3[3];
++ d4 ^= p3[4];
++ d5 ^= p3[5];
++ d6 ^= p3[6];
++ d7 ^= p3[7];
++ d0 ^= p4[0];
++ d1 ^= p4[1];
++ d2 ^= p4[2];
++ d3 ^= p4[3];
++ d4 ^= p4[4];
++ d5 ^= p4[5];
++ d6 ^= p4[6];
++ d7 ^= p4[7];
++ p1[0] = d0; /* Store the result (in bursts) */
++ p1[1] = d1;
++ p1[2] = d2;
++ p1[3] = d3;
++ p1[4] = d4;
++ p1[5] = d5;
++ p1[6] = d6;
++ p1[7] = d7;
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ p4 += 8;
++ } while (--lines > 0);
++ if (lines == 0)
++ goto once_more;
++}
++
++static void
++xor_32regs_p_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
++ unsigned long *p3, unsigned long *p4, unsigned long *p5)
++{
++ long lines = bytes / (sizeof (long)) / 8 - 1;
++
++ prefetchw(p1);
++ prefetch(p2);
++ prefetch(p3);
++ prefetch(p4);
++ prefetch(p5);
++
++ do {
++ register long d0, d1, d2, d3, d4, d5, d6, d7;
++
++ prefetchw(p1+8);
++ prefetch(p2+8);
++ prefetch(p3+8);
++ prefetch(p4+8);
++ prefetch(p5+8);
++ once_more:
++ d0 = p1[0]; /* Pull the stuff into registers */
++ d1 = p1[1]; /* ... in bursts, if possible. */
++ d2 = p1[2];
++ d3 = p1[3];
++ d4 = p1[4];
++ d5 = p1[5];
++ d6 = p1[6];
++ d7 = p1[7];
++ d0 ^= p2[0];
++ d1 ^= p2[1];
++ d2 ^= p2[2];
++ d3 ^= p2[3];
++ d4 ^= p2[4];
++ d5 ^= p2[5];
++ d6 ^= p2[6];
++ d7 ^= p2[7];
++ d0 ^= p3[0];
++ d1 ^= p3[1];
++ d2 ^= p3[2];
++ d3 ^= p3[3];
++ d4 ^= p3[4];
++ d5 ^= p3[5];
++ d6 ^= p3[6];
++ d7 ^= p3[7];
++ d0 ^= p4[0];
++ d1 ^= p4[1];
++ d2 ^= p4[2];
++ d3 ^= p4[3];
++ d4 ^= p4[4];
++ d5 ^= p4[5];
++ d6 ^= p4[6];
++ d7 ^= p4[7];
++ d0 ^= p5[0];
++ d1 ^= p5[1];
++ d2 ^= p5[2];
++ d3 ^= p5[3];
++ d4 ^= p5[4];
++ d5 ^= p5[5];
++ d6 ^= p5[6];
++ d7 ^= p5[7];
++ p1[0] = d0; /* Store the result (in bursts) */
++ p1[1] = d1;
++ p1[2] = d2;
++ p1[3] = d3;
++ p1[4] = d4;
++ p1[5] = d5;
++ p1[6] = d6;
++ p1[7] = d7;
++ p1 += 8;
++ p2 += 8;
++ p3 += 8;
++ p4 += 8;
++ p5 += 8;
++ } while (--lines > 0);
++ if (lines == 0)
++ goto once_more;
++}
++
++static struct xor_block_template xor_block_8regs = {
++ .name = "8regs",
++ .do_2 = xor_8regs_2,
++ .do_3 = xor_8regs_3,
++ .do_4 = xor_8regs_4,
++ .do_5 = xor_8regs_5,
++};
++
++static struct xor_block_template xor_block_32regs = {
++ .name = "32regs",
++ .do_2 = xor_32regs_2,
++ .do_3 = xor_32regs_3,
++ .do_4 = xor_32regs_4,
++ .do_5 = xor_32regs_5,
++};
++
++static struct xor_block_template xor_block_8regs_p = {
++ .name = "8regs_prefetch",
++ .do_2 = xor_8regs_p_2,
++ .do_3 = xor_8regs_p_3,
++ .do_4 = xor_8regs_p_4,
++ .do_5 = xor_8regs_p_5,
++};
++
++static struct xor_block_template xor_block_32regs_p = {
++ .name = "32regs_prefetch",
++ .do_2 = xor_32regs_p_2,
++ .do_3 = xor_32regs_p_3,
++ .do_4 = xor_32regs_p_4,
++ .do_5 = xor_32regs_p_5,
++};
++
++#define XOR_TRY_TEMPLATES \
++ do { \
++ xor_speed(&xor_block_8regs); \
++ xor_speed(&xor_block_8regs_p); \
++ xor_speed(&xor_block_32regs); \
++ xor_speed(&xor_block_32regs_p); \
++ } while (0)
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ChangeLog 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ChangeLog 2004-06-29 11:18:14.000000000 +0200
+@@ -0,0 +1,14 @@
++2004-06-29 Ken Hill <khill@microtronix.com>
++
++ * bitops.h (find_next_zero_bit): Fix problem with with masking for found_first
++ handling. The masking of the upper bits for size < 32 bits would set all
++ the bits to 1. Removing any zero's there may have been.
++
++2004-06-02 Ken Hill <khill@microtronix.com>
++
++ * processor.h (TASK_SIZE): Change na_sdram_end to nasys_program_mem_end to remove
++ dependancy on quartus memory component name.
++
++ * page.h (PAGE_OFFSET): Change na_sdram to nasys_program_mem to remove
++ dependancy on quartus memory component name.
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/a.out.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/a.out.h 2004-03-30 14:35:04.000000000 +0200
+@@ -0,0 +1,85 @@
++/* $Id: a.out.h,v 1.4 2004/03/30 19:35:04 ken-h Exp $ */
++/*
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#ifndef __NIOS2NOMMU_A_OUT_H__
++#define __NIOS2NOMMU_A_OUT_H__
++
++#define SPARC_PGSIZE 0x1000 /* Thanks to the sun4 architecture... */
++#define SEGMENT_SIZE SPARC_PGSIZE /* whee... */
++
++struct exec {
++ unsigned char a_dynamic:1; /* A __DYNAMIC is in this image */
++ unsigned char a_toolversion:7;
++ unsigned char a_machtype;
++ unsigned short a_info;
++ unsigned long a_text; /* length of text, in bytes */
++ unsigned long a_data; /* length of data, in bytes */
++ unsigned long a_bss; /* length of bss, in bytes */
++ unsigned long a_syms; /* length of symbol table, in bytes */
++ unsigned long a_entry; /* where program begins */
++ unsigned long a_trsize;
++ unsigned long a_drsize;
++};
++
++#define INIT_EXEC { \
++ .a_dynamic = 0, \
++ .a_toolversion = 0, \
++ .a_machtype = 0, \
++ .a_info = 0, \
++ .a_text = 0, \
++ .a_data = 0, \
++ .a_bss = 0, \
++ .a_syms = 0, \
++ .a_entry = 0, \
++ .a_trsize = 0, \
++ .a_drsize = 0, \
++}
++
++/* Where in the file does the text information begin? */
++#define N_TXTOFF(x) (N_MAGIC(x) == ZMAGIC ? 0 : sizeof (struct exec))
++
++/* Where do the Symbols start? */
++#define N_SYMOFF(x) (N_TXTOFF(x) + (x).a_text + \
++ (x).a_data + (x).a_trsize + \
++ (x).a_drsize)
++
++/* Where does text segment go in memory after being loaded? */
++#define N_TXTADDR(x) (((N_MAGIC(x) == ZMAGIC) && \
++ ((x).a_entry < SPARC_PGSIZE)) ? \
++ 0 : SPARC_PGSIZE)
++
++/* And same for the data segment.. */
++#define N_DATADDR(x) (N_MAGIC(x)==OMAGIC ? \
++ (N_TXTADDR(x) + (x).a_text) \
++ : (_N_SEGMENT_ROUND (_N_TXTENDADDR(x))))
++
++#define N_TRSIZE(a) ((a).a_trsize)
++#define N_DRSIZE(a) ((a).a_drsize)
++#define N_SYMSIZE(a) ((a).a_syms)
++
++#ifdef __KERNEL__
++
++#define STACK_TOP TASK_SIZE
++
++#endif
++
++#endif /* __NIOS2NOMMU_A_OUT_H__ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/asm-macros.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/asm-macros.h 2004-05-14 13:32:04.000000000 +0200
+@@ -0,0 +1,331 @@
++/*
++ * Macro used to simplify coding multi-line assembler.
++ * Some of the bit test macro can simplify down to one line
++ * depending on the mask value.
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++/*
++ * ANDs reg2 with mask and places the result in reg1.
++ *
++ * You cannnot use the same register for reg1 & reg2.
++ */
++
++.macro ANDI32 reg1,reg2,mask
++ .if \mask & 0xffff
++ .if \mask & 0xffff0000
++ movhi \reg1,%hi(\mask)
++ movui \reg1,%lo(\mask)
++ and \reg1,\reg1,\reg2
++ .else
++ andi \reg1,\reg2,%lo(\mask)
++ .endif
++ .else
++ andhi \reg1,\reg2,%hi(\mask)
++ .endif
++.endm
++
++/*
++ * ORs reg2 with mask and places the result in reg1.
++ *
++ * It is safe to use the same register for reg1 & reg2.
++ */
++
++.macro ORI32 reg1,reg2,mask
++ .if \mask & 0xffff
++ .if \mask & 0xffff0000
++ orhi \reg1,\reg2,%hi(\mask)
++ ori \reg1,\reg2,%lo(\mask)
++ .else
++ ori \reg1,\reg2,%lo(\mask)
++ .endif
++ .else
++ orhi \reg1,\reg2,%hi(\mask)
++ .endif
++.endm
++
++/*
++ * XORs reg2 with mask and places the result in reg1.
++ *
++ * It is safe to use the same register for reg1 & reg2.
++ */
++
++.macro XORI32 reg1,reg2,mask
++ .if \mask & 0xffff
++ .if \mask & 0xffff0000
++ xorhi \reg1,\reg2,%hi(\mask)
++ xori \reg1,\reg1,%lo(\mask)
++ .else
++ xori \reg1,\reg2,%lo(\mask)
++ .endif
++ .else
++ xorhi \reg1,\reg2,%hi(\mask)
++ .endif
++.endm
++
++/*
++ * This is a support macro for BTBZ & BTBNZ. It checks
++ * the bit to make sure it is valid 32 value.
++ *
++ * It is safe to use the same register for reg1 & reg2.
++ */
++
++.macro BT reg1,reg2,bit
++.if \bit > 31
++ .err
++.else
++ .if \bit < 16
++ andi \reg1,\reg2,(1 << \bit)
++ .else
++ andhi \reg1,\reg2,(1 << (\bit - 16))
++ .endif
++.endif
++.endm
++
++/*
++ * Tests the bit in reg2 and branches to label if the
++ * bit is zero. The result of the bit test is stored in reg1.
++ *
++ * It is safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTBZ reg1,reg2,bit,label
++ BT \reg1,\reg2,\bit
++ beq \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bit in reg2 and branches to label if the
++ * bit is non-zero. The result of the bit test is stored in reg1.
++ *
++ * It is safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTBNZ reg1,reg2,bit,label
++ BT \reg1,\reg2,\bit
++ bne \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bit in reg2 and then compliments the bit in reg2.
++ * The result of the bit test is stored in reg1.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTC reg1,reg2,bit
++.if \bit > 31
++ .err
++.else
++ .if \bit < 16
++ andi \reg1,\reg2,(1 << \bit)
++ xori \reg2,\reg2,(1 << \bit)
++ .else
++ andhi \reg1,\reg2,(1 << (\bit - 16))
++ xorhi \reg2,\reg2,(1 << (\bit - 16))
++ .endif
++.endif
++.endm
++
++/*
++ * Tests the bit in reg2 and then sets the bit in reg2.
++ * The result of the bit test is stored in reg1.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTS reg1,reg2,bit
++.if \bit > 31
++ .err
++.else
++ .if \bit < 16
++ andi \reg1,\reg2,(1 << \bit)
++ ori \reg2,\reg2,(1 << \bit)
++ .else
++ andhi \reg1,\reg2,(1 << (\bit - 16))
++ orhi \reg2,\reg2,(1 << (\bit - 16))
++ .endif
++.endif
++.endm
++
++/*
++ * Tests the bit in reg2 and then resets the bit in reg2.
++ * The result of the bit test is stored in reg1.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTR reg1,reg2,bit
++.if \bit > 31
++ .err
++.else
++ .if \bit < 16
++ andi \reg1,\reg2,(1 << \bit)
++ andi \reg2,\reg2,%lo(~(1 << \bit))
++ .else
++ andhi \reg1,\reg2,(1 << (\bit - 16))
++ andhi \reg2,\reg2,%lo(~(1 << (\bit - 16)))
++ .endif
++.endif
++.endm
++
++/*
++ * Tests the bit in reg2 and then compliments the bit in reg2.
++ * The result of the bit test is stored in reg1. If the
++ * original bit was zero it branches to label.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTCBZ reg1,reg2,bit,label
++ BTC \reg1,\reg2,\bit
++ beq \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bit in reg2 and then compliments the bit in reg2.
++ * The result of the bit test is stored in reg1. If the
++ * original bit was non-zero it branches to label.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTCBNZ reg1,reg2,bit,label
++ BTC \reg1,\reg2,\bit
++ bne \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bit in reg2 and then sets the bit in reg2.
++ * The result of the bit test is stored in reg1. If the
++ * original bit was zero it branches to label.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTSBZ reg1,reg2,bit,label
++ BTS \reg1,\reg2,\bit
++ beq \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bit in reg2 and then sets the bit in reg2.
++ * The result of the bit test is stored in reg1. If the
++ * original bit was non-zero it branches to label.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTSBNZ reg1,reg2,bit,label
++ BTS \reg1,\reg2,\bit
++ bne \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bit in reg2 and then resets the bit in reg2.
++ * The result of the bit test is stored in reg1. If the
++ * original bit was zero it branches to label.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTRBZ reg1,reg2,bit,label
++ BTR \reg1,\reg2,\bit
++ bne \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bit in reg2 and then resets the bit in reg2.
++ * The result of the bit test is stored in reg1. If the
++ * original bit was non-zero it branches to label.
++ *
++ * It is NOT safe to use the same register for reg1 & reg2.
++ */
++
++.macro BTRBNZ reg1,reg2,bit,label
++ BTR \reg1,\reg2,\bit
++ bne \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bits in mask against reg2 stores the result in reg1.
++ * If the all the bits in the mask are zero it branches to label.
++ *
++ * It is safe to use the same register for reg1 & reg2.
++ */
++
++.macro TSTBZ reg1,reg2,mask,label
++ ANDI32 \reg1,\reg2,\mask
++ beq \reg1,r0,\label
++.endm
++
++/*
++ * Tests the bits in mask against reg2 stores the result in reg1.
++ * If the any of the bits in the mask are 1 it branches to label.
++ *
++ * It is safe to use the same register for reg1 & reg2.
++ */
++
++.macro TSTBNZ reg1,reg2,mask,label
++ ANDI32 \reg1,\reg2,\mask
++ bne \reg1,r0,\label
++.endm
++
++/*
++ * Pushes reg onto the stack.
++ */
++
++.macro PUSH reg
++ addi sp,sp,-4
++ stw \reg,0(sp)
++.endm
++
++/*
++ * Pops the top of the stack into reg.
++ */
++
++.macro POP reg
++ ldw \reg,0(sp)
++ addi sp,sp,4
++.endm
++
++/*
++ * Clears reg
++ */
++
++.macro CLR reg
++ mov \reg,r0
++.endm
++
++/*
++ * The preprocessor macro does not work for
++ * the nios2 compiler. Undefine ENTRY and define
++ * a real assembler macro.
++ */
++#undef ENTRY
++#define ENTRY(name) ASM_ENTRY name
++
++.macro ASM_ENTRY name
++.globl \name
++__ALIGN
++ \name:
++.endm
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/atomic.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/atomic.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,190 @@
++//vic - add 'atomic_add/sub_return', 'atomic_add_negative'
++//vic from v850 architecture
++
++/* atomic.h:
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ * Copyright (C) 2001 Vic Phillips (vic@microtronix.com)
++ *
++ * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __ARCH_NIOS2NOMMU_ATOMIC__
++#define __ARCH_NIOS2NOMMU_ATOMIC__
++
++#include <asm/system.h>
++
++typedef struct { int counter; } atomic_t;
++#define ATOMIC_INIT(i) { (i) }
++
++#define atomic_read(v) ((v)->counter)
++#define atomic_set(v, i) (((v)->counter) = i)
++
++
++extern __inline__ void atomic_add(int i, atomic_t *v)
++{
++ unsigned long flags;
++
++ local_irq_save(flags);
++ v->counter += i;
++ local_irq_restore(flags);
++}
++
++extern __inline__ int atomic_add_negative(int i, atomic_t *v)
++{
++ unsigned long flags;
++ int result;
++
++ local_irq_save(flags);
++ v->counter += i;
++ result = (v->counter < 0);
++ local_irq_restore(flags);
++ return result;
++}
++
++extern __inline__ void atomic_sub(int i, atomic_t *v)
++{
++ unsigned long flags;
++
++ local_irq_save(flags);
++ v->counter -= i;
++ local_irq_restore(flags);
++}
++
++extern __inline__ int atomic_sub_and_test(int i, atomic_t *v)
++{
++ int result;
++ unsigned long flags;
++
++ local_irq_save(flags);
++ v->counter -= i;
++ result = (v->counter == 0);
++ local_irq_restore(flags);
++ return result;
++}
++
++extern __inline__ void atomic_inc(atomic_t *v)
++{
++ unsigned long flags;
++
++ local_irq_save(flags);
++ v->counter += 1;
++ local_irq_restore(flags);
++}
++
++extern __inline__ int atomic_inc_and_test(atomic_t *v)
++{
++ unsigned long flags;
++ int result;
++
++ local_irq_save(flags);
++ v->counter += 1;
++ result = (v->counter == 0);
++ local_irq_restore(flags);
++ return result;
++}
++
++extern __inline__ void atomic_dec(atomic_t *v)
++{
++ int i = 1; /* the compiler optimizes better this way */
++ unsigned long flags;
++
++ local_irq_save(flags);
++ v->counter -= i;
++ local_irq_restore(flags);
++}
++
++extern __inline__ int atomic_dec_and_test(atomic_t *v)
++{
++ int result;
++ int i = 1; /* the compiler optimizes better this way */
++ unsigned long flags;
++
++ local_irq_save(flags);
++ v->counter -= i;
++ result = (v->counter == 0);
++ local_irq_restore(flags);
++ return result;
++}
++
++extern __inline__ int atomic_inc_return(atomic_t *v)
++{
++ int result;
++ unsigned long flags;
++
++ local_irq_save(flags);
++ result = ++v->counter;
++ local_irq_restore(flags);
++ return result;
++}
++
++extern __inline__ int atomic_dec_return(atomic_t *v)
++{
++ int result;
++ int i = 1; /* the compiler optimizes better this way */
++ unsigned long flags;
++
++ local_irq_save(flags);
++ v->counter -= i;
++ result = v->counter;
++ local_irq_restore(flags);
++ return result;
++}
++
++extern __inline__ int atomic_add_return (int i, volatile atomic_t *v)
++{
++ int res;
++ unsigned long flags;
++
++ local_irq_save(flags);
++ res = v->counter + i;
++ v->counter = res;
++ local_irq_restore(flags);
++
++ return res;
++}
++
++static __inline__ int atomic_sub_return (int i, volatile atomic_t *v)
++{
++ int res;
++ unsigned long flags;
++
++ local_irq_save(flags);
++ res = v->counter - i;
++ v->counter = res;
++ local_irq_restore(flags);
++
++ return res;
++}
++
++#define atomic_dec_return(v) atomic_sub_return(1,(v))
++#define atomic_inc_return(v) atomic_add_return(1,(v))
++
++/* Atomic operations are already serializing */
++#define smp_mb__before_atomic_dec() barrier()
++#define smp_mb__after_atomic_dec() barrier()
++#define smp_mb__before_atomic_inc() barrier()
++#define smp_mb__after_atomic_inc() barrier()
++
++
++#endif /* !(__ARCH_NIOS2NOMMU_ATOMIC__) */
++
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/bitops.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/bitops.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,472 @@
++#ifndef _ASM_NIOS_BITOPS_H_
++#define _ASM_NIOS_BITOPS_H_
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/bitops.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#ifdef __KERNEL__
++#include <linux/config.h>
++#include <linux/compiler.h>
++#include <asm/byteorder.h> /* swab32 */
++#include <asm/system.h>
++#endif
++
++/*
++ * Adapted to NIOS from generic bitops.h:
++ *
++ * For the benefit of those who are trying to port Linux to another
++ * architecture, here are some C-language equivalents. You should
++ * recode these in the native assembly language, if at all possible.
++ * To guarantee atomicity, these routines call cli() and sti() to
++ * disable interrupts while they operate. (You have to provide inline
++ * routines to cli() and sti().)
++ *
++ * Also note, these routines assume that you have 32 bit integers.
++ * You will have to change this if you are trying to port Linux to the
++ * Alpha architecture or to a Cray. :-)
++ *
++ * C language equivalents written by Theodore Ts'o, 9/26/92
++ */
++
++/*
++ * Generic ffs().
++ */
++static inline int ffs(int x)
++{
++ int r = 1;
++
++ if (!x)
++ return 0;
++ if (!(x & 0xffff)) {
++ x >>= 16;
++ r += 16;
++ }
++ if (!(x & 0xff)) {
++ x >>= 8;
++ r += 8;
++ }
++ if (!(x & 0xf)) {
++ x >>= 4;
++ r += 4;
++ }
++ if (!(x & 3)) {
++ x >>= 2;
++ r += 2;
++ }
++ if (!(x & 1)) {
++ x >>= 1;
++ r += 1;
++ }
++ return r;
++}
++
++/*
++ * Generic __ffs().
++ */
++static inline int __ffs(int x)
++{
++ int r = 0;
++
++ if (!x)
++ return 0;
++ if (!(x & 0xffff)) {
++ x >>= 16;
++ r += 16;
++ }
++ if (!(x & 0xff)) {
++ x >>= 8;
++ r += 8;
++ }
++ if (!(x & 0xf)) {
++ x >>= 4;
++ r += 4;
++ }
++ if (!(x & 3)) {
++ x >>= 2;
++ r += 2;
++ }
++ if (!(x & 1)) {
++ x >>= 1;
++ r += 1;
++ }
++ return r;
++}
++
++/*
++ * fls: find last bit set.
++ */
++#define fls(x) generic_fls(x)
++
++
++/*
++ * Every architecture must define this function. It's the fastest
++ * way of searching a 140-bit bitmap where the first 100 bits are
++ * unlikely to be set. It's guaranteed that at least one of the 140
++ * bits is cleared.
++ */
++static inline int sched_find_first_bit(unsigned long *b)
++{
++ if (unlikely(b[0]))
++ return __ffs(b[0]);
++ if (unlikely(b[1]))
++ return __ffs(b[1]) + 32;
++ if (unlikely(b[2]))
++ return __ffs(b[2]) + 64;
++ if (b[3])
++ return __ffs(b[3]) + 96;
++ return __ffs(b[4]) + 128;
++}
++
++/*
++ * ffz = Find First Zero in word. Undefined if no zero exists,
++ * so code should check against ~0UL first..
++ */
++static __inline__ unsigned long ffz(unsigned long word)
++{
++ unsigned long result = 0;
++
++ while(word & 1) {
++ result++;
++ word >>= 1;
++ }
++ return result;
++}
++
++
++static __inline__ void set_bit(int nr, volatile unsigned long * addr)
++{
++ int * a = (int *) addr;
++ int mask;
++ unsigned long flags;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ local_irq_save(flags);
++ *a |= mask;
++ local_irq_restore(flags);
++}
++
++static __inline__ void __set_bit(int nr, volatile unsigned long * addr)
++{
++ int * a = (int *) addr;
++ int mask;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ *a |= mask;
++}
++
++/*
++ * clear_bit() doesn't provide any barrier for the compiler.
++ */
++#define smp_mb__before_clear_bit() barrier()
++#define smp_mb__after_clear_bit() barrier()
++
++static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
++{
++ int * a = (int *) addr;
++ int mask;
++ unsigned long flags;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ local_irq_save(flags);
++ *a &= ~mask;
++ local_irq_restore(flags);
++}
++
++static __inline__ void __clear_bit(int nr, volatile unsigned long * addr)
++{
++ int * a = (int *) addr;
++ int mask;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ *a &= ~mask;
++}
++
++static __inline__ void change_bit(int nr, volatile unsigned long * addr)
++{
++ int mask, flags;
++ unsigned long *ADDR = (unsigned long *) addr;
++
++ ADDR += nr >> 5;
++ mask = 1 << (nr & 31);
++ local_irq_save(flags);
++ *ADDR ^= mask;
++ local_irq_restore(flags);
++}
++
++static __inline__ void __change_bit(int nr, volatile unsigned long * addr)
++{
++ int mask;
++ unsigned long *ADDR = (unsigned long *) addr;
++
++ ADDR += nr >> 5;
++ mask = 1 << (nr & 31);
++ *ADDR ^= mask;
++}
++
++static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
++{
++ int mask, retval;
++ volatile unsigned int *a = (volatile unsigned int *) addr;
++ unsigned long flags;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ local_irq_save(flags);
++ retval = (mask & *a) != 0;
++ *a |= mask;
++ local_irq_restore(flags);
++
++ return retval;
++}
++
++static __inline__ int __test_and_set_bit(int nr, volatile unsigned long * addr)
++{
++ int mask, retval;
++ volatile unsigned int *a = (volatile unsigned int *) addr;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ retval = (mask & *a) != 0;
++ *a |= mask;
++ return retval;
++}
++
++static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
++{
++ int mask, retval;
++ volatile unsigned int *a = (volatile unsigned int *) addr;
++ unsigned long flags;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ local_irq_save(flags);
++ retval = (mask & *a) != 0;
++ *a &= ~mask;
++ local_irq_restore(flags);
++
++ return retval;
++}
++
++static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long * addr)
++{
++ int mask, retval;
++ volatile unsigned int *a = (volatile unsigned int *) addr;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ retval = (mask & *a) != 0;
++ *a &= ~mask;
++ return retval;
++}
++
++static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
++{
++ int mask, retval;
++ volatile unsigned int *a = (volatile unsigned int *) addr;
++ unsigned long flags;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ local_irq_save(flags);
++ retval = (mask & *a) != 0;
++ *a ^= mask;
++ local_irq_restore(flags);
++
++ return retval;
++}
++
++static __inline__ int __test_and_change_bit(int nr, volatile unsigned long * addr)
++{
++ int mask, retval;
++ volatile unsigned int *a = (volatile unsigned int *) addr;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ retval = (mask & *a) != 0;
++ *a ^= mask;
++ return retval;
++}
++
++/*
++ * This routine doesn't need to be atomic.
++ */
++static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr)
++{
++ return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
++}
++
++static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
++{
++ int * a = (int *) addr;
++ int mask;
++
++ a += nr >> 5;
++ mask = 1 << (nr & 0x1f);
++ return ((mask & *a) != 0);
++}
++
++#define test_bit(nr,addr) \
++(__builtin_constant_p(nr) ? \
++ __constant_test_bit((nr),(unsigned long *)(addr)) : \
++ __test_bit((nr),(unsigned long *)(addr)))
++
++
++/* find_next_zero_bit() finds the first zero bit in a bit string of length
++ * 'size' bits, starting the search at bit 'offset'. This is largely based
++ * on Linus's ALPHA routines, which are pretty portable BTW.
++ */
++
++extern __inline__ unsigned long find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
++{
++ unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
++ unsigned long result = offset & ~31UL;
++ unsigned long tmp;
++
++ if (offset >= size)
++ return size;
++ size -= result;
++ offset &= 31UL;
++ if (offset) {
++ tmp = *(p++);
++ tmp |= ~0UL >> (32-offset);
++ if (size < 32)
++ goto found_first;
++ if (~tmp)
++ goto found_middle;
++ size -= 32;
++ result += 32;
++ }
++ while (size & ~31UL) {
++ if (~(tmp = *(p++)))
++ goto found_middle;
++ result += 32;
++ size -= 32;
++ }
++ if (!size)
++ return result;
++ tmp = *p;
++
++found_first:
++ tmp |= ~0UL << size;
++ if (tmp == ~0UL)
++ return result + size;
++found_middle:
++ return result + ffz(tmp);
++}
++
++/*
++ * Find next one bit in a bitmap reasonably efficiently.
++ */
++extern __inline__ unsigned long find_next_bit(const unsigned long *addr,
++ unsigned long size, unsigned long offset)
++{
++ unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
++ unsigned int result = offset & ~31UL;
++ unsigned int tmp;
++
++ if (offset >= size)
++ return size;
++ size -= result;
++ offset &= 31UL;
++ if (offset) {
++ tmp = *p++;
++ tmp &= ~0UL << offset;
++ if (size < 32)
++ goto found_first;
++ if (tmp)
++ goto found_middle;
++ size -= 32;
++ result += 32;
++ }
++ while (size >= 32) {
++ if ((tmp = *p++) != 0)
++ goto found_middle;
++ result += 32;
++ size -= 32;
++ }
++ if (!size)
++ return result;
++ tmp = *p;
++
++found_first:
++ tmp &= ~0UL >> (32 - size);
++ if (tmp == 0UL) /* Are any bits set? */
++ return result + size; /* Nope. */
++found_middle:
++ return result + __ffs(tmp);
++}
++
++/*
++ * hweightN: returns the hamming weight (i.e. the number
++ * of bits set) of a N-bit word
++ */
++
++#define hweight32(x) generic_hweight32(x)
++#define hweight16(x) generic_hweight16(x)
++#define hweight8(x) generic_hweight8(x)
++
++/* Linus sez that gcc can optimize the following correctly, we'll see if this
++ * holds on the Sparc as it does for the ALPHA.
++ */
++
++#define find_first_zero_bit(addr, size) \
++ find_next_zero_bit((addr), (size), 0)
++#define find_first_bit(addr, size) \
++ find_next_bit((addr), (size), 0)
++
++/* Now for the ext2 filesystem bit operations and helper routines.
++ *
++ * Both NIOS and ext2 are little endian, so these are the same as above.
++ */
++
++#define ext2_set_bit test_and_set_bit
++#define ext2_clear_bit test_and_clear_bit
++#define ext2_test_bit test_bit
++
++#define ext2_set_bit_atomic(lock, nr, addr) \
++ ({ \
++ int ret; \
++ spin_lock(lock); \
++ ret = ext2_set_bit((nr),(unsigned long *) (addr)); \
++ spin_unlock(lock); \
++ ret; \
++ })
++
++#define ext2_clear_bit_atomic(lock, nr, addr) \
++ ({ \
++ int ret; \
++ spin_lock(lock); \
++ ret = ext2_clear_bit((nr),(unsigned long *) (addr)); \
++ spin_unlock(lock); \
++ ret; \
++ })
++
++#define ext2_find_first_zero_bit find_first_zero_bit
++#define ext2_find_next_zero_bit find_next_zero_bit
++
++#endif /* _ASM_NIOS_BITOPS_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/bootinfo.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/bootinfo.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,2 @@
++
++/* Nothing for nios2nommu */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/bug.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/bug.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,48 @@
++#ifndef _NIOS2NOMMU_BUG_H
++#define _NIOS2NOMMU_BUG_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/bug.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#define BUG() do { \
++ printk("%s(%d): kernel BUG!\n", __FILE__, __LINE__); \
++} while (0)
++
++#define BUG_ON(condition) do { \
++ if (unlikely((condition)!=0)) \
++ BUG(); \
++} while(0)
++
++#define PAGE_BUG(page) do { \
++ BUG(); \
++} while (0)
++
++#define WARN_ON(condition) do { \
++ if (unlikely((condition)!=0)) { \
++ printk("Badness in %s at %s:%d\n", __FUNCTION__, __FILE__, __LINE__); \
++ dump_stack(); \
++ } \
++} while (0)
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/bugs.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/bugs.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,40 @@
++#ifndef __ASM_NIOS_BUGS_H
++#define __ASM_NIOS_BUGS_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/bugs.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 1994 Linus Torvalds
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++/*
++ * This is included by init/main.c to check for architecture-dependent bugs.
++ *
++ * Needs:
++ * void check_bugs(void);
++ */
++
++static void check_bugs(void)
++{
++}
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/byteorder.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/byteorder.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,38 @@
++#ifndef __ASM_NIOS_BYTEORDER_H
++#define __ASM_NIOS_BYTEORDER_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/byteorder.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/types.h>
++
++#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
++# define __BYTEORDER_HAS_U64__
++# define __SWAB_64_THRU_32__
++#endif
++
++#include <linux/byteorder/little_endian.h>
++
++#endif
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/cache.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/cache.h 2004-02-26 13:25:08.000000000 +0100
+@@ -0,0 +1,34 @@
++/*
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#ifndef __ARCH_NIOS2NOMMU_CACHE_H
++#define __ARCH_NIOS2NOMMU_CACHE_H
++
++#include <asm/nios.h>
++
++/* bytes per L1 cache line */
++#define L1_CACHE_BYTES nasys_icache_line_size /* this need to be at least 1 */
++
++
++#define __cacheline_aligned
++#define ____cacheline_aligned
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/cachectl.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/cachectl.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,36 @@
++/*
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _NIOS2NOMMU_CACHECTL_H
++#define _NIOS2NOMMU_CACHECTL_H
++
++/* Definitions for the cacheflush system call. */
++
++#define FLUSH_SCOPE_LINE 1 /* Flush a cache line */
++#define FLUSH_SCOPE_PAGE 2 /* Flush a page */
++#define FLUSH_SCOPE_ALL 3 /* Flush the whole cache -- superuser only */
++
++#define FLUSH_CACHE_DATA 1 /* Writeback and flush data cache */
++#define FLUSH_CACHE_INSN 2 /* Flush instruction cache */
++#define FLUSH_CACHE_BOTH 3 /* Flush both caches */
++
++#endif /* _NIOS2NOMMU_CACHECTL_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/cacheflush.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/cacheflush.h 2004-05-14 13:32:04.000000000 +0200
+@@ -0,0 +1,56 @@
++#ifndef _NIOS2NOMMU_CACHEFLUSH_H
++#define _NIOS2NOMMU_CACHEFLUSH_H
++
++/*
++ * Ported from m68knommu.
++ *
++ * (C) Copyright 2003, Microtronix Datacom Ltd.
++ * (C) Copyright 2000-2002, Greg Ungerer <gerg@snapgear.com>
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#include <linux/mm.h>
++
++extern void cache_push (unsigned long vaddr, int len);
++extern void dcache_push (unsigned long vaddr, int len);
++extern void icache_push (unsigned long vaddr, int len);
++extern void cache_push_all (void);
++
++#define flush_cache_all() __flush_cache_all()
++#define flush_cache_mm(mm) do { } while (0)
++#define flush_cache_range(vma, start, end) do { } while (0)
++#define flush_cache_page(vma, vmaddr) do { } while (0)
++#define flush_dcache_range(start,end) dcache_push(start, end - start)
++#define flush_dcache_page(page) do { } while (0)
++#define flush_icache_range(start,end) cache_push(start, end - start)
++#define flush_icache_page(vma,pg) do { } while (0)
++#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
++
++#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
++ memcpy(dst, src, len)
++#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
++ memcpy(dst, src, len)
++
++
++extern inline void __flush_cache_all(void)
++{
++ cache_push_all();
++}
++
++#endif /* _NIOS2NOMMU_CACHEFLUSH_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/checksum.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/checksum.h 2005-01-10 13:35:22.000000000 +0100
+@@ -0,0 +1,320 @@
++#ifndef __NIOS2_CHECKSUM_H
++#define __NIOS2_CHECKSUM_H
++
++/* checksum.h: IP/UDP/TCP checksum routines on the NIOS.
++ *
++ * Copyright(C) 1995 Linus Torvalds
++ * Copyright(C) 1995 Miguel de Icaza
++ * Copyright(C) 1996 David S. Miller
++ * Copyright(C) 2001 Ken Hill
++ * Copyright(C) 2004 Microtronix Datacom Ltd.
++ *
++ * derived from:
++ * Alpha checksum c-code
++ * ix86 inline assembly
++ * Spar nommu
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++
++/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
++
++/*
++ * computes the checksum of the TCP/UDP pseudo-header
++ * returns a 16-bit checksum, already complemented
++ */
++
++extern inline unsigned short csum_tcpudp_magic(unsigned long saddr,
++ unsigned long daddr,
++ unsigned short len,
++ unsigned short proto,
++ unsigned int sum)
++{
++ barrier();
++ __asm__ __volatile__(
++" add %0, %3, %0\n"
++" bgeu %0, %3, 1f\n"
++" addi %0, %0, 1\n"
++"1: add %0, %4, %0\n"
++" bgeu %0, %4, 1f\n"
++" addi %0, %0, 1\n"
++"1: add %0, %5, %0\n"
++" bgeu %0, %5, 1f\n"
++" addi %0, %0, 1\n"
++"1:\n"
++/*
++ We need the carry from the addition of 16-bit
++ significant addition, so we zap out the low bits
++ in one half, zap out the high bits in another,
++ shift them both up to the top 16-bits of a word
++ and do the carry producing addition, finally
++ shift the result back down to the low 16-bits.
++
++ Actually, we can further optimize away two shifts
++ because we know the low bits of the original
++ value will be added to zero-only bits so cannot
++ affect the addition result nor the final carry
++ bit.
++*/
++" slli %1,%0, 16\n" /* Need a copy to fold with */
++ /* Bring the LOW 16 bits up */
++" add %0, %1, %0\n" /* add and set carry, neat eh? */
++" cmpltu r15, %0, %1\n" /* get remaining carry bit */
++" srli %0, %0, 16\n" /* shift back down the result */
++" add %0, %0, r15\n"
++" nor %0, %0, %0\n" /* negate */
++ : "=&r" (sum), "=&r" (saddr)
++ : "0" (sum), "1" (saddr), "r" (ntohl(len+proto)), "r" (daddr)
++ : "r15");
++ return ((unsigned short) sum);
++ barrier();
++}
++
++
++/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
++
++
++ extern inline unsigned short from32to16(unsigned long x)
++ {
++ barrier();
++ __asm__ __volatile__(
++ "add %0, %1, %0\n"
++ "cmpltu r15, %0, %1\n"
++ "srli %0, %0, 16\n"
++ "add %0, %0, r15\n"
++ : "=r" (x)
++ : "r" (x << 16), "0" (x)
++ : "r15");
++ return x;
++ barrier();
++ }
++
++
++/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
++
++
++extern inline unsigned long do_csum(const unsigned char * buff, int len)
++{
++ int odd, count;
++ unsigned long result = 0;
++
++ barrier();
++ if (len <= 0)
++ goto out;
++ odd = 1 & (unsigned long) buff;
++ if (odd) {
++////result = *buff; // dgt: Big endian
++ result = *buff << 8; // dgt: Little endian
++
++ len--;
++ buff++;
++ }
++ count = len >> 1; /* nr of 16-bit words.. */
++ if (count) {
++ if (2 & (unsigned long) buff) {
++ result += *(unsigned short *) buff;
++ count--;
++ len -= 2;
++ buff += 2;
++ }
++ count >>= 1; /* nr of 32-bit words.. */
++ if (count) {
++ unsigned long carry = 0;
++ do {
++ unsigned long w = *(unsigned long *) buff;
++ count--;
++ buff += 4;
++ result += carry;
++ result += w;
++ carry = (w > result);
++ } while (count);
++ result += carry;
++ result = (result & 0xffff) + (result >> 16);
++ }
++ if (len & 2) {
++ result += *(unsigned short *) buff;
++ buff += 2;
++ }
++ }
++ if (len & 1)
++ result += *buff; /* This is little machine, byte is right */
++ result = from32to16(result);
++ if (odd)
++ result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
++out:
++ return result;
++ barrier();
++ }
++
++
++/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
++
++
++/* ihl is always 5 or greater, almost always is 5, iph is always word
++ * aligned but can fail to be dword aligned very often.
++ */
++
++ extern inline unsigned short ip_fast_csum(const unsigned char *iph, unsigned int ihl)
++ {
++ unsigned int sum;
++
++ barrier();
++ __asm__ __volatile__(
++" andi r8, %1, 2\n" /* Remember original alignment */
++" ldw %0, (%1)\n" /* 16 or 32 bit boundary */
++" beq r8, r0, 1f\n" /* Aligned on 32 bit boundary, go */
++" srli %0, %0, 16\n" /* Get correct 16 bits */
++" addi %2, %2, -1\n" /* Take off for 4 bytes, pickup last 2 at end */
++" addi %1, %1, 2\n" /* Adjust pointer to 32 bit boundary */
++" br 2f\n"
++"1:\n"
++" addi %2, %2, -1\n"
++" addi %1, %1, 4\n" /* Bump ptr a long word */
++"2:\n"
++" ldw r9, (%1)\n"
++"1:\n"
++" add %0, r9, %0\n"
++" bgeu %0, r9, 2f\n"
++" addi %0, %0, 1\n"
++"2:\n"
++" addi %1, %1, 4\n"
++" addi %2, %2, -1\n"
++" ldw r9, (%1)\n"
++" bne %2, r0, 1b\n"
++" beq r8, r0, 1f\n" /* 32 bit boundary time to leave */
++" srli r9, r9, 16\n" /* 16 bit boundary, get correct 16 bits */
++" add %0, r9, %0\n"
++" bgeu %0, r9, 1f\n"
++" addi %0, %0, 1\n"
++"1:\n"
++" slli %2, %0, 16\n"
++" add %0, %2, %0\n"
++" cmpltu r8, %0, %2\n"
++" srli %0, %0, 16\n"
++" add %0, %0, r8\n"
++" nor %0, %0, %0\n"
++ : "=&r" (sum), "=&r" (iph), "=&r" (ihl)
++ : "1" (iph), "2" (ihl)
++ : "r8", "r9");
++ return sum;
++ barrier();
++ }
++
++/*these 2 functions are now in checksum.c */
++unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum);
++unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum);
++
++/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
++
++/*
++ * the same as csum_partial_copy, but copies from user space.
++ *
++ * here even more important to align src and dst on a 32-bit (or even
++ * better 64-bit) boundary
++ */
++extern inline unsigned int
++csum_partial_copy_from_user(const char *src, char *dst, int len, int sum, int *csum_err)
++{
++ barrier();
++ if (csum_err) *csum_err = 0;
++ memcpy(dst, src, len);
++ return csum_partial(dst, len, sum);
++ barrier();
++}
++
++#define csum_partial_copy_nocheck(src, dst, len, sum) \
++ csum_partial_copy ((src), (dst), (len), (sum))
++
++
++/*
++ * this routine is used for miscellaneous IP-like checksums, mainly
++ * in icmp.c
++ */
++
++extern inline unsigned short ip_compute_csum(unsigned char * buff, int len)
++{
++ barrier();
++ return ~from32to16(do_csum(buff,len));
++ barrier();
++}
++
++
++/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
++
++
++#define csum_partial_copy_fromuser(s, d, l, w) \
++ csum_partial_copy((char *) (s), (d), (l), (w))
++
++
++/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
++
++
++/*
++ * Fold a partial checksum without adding pseudo headers
++ */
++extern __inline__ unsigned int csum_fold(unsigned int sum)
++{
++ barrier();
++ __asm__ __volatile__(
++ "add %0, %1, %0\n"
++ "cmpltu r8, %0, %1\n"
++ "srli %0, %0, 16\n"
++ "add %0, %0, r8\n"
++ "nor %0, %0, %0\n"
++ : "=r" (sum)
++ : "r" (sum << 16), "0" (sum)
++ : "r8");
++ return sum;
++ barrier();
++}
++
++
++/*- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
++
++
++extern __inline__ unsigned long csum_tcpudp_nofold(unsigned long saddr,
++ unsigned long daddr,
++ unsigned short len,
++ unsigned short proto,
++ unsigned int sum)
++{
++ barrier();
++ __asm__ __volatile__(
++ "add %0, %1, %0\n"
++ "cmpltu r8, %0, %1\n"
++ "add %0, %0, r8\n" /* add carry */
++ "add %0, %2, %0\n"
++ "cmpltu r8, %0, %2\n"
++ "add %0, %0, r8\n" /* add carry */
++ "add %0, %3, %0\n"
++ "cmpltu r8, %0, %3\n"
++ "add %0, %0, r8\n" /* add carry */
++ : "=r" (sum), "=r" (saddr)
++ : "r" (daddr), "r" ( (ntohs(len)<<16) + (proto*256) ),
++ "0" (sum),
++ "1" (saddr)
++ : "r8");
++
++ return sum;
++ barrier();
++}
++
++
++#endif /* (__NIOS2_CHECKSUM_H) */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/cprefix.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/cprefix.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,38 @@
++/* cprefix.h: This file is included by assembly source which needs
++ * to know what the c-label prefixes are. The newer versions
++ * of cpp that come with gcc predefine such things to help
++ * us out. The reason this stuff is needed is to make
++ * solaris compiles of the kernel work.
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#ifndef __NIOS2_CPREFIX_H
++#define __NIOS2_CPREFIX_H
++
++#define C_LABEL_PREFIX
++
++#define CONCAT(a, b) CONCAT2(a, b)
++#define CONCAT2(a, b) a##b
++
++#define C_LABEL(name) CONCAT(C_LABEL_PREFIX, name)
++
++#endif /* !(__NIOS2_CPREFIX_H) */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/cpumask.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/cpumask.h 2004-01-25 14:35:16.000000000 +0100
+@@ -0,0 +1,28 @@
++/*
++ * All rights reserved.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _ASM_NIOS2NOMMU_CPUMASK_H
++#define _ASM_NIOS2NOMMU_CPUMASK_H
++
++#include <asm-generic/cpumask.h>
++
++#endif /* _ASM_NIOS2NOMMU_CPUMASK_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/current.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/current.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,39 @@
++#ifndef _NIOS2NOMMU_CURRENT_H
++#define _NIOS2NOMMU_CURRENT_H
++/*
++ * current.h
++ * (C) Copyright 2000, Lineo, David McCullough <davidm@uclinux.org>
++ * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com)
++ * (C) Copyright 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#include <linux/thread_info.h>
++
++struct task_struct;
++
++static inline struct task_struct *get_current(void)
++{
++ return(current_thread_info()->task);
++}
++
++#define current get_current()
++
++#endif /* _NIOS2NOMMU_CURRENT_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/delay.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/delay.h 2004-05-14 13:32:04.000000000 +0200
+@@ -0,0 +1,96 @@
++#ifndef _NIOS_DELAY_H
++#define _NIOS_DELAY_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/delay.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/param.h>
++
++extern __inline__ void __delay(unsigned long loops)
++{
++ int dummy;
++
++ __asm__ __volatile__(
++ "1: \n\t"
++ " beq %0,zero,2f\n\t"
++ " addi %0, %0, -1\n\t"
++ " br 1b\n\t"
++ "2: \n\t"
++
++ : "=r" (dummy) /* Need output for optimizer */
++
++ : "0" (loops) /* %0 Input */
++ );
++}
++
++/*
++ * Note that 19 * 226 == 4294 ==~ 2^32 / 10^6, so
++ * loops = (4294 * usecs * loops_per_jiffy * HZ) / 2^32.
++ *
++ * The mul instruction gives us loops = (a * b) / 2^32.
++ * We choose a = usecs * 19 * HZ and b = loops_per_jiffy * 226
++ * because this lets us support a wide range of HZ and
++ * loops_per_jiffy values without either a or b overflowing 2^32.
++ * Thus we need usecs * HZ <= (2^32 - 1) / 19 = 226050910 and
++ * loops_per_jiffy <= (2^32 - 1) / 226 = 19004280
++ * (which corresponds to ~3800 bogomips at HZ = 100).
++ * -- paulus
++ */
++#define __MAX_UDELAY (226050910UL/HZ) /* maximum udelay argument */
++#define __MAX_NDELAY (4294967295UL/HZ) /* maximum ndelay argument */
++
++extern unsigned long loops_per_jiffy;
++
++extern __inline__ void __udelay(unsigned int x)
++{
++ unsigned int loops;
++
++ __asm__("mulxuu %0,%1,%2" : "=r" (loops) :
++ "r" (x), "r" (loops_per_jiffy * 226));
++ __delay(loops);
++}
++
++extern __inline__ void __ndelay(unsigned int x)
++{
++ unsigned int loops;
++
++ __asm__("mulxuu %0,%1,%2" : "=r" (loops) :
++ "r" (x), "r" (loops_per_jiffy * 5));
++ __delay(loops);
++}
++
++extern void __bad_udelay(void); /* deliberately undefined */
++extern void __bad_ndelay(void); /* deliberately undefined */
++
++#define udelay(n) (__builtin_constant_p(n)? \
++ ((n) > __MAX_UDELAY? __bad_udelay(): __udelay((n) * (19 * HZ))) : \
++ __udelay((n) * (19 * HZ)))
++
++#define ndelay(n) (__builtin_constant_p(n)? \
++ ((n) > __MAX_NDELAY? __bad_ndelay(): __ndelay((n) * HZ)) : \
++ __ndelay((n) * HZ))
++
++#define muldiv(a, b, c) (((a)*(b))/(c))
++
++#endif /* defined(_NIOS_DELAY_H) */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/div64.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/div64.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,31 @@
++#ifndef __ASMNIOS_DIV64_H
++#define __ASMNIOS_DIV64_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/div64.h
++ *
++ * Derived from m68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm-generic/div64.h>
++
++#endif
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/dma-mapping.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/dma-mapping.h 2004-05-07 15:36:26.000000000 +0200
+@@ -0,0 +1,25 @@
++/*
++ * include/asm-s390/dma-mapping.h
++ *
++ * S390 version
++ *
++ * This file exists so that #include <dma-mapping.h> doesn't break anything.
++ */
++
++#ifndef _ASM_DMA_MAPPING_H
++#define _ASM_DMA_MAPPING_H
++
++static inline void *dma_alloc_coherent(struct device *dev, size_t size,
++ dma_addr_t *dma_handle, int flag)
++{
++ BUG();
++ return 0;
++}
++
++static inline void dma_free_coherent(struct device *dev, size_t size,
++ void *vaddr, dma_addr_t dma_handle)
++{
++ BUG();
++}
++
++#endif /* _ASM_DMA_MAPPING_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/dma.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/dma.h 2004-03-02 11:05:52.000000000 +0100
+@@ -0,0 +1,40 @@
++/* $Id: dma.h,v 1.5 2004/03/02 16:05:52 ken-h Exp $
++ *
++ * Copyright 1995 (C) David S. Miller (davem@caip.rutgers.edu)
++ * Copyright 2004 (C) Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _ASM_NIOS2_DMA_H
++#define _ASM_NIOS2_DMA_H
++
++#include <linux/kernel.h>
++#include <asm/asm-offsets.h>
++
++#define MAX_DMA_CHANNELS 2
++#define MAX_DMA_ADDRESS (LINUX_SDRAM_START)
++#define DMA_MODE_READ 1
++#define DMA_MODE_WRITE 2
++
++extern int get_dma_list(char *);
++extern int request_dma(unsigned int, const char *);
++extern void free_dma(unsigned int);
++
++#endif /* !(_ASM_NIOS2_DMA_H) */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/elf.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/elf.h 2005-05-18 20:35:42.000000000 +0200
+@@ -0,0 +1,141 @@
++#ifndef __NIOS2_ELF_H
++#define __NIOS2_ELF_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/elf.h
++ *
++ * Nio2 ELF relocation types
++ *
++ * Derived from M68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Jan/20/2004 dgt NiosII
++ * Mar/18/2004 xwt NiosII relocation types added
++ *
++ ---------------------------------------------------------------------*/
++
++// #include <linux/config.h>
++#include <asm/ptrace.h>
++#include <asm/user.h>
++
++#define R_NIOS2_NONE 0
++#define R_NIOS2_S16 1
++#define R_NIOS2_U16 2
++#define R_NIOS2_PCREL16 3
++#define R_NIOS2_CALL26 4
++#define R_NIOS2_IMM5 5
++#define R_NIOS2_CACHE_OPX 6
++#define R_NIOS2_IMM6 7
++#define R_NIOS2_IMM8 8
++#define R_NIOS2_HI16 9
++#define R_NIOS2_LO16 10
++#define R_NIOS2_HIADJ16 11
++#define R_NIOS2_BFD_RELOC_32 12
++#define R_NIOS2_BFD_RELOC_16 13
++#define R_NIOS2_BFD_RELOC_8 14
++#define R_NIOS2_GPREL 15
++#define R_NIOS2_GNU_VTINHERIT 16
++#define R_NIOS2_GNU_VTENTRY 17
++#define R_NIOS2_UJMP 18
++#define R_NIOS2_CJMP 19
++#define R_NIOS2_CALLR 20
++#define R_NIOS2_ALIGN 21
++/* Keep this the last entry. */
++#define R_NIOS2_NUM 22
++
++typedef unsigned long elf_greg_t;
++
++#define ELF_NGREG (sizeof (struct user_regs_struct) / sizeof(elf_greg_t))
++typedef elf_greg_t elf_gregset_t[ELF_NGREG];
++
++typedef unsigned long elf_fpregset_t;
++
++/*
++ * This is used to ensure we don't load something for the wrong architecture.
++ */
++#define elf_check_arch(x) \
++ ((x)->e_machine == EM_ALTERA_NIOS2)
++
++/*
++ * These are used to set parameters in the core dumps.
++ */
++#define ELF_CLASS ELFCLASS32
++#define ELF_DATA ELFDATA2LSB
++#define ELF_ARCH EM_ALTERA_NIOS2
++
++#define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0
++
++#define USE_ELF_CORE_DUMP
++#define ELF_EXEC_PAGESIZE 4096
++
++/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
++ use of this is to invoke "./ld.so someprog" to test out a new version of
++ the loader. We need to make sure that it is out of the way of the program
++ that it will "exec", and that there is sufficient room for the brk. */
++
++#define ELF_ET_DYN_BASE 0xD0000000UL
++
++/* regs is struct pt_regs, pr_reg is elf_gregset_t (which is
++ now struct_user_regs, they are different) */
++
++#define ELF_CORE_COPY_REGS(pr_reg, regs) \
++ /* Bleech. */ \
++ pr_reg[0] = regs->r1; \
++ pr_reg[1] = regs->r2; \
++ pr_reg[2] = regs->r3; \
++ pr_reg[3] = regs->r4; \
++ pr_reg[4] = regs->r5; \
++ pr_reg[5] = regs->r6; \
++ pr_reg[6] = regs->r7; \
++ pr_reg[7] = regs->r8; \
++ pr_reg[8] = regs->r9; \
++ pr_reg[9] = regs->r10; \
++ pr_reg[10] = regs->r11; \
++ pr_reg[11] = regs->r12; \
++ pr_reg[12] = regs->r13; \
++ pr_reg[13] = regs->r14; \
++ pr_reg[14] = regs->r15; \
++ pr_reg[23] = regs->sp; \
++ pr_reg[26] = regs->estatus; \
++ { \
++ struct switch_stack *sw = ((struct switch_stack *)regs) - 1; \
++ pr_reg[15] = sw->r16; \
++ pr_reg[16] = sw->r17; \
++ pr_reg[17] = sw->r18; \
++ pr_reg[18] = sw->r19; \
++ pr_reg[19] = sw->r20; \
++ pr_reg[20] = sw->r21; \
++ pr_reg[21] = sw->r22; \
++ pr_reg[22] = sw->r23; \
++ pr_reg[24] = sw->fp; \
++ pr_reg[25] = sw->gp; \
++ }
++
++/* This yields a mask that user programs can use to figure out what
++ instruction set this cpu supports. */
++
++#define ELF_HWCAP (0)
++
++/* This yields a string that ld.so will use to load implementation
++ specific libraries for optimization. This is more specific in
++ intent than poking at uname or /proc/cpuinfo. */
++
++#define ELF_PLATFORM (NULL)
++
++#ifdef __KERNEL__
++#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
++#endif
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/entry.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/entry.h 2005-05-18 20:35:50.000000000 +0200
+@@ -0,0 +1,188 @@
++/*
++ * Hacked from m68knommu port.
++ *
++ * Copyright(C) 2004 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __NIOS2NOMMU_ENTRY_H
++#define __NIOS2NOMMU_ENTRY_H
++
++#ifdef __ASSEMBLY__
++
++// #include <linux/config.h>
++#include <asm/setup.h>
++#include <asm/page.h>
++#include <asm/asm-offsets.h>
++
++/*
++ * Stack layout in 'ret_from_exception':
++ *
++ * This allows access to the syscall arguments in registers r4-r8
++ *
++ * 0(sp) - r8
++ * 4(sp) - r9
++ * 8(sp) - r10
++ * C(sp) - r11
++ * 10(sp) - r12
++ * 14(sp) - r13
++ * 18(sp) - r14
++ * 1C(sp) - r15
++ * 20(sp) - r1
++ * 24(sp) - r2
++ * 28(sp) - r3
++ * 2C(sp) - r4
++ * 30(sp) - r5
++ * 34(sp) - r6
++ * 38(sp) - r7
++ * 3C(sp) - orig_r2
++ * 40(sp) - ra
++ * 44(sp) - fp
++ * 48(sp) - sp
++ * 4C(sp) - gp
++ * 50(sp) - estatus
++ * 54(sp) - status_extension
++ * 58(sp) - ea
++ *
++ */
++
++/* process bits for task_struct.flags */
++PF_TRACESYS_OFF = 3
++PF_TRACESYS_BIT = 5
++PF_PTRACED_OFF = 3
++PF_PTRACED_BIT = 4
++PF_DTRACE_OFF = 1
++PF_DTRACE_BIT = 5
++
++LENOSYS = 38
++
++/*
++ * This defines the normal kernel pt-regs layout.
++ *
++ */
++
++/*
++ * Standard Nios2 interrupt entry and exit macros.
++ * Must be called with interrupts disabled.
++ */
++.macro SAVE_ALL
++ movia r24,status_extension // Read status extension
++ ldw r24,0(r24)
++ andi r24,r24,PS_S_ASM
++ bne r24,r0,1f // In supervisor mode, already on kernel stack
++ movia r24,_current_thread // Switch to current kernel stack
++ ldw r24,0(r24) // using the thread_info
++ addi r24,r24,THREAD_SIZE_ASM-PT_REGS_SIZE
++ stw sp,PT_SP(r24) // Save user stack before changing
++ mov sp,r24
++ br 2f
++
++1: mov r24,sp
++ addi sp,sp,-PT_REGS_SIZE // Backup the kernel stack pointer
++ stw r24,PT_SP(sp)
++2: stw r1,PT_R1(sp)
++ stw r2,PT_R2(sp)
++ stw r3,PT_R3(sp)
++ stw r4,PT_R4(sp)
++ stw r5,PT_R5(sp)
++ stw r6,PT_R6(sp)
++ stw r7,PT_R7(sp)
++ stw r8,PT_R8(sp)
++ stw r9,PT_R9(sp)
++ stw r10,PT_R10(sp)
++ stw r11,PT_R11(sp)
++ stw r12,PT_R12(sp)
++ stw r13,PT_R13(sp)
++ stw r14,PT_R14(sp)
++ stw r15,PT_R15(sp)
++ stw r2,PT_ORIG_R2(sp)
++ stw ra,PT_RA(sp)
++ stw fp,PT_FP(sp)
++ stw gp,PT_GP(sp)
++ rdctl r24,estatus
++ stw r24,PT_ESTATUS(sp)
++ movia r24,status_extension // Read status extension
++ ldw r1,0(r24)
++ stw r1,PT_STATUS_EXTENSION(sp) // Store user/supervisor status
++ ORI32 r1,r1,PS_S_ASM // Set supervisor mode
++ stw r1,0(r24)
++ stw ea,PT_EA(sp)
++.endm
++
++.macro RESTORE_ALL
++ ldw r1,PT_STATUS_EXTENSION(sp) // Restore user/supervisor status
++ movia r24,status_extension
++ stw r1,0(r24)
++ ldw r1,PT_R1(sp) // Restore registers
++ ldw r2,PT_R2(sp)
++ ldw r3,PT_R3(sp)
++ ldw r4,PT_R4(sp)
++ ldw r5,PT_R5(sp)
++ ldw r6,PT_R6(sp)
++ ldw r7,PT_R7(sp)
++ ldw r8,PT_R8(sp)
++ ldw r9,PT_R9(sp)
++ ldw r10,PT_R10(sp)
++ ldw r11,PT_R11(sp)
++ ldw r12,PT_R12(sp)
++ ldw r13,PT_R13(sp)
++ ldw r14,PT_R14(sp)
++ ldw r15,PT_R15(sp)
++ ldw ra,PT_RA(sp)
++ ldw fp,PT_FP(sp)
++ ldw gp,PT_GP(sp)
++ ldw r24,PT_ESTATUS(sp)
++ wrctl estatus,r24
++ ldw ea,PT_EA(sp)
++ ldw sp,PT_SP(sp) // Restore sp last
++.endm
++
++.macro SAVE_SWITCH_STACK
++ addi sp,sp,-SWITCH_STACK_SIZE
++ stw r16,SW_R16(sp)
++ stw r17,SW_R17(sp)
++ stw r18,SW_R18(sp)
++ stw r19,SW_R19(sp)
++ stw r20,SW_R20(sp)
++ stw r21,SW_R21(sp)
++ stw r22,SW_R22(sp)
++ stw r23,SW_R23(sp)
++ stw fp,SW_FP(sp)
++ stw gp,SW_GP(sp)
++ stw ra,SW_RA(sp)
++.endm
++
++.macro RESTORE_SWITCH_STACK
++ ldw r16,SW_R16(sp)
++ ldw r17,SW_R17(sp)
++ ldw r18,SW_R18(sp)
++ ldw r19,SW_R19(sp)
++ ldw r20,SW_R20(sp)
++ ldw r21,SW_R21(sp)
++ ldw r22,SW_R22(sp)
++ ldw r23,SW_R23(sp)
++ ldw fp,SW_FP(sp)
++ ldw gp,SW_GP(sp)
++ ldw ra,SW_RA(sp)
++ addi sp,sp,SWITCH_STACK_SIZE
++.endm
++
++#endif /* __ASSEMBLY__ */
++#endif /* __NIOS2NOMMU_ENTRY_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/errno.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/errno.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,6 @@
++#ifndef _NIOS2NOMMU_ERRNO_H
++#define _NIOS2NOMMU_ERRNO_H
++
++#include <asm-generic/errno.h>
++
++#endif /* _NIOS2NOMMU_ERRNO_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/fcntl.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/fcntl.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,110 @@
++/*
++ * This file came from the m68k port.
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#ifndef _NIOS2_FCNTL_H
++#define _NIOS2_FCNTL_H
++
++/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
++ located on an ext2 file system */
++#define O_ACCMODE 0003
++#define O_RDONLY 00
++#define O_WRONLY 01
++#define O_RDWR 02
++#define O_CREAT 0100 /* not fcntl */
++#define O_EXCL 0200 /* not fcntl */
++#define O_NOCTTY 0400 /* not fcntl */
++#define O_TRUNC 01000 /* not fcntl */
++#define O_APPEND 02000
++#define O_NONBLOCK 04000
++#define O_NDELAY O_NONBLOCK
++#define O_SYNC 010000
++#define FASYNC 020000 /* fcntl, for BSD compatibility */
++#define O_DIRECTORY 040000 /* must be a directory */
++#define O_NOFOLLOW 0100000 /* don't follow links */
++#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */
++#define O_LARGEFILE 0400000
++#define O_NOATIME 01000000
++
++#define F_DUPFD 0 /* dup */
++#define F_GETFD 1 /* get close_on_exec */
++#define F_SETFD 2 /* set/clear close_on_exec */
++#define F_GETFL 3 /* get file->f_flags */
++#define F_SETFL 4 /* set file->f_flags */
++#define F_GETLK 5
++#define F_SETLK 6
++#define F_SETLKW 7
++
++#define F_SETOWN 8 /* for sockets. */
++#define F_GETOWN 9 /* for sockets. */
++#define F_SETSIG 10 /* for sockets. */
++#define F_GETSIG 11 /* for sockets. */
++
++#define F_GETLK64 12 /* using 'struct flock64' */
++#define F_SETLK64 13
++#define F_SETLKW64 14
++
++/* for F_[GET|SET]FL */
++#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
++
++/* for posix fcntl() and lockf() */
++#define F_RDLCK 0
++#define F_WRLCK 1
++#define F_UNLCK 2
++
++/* for old implementation of bsd flock () */
++#define F_EXLCK 4 /* or 3 */
++#define F_SHLCK 8 /* or 4 */
++
++/* for leases */
++#define F_INPROGRESS 16
++
++/* operations for bsd flock(), also used by the kernel implementation */
++#define LOCK_SH 1 /* shared lock */
++#define LOCK_EX 2 /* exclusive lock */
++#define LOCK_NB 4 /* or'd with one of the above to prevent
++ blocking */
++#define LOCK_UN 8 /* remove lock */
++
++#define LOCK_MAND 32 /* This is a mandatory flock */
++#define LOCK_READ 64 /* ... Which allows concurrent read operations */
++#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
++#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
++
++struct flock {
++ short l_type;
++ short l_whence;
++ off_t l_start;
++ off_t l_len;
++ pid_t l_pid;
++};
++
++struct flock64 {
++ short l_type;
++ short l_whence;
++ loff_t l_start;
++ loff_t l_len;
++ pid_t l_pid;
++};
++
++#define F_LINUX_SPECIFIC_BASE 1024
++#endif /* _NIOS2_FCNTL_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/flat.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/flat.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,126 @@
++/*
++ * include/asm-nios2nommu/flat.h -- uClinux bFLT relocations
++ *
++ * Copyright (C) 2004,05 Microtronix Datacom Ltd
++ *
++ * This file is subject to the terms and conditions of the GNU General
++ * Public License. See the file COPYING in the main directory of this
++ * archive for more details.
++ *
++ * Written by Wentao Xu <wentao@microtronix.com>
++ */
++
++#ifndef __NIOS2_FLAT_H__
++#define __NIOS2_FLAT_H__
++
++#define flat_reloc_valid(reloc, size) ((reloc) <= (size + 0x8000))
++
++/* The stack is 64-bit aligned for Nios II, so (sp - 1) shall
++ * be 64-bit aligned, where -1 is for argc
++ */
++#define flat_stack_align(sp) (sp = (unsigned long *)(((unsigned long)sp - 1) & (-8)))
++
++/* The uClibc port for Nios II expects the argc is followed by argv and envp */
++#define flat_argvp_envp_on_stack() 1
++
++#define flat_old_ram_flag(flags) (flags)
++
++/* We store the type of relocation in the top 4 bits of the `relval.' */
++
++/* Convert a relocation entry into an address. */
++static inline unsigned long
++flat_get_relocate_addr (unsigned long relval)
++{
++ return relval & 0x0fffffff; /* Mask out top 4-bits */
++}
++
++#define FLAT_NIOS2_RELOC_TYPE(relval) ((relval) >> 28)
++
++#define FLAT_NIOS2_R_32 0 /* Normal 32-bit reloc */
++#define FLAT_NIOS2_R_HI_LO 1 /* High 16-bits + low 16-bits field */
++#define FLAT_NIOS2_R_HIADJ_LO 2 /* High 16-bits adjust + low 16-bits field */
++#define FLAT_NIOS2_R_CALL26 4 /* Call imm26 */
++
++/* Extract the address to be relocated from the symbol reference at rp;
++ * relval is the raw relocation-table entry from which RP is derived.
++ * rp shall always be 32-bit aligned
++ */
++static inline unsigned long flat_get_addr_from_rp (unsigned long *rp,
++ unsigned long relval,
++ unsigned long flags)
++{
++ switch (FLAT_NIOS2_RELOC_TYPE(relval))
++ {
++ case FLAT_NIOS2_R_32:
++ /* Simple 32-bit address. The loader expect it in bigger endian */
++ return htonl(*rp);
++
++ case FLAT_NIOS2_R_HI_LO:
++ /* get the two 16-bit immediate value from instructions, then
++ * construct a 32-bit value. Again the loader expect bigger endian
++ */
++ return htonl ((((rp[0] >> 6) & 0xFFFF) << 16 ) |
++ ((rp[1] >> 6) & 0xFFFF));
++
++ case FLAT_NIOS2_R_HIADJ_LO:
++ {
++ /* get the two 16-bit immediate value from instructions, then
++ * construct a 32-bit value. Again the loader expect bigger endian
++ */
++ unsigned int low, high;
++ high = (rp[0] >> 6) & 0xFFFF;
++ low = (rp[1] >> 6) & 0xFFFF;
++
++ if ((low >> 15) & 1) high--;
++
++ return htonl ((high << 16 ) | low );
++ }
++ case FLAT_NIOS2_R_CALL26:
++ /* the 26-bit immediate value is actually 28-bit */
++ return htonl(((*rp) >> 6) << 2);
++
++ default:
++ return ~0; /* bogus value */
++ }
++}
++
++/* Insert the address addr into the symbol reference at rp;
++ * relval is the raw relocation-table entry from which rp is derived.
++ * rp shall always be 32-bit aligned
++ */
++static inline void flat_put_addr_at_rp (unsigned long *rp, unsigned long addr,
++ unsigned long relval)
++{
++ unsigned long exist_val;
++ switch (FLAT_NIOS2_RELOC_TYPE (relval)) {
++ case FLAT_NIOS2_R_32:
++ /* Simple 32-bit address. */
++ *rp = addr;
++ break;
++
++ case FLAT_NIOS2_R_HI_LO:
++ exist_val = rp[0];
++ rp[0] = ((((exist_val >> 22) << 16) | (addr >> 16)) << 6) | (exist_val & 0x3F);
++ exist_val = rp[1];
++ rp[1] = ((((exist_val >> 22) << 16) | (addr & 0xFFFF)) << 6) | (exist_val & 0x3F);
++ break;
++
++ case FLAT_NIOS2_R_HIADJ_LO:
++ {
++ unsigned int high = (addr >> 16);
++ if ((addr >> 15) & 1)
++ high = (high + 1) & 0xFFFF;
++ exist_val = rp[0];
++ rp[0] = ((((exist_val >> 22) << 16) | high) << 6) | (exist_val & 0x3F);
++ exist_val = rp[1];
++ rp[1] = ((((exist_val >> 22) << 16) | (addr & 0xFFFF)) << 6) | (exist_val & 0x3F);
++ break;
++ }
++ case FLAT_NIOS2_R_CALL26:
++ /* the opcode of CALL is 0, so just store the value */
++ *rp = ((addr >> 2) << 6);
++ break;
++ }
++}
++
++#endif /* __NIOS2_FLAT_H__ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/hardirq.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/hardirq.h 2005-05-18 20:35:54.000000000 +0200
+@@ -0,0 +1,85 @@
++/*
++ * Ported from m68knommu
++ *
++ * Copyright (C) 2003, Microtronix Datacom Ltd.
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#ifndef __NIOS2_HARDIRQ_H
++#define __NIOS2_HARDIRQ_H
++
++// #include <linux/config.h>
++#include <linux/cache.h>
++#include <linux/threads.h>
++
++typedef struct {
++ unsigned int __softirq_pending;
++ unsigned int __syscall_count;
++ struct task_struct * __ksoftirqd_task;
++} ____cacheline_aligned irq_cpustat_t;
++
++#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
++
++/*
++ * We put the hardirq and softirq counter into the preemption
++ * counter. The bitmask has the following meaning:
++ *
++ * - bits 0-7 are the preemption count (max preemption depth: 256)
++ * - bits 8-15 are the softirq count (max # of softirqs: 256)
++ * - bits 16-23 are the hardirq count (max # of hardirqs: 256)
++ *
++ * - ( bit 26 is the PREEMPT_ACTIVE flag. )
++ *
++ * PREEMPT_MASK: 0x000000ff
++ * HARDIRQ_MASK: 0x0000ff00
++ * SOFTIRQ_MASK: 0x00ff0000
++ */
++
++#define PREEMPT_BITS 8
++#define SOFTIRQ_BITS 8
++#define HARDIRQ_BITS 8
++
++#define PREEMPT_SHIFT 0
++#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
++#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
++
++/*
++ * The hardirq mask has to be large enough to have
++ * space for potentially all IRQ sources in the system
++ * nesting on a single CPU:
++ */
++#if (1 << HARDIRQ_BITS) < NR_IRQS
++# error HARDIRQ_BITS is too low!
++#endif
++
++#define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
++#define irq_exit() \
++do { \
++ preempt_count() -= IRQ_EXIT_OFFSET; \
++ if (!in_interrupt() && softirq_pending(smp_processor_id())) \
++ do_softirq(); \
++ preempt_enable_no_resched(); \
++} while (0)
++
++#ifdef CONFIG_SMP
++# error nios2nommu SMP is not available
++#endif /* CONFIG_SMP */
++
++#endif /* __NIOS2_HARDIRQ_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/hdreg.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/hdreg.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,30 @@
++/*
++ * Copyright (C) 1994-1996 Linus Torvalds & authors
++ * Copyright (C) 2002 Wentau Xu (www.microtronix.com)
++ * copyright (C) 2004 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __NIOS2_HDREG_H
++#define __NIOS2_HDREG_H
++
++typedef unsigned long ide_ioreg_t;
++
++#endif /* __NIOS2_HDREG_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/hw_irq.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/hw_irq.h 2004-09-01 12:54:44.000000000 +0200
+@@ -0,0 +1,16 @@
++#ifndef _ASM_HW_IRQ_H
++#define _ASM_HW_IRQ_H
++
++/*
++ * linux/include/asm/hw_irq.h
++ *
++ * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
++ *
++ * moved some of the old arch/i386/kernel/irq.h to here. VY
++ *
++ * IRQ/IPI changes taken from work by Thomas Radke
++ * <tomsoft@informatik.tu-chemnitz.de>
++ */
++
++
++#endif /* _ASM_HW_IRQ_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ide.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ide.h 2004-12-15 12:01:40.000000000 +0100
+@@ -0,0 +1,47 @@
++/*
++ * linux/include/asm-niosnommu2/ide.h
++ *
++ * Copyright (C) 1994-1996 Linus Torvalds & authors
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __ASMNIOS2_IDE_H
++#define __ASMNIOS2_IDE_H
++
++#ifdef __KERNEL__
++#undef MAX_HWIFS /* we're going to force it */
++
++#ifndef MAX_HWIFS
++#define MAX_HWIFS 1
++#endif
++
++#define IDE_ARCH_OBSOLETE_INIT
++#define IDE_ARCH_OBSOLETE_DEFAULTS
++#define ide_default_io_base(i) ((unsigned long)na_ide_ide)
++#define ide_default_irq(b) (na_ide_ide_irq)
++#define ide_init_default_irq(base) ide_default_irq(base)
++#define ide_default_io_ctl(base) ((base) + (0xE*4))
++
++#include <asm-generic/ide_iops.h>
++
++#endif /* __KERNEL__ */
++
++#endif /* __ASMNIOS2_IDE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/init.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/init.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,22 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#error "<asm/init.h> should never be used - use <linux/init.h> instead"
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/io.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/io.h 2004-12-23 15:46:46.000000000 +0100
+@@ -0,0 +1,239 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __NIOS2_IO_H
++#define __NIOS2_IO_H
++
++#ifdef __KERNEL__
++
++#include <linux/kernel.h>
++
++#include <asm/page.h> /* IO address mapping routines need this */
++#include <asm/system.h>
++#include <asm/unaligned.h>
++
++extern void insw(unsigned long port, void *dst, unsigned long count);
++extern void outsw(unsigned long port, void *src, unsigned long count);
++extern void insl(unsigned long port, void *dst, unsigned long count);
++extern void outsl(unsigned long port, void *src, unsigned long count);
++
++
++/*
++ * readX/writeX() are used to access memory mapped devices. On some
++ * architectures the memory mapped IO stuff needs to be accessed
++ * differently. On the Nios architecture, we just read/write the
++ * memory location directly.
++ */
++
++#define readb(addr) \
++({ \
++ unsigned char __res;\
++ __asm__ __volatile__( \
++ "ldbuio %0, 0(%1)" \
++ : "=r"(__res) \
++ : "r" (addr)); \
++ __res; \
++})
++
++#define readw(addr) \
++({ \
++ unsigned short __res;\
++ __asm__ __volatile__( \
++ "ldhuio %0, 0(%1)" \
++ : "=r"(__res) \
++ : "r" (addr)); \
++ __res; \
++})
++
++#define readl(addr) \
++({ \
++ unsigned int __res;\
++ __asm__ __volatile__( \
++ "ldwio %0, 0(%1)" \
++ : "=r"(__res) \
++ : "r" (addr)); \
++ __res; \
++})
++
++#define writeb(b,addr) \
++({ \
++ __asm__ __volatile__( \
++ "stbio %0, 0(%1)" \
++ : : "r"(b), "r" (addr)); \
++})
++
++#define writew(b,addr) \
++({ \
++ __asm__ __volatile__( \
++ "sthio %0, 0(%1)" \
++ : : "r"(b), "r" (addr)); \
++})
++
++#define writel(b,addr) \
++({ \
++ __asm__ __volatile__( \
++ "stwio %0, 0(%1)" \
++ : : "r"(b), "r" (addr)); \
++})
++
++#define __raw_readb readb
++#define __raw_readw readw
++#define __raw_readl readl
++#define __raw_writeb writeb
++#define __raw_writew writew
++#define __raw_writel writel
++
++
++/*
++ * make the short names macros so specific devices
++ * can override them as required
++ */
++
++#define memset_io(addr,c,len) memset((void *)(((unsigned int)(addr)) | 0x80000000),(c),(len))
++#define memcpy_fromio(to,from,len) memcpy((to),(void *)(((unsigned int)(from)) | 0x80000000),(len))
++#define memcpy_toio(to,from,len) memcpy((void *)(((unsigned int)(to)) | 0x80000000),(from),(len))
++
++#define inb(addr) readb(addr)
++#define inw(addr) readw(addr)
++#define inl(addr) readl(addr)
++
++#define outb(x,addr) ((void) writeb(x,addr))
++#define outw(x,addr) ((void) writew(x,addr))
++#define outl(x,addr) ((void) writel(x,addr))
++
++#define inb_p(addr) inb(addr)
++#define inw_p(addr) inw(addr)
++#define inl_p(addr) inl(addr)
++
++#define outb_p(x,addr) outb(x,addr)
++#define outw_p(x,addr) outw(x,addr)
++#define outl_p(x,addr) outl(x,addr)
++
++
++
++extern inline void insb(unsigned long port, void *dst, unsigned long count)
++{
++ unsigned char *p=(unsigned char*)dst;
++ while (count--)
++ *p++ = inb(port);
++}
++
++/* See arch/niosnommu/io.c for optimized version */
++extern inline void _insw(unsigned long port, void *dst, unsigned long count)
++{
++ unsigned short *p=(unsigned short*)dst;
++ while (count--)
++ *p++ = inw(port);
++}
++
++/* See arch/niosnommu/kernel/io.c for unaligned destination pointer */
++extern inline void _insl(unsigned long port, void *dst, unsigned long count)
++{
++ unsigned long *p=(unsigned long*)dst;
++ while (count--)
++ *p++ = inl(port);
++}
++
++extern inline void outsb(unsigned long port, void *src, unsigned long count)
++{
++ unsigned char *p=(unsigned char*)src;
++ while (count--)
++ outb( *p++, port );
++}
++
++/* See arch/niosnommu/io.c for optimized version */
++extern inline void _outsw(unsigned long port, void *src, unsigned long count)
++{
++ unsigned short *p=(unsigned short*)src;
++ while (count--)
++ outw( *p++, port );
++}
++
++/* See arch/niosnommu/kernel/io.c for unaligned source pointer */
++extern inline void _outsl(unsigned long port, void *src, unsigned long count)
++{
++ unsigned long *p=(unsigned long*)src;
++ while (count--)
++ outl( *p++, port );
++}
++
++
++
++extern inline void mapioaddr(unsigned long physaddr, unsigned long virt_addr,
++ int bus, int rdonly)
++{
++ return;
++}
++
++//vic - copied from m68knommu
++
++/* Values for nocacheflag and cmode */
++#define IOMAP_FULL_CACHING 0
++#define IOMAP_NOCACHE_SER 1
++#define IOMAP_NOCACHE_NONSER 2
++#define IOMAP_WRITETHROUGH 3
++
++extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
++extern void __iounmap(void *addr, unsigned long size);
++
++extern inline void *ioremap(unsigned long physaddr, unsigned long size)
++{
++ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
++}
++extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
++{
++ return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
++}
++extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
++{
++ return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
++}
++extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
++{
++ return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
++}
++
++extern void iounmap(void *addr);
++
++
++#define IO_SPACE_LIMIT 0xffffffff
++
++#define dma_cache_inv(_start,_size) do { } while (0)
++#define dma_cache_wback(_start,_size) do { } while (0)
++#define dma_cache_wback_inv(_start,_size) do { } while (0)
++
++/* Pages to physical address... */
++#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
++#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT)
++
++#define mm_ptov(vaddr) ((void *) (vaddr))
++#define mm_vtop(vaddr) ((unsigned long) (vaddr))
++#define phys_to_virt(vaddr) ((void *) (vaddr))
++#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
++
++#define virt_to_bus virt_to_phys
++#define bus_to_virt phys_to_virt
++
++#endif /* __KERNEL__ */
++
++#endif /* !(__NIOS2_IO_H) */
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ioctl.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ioctl.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,100 @@
++/* $Id: ioctl.h,v 1.3 2004/02/12 23:06:40 ken-h Exp $
++ *
++ * linux/ioctl.h for Linux by H.H. Bergman.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _NIOS2_IOCTL_H
++#define _NIOS2_IOCTL_H
++
++/* ioctl command encoding: 32 bits total, command in lower 16 bits,
++ * size of the parameter structure in the lower 14 bits of the
++ * upper 16 bits.
++ * Encoding the size of the parameter structure in the ioctl request
++ * is useful for catching programs compiled with old versions
++ * and to avoid overwriting user space outside the user buffer area.
++ * The highest 2 bits are reserved for indicating the ``access mode''.
++ * NOTE: This limits the max parameter size to 16kB -1 !
++ */
++
++/*
++ * I don't really have any idea about what this should look like, so
++ * for the time being, this is heavily based on the PC definitions.
++ */
++
++/*
++ * The following is for compatibility across the various Linux
++ * platforms. The i386 ioctl numbering scheme doesn't really enforce
++ * a type field. De facto, however, the top 8 bits of the lower 16
++ * bits are indeed used as a type field, so we might just as well make
++ * this explicit here. Please be sure to use the decoding macros
++ * below from now on.
++ */
++#define _IOC_NRBITS 8
++#define _IOC_TYPEBITS 8
++#define _IOC_SIZEBITS 14
++#define _IOC_DIRBITS 2
++
++#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
++#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
++#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
++#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
++
++#define _IOC_NRSHIFT 0
++#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
++#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
++#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
++
++/*
++ * Direction bits.
++ */
++#define _IOC_NONE 0U
++#define _IOC_WRITE 1U
++#define _IOC_READ 2U
++
++#define _IOC(dir,type,nr,size) \
++ (((dir) << _IOC_DIRSHIFT) | \
++ ((type) << _IOC_TYPESHIFT) | \
++ ((nr) << _IOC_NRSHIFT) | \
++ ((size) << _IOC_SIZESHIFT))
++
++/* used to create numbers */
++#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
++#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
++#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
++#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
++
++/* used to decode ioctl numbers.. */
++#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
++#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
++#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
++#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
++
++/* ...and for the drivers/sound files... */
++
++#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT)
++#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT)
++#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
++#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
++#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
++
++#endif /* _NIOS2_IOCTL_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ioctls.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ioctls.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,103 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __ARCH_NIOS2_IOCTLS_H__
++#define __ARCH_NIOS2_IOCTLS_H__
++
++#include <asm/ioctl.h>
++
++/* 0x54 is just a magic number to make these relatively unique ('T') */
++
++#define TCGETS 0x5401
++#define TCSETS 0x5402
++#define TCSETSW 0x5403
++#define TCSETSF 0x5404
++#define TCGETA 0x5405
++#define TCSETA 0x5406
++#define TCSETAW 0x5407
++#define TCSETAF 0x5408
++#define TCSBRK 0x5409
++#define TCXONC 0x540A
++#define TCFLSH 0x540B
++#define TIOCEXCL 0x540C
++#define TIOCNXCL 0x540D
++#define TIOCSCTTY 0x540E
++#define TIOCGPGRP 0x540F
++#define TIOCSPGRP 0x5410
++#define TIOCOUTQ 0x5411
++#define TIOCSTI 0x5412
++#define TIOCGWINSZ 0x5413
++#define TIOCSWINSZ 0x5414
++#define TIOCMGET 0x5415
++#define TIOCMBIS 0x5416
++#define TIOCMBIC 0x5417
++#define TIOCMSET 0x5418
++#define TIOCGSOFTCAR 0x5419
++#define TIOCSSOFTCAR 0x541A
++#define FIONREAD 0x541B
++#define TIOCINQ FIONREAD
++#define TIOCLINUX 0x541C
++#define TIOCCONS 0x541D
++#define TIOCGSERIAL 0x541E
++#define TIOCSSERIAL 0x541F
++#define TIOCPKT 0x5420
++#define FIONBIO 0x5421
++#define TIOCNOTTY 0x5422
++#define TIOCSETD 0x5423
++#define TIOCGETD 0x5424
++#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
++#define TIOCTTYGSTRUCT 0x5426 /* For debugging only */
++#define TIOCSBRK 0x5427 /* BSD compatibility */
++#define TIOCCBRK 0x5428 /* BSD compatibility */
++#define TIOCGSID 0x5429 /* Return the session ID of FD */
++#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
++#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
++
++#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
++#define FIOCLEX 0x5451
++#define FIOASYNC 0x5452
++#define TIOCSERCONFIG 0x5453
++#define TIOCSERGWILD 0x5454
++#define TIOCSERSWILD 0x5455
++#define TIOCGLCKTRMIOS 0x5456
++#define TIOCSLCKTRMIOS 0x5457
++#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
++#define TIOCSERGETLSR 0x5459 /* Get line status register */
++#define TIOCSERGETMULTI 0x545A /* Get multiport config */
++#define TIOCSERSETMULTI 0x545B /* Set multiport config */
++
++#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
++#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
++#define FIOQSIZE 0x545E
++
++/* Used for packet mode */
++#define TIOCPKT_DATA 0
++#define TIOCPKT_FLUSHREAD 1
++#define TIOCPKT_FLUSHWRITE 2
++#define TIOCPKT_STOP 4
++#define TIOCPKT_START 8
++#define TIOCPKT_NOSTOP 16
++#define TIOCPKT_DOSTOP 32
++
++#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
++
++#endif /* __ARCH_NIOS2_IOCTLS_H__ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ipc.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ipc.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,51 @@
++#ifndef __NIOS2_IPC_H__
++#define __NIOS2_IPC_H__
++
++/* Copied from sparc version
++ * These are used to wrap system calls on the Nios.
++ *
++ * See arch/niosnommu/kernel/sys_nios.c for ugly details..
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++struct ipc_kludge {
++ struct msgbuf *msgp;
++ long msgtyp;
++};
++
++#define SEMOP 1
++#define SEMGET 2
++#define SEMCTL 3
++#define MSGSND 11
++#define MSGRCV 12
++#define MSGGET 13
++#define MSGCTL 14
++#define SHMAT 21
++#define SHMDT 22
++#define SHMGET 23
++#define SHMCTL 24
++
++/* Used by the DIPC package, try and avoid reusing it */
++#define DIPC 25
++
++#define IPCCALL(version,op) ((version)<<16 | (op))
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ipcbuf.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ipcbuf.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,49 @@
++#ifndef __NIOS2_IPCBUF_H__
++#define __NIOS2_IPCBUF_H__
++
++/* Copied from asm-m68k/ipcbuf.h
++ * The user_ipc_perm structure for Nios architecture.
++ * Note extra padding because this structure is passed back and forth
++ * between kernel and user space.
++ *
++ * Pad space is left for:
++ * - 32-bit mode_t and seq
++ * - 2 miscellaneous 32-bit values
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++struct ipc64_perm
++{
++ __kernel_key_t key;
++ __kernel_uid32_t uid;
++ __kernel_gid32_t gid;
++ __kernel_uid32_t cuid;
++ __kernel_gid32_t cgid;
++ __kernel_mode_t mode;
++ unsigned short __pad1;
++ unsigned short seq;
++ unsigned short __pad2;
++ unsigned long __unused1;
++ unsigned long __unused2;
++};
++
++#endif /* __NIOS2_IPCBUF_H__ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/irq.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/irq.h 2005-05-18 20:36:00.000000000 +0200
+@@ -0,0 +1,182 @@
++/*
++ * 21Mar2001 1.1 dgt/microtronix
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++
++#ifndef _NIOS2NOMMU_IRQ_H_
++#define _NIOS2NOMMU_IRQ_H_
++
++extern void disable_irq(unsigned int);
++extern void enable_irq(unsigned int);
++
++// #include <linux/config.h>
++#include <linux/interrupt.h>
++
++#define SYS_IRQS 32
++#define NR_IRQS SYS_IRQS
++
++/*
++ * Interrupt source definitions
++ * General interrupt sources are the level 1-7.
++ * Adding an interrupt service routine for one of these sources
++ * results in the addition of that routine to a chain of routines.
++ * Each one is called in succession. Each individual interrupt
++ * service routine should determine if the device associated with
++ * that routine requires service.
++ */
++
++#define IRQ01 (1) /* level 1 interrupt */
++#define IRQ02 (2) /* level 2 interrupt */
++#define IRQ03 (3) /* level 3 interrupt */
++#define IRQ04 (4) /* level 4 interrupt */
++#define IRQ05 (5) /* level 5 interrupt */
++#define IRQ06 (6) /* level 6 interrupt */
++#define IRQ07 (7) /* level 7 interrupt */
++#define IRQ08 (8) /* level 8 interrupt */
++#define IRQ09 (9) /* level 9 interrupt */
++#define IRQ0A (10) /* level 10 interrupt */
++#define IRQ0B (11) /* level 11 interrupt */
++#define IRQ0C (12) /* level 12 interrupt */
++#define IRQ0D (13) /* level 13 interrupt */
++#define IRQ0E (14) /* level 14 interrupt */
++#define IRQ0F (15) /* level 15 interrupt */
++#define IRQ10 (16) /* level 16 interrupt */
++#define IRQ12 (17) /* level 17 interrupt */
++#define IRQ13 (18) /* level 18 interrupt */
++#define IRQ14 (19) /* level 19 interrupt */
++#define IRQ15 (20) /* level 20 interrupt */
++#define IRQ16 (21) /* level 21 interrupt */
++#define IRQ17 (22) /* level 22 interrupt */
++#define IRQ18 (23) /* level 23 interrupt */
++#define IRQ19 (24) /* level 24 interrupt */
++#define IRQ1A (25) /* level 25 interrupt */
++#define IRQ1B (26) /* level 26 interrupt */
++#define IRQ1C (27) /* level 27 interrupt */
++#define IRQ1D (28) /* level 28 interrupt */
++#define IRQ1E (29) /* level 29 interrupt */
++#define IRQ1F (30) /* level 30 interrupt */
++#define IRQ20 (31) /* level 31 interrupt */
++#define IRQ21 (32) /* level 32 interrupt */
++
++#define IRQMAX IRQ21
++
++/*
++ * "Generic" interrupt sources
++ */
++
++/*
++ * Machine specific interrupt sources.
++ *
++ * Adding an interrupt service routine for a source with this bit
++ * set indicates a special machine specific interrupt source.
++ * The machine specific files define these sources.
++ *
++ * Removed, they are not used by any one.
++ */
++
++/*
++ * various flags for request_irq()
++ */
++#define IRQ_FLG_LOCK (0x0001) /* handler is not replaceable */
++#define IRQ_FLG_REPLACE (0x0002) /* replace existing handler */
++#define IRQ_FLG_FAST (0x0004)
++#define IRQ_FLG_SLOW (0x0008)
++#define IRQ_FLG_STD (0x8000) /* internally used */
++
++/*
++ * Functions to set and clear the interrupt mask.
++ */
++
++/*
++ * Use a zero to clean the bit.
++ */
++static inline void clrimr(int mask)
++{
++ int flags;
++
++ local_irq_save(flags);
++ __asm__ __volatile__(
++ "rdctl r8, ienable\n"
++ "and r8,r8,%0\n"
++ "wrctl ienable, r8\n"
++ : /* No output */
++ : "r" (mask)
++ : "r8");
++ local_irq_restore(flags);
++}
++
++/*
++ * Use a one to set the bit.
++ */
++static inline void setimr(int mask)
++{
++ int flags;
++
++ local_irq_save(flags);
++ __asm__ __volatile__(
++ "rdctl r8, ienable\n"
++ "or r8,r8,%0\n"
++ "wrctl ienable, r8\n"
++ : /* No output */
++ : "r" (mask)
++ : "r8");
++ local_irq_restore(flags);
++}
++
++/*
++ * This structure is used to chain together the ISRs for a particular
++ * interrupt source (if it supports chaining).
++ */
++typedef struct irq_node {
++ irqreturn_t (*handler)(int, void *, struct pt_regs *);
++ unsigned long flags;
++ void *dev_id;
++ const char *devname;
++ struct irq_node *next;
++} irq_node_t;
++
++/*
++ * This function returns a new irq_node_t
++ */
++extern irq_node_t *new_irq_node(void);
++
++/*
++ * This structure has only 4 elements for speed reasons
++ */
++typedef struct irq_handler {
++ irqreturn_t (*handler)(int, void *, struct pt_regs *);
++ unsigned long flags;
++ void *dev_id;
++ const char *devname;
++} irq_handler_t;
++
++/* count of spurious interrupts */
++extern volatile unsigned int num_spurious;
++
++#define disable_irq_nosync(i) disable_irq(i)
++
++#ifndef irq_canonicalize
++#define irq_canonicalize(i) (i)
++#endif
++
++#endif /* _NIOS2NOMMU_IRQ_H_ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/kmap_types.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/kmap_types.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,43 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _ASM_KMAP_TYPES_H
++#define _ASM_KMAP_TYPES_H
++
++enum km_type {
++ KM_BOUNCE_READ,
++ KM_SKB_SUNRPC_DATA,
++ KM_SKB_DATA_SOFTIRQ,
++ KM_USER0,
++ KM_USER1,
++ KM_BIO_SRC_IRQ,
++ KM_BIO_DST_IRQ,
++ KM_PTE0,
++ KM_PTE1,
++ KM_IRQ0,
++ KM_IRQ1,
++ KM_SOFTIRQ0,
++ KM_SOFTIRQ1,
++ KM_TYPE_NR
++};
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/linkage.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/linkage.h 2004-03-12 11:50:10.000000000 +0100
+@@ -0,0 +1,29 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __ASM_LINKAGE_H
++#define __ASM_LINKAGE_H
++
++#define __ALIGN .align 3
++#define __ALIGN_STR ".align 3"
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/linux_logo.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/linux_logo.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,953 @@
++/* $Id: linux_logo.h,v 1.3 2004/02/12 23:06:40 ken-h Exp $
++ * include/asm-nios/linux_logo.h: This is a linux logo
++ * to be displayed on boot.
++ *
++ * Copyright (C) 1996 Larry Ewing (lewing@isc.tamu.edu)
++ * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
++ * Copyright (C) 2004 Micrtronix Datacom Ltd.
++ *
++ * You can put anything here, but:
++ * LINUX_LOGO_COLORS has to be less than 224
++ * image size has to be 80x80
++ * values have to start from 0x20
++ * (i.e. RGB(linux_logo_red[0],
++ * linux_logo_green[0],
++ * linux_logo_blue[0]) is color 0x20)
++ * BW image has to be 80x80 as well, with MS bit
++ * on the left
++ * Serial_console ascii image can be any size,
++ * but should contain %s to display the version
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#include <linux/init.h>
++#include <linux/version.h>
++
++#define linux_logo_banner "Linux/NIOS2 version " UTS_RELEASE
++
++#define __HAVE_ARCH_LINUX_LOGO
++#define __HAVE_ARCH_LINUX_LOGO16
++
++#define LINUX_LOGO_COLORS 221
++
++#ifdef INCLUDE_LINUX_LOGO_DATA
++
++unsigned char linux_logo_red[] __initdata = {
++ 0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
++ 0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
++ 0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
++ 0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
++ 0xc3, 0x65, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
++ 0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
++ 0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x76, 0x79,
++ 0x62, 0x36, 0x9a, 0xe2, 0xec, 0xe1, 0xb8, 0xd7,
++ 0xaf, 0x25, 0xbc, 0xc0, 0xef, 0xea, 0xe8, 0xe8,
++ 0xf5, 0xf1, 0xda, 0xd3, 0x79, 0xdb, 0xf4, 0xf6,
++ 0xf6, 0xf6, 0xe2, 0x3d, 0xb4, 0xce, 0xe6, 0xee,
++ 0xf6, 0x68, 0xd8, 0xec, 0xf5, 0xc6, 0xc8, 0x9c,
++ 0x89, 0xd2, 0xee, 0xcb, 0xb9, 0xd2, 0x66, 0x5e,
++ 0x8b, 0xbe, 0xa8, 0xd5, 0xca, 0xb6, 0xae, 0x9c,
++ 0xc5, 0xbe, 0xbe, 0xca, 0x90, 0xb2, 0x9a, 0xa8,
++ 0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xfe,
++ 0xf6, 0xec, 0xfe, 0xd2, 0xea, 0xf5, 0xf2, 0xf2,
++ 0xe9, 0xee, 0xf6, 0xf2, 0xee, 0xf6, 0xda, 0xd4,
++ 0xfa, 0xca, 0xf2, 0xf6, 0xfe, 0xf2, 0xda, 0xe4,
++ 0xf6, 0xdd, 0xf2, 0xee, 0xfa, 0xf0, 0x12, 0x4a,
++ 0xd6, 0xf2, 0x8e, 0xf2, 0xf6, 0xf6, 0xb5, 0xf1,
++ 0x26, 0x9a, 0xea, 0xf6, 0xe0, 0xd2, 0x16, 0x9a,
++ 0x2e, 0xd2, 0x70, 0xd6, 0x46, 0x7c, 0xb4, 0x62,
++ 0xda, 0xee, 0xd6, 0xa3, 0x74, 0xa7, 0xa2, 0xe0,
++ 0xae, 0xbe, 0xce, 0xe2, 0xa3, 0x8e, 0x6d, 0x8e,
++ 0x32, 0xaf, 0x50, 0x9e, 0x5b, 0x8a, 0x98, 0x82,
++ 0x7a, 0x82, 0x56, 0x7c, 0x8a, 0x56, 0x5e, 0x86,
++ 0x6a, 0x52, 0x59, 0x64, 0x5e,
++};
++
++unsigned char linux_logo_green[] __initdata = {
++ 0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
++ 0x12, 0x00, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
++ 0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x02, 0x65,
++ 0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
++ 0xc3, 0x62, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
++ 0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
++ 0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x62, 0x5c,
++ 0x4e, 0x26, 0x72, 0xaa, 0xba, 0xaf, 0x90, 0xae,
++ 0x92, 0x1a, 0xa4, 0x85, 0xb6, 0xbe, 0xc3, 0xc8,
++ 0xcf, 0xd0, 0xc2, 0xce, 0x57, 0xa2, 0xd6, 0xda,
++ 0xda, 0xd7, 0xb8, 0x2a, 0x7b, 0x91, 0xae, 0xca,
++ 0xda, 0x45, 0x9e, 0xb2, 0xd7, 0x9b, 0x90, 0x76,
++ 0x5c, 0xa2, 0xbe, 0xa6, 0x85, 0x96, 0x4e, 0x46,
++ 0x66, 0x92, 0x7a, 0x9a, 0x96, 0x9d, 0x9a, 0x6b,
++ 0x8a, 0x8e, 0xb2, 0xca, 0x90, 0xa6, 0x79, 0x7c,
++ 0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xfa,
++ 0xea, 0xd7, 0xf6, 0xbc, 0xda, 0xde, 0xda, 0xe6,
++ 0xca, 0xd8, 0xea, 0xe0, 0xcc, 0xf2, 0xce, 0xb2,
++ 0xee, 0xa2, 0xd6, 0xe6, 0xf6, 0xd7, 0xc5, 0xb8,
++ 0xc6, 0xb9, 0xce, 0xde, 0xce, 0xc6, 0x0e, 0x36,
++ 0xae, 0xbe, 0x86, 0xba, 0xbe, 0xe6, 0x8e, 0xc4,
++ 0x1e, 0x8e, 0xae, 0xba, 0xb2, 0xa6, 0x12, 0x7a,
++ 0x20, 0xc6, 0x64, 0xaa, 0x2f, 0x70, 0x85, 0x46,
++ 0xce, 0xd6, 0xa6, 0x6e, 0x51, 0x72, 0x92, 0xa6,
++ 0x87, 0x96, 0xa2, 0xd6, 0x85, 0x7a, 0x6a, 0x6e,
++ 0x22, 0x76, 0x36, 0x76, 0x3c, 0x6e, 0x63, 0x53,
++ 0x66, 0x62, 0x42, 0x50, 0x56, 0x42, 0x56, 0x56,
++ 0x56, 0x3e, 0x51, 0x52, 0x56,
++};
++
++unsigned char linux_logo_blue[] __initdata = {
++ 0x00, 0x06, 0x0a, 0x0e, 0x16, 0x1a, 0x1e, 0x22,
++ 0x12, 0x01, 0x2a, 0x36, 0x42, 0x4e, 0x4a, 0x56,
++ 0x26, 0x46, 0x2e, 0x32, 0x52, 0x3a, 0x06, 0x65,
++ 0x5e, 0x3e, 0x74, 0x8a, 0xa2, 0x9a, 0x86, 0xc6,
++ 0xc3, 0x59, 0xbb, 0xd2, 0xda, 0xd6, 0xe2, 0xf6,
++ 0xfd, 0xae, 0x7b, 0xdd, 0xea, 0x6a, 0xaa, 0xe7,
++ 0xbe, 0x5a, 0xee, 0x9e, 0x95, 0x80, 0x2e, 0x08,
++ 0x0a, 0x06, 0x0a, 0x0b, 0x0b, 0x0f, 0x0c, 0x0f,
++ 0x3d, 0x09, 0x73, 0x09, 0x0d, 0x0a, 0x10, 0x1e,
++ 0x2d, 0x13, 0x86, 0xba, 0x19, 0x0a, 0x36, 0x3c,
++ 0x26, 0x14, 0x0d, 0x06, 0x07, 0x0a, 0x0b, 0x0f,
++ 0x4a, 0x06, 0x0a, 0x0c, 0x2b, 0x0a, 0x0b, 0x0a,
++ 0x06, 0x0a, 0x0a, 0x11, 0x0b, 0x0a, 0x0a, 0x1e,
++ 0x0f, 0x0d, 0x0a, 0x0b, 0x22, 0x6a, 0x72, 0x0b,
++ 0x0b, 0x22, 0x90, 0xca, 0x90, 0x92, 0x3c, 0x2c,
++ 0xb6, 0xf2, 0xce, 0xfa, 0xb2, 0x6e, 0xa6, 0xea,
++ 0xb6, 0x7c, 0xda, 0x8e, 0xa6, 0x87, 0x66, 0xb6,
++ 0x81, 0x6a, 0xc6, 0x9a, 0x5b, 0xd2, 0xb6, 0x6a,
++ 0xca, 0x45, 0x92, 0xb2, 0xca, 0x52, 0x8a, 0x3e,
++ 0x2e, 0x66, 0x66, 0xae, 0x3e, 0x47, 0x06, 0x0e,
++ 0x52, 0x36, 0x6a, 0x0e, 0x0e, 0xbe, 0x2c, 0x0e,
++ 0x0a, 0x5a, 0x0d, 0x0e, 0x3e, 0x0a, 0x06, 0x2e,
++ 0x06, 0x9e, 0x4e, 0x36, 0x06, 0x58, 0x24, 0x06,
++ 0x9e, 0xae, 0x3a, 0x08, 0x08, 0x07, 0x5e, 0x0a,
++ 0x32, 0x2e, 0x2a, 0xb2, 0x43, 0x48, 0x5f, 0x2e,
++ 0x06, 0x06, 0x07, 0x24, 0x06, 0x32, 0x06, 0x06,
++ 0x46, 0x2e, 0x22, 0x06, 0x06, 0x1e, 0x4c, 0x06,
++ 0x3a, 0x22, 0x42, 0x34, 0x42,
++};
++
++unsigned char linux_logo[] __initdata = {
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22, 0x22,
++ 0x22, 0x21, 0x21, 0x21, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
++ 0x26, 0x26, 0x25, 0x28, 0x23, 0x22, 0x21, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x21, 0x23, 0x25, 0x2a, 0x2b, 0x2c, 0x2d, 0x2d,
++ 0x2d, 0x2e, 0x2c, 0x2b, 0x2a, 0x25, 0x28, 0x22,
++ 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x29, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
++ 0x24, 0x2a, 0x2c, 0x2f, 0x2c, 0x30, 0x30, 0x24,
++ 0x25, 0x27, 0x2b, 0x2c, 0x2f, 0x31, 0x32, 0x25,
++ 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x25,
++ 0x33, 0x34, 0x35, 0x21, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x36, 0x36, 0x21, 0x2b, 0x2f, 0x2c,
++ 0x30, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24, 0x33,
++ 0x2d, 0x27, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x31,
++ 0x2d, 0x32, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x29, 0x29, 0x29, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x21, 0x28, 0x2a, 0x34,
++ 0x25, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x36, 0x23, 0x32, 0x27, 0x21, 0x36,
++ 0x2a, 0x2d, 0x2a, 0x28, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
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++ 0x8e, 0x42, 0x50, 0x43, 0x47, 0x48, 0x48, 0x98,
++ 0x21, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x39,
++ 0x2e, 0x27, 0x23, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x22, 0x24, 0x2b, 0x38, 0x28, 0x36, 0x32,
++ 0x4c, 0x4b, 0x50, 0x50, 0x50, 0x42, 0x42, 0x50,
++ 0x50, 0x40, 0x45, 0x99, 0x48, 0x48, 0x48, 0x48,
++ 0x34, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x23,
++ 0x2f, 0x2b, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x21, 0x28, 0x32, 0x51, 0x32, 0x28, 0x21, 0x98,
++ 0x48, 0x47, 0x9a, 0x50, 0x50, 0x50, 0x50, 0x50,
++ 0x9a, 0x4f, 0x9b, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x93, 0x23, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x2a, 0x2f, 0x2a, 0x28, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
++ 0x23, 0x30, 0x2e, 0x2c, 0x36, 0x21, 0x51, 0x9b,
++ 0x48, 0x48, 0x52, 0x3f, 0x50, 0x50, 0x40, 0x4b,
++ 0x47, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x34, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x2d, 0x31, 0x27, 0x23, 0x21, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
++ 0x27, 0x2c, 0x2d, 0x21, 0x36, 0x28, 0x44, 0x48,
++ 0x48, 0x48, 0x48, 0x47, 0x46, 0x4f, 0x47, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x9c, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x28, 0x51, 0x39, 0x26, 0x22, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x25,
++ 0x35, 0x51, 0x28, 0x36, 0x36, 0x9d, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x9b, 0x48, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x4f, 0x28, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x28, 0x38, 0x2b, 0x25, 0x22, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24, 0x33,
++ 0x51, 0x25, 0x36, 0x36, 0x23, 0x40, 0x9b, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x9b, 0x99, 0x2b, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x36, 0x30, 0x2f, 0x33, 0x24, 0x21,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x21, 0x23, 0x30, 0x34,
++ 0x27, 0x36, 0x36, 0x36, 0x2a, 0x40, 0x47, 0x48,
++ 0x48, 0x48, 0x48, 0x9b, 0x99, 0x99, 0x9b, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x9b, 0x47, 0x52,
++ 0x46, 0x4f, 0x37, 0x21, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x36, 0x36, 0x30, 0x34, 0x2a, 0x23,
++ 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x22, 0x25, 0x39, 0x2c,
++ 0x36, 0x36, 0x36, 0x21, 0x31, 0x4e, 0x9a, 0x4c,
++ 0x47, 0x9b, 0x9b, 0x52, 0x46, 0x4f, 0x52, 0x9b,
++ 0x9b, 0x9b, 0x47, 0x4f, 0x45, 0x9a, 0x93, 0x93,
++ 0x3f, 0x93, 0x98, 0x28, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x39, 0x2c, 0x26,
++ 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x23, 0x2a, 0x34, 0x28,
++ 0x36, 0x36, 0x36, 0x22, 0x38, 0x98, 0x44, 0x99,
++ 0x9b, 0x48, 0x48, 0x9b, 0x4c, 0x48, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x47, 0x52, 0x46, 0x43, 0x93,
++ 0x40, 0x40, 0x43, 0x53, 0x21, 0x23, 0x33, 0x23,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x2f, 0x32,
++ 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x21, 0x24, 0x2b, 0x31, 0x36,
++ 0x36, 0x22, 0x36, 0x24, 0x9e, 0x4f, 0x9b, 0x48,
++ 0x48, 0x48, 0x48, 0x9b, 0x99, 0x9f, 0x52, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x47,
++ 0x4f, 0x9a, 0x3f, 0x46, 0x38, 0x36, 0x21, 0x30,
++ 0x26, 0x36, 0x36, 0x36, 0x36, 0x36, 0x39, 0x2c,
++ 0x25, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x22, 0x26, 0x2e, 0x33, 0x36,
++ 0x25, 0x25, 0x36, 0x4d, 0x52, 0x48, 0x48, 0x48,
++ 0x47, 0x9f, 0x48, 0x48, 0x48, 0xa0, 0xa1, 0xa2,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x47, 0x44, 0x93, 0x43, 0x23, 0x36, 0x36,
++ 0x26, 0x24, 0x36, 0x36, 0x36, 0x36, 0x28, 0x2f,
++ 0x2a, 0x23, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x23, 0x2a, 0x51, 0x24, 0x36,
++ 0x2a, 0x36, 0x28, 0x44, 0x48, 0x48, 0x48, 0x48,
++ 0xa3, 0xa4, 0x48, 0x48, 0x9f, 0xa5, 0xa6, 0x9f,
++ 0x48, 0x48, 0x48, 0xa2, 0xa7, 0x47, 0x48, 0x48,
++ 0x48, 0x48, 0x9b, 0x4b, 0x44, 0x37, 0x36, 0x23,
++ 0x28, 0x30, 0x22, 0x36, 0x36, 0x36, 0x36, 0x2d,
++ 0x35, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x21, 0x28, 0x2b, 0x34, 0x36, 0x25,
++ 0x24, 0x36, 0x4a, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0xa8, 0xa1, 0x48, 0x48, 0x9f, 0xa9, 0xa6, 0x9f,
++ 0x48, 0x48, 0xaa, 0xa1, 0xa5, 0x9f, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x9b, 0x52, 0x3f, 0x21, 0x30,
++ 0x35, 0x25, 0x30, 0x36, 0x36, 0x36, 0x36, 0x32,
++ 0x2d, 0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x22, 0x26, 0x2e, 0x35, 0x36, 0x2a,
++ 0x36, 0x24, 0x4f, 0x48, 0x52, 0x52, 0x48, 0x48,
++ 0xab, 0xac, 0xa0, 0x48, 0xad, 0xa6, 0xa6, 0x9f,
++ 0x48, 0xa2, 0xa9, 0xa6, 0xa2, 0x48, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x47, 0x32, 0x30,
++ 0x2a, 0x23, 0x30, 0x23, 0x36, 0x36, 0x36, 0x21,
++ 0x2f, 0x32, 0x23, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x21, 0x23, 0x2a, 0x51, 0x28, 0x28, 0x25,
++ 0x36, 0x3a, 0x48, 0x48, 0xae, 0xaf, 0x48, 0x48,
++ 0xad, 0xac, 0xa1, 0x9f, 0xa2, 0xa9, 0xa9, 0xa2,
++ 0x48, 0xab, 0x78, 0xa7, 0x48, 0x48, 0x48, 0x48,
++ 0x9f, 0x48, 0x48, 0x48, 0x48, 0x48, 0x38, 0x21,
++ 0x36, 0x36, 0x22, 0x27, 0x36, 0x36, 0x36, 0x36,
++ 0x2e, 0x35, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x22, 0x25, 0x2c, 0x34, 0x36, 0x30, 0x21,
++ 0x23, 0x43, 0x48, 0x48, 0xb0, 0xb1, 0xb2, 0x9f,
++ 0x48, 0xb3, 0xa5, 0xb3, 0xab, 0xa9, 0xa9, 0xb3,
++ 0xb4, 0xa9, 0xb5, 0xb0, 0x48, 0x48, 0xa0, 0xa5,
++ 0xa1, 0xad, 0x48, 0x48, 0x48, 0x48, 0x94, 0x36,
++ 0x36, 0x36, 0x36, 0x32, 0x36, 0x36, 0x36, 0x36,
++ 0x2a, 0x2e, 0x26, 0x22, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x21, 0x23, 0x2a, 0x51, 0x25, 0x21, 0x2a, 0x36,
++ 0x2e, 0x9b, 0x48, 0x48, 0x48, 0xb6, 0xb7, 0xa4,
++ 0xa2, 0xa7, 0xb5, 0x78, 0x6f, 0x6f, 0x6e, 0x6f,
++ 0xa9, 0xb5, 0xab, 0x48, 0x9f, 0xab, 0xa9, 0xa1,
++ 0xaa, 0x48, 0x48, 0x48, 0x48, 0x48, 0x98, 0x36,
++ 0x36, 0x36, 0x36, 0x32, 0x36, 0x36, 0x36, 0x36,
++ 0x22, 0x2f, 0x30, 0x22, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x22, 0x25, 0x2c, 0x34, 0x36, 0x24, 0x28, 0x36,
++ 0x54, 0x48, 0x48, 0x48, 0x48, 0xa2, 0xa8, 0xa1,
++ 0xa5, 0xa6, 0x6e, 0x6e, 0x6f, 0x6f, 0x6f, 0x6f,
++ 0x6f, 0x78, 0xa5, 0xa0, 0xa0, 0x78, 0xa6, 0xa2,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x9a, 0x36,
++ 0x36, 0x36, 0x36, 0x30, 0x36, 0x36, 0x36, 0x36,
++ 0x21, 0x2f, 0x32, 0x23, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
++ 0x28, 0x32, 0x2f, 0x28, 0x36, 0x27, 0x22, 0x21,
++ 0x43, 0x48, 0x4b, 0xa2, 0x9f, 0x48, 0xa2, 0xa1,
++ 0xb8, 0x6e, 0x6e, 0xb5, 0x78, 0x6f, 0x78, 0x78,
++ 0x6e, 0x6f, 0x78, 0xb5, 0xa6, 0xa1, 0xa0, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x4b, 0x21,
++ 0x36, 0x36, 0x21, 0x26, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x34, 0x2b, 0x28, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
++ 0x25, 0x2c, 0x39, 0x36, 0x36, 0x30, 0x22, 0x25,
++ 0x52, 0x48, 0xa3, 0xb1, 0xb6, 0xb3, 0xaa, 0xac,
++ 0x68, 0x68, 0x6e, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f,
++ 0x78, 0x6f, 0x6f, 0xb5, 0xa6, 0xb4, 0x48, 0x9f,
++ 0xb4, 0xb4, 0xa2, 0x9f, 0x48, 0x48, 0x4f, 0x21,
++ 0x36, 0x36, 0x22, 0x26, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x2c, 0x35, 0x24, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
++ 0x30, 0x2d, 0x21, 0x36, 0x36, 0x32, 0x23, 0x2a,
++ 0x47, 0x48, 0xa2, 0xb6, 0xaf, 0xb9, 0xba, 0x68,
++ 0x6e, 0x6e, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x78,
++ 0x6f, 0x6f, 0xa6, 0x6f, 0xb5, 0xa0, 0xaa, 0xa6,
++ 0xa6, 0xa9, 0xb2, 0xb3, 0x48, 0x48, 0x4c, 0x22,
++ 0x36, 0x36, 0x24, 0x23, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x2c, 0x39, 0x24, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
++ 0x33, 0x2e, 0x36, 0x36, 0x23, 0x31, 0x27, 0x39,
++ 0x9b, 0x48, 0x48, 0x48, 0xb0, 0xb0, 0xba, 0xb8,
++ 0x68, 0x68, 0x69, 0x78, 0x6f, 0xb5, 0x6f, 0xb5,
++ 0x78, 0x78, 0x78, 0x78, 0x78, 0xa5, 0xbb, 0xa9,
++ 0xa5, 0x48, 0x48, 0x48, 0x48, 0x48, 0x4c, 0x23,
++ 0x36, 0x36, 0x26, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x2c, 0x39, 0x24, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
++ 0x2b, 0x39, 0x36, 0x36, 0x36, 0x26, 0x32, 0x31,
++ 0x9b, 0x48, 0x48, 0x48, 0x48, 0x9f, 0xac, 0x68,
++ 0xbc, 0x6e, 0x6e, 0x6e, 0xb5, 0x6f, 0x6e, 0x6f,
++ 0x6f, 0x78, 0x78, 0xb5, 0xb5, 0xa5, 0x9f, 0x9f,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x46, 0x22,
++ 0x36, 0x21, 0x26, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x2c, 0x35, 0x24, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
++ 0x35, 0x39, 0x36, 0x36, 0x36, 0x36, 0x26, 0x2d,
++ 0x9b, 0x48, 0x48, 0xb0, 0xaa, 0xb3, 0xbd, 0xb8,
++ 0xb8, 0x68, 0x6e, 0x6e, 0xb5, 0x6f, 0x78, 0x6e,
++ 0x78, 0x6f, 0x78, 0x78, 0xb5, 0xa9, 0xa2, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x9a, 0x36,
++ 0x24, 0x27, 0xbe, 0x24, 0x25, 0x28, 0x21, 0x36,
++ 0x36, 0x34, 0x2b, 0x28, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x25,
++ 0x39, 0x4d, 0xbf, 0x84, 0x81, 0x57, 0x21, 0x39,
++ 0x52, 0x48, 0x48, 0x62, 0xb1, 0xc0, 0xc1, 0xc1,
++ 0xb8, 0xb8, 0x68, 0xbc, 0x6e, 0x6e, 0x6e, 0x78,
++ 0x78, 0x78, 0x78, 0x6e, 0x78, 0xa9, 0xa0, 0xab,
++ 0xb3, 0xa2, 0x48, 0x48, 0x48, 0x48, 0x53, 0x28,
++ 0x23, 0x36, 0x36, 0x36, 0x21, 0x28, 0x2c, 0x30,
++ 0x21, 0x38, 0x33, 0x28, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x21, 0x22, 0x22, 0x28, 0x30,
++ 0x2d, 0xc2, 0x7a, 0xc3, 0xc4, 0xc4, 0x7f, 0x22,
++ 0x51, 0x52, 0x48, 0x48, 0xb0, 0xaa, 0xa8, 0xbd,
++ 0x68, 0xb8, 0xb8, 0x68, 0x68, 0x6e, 0x6e, 0x6f,
++ 0x6e, 0x6e, 0xb5, 0x6e, 0x78, 0xab, 0xab, 0xb5,
++ 0x78, 0xa6, 0xb3, 0xc5, 0xac, 0xac, 0xc6, 0x61,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x30, 0x32,
++ 0x25, 0x4d, 0x2b, 0x28, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x21, 0x23, 0x24, 0x26, 0x30, 0x33, 0x31,
++ 0x4d, 0x91, 0x5b, 0xc3, 0xc4, 0xc4, 0xc4, 0x5a,
++ 0x21, 0x2e, 0x46, 0x48, 0x48, 0x48, 0xb0, 0x64,
++ 0xc1, 0xb8, 0xb8, 0xb8, 0x68, 0x71, 0x6e, 0x6e,
++ 0x6f, 0x71, 0x6f, 0x6f, 0xa6, 0xa0, 0x9f, 0xb4,
++ 0xb4, 0xa0, 0xa1, 0xb7, 0xc7, 0x69, 0x66, 0xc8,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x26, 0x25,
++ 0x83, 0xc9, 0x2c, 0x25, 0x21, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x21, 0x28, 0x30, 0x35, 0x2d, 0x2f, 0x37, 0x4a,
++ 0x60, 0x85, 0xca, 0xcb, 0xc4, 0xc4, 0xc4, 0x82,
++ 0x86, 0x36, 0x32, 0x3f, 0xa2, 0xa4, 0xa8, 0xa9,
++ 0xb8, 0xb8, 0xb8, 0xb8, 0x68, 0x6e, 0x6e, 0x6e,
++ 0x6e, 0x71, 0x6f, 0x71, 0xa6, 0xb4, 0x9f, 0x9f,
++ 0x48, 0x48, 0x48, 0xcc, 0xc3, 0xc7, 0xcd, 0xce,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x21, 0x57,
++ 0x77, 0x66, 0x34, 0x27, 0x22, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x23, 0x30, 0x31, 0xcf, 0x91, 0x7e, 0x90, 0x90,
++ 0x8b, 0x5b, 0xc3, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0x5d, 0xd0, 0x36, 0x24, 0xd1, 0xb1, 0xaf, 0xaa,
++ 0xba, 0xb8, 0x68, 0x68, 0x68, 0x71, 0x6e, 0x6e,
++ 0x6e, 0x6f, 0x6e, 0x78, 0xa1, 0xa9, 0xa1, 0xb0,
++ 0x9f, 0x9b, 0x99, 0xcc, 0x64, 0x5c, 0x8b, 0xd0,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x73, 0x5d,
++ 0x82, 0x5c, 0xd2, 0x2a, 0x23, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
++ 0x24, 0x2b, 0xcf, 0x8b, 0x5b, 0x76, 0x5b, 0x5b,
++ 0x7b, 0xc3, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc7, 0x5e, 0x22, 0x36, 0x21, 0x3a, 0x99, 0x48,
++ 0xa2, 0xa8, 0xb7, 0xc1, 0xb8, 0x68, 0x68, 0xbc,
++ 0x68, 0x6e, 0xb5, 0xb4, 0xb4, 0xab, 0xb5, 0xa1,
++ 0xb0, 0x4f, 0x3f, 0xd3, 0x7b, 0x7b, 0x85, 0x80,
++ 0xbe, 0x36, 0x36, 0x36, 0x21, 0xd4, 0x7e, 0x7b,
++ 0x64, 0x64, 0xd5, 0x35, 0x24, 0x21, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
++ 0x26, 0x31, 0xd6, 0x5b, 0x64, 0xc3, 0xc3, 0xcb,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0x66, 0xd7, 0x36, 0x36, 0x36, 0x2c, 0x4b,
++ 0xd8, 0xd9, 0xb3, 0xa8, 0xbd, 0xbd, 0xbd, 0xbd,
++ 0xa9, 0xab, 0xb3, 0xa5, 0xa2, 0x9f, 0xa2, 0xa1,
++ 0x6a, 0x9a, 0x3f, 0xda, 0x76, 0x76, 0x7a, 0x63,
++ 0xdb, 0xdc, 0x86, 0xdc, 0xdd, 0x90, 0x5b, 0x64,
++ 0xc3, 0xc3, 0xde, 0x2d, 0x27, 0x23, 0x21, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
++ 0x26, 0x2d, 0x91, 0x5b, 0x64, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc7, 0x83, 0xce, 0x36, 0x36, 0x36, 0x30,
++ 0xb1, 0xd9, 0x48, 0xa1, 0xb2, 0xb0, 0xb0, 0xb3,
++ 0xa2, 0x48, 0xa7, 0xbd, 0xa9, 0xa2, 0x48, 0x9f,
++ 0xaa, 0x9a, 0x3f, 0xb1, 0x5b, 0x7b, 0xdf, 0x85,
++ 0x7e, 0x90, 0x63, 0x90, 0x85, 0x5b, 0xc3, 0xc4,
++ 0xc4, 0xcb, 0x5d, 0xd5, 0x39, 0x26, 0x23, 0x21,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
++ 0x26, 0x2d, 0xe0, 0xdf, 0x64, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc7, 0x88, 0x36, 0x36, 0x36, 0x36,
++ 0x2d, 0x9b, 0x48, 0xb9, 0xaf, 0xa2, 0xa2, 0xb9,
++ 0xa8, 0x9f, 0x48, 0xa7, 0xb7, 0xd9, 0x48, 0x48,
++ 0x9b, 0x45, 0x3f, 0xe1, 0x6d, 0x7b, 0xca, 0xdf,
++ 0x7a, 0x8b, 0x8b, 0x7a, 0x5b, 0x64, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc3, 0xe2, 0x37, 0x35, 0x26, 0x23,
++ 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
++ 0x26, 0x2e, 0xe0, 0x7a, 0x7b, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc7, 0x72, 0x73, 0x36, 0x36, 0x36,
++ 0x24, 0x52, 0x48, 0xa3, 0xaf, 0x9f, 0x48, 0xb6,
++ 0xaf, 0xa2, 0x48, 0x9f, 0xe3, 0xd8, 0x48, 0x48,
++ 0x48, 0x46, 0x42, 0xd6, 0x7a, 0x7b, 0x64, 0x7b,
++ 0x76, 0x5b, 0x5b, 0x76, 0x7b, 0xc3, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xcb, 0x64, 0xe2, 0x4d, 0x2c, 0x27,
++ 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
++ 0x25, 0x31, 0xe4, 0x8b, 0x7b, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc7, 0x89, 0xbe, 0x36, 0x36,
++ 0x32, 0x47, 0x48, 0x4f, 0xa0, 0x48, 0x48, 0xe3,
++ 0x92, 0x9f, 0x48, 0x9f, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x4b, 0x2f, 0x8f, 0x7a, 0x7b, 0xc3, 0xcb,
++ 0xc3, 0x64, 0x64, 0xc3, 0xc3, 0xcb, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc3, 0x5d, 0xe5, 0x2c,
++ 0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
++ 0x25, 0x31, 0xe4, 0x85, 0x7b, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0x66, 0x57, 0x27, 0x4d,
++ 0x4b, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x99, 0x34, 0xbe, 0xdb, 0x7a, 0x7b, 0xc3, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc3, 0xe4,
++ 0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22,
++ 0x26, 0x2d, 0xe4, 0x85, 0x7b, 0xcb, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc7, 0x5f, 0x92, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x44,
++ 0x35, 0x36, 0xce, 0xdd, 0x7a, 0x7b, 0xcb, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xcb, 0xc3, 0xe1,
++ 0x2b, 0x24, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
++ 0x30, 0x2f, 0xd6, 0x8b, 0x7b, 0xcb, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0x66, 0x89, 0x45,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x48, 0x9b, 0x4e, 0x25,
++ 0x36, 0x36, 0x61, 0xdb, 0x6d, 0x64, 0xcb, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xcb, 0x7b, 0xdf, 0xe5,
++ 0x32, 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
++ 0x33, 0xe6, 0x63, 0xdf, 0xc3, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc3, 0x72, 0x81, 0xe7,
++ 0x46, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
++ 0x48, 0x48, 0x48, 0x48, 0x3f, 0x2c, 0x36, 0x36,
++ 0x36, 0x36, 0xe8, 0x8f, 0x6d, 0x64, 0xcb, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc3, 0xca, 0x8b, 0xcf, 0x2c,
++ 0x26, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
++ 0x35, 0x96, 0x75, 0xca, 0xc3, 0xcb, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xcb, 0x7b, 0x81, 0xdb,
++ 0x73, 0x3b, 0x44, 0x9b, 0x48, 0x48, 0x48, 0x9b,
++ 0x99, 0x43, 0x94, 0x2c, 0x21, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x73, 0xdb, 0x7a, 0x7b, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0x64, 0x76, 0x7a, 0x91, 0xd5, 0x31, 0x30,
++ 0x28, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x24,
++ 0x39, 0x97, 0x75, 0xdf, 0x7b, 0x64, 0xc3, 0xc3,
++ 0xcb, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0x7b, 0x7a, 0xe9,
++ 0xea, 0x36, 0x21, 0x26, 0x2b, 0x39, 0x33, 0x30,
++ 0x23, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x21, 0xea, 0xdd, 0x8b, 0x7b, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xc4, 0xc3, 0x64, 0x64,
++ 0x76, 0x85, 0xe0, 0xd5, 0x34, 0x2b, 0x27, 0x28,
++ 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x28,
++ 0x33, 0xeb, 0x63, 0x7e, 0x7a, 0x6d, 0xdf, 0x5b,
++ 0x76, 0x7b, 0x64, 0x64, 0xc3, 0xcb, 0xc4, 0xc4,
++ 0xc4, 0xc4, 0xc4, 0xc4, 0xcb, 0x76, 0x85, 0xdb,
++ 0x79, 0x22, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x21, 0xec, 0xdd, 0x75, 0x76, 0xc3, 0xc4,
++ 0xc4, 0xc4, 0xcb, 0xc3, 0x64, 0x76, 0xdf, 0x8b,
++ 0xd6, 0xd5, 0x2f, 0x35, 0x30, 0x24, 0x22, 0x21,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x23,
++ 0x27, 0x31, 0xed, 0xeb, 0xdd, 0x74, 0x63, 0x90,
++ 0x7e, 0x75, 0x8b, 0x6d, 0xdf, 0x76, 0x64, 0xc3,
++ 0xcb, 0xcb, 0xcb, 0xcb, 0x64, 0x7a, 0x84, 0xee,
++ 0x79, 0xbe, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
++ 0x36, 0x21, 0xea, 0xee, 0x63, 0x6d, 0x7b, 0x64,
++ 0xcb, 0xc3, 0x64, 0x7b, 0xdf, 0x75, 0x63, 0x96,
++ 0x38, 0x39, 0x2a, 0x24, 0x23, 0x21, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
++ 0x28, 0x27, 0x35, 0x2d, 0x41, 0xd5, 0xe7, 0x8f,
++ 0xdb, 0xdd, 0xe9, 0x74, 0x84, 0x90, 0x85, 0x6d,
++ 0x5b, 0x7b, 0x7b, 0xca, 0x6d, 0x90, 0xdb, 0xef,
++ 0xec, 0x22, 0x36, 0x36, 0x28, 0x30, 0x30, 0x30,
++ 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x25, 0x36,
++ 0x36, 0x21, 0xd4, 0x80, 0xe9, 0x7e, 0x6d, 0x76,
++ 0xca, 0x76, 0x6d, 0x85, 0x63, 0xdb, 0xd5, 0x34,
++ 0x33, 0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x21, 0x23, 0x24, 0x27, 0x2a, 0x35, 0x2e, 0x2f,
++ 0x41, 0xf0, 0xf1, 0x6c, 0x80, 0xee, 0xdb, 0x74,
++ 0x84, 0x90, 0x75, 0x7e, 0x74, 0x8f, 0xef, 0x79,
++ 0xe8, 0x2b, 0x9d, 0x41, 0x2f, 0x34, 0x2d, 0x2d,
++ 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x34, 0x2f, 0x38,
++ 0x4d, 0x37, 0xf2, 0xf3, 0x8f, 0x74, 0x63, 0x7e,
++ 0x75, 0x7e, 0x63, 0xe9, 0x88, 0xe6, 0x31, 0x2a,
++ 0x24, 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x21, 0x22, 0x23, 0x24, 0x26, 0x30,
++ 0x33, 0x39, 0x2e, 0x51, 0x41, 0xd2, 0x6c, 0xf3,
++ 0x80, 0xee, 0xee, 0xee, 0xf4, 0xf3, 0xd7, 0xf5,
++ 0x41, 0x34, 0x35, 0x32, 0x30, 0x27, 0x27, 0x27,
++ 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x30, 0x2a,
++ 0x2b, 0x34, 0xf6, 0xec, 0xf7, 0x8f, 0xdd, 0xe9,
++ 0xe9, 0xdd, 0xee, 0x6c, 0x41, 0x39, 0x27, 0x28,
++ 0x21, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
++ 0x28, 0x24, 0x26, 0x2a, 0x33, 0x2c, 0x2f, 0x41,
++ 0xf8, 0xd7, 0x79, 0x79, 0x79, 0xec, 0xf9, 0x51,
++ 0x39, 0x30, 0x24, 0x23, 0x22, 0x22, 0x22, 0x22,
++ 0x22, 0x22, 0x21, 0x22, 0x22, 0x22, 0x22, 0x23,
++ 0x24, 0x2a, 0x31, 0xfa, 0xea, 0x79, 0xf3, 0x80,
++ 0xf7, 0xdc, 0xfb, 0x2f, 0x35, 0x26, 0x23, 0x21,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x21, 0x22, 0x23, 0x28, 0x25, 0x30, 0x2b,
++ 0x31, 0x2f, 0xf6, 0xfa, 0xfa, 0x2f, 0x2e, 0x33,
++ 0x26, 0x23, 0x21, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x21, 0x28, 0x27, 0x35, 0x34, 0xfa, 0xfa, 0xfa,
++ 0xfc, 0xf6, 0x2e, 0x33, 0x25, 0x23, 0x21, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x23, 0x28,
++ 0x26, 0x30, 0x32, 0x2b, 0x33, 0x2a, 0x26, 0x28,
++ 0x22, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x21, 0x23, 0x25, 0x30, 0x33, 0x35, 0x35,
++ 0x2b, 0x2a, 0x26, 0x28, 0x22, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21,
++ 0x21, 0x22, 0x23, 0x28, 0x28, 0x23, 0x22, 0x21,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x21, 0x23, 0x28, 0x24, 0x24,
++ 0x28, 0x23, 0x22, 0x21, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
++};
++
++unsigned char linux_logo16[1];
++
++#endif /* INCLUDE_LINUX_LOGO_DATA */
++
++#include <linux/linux_logo.h>
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/local.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/local.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __NIOS2NOMMU_LOCAL_H
++#define __NIOS2NOMMU_LOCAL_H
++
++#include <asm-generic/local.h>
++
++#endif /* __NIOS2NOMMU_LOCAL_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/mc146818rtc.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/mc146818rtc.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,29 @@
++/*
++ * Machine dependent access functions for RTC registers.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#ifndef _NIOS2_MC146818RTC_H
++#define _NIOS2_MC146818RTC_H
++
++/* empty include file to satisfy the include in genrtc.c/ide-geometry.c */
++
++#endif /* _NIOS2_MC146818RTC_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/mman.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/mman.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,68 @@
++/*
++ * Copied from the m68k port.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __NIOS2_MMAN_H__
++#define __NIOS2_MMAN_H__
++
++#define PROT_READ 0x1 /* page can be read */
++#define PROT_WRITE 0x2 /* page can be written */
++#define PROT_EXEC 0x4 /* page can be executed */
++#define PROT_SEM 0x8 /* page may be used for atomic ops */
++#define PROT_NONE 0x0 /* page can not be accessed */
++#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
++#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
++
++#define MAP_SHARED 0x01 /* Share changes */
++#define MAP_PRIVATE 0x02 /* Changes are private */
++#define MAP_TYPE 0x0f /* Mask for type of mapping */
++#define MAP_FIXED 0x10 /* Interpret addr exactly */
++#define MAP_ANONYMOUS 0x20 /* don't use a file */
++
++#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
++#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
++#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
++#define MAP_LOCKED 0x2000 /* pages are locked */
++#define MAP_NORESERVE 0x4000 /* don't check for reservations */
++#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
++#define MAP_NONBLOCK 0x10000 /* do not block on IO */
++
++#define MS_ASYNC 1 /* sync memory asynchronously */
++#define MS_INVALIDATE 2 /* invalidate the caches */
++#define MS_SYNC 4 /* synchronous memory sync */
++
++#define MCL_CURRENT 1 /* lock all current mappings */
++#define MCL_FUTURE 2 /* lock all future mappings */
++
++#define MADV_NORMAL 0x0 /* default page-in behavior */
++#define MADV_RANDOM 0x1 /* page-in minimum required */
++#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
++#define MADV_WILLNEED 0x3 /* pre-fault pages */
++#define MADV_DONTNEED 0x4 /* discard these pages */
++
++/* compatibility flags */
++#define MAP_ANON MAP_ANONYMOUS
++#define MAP_FILE 0
++
++#endif /* __NIOS2_MMAN_H__ */
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/mmu.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/mmu.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,47 @@
++/*
++ *
++ * Taken from the m68knommu.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __NIOS2NOMMU_MMU_H
++#define __NIOS2NOMMU_MMU_H
++
++/* Copyright (C) 2002, David McCullough <davidm@snapgear.com> */
++
++struct mm_rblock_struct {
++ int size;
++ int refcount;
++ void *kblock;
++};
++
++struct mm_tblock_struct {
++ struct mm_rblock_struct *rblock;
++ struct mm_tblock_struct *next;
++};
++
++typedef struct {
++ struct mm_tblock_struct tblock;
++ unsigned long end_brk;
++} mm_context_t;
++
++#endif /* __NIOS2NOMMU_MMU_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/mmu_context.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/mmu_context.h 2005-05-18 20:36:04.000000000 +0200
+@@ -0,0 +1,58 @@
++/*
++ *
++ * Taken from the m68knommu.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __NIOS2NOMMU_MMU_CONTEXT_H
++#define __NIOS2NOMMU_MMU_CONTEXT_H
++
++// #include <linux/config.h>
++#include <asm/setup.h>
++#include <asm/page.h>
++#include <asm/pgalloc.h>
++
++static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
++{
++}
++
++extern inline int
++init_new_context(struct task_struct *tsk, struct mm_struct *mm)
++{
++ // mm->context = virt_to_phys(mm->pgd);
++ return(0);
++}
++
++#define destroy_context(mm) do { } while(0)
++
++static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
++{
++}
++
++#define deactivate_mm(tsk,mm) do { } while (0)
++
++extern inline void activate_mm(struct mm_struct *prev_mm,
++ struct mm_struct *next_mm)
++{
++}
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/module.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/module.h 2004-03-19 13:57:58.000000000 +0100
+@@ -0,0 +1,36 @@
++#ifndef _NIOS2_MODULE_H
++#define _NIOS2_MODULE_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/module.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++struct mod_arch_specific
++{
++};
++
++#define Elf_Shdr Elf32_Shdr
++#define Elf_Sym Elf32_Sym
++#define Elf_Ehdr Elf32_Ehdr
++
++#endif /* _NIOS_MODULE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/msgbuf.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/msgbuf.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,56 @@
++/*
++ * Taken from the m68k.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _NIOS2_MSGBUF_H
++#define _NIOS2_MSGBUF_H
++
++/*
++ * The msqid64_ds structure for nios2 architecture.
++ * Note extra padding because this structure is passed back and forth
++ * between kernel and user space.
++ *
++ * Pad space is left for:
++ * - 64-bit time_t to solve y2038 problem
++ * - 2 miscellaneous 32-bit values
++ */
++
++struct msqid64_ds {
++ struct ipc64_perm msg_perm;
++ __kernel_time_t msg_stime; /* last msgsnd time */
++ unsigned long __unused1;
++ __kernel_time_t msg_rtime; /* last msgrcv time */
++ unsigned long __unused2;
++ __kernel_time_t msg_ctime; /* last change time */
++ unsigned long __unused3;
++ unsigned long msg_cbytes; /* current number of bytes on queue */
++ unsigned long msg_qnum; /* number of messages in queue */
++ unsigned long msg_qbytes; /* max number of bytes on queue */
++ __kernel_pid_t msg_lspid; /* pid of last msgsnd */
++ __kernel_pid_t msg_lrpid; /* last receive pid */
++ unsigned long __unused4;
++ unsigned long __unused5;
++};
++
++#endif /* _NIOS2_MSGBUF_H */
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/namei.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/namei.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,36 @@
++/*
++ * linux/include/asm-nios/namei.h
++ * Moved from m68k version
++ * Included from linux/fs/namei.c
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef __NIOS2_NAMEI_H
++#define __NIOS2_NAMEI_H
++
++/* This dummy routine maybe changed to something useful
++ * for /usr/gnemul/ emulation stuff.
++ * Look at asm-sparc/namei.h for details.
++ */
++
++#define __emul_prefix() NULL
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ndma.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ndma.h 2004-05-07 15:45:52.000000000 +0200
+@@ -0,0 +1,64 @@
++#ifndef __NDMA_H__
++ #define __NDMA_H__
++
++ #ifndef __ASSEMBLY__
++
++// DMA Registers
++typedef volatile struct
++{
++ int np_dmastatus; // status register
++ int np_dmareadaddress; // read address
++ int np_dmawriteaddress; // write address
++ int np_dmalength; // length in bytes
++ int np_dmareserved1; // reserved
++ int np_dmareserved2; // reserved
++ int np_dmacontrol; // control register
++ int np_dmareserved3; // control register alternate
++} np_dma;
++
++// DMA Register Bits
++enum
++{
++ np_dmacontrol_byte_bit = 0, // Byte transaction
++ np_dmacontrol_hw_bit = 1, // Half-word transaction
++ np_dmacontrol_word_bit = 2, // Word transaction
++ np_dmacontrol_go_bit = 3, // enable execution
++ np_dmacontrol_i_en_bit = 4, // enable interrupt
++ np_dmacontrol_reen_bit = 5, // Enable read end-of-packet
++ np_dmacontrol_ween_bit = 6, // Enable write end-of-packet
++ np_dmacontrol_leen_bit = 7, // Enable length=0 transaction end
++ np_dmacontrol_rcon_bit = 8, // Read from a fixed address
++ np_dmacontrol_wcon_bit = 9, // Write to a fixed address
++ np_dmacontrol_doubleword_bit = 10, // Double-word transaction
++ np_dmacontrol_quadword_bit = 11, // Quad-word transaction
++
++ np_dmastatus_done_bit = 0, // 1 when done. Status write clears.
++ np_dmastatus_busy_bit = 1, // 1 when busy.
++ np_dmastatus_reop_bit = 2, // read-eop received
++ np_dmastatus_weop_bit = 3, // write-eop received
++ np_dmastatus_len_bit = 4, // requested length transacted
++
++ np_dmacontrol_byte_mask = (1 << 0), // Byte transaction
++ np_dmacontrol_hw_mask = (1 << 1), // Half-word transaction
++ np_dmacontrol_word_mask = (1 << 2), // Word transaction
++ np_dmacontrol_go_mask = (1 << 3), // enable execution
++ np_dmacontrol_i_en_mask = (1 << 4), // enable interrupt
++ np_dmacontrol_reen_mask = (1 << 5), // Enable read end-of-packet
++ np_dmacontrol_ween_mask = (1 << 6), // Enable write end-of-packet
++ np_dmacontrol_leen_mask = (1 << 7), // Enable length=0 transaction end
++ np_dmacontrol_rcon_mask = (1 << 8), // Read from a fixed address
++ np_dmacontrol_wcon_mask = (1 << 9), // Write to a fixed address
++ np_dmacontrol_doubleword_mask = (1 << 10), // Double-word transaction
++ np_dmacontrol_quadword_mask = (1 << 11), // Quad-word transaction
++
++ np_dmastatus_done_mask = (1 << 0), // 1 when done. Status write clears.
++ np_dmastatus_busy_mask = (1 << 1), // 1 when busy.
++ np_dmastatus_reop_mask = (1 << 2), // read-eop received
++ np_dmastatus_weop_mask = (1 << 3), // write-eop received
++ np_dmastatus_len_mask = (1 << 4), // requested length transacted
++};
++
++ #endif /* __ASSEMBLY__ */
++
++#endif
++/* End of File */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/nios.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/nios.h 2004-04-01 15:12:56.000000000 +0200
+@@ -0,0 +1,7 @@
++#ifndef __NIOS_H__
++#define __NIOS_H__
++
++#include "nios2_system.h"
++
++#endif
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/page.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/page.h 2005-05-18 20:36:38.000000000 +0200
+@@ -0,0 +1,135 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _NIOS2_PAGE_H
++#define _NIOS2_PAGE_H
++
++/* copied from m68knommu arch */
++// #include <linux/config.h>
++
++/* PAGE_SHIFT determines the page size */
++
++#define PAGE_SHIFT (12)
++#define PAGE_SIZE (1UL << PAGE_SHIFT)
++#define PAGE_MASK (~(PAGE_SIZE-1))
++
++#ifdef __KERNEL__
++
++#include <asm/setup.h>
++
++#if PAGE_SHIFT < 13
++#define THREAD_SIZE (8192)
++#else
++#define THREAD_SIZE PAGE_SIZE
++#endif
++
++#ifndef __ASSEMBLY__
++
++#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
++#define free_user_page(page, addr) free_page(addr)
++
++#define clear_page(page) memset((page), 0, PAGE_SIZE)
++#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE)
++
++#define clear_user_page(page, vaddr, pg) clear_page(page)
++#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
++
++/*
++ * These are used to make use of C type-checking..
++ */
++typedef struct { unsigned long pte; } pte_t;
++typedef struct { unsigned long pmd[16]; } pmd_t;
++typedef struct { unsigned long pgd; } pgd_t;
++typedef struct { unsigned long pgprot; } pgprot_t;
++
++#define pte_val(x) ((x).pte)
++#define pmd_val(x) ((&x)->pmd[0])
++#define pgd_val(x) ((x).pgd)
++#define pgprot_val(x) ((x).pgprot)
++
++#define __pte(x) ((pte_t) { (x) } )
++#define __pmd(x) ((pmd_t) { (x) } )
++#define __pgd(x) ((pgd_t) { (x) } )
++#define __pgprot(x) ((pgprot_t) { (x) } )
++
++/* to align the pointer to the (next) page boundary */
++#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
++
++/* Pure 2^n version of get_order */
++extern __inline__ int get_order(unsigned long size)
++{
++ int order;
++
++ size = (size-1) >> (PAGE_SHIFT-1);
++ order = -1;
++ do {
++ size >>= 1;
++ order++;
++ } while (size);
++ return order;
++}
++
++extern unsigned long memory_start;
++extern unsigned long memory_end;
++
++#endif /* !__ASSEMBLY__ */
++#include <asm/nios.h>
++#define PAGE_OFFSET ((int)(nasys_program_mem))
++
++#ifndef __ASSEMBLY__
++
++#define __pa(vaddr) virt_to_phys((void *)vaddr)
++#define __va(paddr) phys_to_virt((unsigned long)paddr)
++
++#define MAP_NR(addr) (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)
++
++#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)
++#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)
++
++#define virt_to_page(addr) (mem_map + (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT))
++#define page_to_virt(page) ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
++#define VALID_PAGE(page) ((page - mem_map) < max_mapnr)
++
++#define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn))
++#define page_to_pfn(page) virt_to_pfn(page_to_virt(page))
++
++#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
++ ((void *)(kaddr) < (void *)memory_end))
++
++#ifdef CONFIG_NO_KERNEL_MSG
++#define BUG_PRINT()
++#else
++#define BUG_PRINT() printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__)
++#endif
++
++#ifdef na_cpu_oci_core
++#define BUG_PANIC() asm volatile ("break") /* drop to debugger */
++#else
++// #define BUG_PANIC() while(1)
++#define BUG_PANIC() panic("BUG!")
++#endif
++
++#endif /* __ASSEMBLY__ */
++
++#endif /* __KERNEL__ */
++
++#endif /* _NIOS2_PAGE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/param.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/param.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,49 @@
++#ifndef _NIOS_PARAM_H
++#define _NIOS_PARAM_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/param.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#ifndef HZ
++#define HZ 100
++#endif
++
++#ifdef __KERNEL__
++#define USER_HZ HZ
++#define CLOCKS_PER_SEC (USER_HZ)
++#endif
++
++#define EXEC_PAGESIZE 4096
++
++#ifndef NGROUPS
++#define NGROUPS 32
++#endif
++
++#ifndef NOGROUP
++#define NOGROUP (-1)
++#endif
++
++#define MAXHOSTNAMELEN 64 /* max length of hostname */
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/pci.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/pci.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,75 @@
++#ifndef _ASM_NIOS2NOMMU_PCI_H
++#define _ASM_NIOS2NOMMU_PCI_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/pci.h
++ *
++ * Derived from asm-m68k/pci_m68k.h
++ * - m68k specific PCI declarations, by Wout Klaren.
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/scatterlist.h>
++
++struct pci_ops;
++
++/*
++ * Structure with hardware dependent information and functions of the
++ * PCI bus.
++ */
++
++struct pci_bus_info
++{
++ /*
++ * Resources of the PCI bus.
++ */
++
++ struct resource mem_space;
++ struct resource io_space;
++
++ /*
++ * System dependent functions.
++ */
++
++ struct pci_ops *m68k_pci_ops;
++
++ void (*fixup)(int pci_modify);
++ void (*conf_device)(struct pci_dev *dev);
++};
++
++#define pcibios_assign_all_busses() 0
++
++extern inline void pcibios_set_master(struct pci_dev *dev)
++{
++ /* No special bus mastering setup handling */
++}
++
++extern inline void pcibios_penalize_isa_irq(int irq)
++{
++ /* We don't do dynamic PCI IRQ allocation */
++}
++
++/* The PCI address space does equal the physical memory
++ * address space. The networking and block device layers use
++ * this boolean for bounce buffer decisions.
++ */
++#define PCI_DMA_BUS_IS_PHYS (1)
++
++#endif /* _ASM_NIOS2NOMMU_PCI_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/percpu.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/percpu.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,30 @@
++#ifndef __ARCH_NIOS2NOMMU_PERCPU__
++#define __ARCH_NIOS2NOMMU_PERCPU__
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/percpu.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm-generic/percpu.h>
++
++#endif /* __ARCH_NIOS2NOMMU_PERCPU__ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/pgalloc.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/pgalloc.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,32 @@
++#ifndef _NIOS2NOMMU_PGALLOC_H
++#define _NIOS2NOMMU_PGALLOC_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/pgalloc.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/setup.h>
++
++#define check_pgt_cache() do { } while (0)
++
++#endif /* _NIOS2NOMMU_PGALLOC_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/pgtable.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/pgtable.h 2005-05-18 20:36:09.000000000 +0200
+@@ -0,0 +1,100 @@
++#ifndef _NIOS_PGTABLE_H
++#define _NIOS_PGTABLE_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/pgtable.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++//vic - this bit copied from m68knommu version
++// #include <linux/config.h>
++#include <asm/setup.h>
++#include <asm/io.h>
++
++typedef pte_t *pte_addr_t;
++
++#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
++#define pgd_none(pgd) (0)
++#define pgd_bad(pgd) (0)
++#define pgd_clear(pgdp)
++#define kern_addr_valid(addr) (1)
++#define pmd_offset(a, b) ((void *)0)
++
++#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
++#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
++#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
++#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
++#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
++//vic - this bit copied from m68knommu version
++
++extern void paging_init(void);
++#define swapper_pg_dir ((pgd_t *) 0)
++
++#define __swp_type(x) (0)
++#define __swp_offset(x) (0)
++#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
++#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
++#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
++
++static inline int pte_file(pte_t pte) { return 0; }
++
++/*
++ * ZERO_PAGE is a global shared page that is always zero: used
++ * for zero-mapped memory areas etc..
++ */
++#define ZERO_PAGE(vaddr) (virt_to_page(0))
++
++extern unsigned int kobjsize(const void *objp);
++
++/*
++ * No page table caches to initialise
++ */
++#define pgtable_cache_init() do { } while (0)
++
++extern inline void flush_cache_mm(struct mm_struct *mm)
++{
++}
++
++extern inline void flush_cache_range(struct mm_struct *mm,
++ unsigned long start,
++ unsigned long end)
++{
++}
++
++/* Push the page at kernel virtual address and clear the icache */
++extern inline void flush_page_to_ram (unsigned long address)
++{
++}
++
++/* Push n pages at kernel virtual address and clear the icache */
++extern inline void flush_pages_to_ram (unsigned long address, int n)
++{
++}
++
++/*
++ * All 32bit addresses are effectively valid for vmalloc...
++ * Sort of meaningless for non-VM targets.
++ */
++#define VMALLOC_START 0
++#define VMALLOC_END 0xffffffff
++
++#endif /* _NIOS_PGTABLE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/pio_struct.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/pio_struct.h 2004-12-22 15:23:36.000000000 +0100
+@@ -0,0 +1,14 @@
++// PIO Peripheral
++
++// PIO Registers
++typedef volatile struct
++ {
++ int np_piodata; // read/write, up to 32 bits
++ int np_piodirection; // write/readable, up to 32 bits, 1->output bit
++ int np_piointerruptmask; // write/readable, up to 32 bits, 1->enable interrupt
++ int np_pioedgecapture; // read, up to 32 bits, cleared by any write
++ } np_pio;
++
++// PIO Routines
++void nr_pio_showhex(int value); // shows low byte on pio named na_seven_seg_pio
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/poll.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/poll.h 2004-03-04 15:03:18.000000000 +0100
+@@ -0,0 +1,46 @@
++#ifndef __NIOS2_POLL_H
++#define __NIOS2_POLL_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/poll.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#define POLLIN 1
++#define POLLPRI 2
++#define POLLOUT 4
++#define POLLERR 8
++#define POLLHUP 16
++#define POLLNVAL 32
++#define POLLRDNORM 64
++#define POLLWRNORM POLLOUT
++#define POLLRDBAND 128
++#define POLLWRBAND 256
++#define POLLMSG 0x0400
++
++struct pollfd {
++ int fd;
++ short events;
++ short revents;
++};
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/posix_types.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/posix_types.h 2004-03-04 11:54:08.000000000 +0100
+@@ -0,0 +1,89 @@
++#ifndef __ARCH_NIOS2_POSIX_TYPES_H
++#define __ARCH_NIOS2_POSIX_TYPES_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/posix_types.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++/*
++ * This file is generally used by user-level software, so you need to
++ * be a little careful about namespace pollution etc. Also, we cannot
++ * assume GCC is being used.
++ */
++
++typedef unsigned long __kernel_ino_t;
++typedef unsigned short __kernel_mode_t;
++typedef unsigned short __kernel_nlink_t;
++typedef long __kernel_off_t;
++typedef int __kernel_pid_t;
++typedef unsigned short __kernel_ipc_pid_t;
++typedef unsigned short __kernel_uid_t;
++typedef unsigned short __kernel_gid_t;
++typedef unsigned int __kernel_size_t;
++typedef int __kernel_ssize_t;
++typedef int __kernel_ptrdiff_t;
++typedef long __kernel_time_t;
++typedef long __kernel_suseconds_t;
++typedef long __kernel_clock_t;
++typedef int __kernel_timer_t;
++typedef int __kernel_clockid_t;
++typedef int __kernel_daddr_t;
++typedef char * __kernel_caddr_t;
++typedef unsigned short __kernel_uid16_t;
++typedef unsigned short __kernel_gid16_t;
++typedef unsigned int __kernel_uid32_t;
++typedef unsigned int __kernel_gid32_t;
++
++typedef unsigned short __kernel_old_uid_t;
++typedef unsigned short __kernel_old_gid_t;
++typedef unsigned short __kernel_old_dev_t;
++
++#ifdef __GNUC__
++typedef long long __kernel_loff_t;
++#endif
++
++typedef struct {
++#if defined(__KERNEL__) || defined(__USE_ALL)
++ int val[2];
++#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
++ int __val[2];
++#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
++} __kernel_fsid_t;
++
++#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
++
++#undef __FD_SET
++#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d))
++
++#undef __FD_CLR
++#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d))
++
++#undef __FD_ISSET
++#define __FD_ISSET(d, set) ((set)->fds_bits[__FDELT(d)] & __FDMASK(d))
++
++#undef __FD_ZERO
++#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof(*(fd_set *)fdsetp)))
++
++#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/preem_latency.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/preem_latency.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,39 @@
++#ifndef _ASM_PREEM_LATENCY_H
++#define _ASM_PREEM_LATENCY_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/preem_latency.h
++ *
++ * timing support for preempt-stats patch
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/nios.h>
++
++#define readclock(low) \
++do {\
++ *(volatile unsigned long *)na_Counter_64_bit=1; \
++ low=*(volatile unsigned long *)na_Counter_64_bit; \
++} while (0)
++#define readclock_init()
++
++#endif /* _ASM_PREEM_LATENCY_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/processor.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/processor.h 2004-06-04 15:44:18.000000000 +0200
+@@ -0,0 +1,148 @@
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/processor.h
++ *
++ * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
++ * Copyright (C) 2001 Ken Hill (khill@microtronix.com)
++ * Vic Phillips (vic@microtronix.com)
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * hacked from:
++ * include/asm-sparc/processor.h
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ * Nov/02/2003 dgt Fix task_size
++ *
++ ---------------------------------------------------------------------*/
++
++#ifndef __ASM_NIOS_PROCESSOR_H
++#define __ASM_NIOS_PROCESSOR_H
++
++#define NIOS2_FLAG_KTHREAD 0x00000001 /* task is a kernel thread */
++#define NIOS2_FLAG_COPROC 0x00000002 /* Thread used coprocess */
++#define NIOS2_FLAG_DEBUG 0x00000004 /* task is being debugged */
++
++#define NIOS2_OP_NOP 0x1883a
++#define NIOS2_OP_BREAK 0x3da03a
++
++#ifndef __ASSEMBLY__
++
++/*
++ * Default implementation of macro that returns current
++ * instruction pointer ("program counter").
++ */
++#define current_text_addr() ({ __label__ _l; _l: &&_l;})
++
++#include <linux/a.out.h>
++#include <linux/string.h>
++
++#include <asm/ptrace.h>
++#include <asm/signal.h>
++#include <asm/segment.h>
++#include <asm/current.h>
++#include <asm/system.h> /* for get_hi_limit */
++
++/*
++ * Bus types
++ */
++#define EISA_bus 0
++#define EISA_bus__is_a_macro /* for versions in ksyms.c */
++#define MCA_bus 0
++#define MCA_bus__is_a_macro /* for versions in ksyms.c */
++
++/*
++ * The nios has no problems with write protection
++ */
++#define wp_works_ok 1
++#define wp_works_ok__is_a_macro /* for versions in ksyms.c */
++
++/* Whee, this is STACK_TOP and the lowest kernel address too... */
++#if 0
++#define KERNBASE 0x00000000 /* First address the kernel will eventually be */
++#define TASK_SIZE (KERNBASE)
++#define MAX_USER_ADDR TASK_SIZE
++#define MMAP_SEARCH_START (TASK_SIZE/3)
++#endif
++
++#define TASK_SIZE ((unsigned int) nasys_program_mem_end) //...this is better...
++
++/*
++ * This decides where the kernel will search for a free chunk of vm
++ * space during mmap's. We won't be using it
++ */
++#define TASK_UNMAPPED_BASE 0
++
++/* The Nios processor specific thread struct. */
++struct thread_struct {
++ struct pt_regs *kregs;
++
++ /* For signal handling */
++ unsigned long sig_address;
++ unsigned long sig_desc;
++
++ /* Context switch saved kernel state. */
++ unsigned long ksp;
++ unsigned long kpsr;
++ unsigned long kesr;
++
++ /* Flags are defined below */
++
++ unsigned long flags;
++ int current_ds;
++ struct exec core_exec; /* just what it says. */
++};
++
++#define INIT_MMAP { &init_mm, (0), (0), \
++ __pgprot(0x0) , VM_READ | VM_WRITE | VM_EXEC }
++
++#define INIT_THREAD { \
++ .kregs = 0, \
++ .sig_address = 0, \
++ .sig_desc = 0, \
++ .ksp = 0, \
++ .kpsr = 0, \
++ .kesr = PS_S, \
++ .flags = NIOS2_FLAG_KTHREAD, \
++ .current_ds = __KERNEL_DS, \
++ .core_exec = INIT_EXEC \
++}
++
++/* Free all resources held by a thread. */
++extern void release_thread(struct task_struct *);
++
++extern unsigned long thread_saved_pc(struct task_struct *t);
++
++extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp);
++
++/* Prepare to copy thread state - unlazy all lazy status */
++#define prepare_to_copy(tsk) do { } while (0)
++
++extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
++
++unsigned long get_wchan(struct task_struct *p);
++
++#define KSTK_EIP(tsk) ((tsk)->thread.kregs->ea)
++#define KSTK_ESP(tsk) ((tsk)->thread.kregs->sp)
++
++#ifdef __KERNEL__
++/* Allocation and freeing of basic task resources. */
++
++//;dgt2;#define alloc_task_struct() ((struct task_struct *) xx..see..linux..fork..xx __get_free_pages(GFP_KERNEL,1))
++//;dgt2;#define get_task_struct(tsk) xx..see..linux..sched.h...atomic_inc(&mem_map[MAP_NR(tsk)].count)
++
++#endif
++
++#define cpu_relax() do { } while (0)
++#endif /* __ASSEMBLY__ */
++#endif /* __ASM_NIOS_PROCESSOR_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ptrace.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ptrace.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,141 @@
++/*
++ * Taken from the m68k port.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#ifndef _NIOS2NOMMU_PTRACE_H
++#define _NIOS2NOMMU_PTRACE_H
++
++#ifndef __ASSEMBLY__
++
++#define PTR_R0 0
++#define PTR_R1 1
++#define PTR_R2 2
++#define PTR_R3 3
++#define PTR_R4 4
++#define PTR_R5 5
++#define PTR_R6 6
++#define PTR_R7 7
++#define PTR_R8 8
++#define PTR_R9 9
++#define PTR_R10 10
++#define PTR_R11 11
++#define PTR_R12 12
++#define PTR_R13 13
++#define PTR_R14 14
++#define PTR_R15 15
++#define PTR_R16 16
++#define PTR_R17 17
++#define PTR_R18 18
++#define PTR_R19 19
++#define PTR_R20 20
++#define PTR_R21 21
++#define PTR_R22 22
++#define PTR_R23 23
++#define PTR_R24 24
++#define PTR_R25 25
++#define PTR_GP 26
++#define PTR_SP 27
++#define PTR_FP 28
++#define PTR_EA 29
++#define PTR_BA 30
++#define PTR_RA 31
++#define PTR_STATUS 32
++#define PTR_ESTATUS 33
++#define PTR_BSTATUS 34
++#define PTR_IENABLE 35
++#define PTR_IPENDING 36
++
++/* this struct defines the way the registers are stored on the
++ stack during a system call.
++
++ There is a fake_regs in setup.c that has to match pt_regs.*/
++
++struct pt_regs {
++ unsigned long r8;
++ unsigned long r9;
++ unsigned long r10;
++ unsigned long r11;
++ unsigned long r12;
++ unsigned long r13;
++ unsigned long r14;
++ unsigned long r15;
++ unsigned long r1;
++ unsigned long r2;
++ unsigned long r3;
++ unsigned long r4;
++ unsigned long r5;
++ unsigned long r6;
++ unsigned long r7;
++ unsigned long orig_r2;
++ unsigned long ra;
++ unsigned long fp;
++ unsigned long sp;
++ unsigned long gp;
++ unsigned long estatus;
++ unsigned long status_extension;
++ unsigned long ea;
++};
++
++
++/*
++ * This is the extended stack used by signal handlers and the context
++ * switcher: it's pushed after the normal "struct pt_regs".
++ */
++struct switch_stack {
++ unsigned long r16;
++ unsigned long r17;
++ unsigned long r18;
++ unsigned long r19;
++ unsigned long r20;
++ unsigned long r21;
++ unsigned long r22;
++ unsigned long r23;
++ unsigned long fp;
++ unsigned long gp;
++ unsigned long ra;
++};
++
++/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
++#define PTRACE_GETREGS 12
++#define PTRACE_SETREGS 13
++#ifdef CONFIG_FPU
++#define PTRACE_GETFPREGS 14
++#define PTRACE_SETFPREGS 15
++#endif
++
++#ifdef __KERNEL__
++
++#ifndef PS_S
++#define PS_S (0x00000001)
++#endif
++#ifndef PS_T
++#define PS_T (0x00000002)
++#endif
++
++#define user_mode(regs) (!((regs)->status_extension & PS_S))
++#define instruction_pointer(regs) ((regs)->ra)
++#define profile_pc(regs) instruction_pointer(regs)
++extern void show_regs(struct pt_regs *);
++
++#endif /* __KERNEL__ */
++#endif /* __ASSEMBLY__ */
++#endif /* _NIOS2NOMMU_PTRACE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/resource.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/resource.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,73 @@
++#ifndef _NIOS2NOMMU_RESOURCE_H
++#define _NIOS2NOMMU_RESOURCE_H
++
++/*--------------------------------------------------------------------
++ *
++ * Resource limits
++ *
++ * include/asm-nios2nommu/resource.h
++ *
++ * Derived from M68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#define RLIMIT_CPU 0 /* CPU time in ms */
++#define RLIMIT_FSIZE 1 /* Maximum filesize */
++#define RLIMIT_DATA 2 /* max data size */
++#define RLIMIT_STACK 3 /* max stack size */
++#define RLIMIT_CORE 4 /* max core file size */
++#define RLIMIT_RSS 5 /* max resident set size */
++#define RLIMIT_NPROC 6 /* max number of processes */
++#define RLIMIT_NOFILE 7 /* max number of open files */
++#define RLIMIT_MEMLOCK 8 /* max locked-in-memory address space */
++#define RLIMIT_AS 9 /* address space limit */
++#define RLIMIT_LOCKS 10 /* maximum file locks held */
++#define RLIMIT_SIGPENDING 11 /* max number of pending signals */
++#define RLIMIT_MSGQUEUE 12 /* maximum bytes in POSIX mqueues */
++
++#define RLIM_NLIMITS 13
++
++/*
++ * SuS says limits have to be unsigned.
++ * Which makes a ton more sense anyway.
++ */
++#define RLIM_INFINITY (~0UL)
++
++#ifdef __KERNEL__
++
++#define INIT_RLIMITS \
++{ \
++ { RLIM_INFINITY, RLIM_INFINITY }, \
++ { RLIM_INFINITY, RLIM_INFINITY }, \
++ { RLIM_INFINITY, RLIM_INFINITY }, \
++ { _STK_LIM, RLIM_INFINITY }, \
++ { 0, RLIM_INFINITY }, \
++ { RLIM_INFINITY, RLIM_INFINITY }, \
++ { 0, 0 }, \
++ { INR_OPEN, INR_OPEN }, \
++ { MLOCK_LIMIT, MLOCK_LIMIT }, \
++ { RLIM_INFINITY, RLIM_INFINITY }, \
++ { RLIM_INFINITY, RLIM_INFINITY }, \
++ { MAX_SIGPENDING, MAX_SIGPENDING }, \
++ { MQ_BYTES_MAX, MQ_BYTES_MAX }, \
++}
++
++#endif /* __KERNEL__ */
++
++#endif /* _NIOS2NOMMU_RESOURCE_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/rmap.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/rmap.h 2004-01-16 16:00:44.000000000 +0100
+@@ -0,0 +1,2 @@
++/* Do not need anything here */
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/scatterlist.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/scatterlist.h 2004-12-15 12:02:14.000000000 +0100
+@@ -0,0 +1,40 @@
++#ifndef _NIOS2NOMMU_SCATTERLIST_H
++#define _NIOS2NOMMU_SCATTERLIST_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/scatterlist.h
++ *
++ * Derived from M68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++struct scatterlist {
++ struct page *page;
++ unsigned int offset;
++ dma_addr_t dma_address;
++ unsigned int length;
++};
++
++#define sg_dma_address(sg) ((sg)->dma_address)
++#define sg_dma_len(sg) ((sg)->length)
++
++#define ISA_DMA_THRESHOLD (0xffffffff)
++
++#endif /* !(_NIOS2NOMMU_SCATTERLIST_H) */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/sections.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/sections.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,30 @@
++#ifndef _NIOS2NOMMU_SECTIONS_H
++#define _NIOS2NOMMU_SECTIONS_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/sections.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm-generic/sections.h>
++
++#endif /* _NIOS2NOMMU_SECTIONS_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/segment.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/segment.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,75 @@
++#ifndef _NIOS2NOMMU_SEGMENT_H
++#define _NIOS2NOMMU_SEGMENT_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/segment.h
++ *
++ * Derived from M68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++/* define constants */
++/* Address spaces (FC0-FC2) */
++#define USER_DATA (1)
++#ifndef __USER_DS
++#define __USER_DS (USER_DATA)
++#endif
++#define USER_PROGRAM (2)
++#define SUPER_DATA (5)
++#ifndef __KERNEL_DS
++#define __KERNEL_DS (SUPER_DATA)
++#endif
++#define SUPER_PROGRAM (6)
++#define CPU_SPACE (7)
++
++#ifndef __ASSEMBLY__
++
++typedef struct {
++ unsigned long seg;
++} mm_segment_t;
++
++#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
++#define USER_DS MAKE_MM_SEG(__USER_DS)
++#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS)
++
++/*
++ * Get/set the SFC/DFC registers for MOVES instructions
++ */
++
++static inline mm_segment_t get_fs(void)
++{
++ return USER_DS;
++}
++
++static inline mm_segment_t get_ds(void)
++{
++ /* return the supervisor data space code */
++ return KERNEL_DS;
++}
++
++static inline void set_fs(mm_segment_t val)
++{
++}
++
++#define segment_eq(a,b) ((a).seg == (b).seg)
++
++#endif /* __ASSEMBLY__ */
++
++#endif /* _NIOS2NOMMU_SEGMENT_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/semaphore-helper.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/semaphore-helper.h 2005-05-18 20:36:13.000000000 +0200
+@@ -0,0 +1,101 @@
++#ifndef _NIOS2NOMMU_SEMAPHORE_HELPER_H
++#define _NIOS2NOMMU_SEMAPHORE_HELPER_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/semaphore.h
++ *
++ * SMP- and interrupt-safe semaphores helper functions.
++ *
++ * Derived from M68knommu
++ *
++ * (C) Copyright 1996 Linus Torvalds
++ * m68k version by Andreas Schwab
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++// #include <linux/config.h>
++
++/*
++ * These two _must_ execute atomically wrt each other.
++ */
++static inline void wake_one_more(struct semaphore * sem)
++{
++ atomic_inc(&sem->waking);
++}
++
++static inline int waking_non_zero(struct semaphore *sem)
++{
++ int ret;
++ unsigned long flags;
++
++ spin_lock_irqsave(&semaphore_wake_lock, flags);
++ ret = 0;
++ if (atomic_read(&sem->waking) > 0) {
++ atomic_dec(&sem->waking);
++ ret = 1;
++ }
++ spin_unlock_irqrestore(&semaphore_wake_lock, flags);
++ return ret;
++}
++
++/*
++ * waking_non_zero_interruptible:
++ * 1 got the lock
++ * 0 go to sleep
++ * -EINTR interrupted
++ */
++static inline int waking_non_zero_interruptible(struct semaphore *sem,
++ struct task_struct *tsk)
++{
++ int ret;
++ unsigned long flags;
++
++ spin_lock_irqsave(&semaphore_wake_lock, flags);
++ ret = 0;
++ if (atomic_read(&sem->waking) > 0) {
++ atomic_dec(&sem->waking);
++ ret = 1;
++ } else if (signal_pending(tsk)) {
++ atomic_inc(&sem->count);
++ ret = -EINTR;
++ }
++ spin_unlock_irqrestore(&semaphore_wake_lock, flags);
++ return ret;
++}
++
++/*
++ * waking_non_zero_trylock:
++ * 1 failed to lock
++ * 0 got the lock
++ */
++static inline int waking_non_zero_trylock(struct semaphore *sem)
++{
++ int ret;
++ unsigned long flags;
++
++ spin_lock_irqsave(&semaphore_wake_lock, flags);
++ ret = 1;
++ if (atomic_read(&sem->waking) > 0) {
++ atomic_dec(&sem->waking);
++ ret = 0;
++ } else
++ atomic_inc(&sem->count);
++ spin_unlock_irqrestore(&semaphore_wake_lock, flags);
++ return ret;
++}
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/semaphore.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/semaphore.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,155 @@
++#ifndef _NIOS2NOMMU_SEMAPHORE_H
++#define _NIOS2NOMMU_SEMAPHORE_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/semaphore.h
++ *
++ * Interrupt-safe semaphores..
++ *
++ * Derived from M68knommu
++ *
++ * (C) Copyright 1996 Linus Torvalds
++ * m68k version by Andreas Schwab
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++#define RW_LOCK_BIAS 0x01000000
++
++#ifndef __ASSEMBLY__
++
++#include <linux/linkage.h>
++#include <linux/wait.h>
++#include <linux/spinlock.h>
++#include <linux/rwsem.h>
++
++#include <asm/system.h>
++#include <asm/atomic.h>
++
++struct semaphore {
++ atomic_t count;
++ atomic_t waking;
++ wait_queue_head_t wait;
++};
++
++#define __SEMAPHORE_INITIALIZER(name, n) \
++{ \
++ .count = ATOMIC_INIT(n), \
++ .waking = ATOMIC_INIT(0), \
++ .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
++}
++
++#define __MUTEX_INITIALIZER(name) \
++ __SEMAPHORE_INITIALIZER(name,1)
++
++#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
++ struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
++
++#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
++#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
++
++extern inline void sema_init (struct semaphore *sem, int val)
++{
++ *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val);
++}
++
++static inline void init_MUTEX (struct semaphore *sem)
++{
++ sema_init(sem, 1);
++}
++
++static inline void init_MUTEX_LOCKED (struct semaphore *sem)
++{
++ sema_init(sem, 0);
++}
++
++asmlinkage void __down(struct semaphore * sem);
++asmlinkage int __down_interruptible(struct semaphore * sem);
++asmlinkage int __down_trylock(struct semaphore * sem);
++asmlinkage void __up(struct semaphore * sem);
++
++asmlinkage void __down_failed(void /* special register calling convention */);
++asmlinkage int __down_failed_interruptible(void /* params in registers */);
++asmlinkage int __down_failed_trylock(void /* params in registers */);
++asmlinkage void __up_wakeup(void /* special register calling convention */);
++
++extern spinlock_t semaphore_wake_lock;
++
++/*
++ * This is ugly, but we want the default case to fall through.
++ * "down_failed" is a special asm handler that calls the C
++ * routine that actually waits.
++ */
++extern inline void down(struct semaphore * sem)
++{
++ might_sleep();
++
++ #if 0
++ ...Nios2 has no atomic "decrement memory"....
++ #else
++ if (atomic_dec_return(&sem->count) < 0)
++ __down(sem);
++ #endif
++}
++
++extern inline int down_interruptible(struct semaphore * sem)
++{
++ int ret = 0;
++
++
++ might_sleep();
++
++ #if 0
++ ...Nios2 has no atomic "decrement memory"....
++ #else
++ if(atomic_dec_return(&sem->count) < 0)
++ ret = __down_interruptible(sem);
++ return ret;
++ #endif
++}
++
++extern inline int down_trylock(struct semaphore * sem)
++{
++ #if 0
++ ...Nios2 has no atomic "decrement memory"....
++ #else
++ int ret = 0;
++
++ if (atomic_dec_return (&sem->count) < 0)
++ ret = __down_trylock(sem);
++ return ret;
++ #endif
++}
++
++/*
++ * Note! This is subtle. We jump to wake people up only if
++ * the semaphore was negative (== somebody was waiting on it).
++ * The default case (no contention) will result in NO
++ * jumps for both down() and up().
++ */
++extern inline void up(struct semaphore * sem)
++{
++ #if 0
++ ...Nios2 has no atomic "increment memory"....
++ #else
++ if (atomic_inc_return(&sem->count) <= 0)
++ __up(sem);
++ #endif
++}
++
++#endif /* __ASSEMBLY__ */
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/sembuf.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/sembuf.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,48 @@
++#ifndef _NIOS_SEMBUF_H
++#define _NIOS_SEMBUF_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/sembuf.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++/*
++ * Note extra padding because this structure is passed back and forth
++ * between kernel and user space.
++ *
++ * Pad space is left for:
++ * - 64-bit time_t to solve y2038 problem
++ * - 2 miscellaneous 32-bit values
++ */
++
++struct semid64_ds {
++ struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
++ __kernel_time_t sem_otime; /* last semop time */
++ unsigned long __unused1;
++ __kernel_time_t sem_ctime; /* last change time */
++ unsigned long __unused2;
++ unsigned long sem_nsems; /* no. of semaphores in array */
++ unsigned long __unused3;
++ unsigned long __unused4;
++};
++
++#endif /* _NIOS_SEMBUF_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/setup.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/setup.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,31 @@
++/* Copied from i386 port.
++ * Just a place holder. We don't want to have to test x86 before
++ * we include stuff
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _NIOS2_SETUP_H
++#define _NIOS2_SETUP_H
++
++#define COMMAND_LINE_SIZE 512
++
++#endif /* _NIOS2_SETUP_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/shmbuf.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/shmbuf.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,64 @@
++#ifndef _NIOS_SHMBUF_H
++#define _NIOS_SHMBUF_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/shmbuf.h
++ *
++ * Derived from m68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++/* Note extra padding because this structure is passed back and forth
++ * between kernel and user space.
++ *
++ * Pad space is left for:
++ * - 64-bit time_t to solve y2038 problem
++ * - 2 miscellaneous 32-bit values
++ */
++
++struct shmid64_ds {
++ struct ipc64_perm shm_perm; /* operation perms */
++ size_t shm_segsz; /* size of segment (bytes) */
++ __kernel_time_t shm_atime; /* last attach time */
++ unsigned long __unused1;
++ __kernel_time_t shm_dtime; /* last detach time */
++ unsigned long __unused2;
++ __kernel_time_t shm_ctime; /* last change time */
++ unsigned long __unused3;
++ __kernel_pid_t shm_cpid; /* pid of creator */
++ __kernel_pid_t shm_lpid; /* pid of last operator */
++ unsigned long shm_nattch; /* no. of current attaches */
++ unsigned long __unused4;
++ unsigned long __unused5;
++};
++
++struct shminfo64 {
++ unsigned long shmmax;
++ unsigned long shmmin;
++ unsigned long shmmni;
++ unsigned long shmseg;
++ unsigned long shmall;
++ unsigned long __unused1;
++ unsigned long __unused2;
++ unsigned long __unused3;
++ unsigned long __unused4;
++};
++
++#endif /* _NIOS_SHMBUF_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/shmparam.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/shmparam.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,30 @@
++#ifndef __NIOS2NOMMU_SHMPARAM_H__
++#define __NIOS2NOMMU_SHMPARAM_H__
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/shmparam.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
++
++#endif /* __NIOS2NOMMU_SHMPARAM_H__ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/sigcontext.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/sigcontext.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,35 @@
++/*
++ * Taken from the m68knommu.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _ASM_NIOS2NOMMU_SIGCONTEXT_H
++#define _ASM_NIOS2NOMMU_SIGCONTEXT_H
++
++#include <asm/ptrace.h>
++
++struct sigcontext {
++ struct pt_regs regs;
++ unsigned long sc_mask; /* old sigmask */
++};
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/siginfo.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/siginfo.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,28 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _NIOS2NOMMU_SIGINFO_H
++#define _NIOS2NOMMU_SIGINFO_H
++
++#include <asm-generic/siginfo.h>
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/signal.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/signal.h 2004-02-12 18:06:40.000000000 +0100
+@@ -0,0 +1,207 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _NIOS2_SIGNAL_H
++#define _NIOS2_SIGNAL_H
++
++#include <linux/types.h>
++
++/* Avoid too many header ordering problems. */
++struct siginfo;
++
++#ifdef __KERNEL__
++/* Most things should be clean enough to redefine this at will, if care
++ is taken to make libc match. */
++
++#define _NSIG 64
++#define _NSIG_BPW 32
++#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
++
++typedef unsigned long old_sigset_t; /* at least 32 bits */
++
++typedef struct {
++ unsigned long sig[_NSIG_WORDS];
++} sigset_t;
++
++#else
++/* Here we must cater to libcs that poke about in kernel headers. */
++
++#define NSIG 32
++typedef unsigned long sigset_t;
++
++#endif /* __KERNEL__ */
++
++#define SIGHUP 1
++#define SIGINT 2
++#define SIGQUIT 3
++#define SIGILL 4
++#define SIGTRAP 5
++#define SIGABRT 6
++#define SIGIOT 6
++#define SIGBUS 7
++#define SIGFPE 8
++#define SIGKILL 9
++#define SIGUSR1 10
++#define SIGSEGV 11
++#define SIGUSR2 12
++#define SIGPIPE 13
++#define SIGALRM 14
++#define SIGTERM 15
++#define SIGSTKFLT 16
++#define SIGCHLD 17
++#define SIGCONT 18
++#define SIGSTOP 19
++#define SIGTSTP 20
++#define SIGTTIN 21
++#define SIGTTOU 22
++#define SIGURG 23
++#define SIGXCPU 24
++#define SIGXFSZ 25
++#define SIGVTALRM 26
++#define SIGPROF 27
++#define SIGWINCH 28
++#define SIGIO 29
++#define SIGPOLL SIGIO
++/*
++#define SIGLOST 29
++*/
++#define SIGPWR 30
++#define SIGSYS 31
++#define SIGUNUSED 31
++
++/* These should not be considered constants from userland. */
++#define SIGRTMIN 32
++#define SIGRTMAX _NSIG-1
++
++/*
++ * SA_FLAGS values:
++ *
++ * SA_ONSTACK indicates that a registered stack_t will be used.
++ * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
++ * SA_RESTART flag to get restarting signals (which were the default long ago)
++ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
++ * SA_RESETHAND clears the handler when the signal is delivered.
++ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
++ * SA_NODEFER prevents the current signal from being masked in the handler.
++ *
++ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
++ * Unix names RESETHAND and NODEFER respectively.
++ */
++#define SA_NOCLDSTOP 0x00000001
++#define SA_NOCLDWAIT 0x00000002 /* not supported yet */
++#define SA_SIGINFO 0x00000004
++#define SA_ONSTACK 0x08000000
++#define SA_RESTART 0x10000000
++#define SA_NODEFER 0x40000000
++#define SA_RESETHAND 0x80000000
++
++#define SA_NOMASK SA_NODEFER
++#define SA_ONESHOT SA_RESETHAND
++#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */
++
++#define SA_RESTORER 0x04000000
++
++/*
++ * sigaltstack controls
++ */
++#define SS_ONSTACK 1
++#define SS_DISABLE 2
++
++#define MINSIGSTKSZ 2048
++#define SIGSTKSZ 8192
++
++#ifdef __KERNEL__
++/*
++ * These values of sa_flags are used only by the kernel as part of the
++ * irq handling routines.
++ *
++ * SA_INTERRUPT is also used by the irq handling routines.
++ * SA_SHIRQ is for shared interrupt support on PCI and EISA.
++ */
++#define SA_PROBE SA_ONESHOT
++#define SA_SAMPLE_RANDOM SA_RESTART
++#define SA_SHIRQ 0x04000000
++#endif
++
++#define SIG_BLOCK 0 /* for blocking signals */
++#define SIG_UNBLOCK 1 /* for unblocking signals */
++#define SIG_SETMASK 2 /* for setting the signal mask */
++
++/* Type of a signal handler. */
++typedef void (*__sighandler_t)(int);
++
++#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
++#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
++#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
++
++#ifdef __KERNEL__
++struct old_sigaction {
++ __sighandler_t sa_handler;
++ old_sigset_t sa_mask;
++ unsigned long sa_flags;
++ void (*sa_restorer)(void);
++};
++
++struct sigaction {
++ __sighandler_t sa_handler;
++ unsigned long sa_flags;
++ void (*sa_restorer)(void);
++ sigset_t sa_mask; /* mask last for extensibility */
++};
++
++struct k_sigaction {
++ struct sigaction sa;
++};
++#else
++/* Here we must cater to libcs that poke about in kernel headers. */
++
++struct sigaction {
++ union {
++ __sighandler_t _sa_handler;
++ void (*_sa_sigaction)(int, struct siginfo *, void *);
++ } _u;
++ sigset_t sa_mask;
++ unsigned long sa_flags;
++ void (*sa_restorer)(void);
++};
++
++#define sa_handler _u._sa_handler
++#define sa_sigaction _u._sa_sigaction
++
++#endif /* __KERNEL__ */
++
++typedef struct sigaltstack {
++ void *ss_sp;
++ int ss_flags;
++ size_t ss_size;
++} stack_t;
++
++#ifdef __KERNEL__
++
++#include <asm/sigcontext.h>
++#undef __HAVE_ARCH_SIG_BITOPS
++
++#define ptrace_signal_deliver(regs, cookie) do { } while (0)
++
++#endif /* __KERNEL__ */
++
++#endif /* _NIOS2_SIGNAL_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/smp.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/smp.h 2005-05-18 20:36:18.000000000 +0200
+@@ -0,0 +1,34 @@
++#ifndef __ASM_SMP_H
++#define __ASM_SMP_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/smp.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++// #include <linux/config.h>
++
++#ifdef CONFIG_SMP
++#error SMP not supported
++#endif
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/socket.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/socket.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,74 @@
++#ifndef _ASM_SOCKET_H
++#define _ASM_SOCKET_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/socket.h
++ *
++ * Derived from m68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/sockios.h>
++
++/* For setsockopt(2) */
++#define SOL_SOCKET 1
++
++#define SO_DEBUG 1
++#define SO_REUSEADDR 2
++#define SO_TYPE 3
++#define SO_ERROR 4
++#define SO_DONTROUTE 5
++#define SO_BROADCAST 6
++#define SO_SNDBUF 7
++#define SO_RCVBUF 8
++#define SO_KEEPALIVE 9
++#define SO_OOBINLINE 10
++#define SO_NO_CHECK 11
++#define SO_PRIORITY 12
++#define SO_LINGER 13
++#define SO_BSDCOMPAT 14
++/* To add :#define SO_REUSEPORT 15 */
++#define SO_PASSCRED 16
++#define SO_PEERCRED 17
++#define SO_RCVLOWAT 18
++#define SO_SNDLOWAT 19
++#define SO_RCVTIMEO 20
++#define SO_SNDTIMEO 21
++
++/* Security levels - as per NRL IPv6 - don't actually do anything */
++#define SO_SECURITY_AUTHENTICATION 22
++#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
++#define SO_SECURITY_ENCRYPTION_NETWORK 24
++
++#define SO_BINDTODEVICE 25
++
++/* Socket filtering */
++#define SO_ATTACH_FILTER 26
++#define SO_DETACH_FILTER 27
++
++#define SO_PEERNAME 28
++#define SO_TIMESTAMP 29
++#define SCM_TIMESTAMP SO_TIMESTAMP
++
++#define SO_ACCEPTCONN 30
++
++#define SO_PEERSEC 31 /* ;dgt2;tmp; */
++
++#endif /* _ASM_SOCKET_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/sockios.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/sockios.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,38 @@
++#ifndef _ASM_NIOS_SOCKIOS_H
++#define _ASM_NIOS_SOCKIOS_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/sockios.h
++ *
++ * Socket-level I/O control calls.
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#define FIOSETOWN 0x8901
++#define SIOCSPGRP 0x8902
++#define FIOGETOWN 0x8903
++#define SIOCGPGRP 0x8904
++#define SIOCATMARK 0x8905
++#define SIOCGSTAMP 0x8906 /* Get stamp */
++
++#endif /* !(_ASM_NIOS_SOCKIOS_H) */
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/spi.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/spi.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,92 @@
++#ifndef _ASM_SPI_H_
++#define _ASM_SPI_H_ 1
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/spi.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/nios.h>
++
++int register_NIOS_SPI( void );
++void unregister_NIOS_SPI( void );
++
++#if defined(MODULE)
++void cleanup_module( void );
++int init_module( void );
++#endif
++
++#if defined(__KERNEL__)
++int spi_reset ( void );
++#endif
++
++
++#define clockCS 0x01
++#define temperatureCS 0x02
++
++#define clock_read_base 0x00
++#define clock_write_base 0x80
++#define clock_read_control 0x0F
++#define clock_read_trickle 0x11
++
++#define clock_read_sec 0x00
++#define clock_read_min 0x01
++#define clock_read_hour 0x02
++#define clock_read_day 0x03
++#define clock_read_date 0x04
++#define clock_read_month 0x05
++#define clock_read_year 0x06
++
++#define clock_write_control 0x8F
++#define clock_write_trickle 0x91
++#define clock_write_sec 0x80
++#define clock_write_min 0x81
++#define clock_write_hour 0x82
++#define clock_write_day 0x83
++#define clock_write_date 0x84
++#define clock_write_month 0x85
++#define clock_write_year 0x86
++
++#define clock_write_ram_start 0xA0
++#define clock_write_ram_end 0x100
++#define clock_read_ram_start 0x20
++#define clock_read_ram_end 0x80
++
++
++#define clock_sec_def 0x11
++#define clock_min_def 0x59
++#define clock_hour_def 0x71
++#define clock_day_def 0x00
++#define clock_date_def 0x20
++#define clock_month_def 0x12
++#define clock_year_def 0x34
++
++#define temp_read_base 0x00
++#define temp_write_base 0x80
++#define temp_read_control 0x00
++#define temp_write_control 0x80
++#define temp_read_msb 0x02
++#define temp_read_lsb 0x01
++
++#define MAX_TEMP_VAR 10
++
++#endif /*_ASM_SPI_H_*/
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/spinlock.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/spinlock.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,30 @@
++#ifndef __NIOS_SPINLOCK_H
++#define __NIOS_SPINLOCK_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/spinlock.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#error "Nios doesn't do SMP yet"
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/stat.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/stat.h 2004-03-04 12:52:14.000000000 +0100
+@@ -0,0 +1,102 @@
++#ifndef _ASMNIOS2NOMMU_STAT_H
++#define _ASMNIOS2NOMMU_STAT_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/stat.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++struct __old_kernel_stat {
++ unsigned short st_dev;
++ unsigned short st_ino;
++ unsigned short st_mode;
++ unsigned short st_nlink;
++ unsigned short st_uid;
++ unsigned short st_gid;
++ unsigned short st_rdev;
++ unsigned long st_size;
++ unsigned long st_atime;
++ unsigned long st_mtime;
++ unsigned long st_ctime;
++};
++
++struct stat {
++ unsigned short st_dev;
++ unsigned short __pad1;
++ unsigned long st_ino;
++ unsigned short st_mode;
++ unsigned short st_nlink;
++ unsigned short st_uid;
++ unsigned short st_gid;
++ unsigned short st_rdev;
++ unsigned short __pad2;
++ unsigned long st_size;
++ unsigned long st_blksize;
++ unsigned long st_blocks;
++ unsigned long st_atime;
++ unsigned long __unused1;
++ unsigned long st_mtime;
++ unsigned long __unused2;
++ unsigned long st_ctime;
++ unsigned long __unused3;
++ unsigned long __unused4;
++ unsigned long __unused5;
++};
++
++/* This matches struct stat64 in glibc2.1, hence the absolutely
++ * insane amounts of padding around dev_t's.
++ */
++struct stat64 {
++ unsigned long long st_dev;
++ unsigned char __pad1[4];
++
++#define STAT64_HAS_BROKEN_ST_INO 1
++ unsigned long __st_ino;
++
++ unsigned int st_mode;
++ unsigned int st_nlink;
++
++ unsigned long st_uid;
++ unsigned long st_gid;
++
++ unsigned long long st_rdev;
++ unsigned char __pad3[4];
++
++ long long st_size;
++ unsigned long st_blksize;
++
++ unsigned long __pad4; /* future possible st_blocks high bits */
++ unsigned long st_blocks; /* Number 512-byte blocks allocated. */
++
++ unsigned long st_atime;
++ unsigned long st_atime_nsec;
++
++ unsigned long st_mtime;
++ unsigned long st_mtime_nsec;
++
++ unsigned long st_ctime;
++ unsigned long st_ctime_nsec;
++
++ unsigned long long st_ino;
++};
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/statfs.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/statfs.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,30 @@
++#ifndef _NIOS2NOMMU_STATFS_H
++#define _NIOS2NOMMU_STATFS_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/statfs.h
++ *
++ * Derived from M68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm-generic/statfs.h>
++
++#endif /* _NIOS2NOMMU_STATFS_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/string.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/string.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,45 @@
++#ifndef __NIOS_STRING_H__
++#define __NIOS_STRING_H__
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/string.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#ifdef __KERNEL__ /* only set these up for kernel code */
++
++#define __HAVE_ARCH_MEMMOVE
++void * memmove(void * d, const void * s, size_t count);
++#define __HAVE_ARCH_MEMCPY
++extern void * memcpy(void *d, const void *s, size_t count);
++#define __HAVE_ARCH_MEMSET
++extern void * memset(void * s,int c,size_t count);
++
++#if 0
++#define __HAVE_ARCH_BCOPY
++#define __HAVE_ARCH_STRLEN
++#endif
++
++#endif /* KERNEL */
++
++#endif /* !(__NIOS_STRING_H__) */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/system.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/system.h 2005-05-18 20:36:23.000000000 +0200
+@@ -0,0 +1,172 @@
++/*
++ * Taken from the m68k.
++ *
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _NIOS2NOMMU_SYSTEM_H
++#define _NIOS2NOMMU_SYSTEM_H
++
++// #include <linux/config.h> /* get configuration macros */
++#include <linux/linkage.h>
++#include <asm/segment.h>
++#include <asm/entry.h>
++#include <asm/nios.h>
++
++/*
++ * switch_to(n) should switch tasks to task ptr, first checking that
++ * ptr isn't the current task, in which case it does nothing. This
++ * also clears the TS-flag if the task we switched to has used the
++ * math co-processor latest.
++ */
++
++/*
++ */
++asmlinkage void resume(void);
++#define switch_to(prev,next,last) \
++{ \
++ void *_last; \
++ __asm__ __volatile__( \
++ "mov r4, %1\n" \
++ "mov r5, %2\n" \
++ "call resume\n" \
++ "mov %0,r4\n" \
++ : "=r" (_last) \
++ : "r" (prev), "r" (next) \
++ : "r4","r5","r7","r8","ra"); \
++ (last) = _last; \
++}
++
++#define local_irq_enable() __asm__ __volatile__ ( \
++ "rdctl r8, status\n" \
++ "ori r8, r8, 1\n" \
++ "wrctl status, r8\n" \
++ : : : "r8")
++
++#define local_irq_disable() __asm__ __volatile__ ( \
++ "rdctl r8, status\n" \
++ "andi r8, r8, 0xfffe\n" \
++ "wrctl status, r8\n" \
++ : : : "r8")
++
++#define local_save_flags(x) __asm__ __volatile__ ( \
++ "rdctl r8, status\n" \
++ "mov %0, r8\n" \
++ :"=r" (x) : : "r8", "memory")
++
++#define local_irq_restore(x) __asm__ __volatile__ ( \
++ "mov r8, %0\n" \
++ "wrctl status, r8\n" \
++ : :"r" (x) : "memory")
++
++/* For spinlocks etc */
++#define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } while (0)
++
++#define irqs_disabled() \
++({ \
++ unsigned long flags; \
++ local_save_flags(flags); \
++ ((flags & NIOS2_STATUS_PIE_MSK) == 0x0); \
++})
++
++#define iret() __asm__ __volatile__ ("eret": : :"memory", "ea")
++
++/*
++ * Force strict CPU ordering.
++ * Not really required on m68k...
++ */
++#define nop() asm volatile ("nop"::)
++#define mb() asm volatile ("" : : :"memory")
++#define rmb() asm volatile ("" : : :"memory")
++#define wmb() asm volatile ("" : : :"memory")
++#define set_rmb(var, value) do { xchg(&var, value); } while (0)
++#define set_mb(var, value) set_rmb(var, value)
++#define set_wmb(var, value) do { var = value; wmb(); } while (0)
++
++#ifdef CONFIG_SMP
++#define smp_mb() mb()
++#define smp_rmb() rmb()
++#define smp_wmb() wmb()
++#define smp_read_barrier_depends() read_barrier_depends()
++#else
++#define smp_mb() barrier()
++#define smp_rmb() barrier()
++#define smp_wmb() barrier()
++#define smp_read_barrier_depends() do { } while(0)
++#endif
++
++#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
++#define tas(ptr) (xchg((ptr),1))
++
++struct __xchg_dummy { unsigned long a[100]; };
++#define __xg(x) ((volatile struct __xchg_dummy *)(x))
++
++static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
++{
++ unsigned long tmp, flags;
++
++ local_irq_save(flags);
++
++ switch (size) {
++ case 1:
++ __asm__ __volatile__( \
++ "ldb %0, %2\n" \
++ "stb %1, %2\n" \
++ : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
++ break;
++ case 2:
++ __asm__ __volatile__( \
++ "ldh %0, %2\n" \
++ "sth %1, %2\n" \
++ : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
++ break;
++ case 4:
++ __asm__ __volatile__( \
++ "ldw %0, %2\n" \
++ "stw %1, %2\n" \
++ : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
++ break;
++ }
++ local_irq_restore(flags);
++ return tmp;
++}
++
++/*
++ * Atomic compare and exchange. Compare OLD with MEM, if identical,
++ * store NEW in MEM. Return the initial value in MEM. Success is
++ * indicated by comparing RETURN with OLD.
++ */
++#define __HAVE_ARCH_CMPXCHG 1
++
++static __inline__ unsigned long
++cmpxchg(volatile int *p, int old, int new)
++{
++ unsigned long flags;
++ int prev;
++
++ local_irq_save(flags);
++ if ((prev = *p) == old)
++ *p = new;
++ local_irq_restore(flags);
++ return(prev);
++}
++
++#endif /* _NIOS2NOMMU_SYSTEM_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/termbits.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/termbits.h 2004-05-07 15:36:26.000000000 +0200
+@@ -0,0 +1,199 @@
++#ifndef __ARCH_NIOS_TERMBITS_H__
++#define __ARCH_NIOS_TERMBITS_H__
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/termbits.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <linux/posix_types.h>
++
++typedef unsigned char cc_t;
++typedef unsigned int speed_t;
++typedef unsigned int tcflag_t;
++
++#define NCCS 19
++struct termios {
++ tcflag_t c_iflag; /* input mode flags */
++ tcflag_t c_oflag; /* output mode flags */
++ tcflag_t c_cflag; /* control mode flags */
++ tcflag_t c_lflag; /* local mode flags */
++ cc_t c_line; /* line discipline */
++ cc_t c_cc[NCCS]; /* control characters */
++};
++
++/* c_cc characters */
++#define VINTR 0
++#define VQUIT 1
++#define VERASE 2
++#define VKILL 3
++#define VEOF 4
++#define VTIME 5
++#define VMIN 6
++#define VSWTC 7
++#define VSTART 8
++#define VSTOP 9
++#define VSUSP 10
++#define VEOL 11
++#define VREPRINT 12
++#define VDISCARD 13
++#define VWERASE 14
++#define VLNEXT 15
++#define VEOL2 16
++
++
++/* c_iflag bits */
++#define IGNBRK 0000001
++#define BRKINT 0000002
++#define IGNPAR 0000004
++#define PARMRK 0000010
++#define INPCK 0000020
++#define ISTRIP 0000040
++#define INLCR 0000100
++#define IGNCR 0000200
++#define ICRNL 0000400
++#define IUCLC 0001000
++#define IXON 0002000
++#define IXANY 0004000
++#define IXOFF 0010000
++#define IMAXBEL 0020000
++#define IUTF8 0040000
++
++/* c_oflag bits */
++#define OPOST 0000001
++#define OLCUC 0000002
++#define ONLCR 0000004
++#define OCRNL 0000010
++#define ONOCR 0000020
++#define ONLRET 0000040
++#define OFILL 0000100
++#define OFDEL 0000200
++#define NLDLY 0000400
++#define NL0 0000000
++#define NL1 0000400
++#define CRDLY 0003000
++#define CR0 0000000
++#define CR1 0001000
++#define CR2 0002000
++#define CR3 0003000
++#define TABDLY 0014000
++#define TAB0 0000000
++#define TAB1 0004000
++#define TAB2 0010000
++#define TAB3 0014000
++#define XTABS 0014000
++#define BSDLY 0020000
++#define BS0 0000000
++#define BS1 0020000
++#define VTDLY 0040000
++#define VT0 0000000
++#define VT1 0040000
++#define FFDLY 0100000
++#define FF0 0000000
++#define FF1 0100000
++
++/* c_cflag bit meaning */
++#define CBAUD 0010017
++#define B0 0000000 /* hang up */
++#define B50 0000001
++#define B75 0000002
++#define B110 0000003
++#define B134 0000004
++#define B150 0000005
++#define B200 0000006
++#define B300 0000007
++#define B600 0000010
++#define B1200 0000011
++#define B1800 0000012
++#define B2400 0000013
++#define B4800 0000014
++#define B9600 0000015
++#define B19200 0000016
++#define B38400 0000017
++#define EXTA B19200
++#define EXTB B38400
++#define CSIZE 0000060
++#define CS5 0000000
++#define CS6 0000020
++#define CS7 0000040
++#define CS8 0000060
++#define CSTOPB 0000100
++#define CREAD 0000200
++#define PARENB 0000400
++#define PARODD 0001000
++#define HUPCL 0002000
++#define CLOCAL 0004000
++#define CBAUDEX 0010000
++#define B57600 0010001
++#define B115200 0010002
++#define B230400 0010003
++#define B460800 0010004
++#define B500000 0010005
++#define B576000 0010006
++#define B921600 0010007
++#define B1000000 0010010
++#define B1152000 0010011
++#define B1500000 0010012
++#define B2000000 0010013
++#define B2500000 0010014
++#define B3000000 0010015
++#define B3500000 0010016
++#define B4000000 0010017
++#define CIBAUD 002003600000 /* input baud rate (not used) */
++#define CMSPAR 010000000000 /* mark or space (stick) parity */
++#define CRTSCTS 020000000000 /* flow control */
++
++/* c_lflag bits */
++#define ISIG 0000001
++#define ICANON 0000002
++#define XCASE 0000004
++#define ECHO 0000010
++#define ECHOE 0000020
++#define ECHOK 0000040
++#define ECHONL 0000100
++#define NOFLSH 0000200
++#define TOSTOP 0000400
++#define ECHOCTL 0001000
++#define ECHOPRT 0002000
++#define ECHOKE 0004000
++#define FLUSHO 0010000
++#define PENDIN 0040000
++#define IEXTEN 0100000
++
++
++/* tcflow() and TCXONC use these */
++#define TCOOFF 0
++#define TCOON 1
++#define TCIOFF 2
++#define TCION 3
++
++/* tcflush() and TCFLSH use these */
++#define TCIFLUSH 0
++#define TCOFLUSH 1
++#define TCIOFLUSH 2
++
++/* tcsetattr uses these */
++#define TCSANOW 0
++#define TCSADRAIN 1
++#define TCSAFLUSH 2
++
++#endif /* __ARCH_NIOS_TERMBITS_H__ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/termios.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/termios.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,132 @@
++#ifndef _NIOS_TERMIOS_H
++#define _NIOS_TERMIOS_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/termios.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/termbits.h>
++#include <asm/ioctls.h>
++
++struct winsize {
++ unsigned short ws_row;
++ unsigned short ws_col;
++ unsigned short ws_xpixel;
++ unsigned short ws_ypixel;
++};
++
++#define NCC 8
++struct termio {
++ unsigned short c_iflag; /* input mode flags */
++ unsigned short c_oflag; /* output mode flags */
++ unsigned short c_cflag; /* control mode flags */
++ unsigned short c_lflag; /* local mode flags */
++ unsigned char c_line; /* line discipline */
++ unsigned char c_cc[NCC]; /* control characters */
++};
++
++#ifdef __KERNEL__
++/* intr=^C quit=^| erase=del kill=^U
++ eof=^D vtime=\0 vmin=\1 sxtc=\0
++ start=^Q stop=^S susp=^Z eol=\0
++ reprint=^R discard=^U werase=^W lnext=^V
++ eol2=\0
++*/
++#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
++#endif
++
++/* modem lines */
++#define TIOCM_LE 0x001
++#define TIOCM_DTR 0x002
++#define TIOCM_RTS 0x004
++#define TIOCM_ST 0x008
++#define TIOCM_SR 0x010
++#define TIOCM_CTS 0x020
++#define TIOCM_CAR 0x040
++#define TIOCM_RNG 0x080
++#define TIOCM_DSR 0x100
++#define TIOCM_CD TIOCM_CAR
++#define TIOCM_RI TIOCM_RNG
++#define TIOCM_OUT1 0x2000
++#define TIOCM_OUT2 0x4000
++#define TIOCM_LOOP 0x8000
++
++/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
++
++/* line disciplines */
++#define N_TTY 0
++#define N_SLIP 1
++#define N_MOUSE 2
++#define N_PPP 3
++#define N_STRIP 4
++#define N_AX25 5
++#define N_X25 6 /* X.25 async */
++#define N_6PACK 7
++#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */
++#define N_R3964 9 /* Reserved for Simatic R3964 module */
++#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
++#define N_IRDA 11 /* Linux IrDa - http://irda.sourceforge.net/ */
++#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */
++#define N_HDLC 13 /* synchronous HDLC */
++#define N_SYNC_PPP 14
++#define N_HCI 15 /* Bluetooth HCI UART */
++
++#ifdef __KERNEL__
++
++/*
++ * Translate a "termio" structure into a "termios". Ugh.
++ */
++#define user_termio_to_kernel_termios(termios, termio) \
++({ \
++ unsigned short tmp; \
++ get_user(tmp, &(termio)->c_iflag); \
++ (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \
++ get_user(tmp, &(termio)->c_oflag); \
++ (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \
++ get_user(tmp, &(termio)->c_cflag); \
++ (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \
++ get_user(tmp, &(termio)->c_lflag); \
++ (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \
++ get_user((termios)->c_line, &(termio)->c_line); \
++ copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
++})
++
++/*
++ * Translate a "termios" structure into a "termio". Ugh.
++ */
++#define kernel_termios_to_user_termio(termio, termios) \
++({ \
++ put_user((termios)->c_iflag, &(termio)->c_iflag); \
++ put_user((termios)->c_oflag, &(termio)->c_oflag); \
++ put_user((termios)->c_cflag, &(termio)->c_cflag); \
++ put_user((termios)->c_lflag, &(termio)->c_lflag); \
++ put_user((termios)->c_line, &(termio)->c_line); \
++ copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
++})
++
++#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
++#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
++
++#endif /* __KERNEL__ */
++
++#endif /* _NIOS_TERMIOS_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/thread_info.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/thread_info.h 2004-05-14 13:32:04.000000000 +0200
+@@ -0,0 +1,126 @@
++/* thread_info.h: niosnommu low-level thread information
++ * adapted from the m68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd.
++ * Copyright (C) 2002 Microtronix Datacom
++ *
++ * - Incorporating suggestions made by Linus Torvalds and Dave Miller
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#ifndef _ASM_THREAD_INFO_H
++#define _ASM_THREAD_INFO_H
++
++#include <asm/page.h>
++
++#ifdef __KERNEL__
++
++#ifndef __ASSEMBLY__
++
++/*
++ * low level task data.
++ */
++struct thread_info {
++ struct task_struct *task; /* main task structure */
++ struct exec_domain *exec_domain; /* execution domain */
++ unsigned long flags; /* low level flags */
++ int cpu; /* cpu we're on */
++ int preempt_count; /* 0 => preemptable, <0 => BUG*/
++ struct restart_block restart_block;
++};
++
++/*
++ * macros/functions for gaining access to the thread information structure
++ */
++#define INIT_THREAD_INFO(tsk) \
++{ \
++ .task = &tsk, \
++ .exec_domain = &default_exec_domain, \
++ .flags = 0, \
++ .cpu = 0, \
++ .preempt_count = 1, \
++ .restart_block = { \
++ .fn = do_no_restart_syscall, \
++ }, \
++}
++
++#define init_thread_info (init_thread_union.thread_info)
++#define init_stack (init_thread_union.stack)
++
++
++/* how to get the thread information struct from C
++ usable only in supervisor mode */
++static inline struct thread_info *current_thread_info(void)
++{
++ struct thread_info *ti;
++ __asm__ __volatile__(
++ "mov %0, sp\n"
++ "and %0, %0, %1\n"
++ : "=&r"(ti)
++ : "r" (~(THREAD_SIZE-1))
++ );
++ return ti;
++}
++
++/* thread information allocation */
++#define alloc_thread_info(tsk) ((struct thread_info *) \
++ __get_free_pages(GFP_KERNEL, 1))
++#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
++#define put_thread_info(ti) put_task_struct((ti)->task)
++
++#define PREEMPT_ACTIVE 0x4000000
++
++/*
++ * thread information flag bit numbers
++ */
++#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
++#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
++#define TIF_SIGPENDING 2 /* signal pending */
++#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
++#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
++ TIF_NEED_RESCHED */
++
++/* as above, but as bit values */
++#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
++#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
++#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
++#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
++#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
++
++#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
++
++#else /* __ASSEMBLY__ */
++
++/* how to get the thread information struct from ASM
++ usable only in supervisor mode */
++.macro GET_THREAD_INFO reg
++.if THREAD_SIZE & 0xffff0000
++ andhi \reg, sp, %hi(~(THREAD_SIZE-1))
++.else
++ addi \reg, r0, %lo(~(THREAD_SIZE-1))
++ and \reg, \reg, sp
++.endif
++.endm
++
++#endif /* __ASSEMBLY__ */
++
++#endif /* __KERNEL__ */
++
++#endif /* _ASM_THREAD_INFO_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/timer_struct.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/timer_struct.h 2004-12-22 15:23:52.000000000 +0100
+@@ -0,0 +1,38 @@
++
++// ----------------------------------------------
++// Timer Peripheral
++
++// Timer Registers
++typedef volatile struct
++ {
++ int np_timerstatus; // read only, 2 bits (any write to clear TO)
++ int np_timercontrol; // write/readable, 4 bits
++ int np_timerperiodl; // write/readable, 16 bits
++ int np_timerperiodh; // write/readable, 16 bits
++ int np_timersnapl; // read only, 16 bits
++ int np_timersnaph; // read only, 16 bits
++ } np_timer;
++
++// Timer Register Bits
++enum
++ {
++ np_timerstatus_run_bit = 1, // timer is running
++ np_timerstatus_to_bit = 0, // timer has timed out
++
++ np_timercontrol_stop_bit = 3, // stop the timer
++ np_timercontrol_start_bit = 2, // start the timer
++ np_timercontrol_cont_bit = 1, // continous mode
++ np_timercontrol_ito_bit = 0, // enable time out interrupt
++
++ np_timerstatus_run_mask = (1<<1), // timer is running
++ np_timerstatus_to_mask = (1<<0), // timer has timed out
++
++ np_timercontrol_stop_mask = (1<<3), // stop the timer
++ np_timercontrol_start_mask = (1<<2), // start the timer
++ np_timercontrol_cont_mask = (1<<1), // continous mode
++ np_timercontrol_ito_mask = (1<<0) // enable time out interrupt
++ };
++
++// Timer Routines
++int nr_timer_milliseconds(void); // Starts on first call, hogs timer1.
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/timex.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/timex.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,48 @@
++#ifndef _ASMNIOS2NOMMU_TIMEX_H
++#define _ASMNIOS2NOMMU_TIMEX_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/timex.h
++ *
++ * timex specifications
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/nios.h>
++
++
++#define CLOCK_TICK_RATE nasys_clock_freq /* Underlying HZ */
++
++#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
++
++#define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \
++ (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \
++ << (SHIFT_SCALE-SHIFT_HZ)) / HZ)
++
++typedef unsigned long cycles_t;
++
++static inline cycles_t get_cycles(void)
++{
++ return 0;
++}
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/tlb.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/tlb.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,35 @@
++#ifndef __NIOS_TLB_H__
++#define __NIOS_TLB_H__
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/tlb.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2003 Microtronix Datacom Ltd
++ * Copyright (C) 2002 NEC Corporation
++ * Copyright (C) 2002 Miles Bader <miles@gnu.org>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Written by Miles Bader <miles@gnu.org>
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++#define tlb_flush(tlb) ((void)0)
++
++#include <asm-generic/tlb.h>
++
++#endif /* __NIOS_TLB_H__ */
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/tlbflush.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/tlbflush.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,86 @@
++#ifndef _NIOS2NOMMU_TLBFLUSH_H
++#define _NIOS2NOMMU_TLBFLUSH_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/tlbflush.h
++ *
++ * Ported from m68knommu.
++ *
++ * Copyright (C) 2003 Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++#include <asm/setup.h>
++
++/*
++ * flush all user-space atc entries.
++ */
++static inline void __flush_tlb(void)
++{
++ BUG();
++}
++
++static inline void __flush_tlb_one(unsigned long addr)
++{
++ BUG();
++}
++
++#define flush_tlb() __flush_tlb()
++
++/*
++ * flush all atc entries (both kernel and user-space entries).
++ */
++static inline void flush_tlb_all(void)
++{
++ BUG();
++}
++
++static inline void flush_tlb_mm(struct mm_struct *mm)
++{
++ BUG();
++}
++
++static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
++{
++ BUG();
++}
++
++static inline void flush_tlb_range(struct mm_struct *mm,
++ unsigned long start, unsigned long end)
++{
++ BUG();
++}
++
++extern inline void flush_tlb_kernel_page(unsigned long addr)
++{
++ BUG();
++}
++
++extern inline void flush_tlb_pgtables(struct mm_struct *mm,
++ unsigned long start, unsigned long end)
++{
++ BUG();
++}
++
++#endif /* _NIOS2NOMMU_TLBFLUSH_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/topology.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/topology.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,30 @@
++#ifndef _ASM_NIOS2NOMMU_TOPOLOGY_H
++#define _ASM_NIOS2NOMMU_TOPOLOGY_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/topology.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm-generic/topology.h>
++
++#endif /* _ASM_NIOS2NOMMU_TOPOLOGY_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/traps.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/traps.h 2004-05-26 10:12:18.000000000 +0200
+@@ -0,0 +1,27 @@
++/*
++ * Copyright (C) 2004, Microtronix Datacom Ltd.
++ *
++ * All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
++ * NON INFRINGEMENT. See the GNU General Public License for more
++ * details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++#ifndef _NIOS2_TRAPS_H
++#define _NIOS2_TRAPS_H
++
++#define TRAP_ID_SYSCALL 0
++#define TRAP_ID_APPDEBUG 1
++#endif /* !(_NIOS2_TRAPS_H) */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/types.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/types.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,93 @@
++#ifndef _NIOS_TYPES_H
++#define _NIOS_TYPES_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/types.h
++ *
++ * Derived from m68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++/*
++ * This file is never included by application software unless
++ * explicitly requested (e.g., via linux/types.h) in which case the
++ * application is Linux specific so (user-) name space pollution is
++ * not a major issue. However, for interoperability, libraries still
++ * need to be careful to avoid a name clashes.
++ */
++
++#ifndef __ASSEMBLY__
++
++typedef unsigned short umode_t;
++
++/*
++ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
++ * header files exported to user space
++ */
++
++typedef __signed__ char __s8;
++typedef unsigned char __u8;
++
++typedef __signed__ short __s16;
++typedef unsigned short __u16;
++
++typedef __signed__ int __s32;
++typedef unsigned int __u32;
++
++#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
++typedef __signed__ long long __s64;
++typedef unsigned long long __u64;
++#endif
++
++#endif /* __ASSEMBLY__ */
++
++/*
++ * These aren't exported outside the kernel to avoid name space clashes
++ */
++#ifdef __KERNEL__
++
++#define BITS_PER_LONG 32
++
++#ifndef __ASSEMBLY__
++
++typedef signed char s8;
++typedef unsigned char u8;
++
++typedef signed short s16;
++typedef unsigned short u16;
++
++typedef signed int s32;
++typedef unsigned int u32;
++
++typedef signed long long s64;
++typedef unsigned long long u64;
++
++/* DMA addresses are always 32-bits wide */
++
++typedef u32 dma_addr_t;
++typedef u32 dma64_addr_t;
++
++typedef unsigned short kmem_bufctl_t;
++
++#endif /* __ASSEMBLY__ */
++
++#endif /* __KERNEL__ */
++
++#endif /* _NIOS_TYPES_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/uaccess.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/uaccess.h 2004-12-08 17:39:48.000000000 +0100
+@@ -0,0 +1,183 @@
++#ifndef __NIOS2NOMMU_UACCESS_H
++#define __NIOS2NOMMU_UACCESS_H
++
++/*--------------------------------------------------------------------
++ *
++ * asm-nios2nommu/uaccess.h
++ *
++ * User space memory access functions
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Ported from asm-m68knommu/uaccess.h --wentao
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <linux/sched.h>
++#include <linux/mm.h>
++#include <asm/segment.h>
++#include <asm/nios.h>
++
++#define VERIFY_READ 0
++#define VERIFY_WRITE 1
++
++#define access_ok(type,addr,size) _access_ok((unsigned long)(addr),(size))
++
++static inline int _access_ok(unsigned long addr, unsigned long size)
++{
++ return (((unsigned long)addr < (unsigned long)nasys_program_mem_end) &&
++ (((unsigned long)addr >= (unsigned long)nasys_program_mem)));
++}
++
++extern inline int verify_area(int type, const void * addr, unsigned long size)
++{
++ return access_ok(type,addr,size)?0:-EFAULT;
++}
++
++/*
++ * The exception table consists of pairs of addresses: the first is the
++ * address of an instruction that is allowed to fault, and the second is
++ * the address at which the program should continue. No registers are
++ * modified, so it is entirely up to the continuation code to figure out
++ * what to do.
++ *
++ * All the routines below use bits of fixup code that are out of line
++ * with the main instruction path. This means when everything is well,
++ * we don't even have to jump over them. Further, they do not intrude
++ * on our cache or tlb entries.
++ */
++
++#define ARCH_HAS_SEARCH_EXTABLE
++//;dgt2;tmp;
++
++struct exception_table_entry
++{
++ unsigned long insn, fixup;
++};
++
++/* Returns 0 if exception not found and fixup otherwise. */
++extern unsigned long search_exception_table(unsigned long);
++
++
++/*
++ * These are the main single-value transfer routines. They automatically
++ * use the right size if we just have the right pointer type.
++ */
++
++#define put_user(x, ptr) \
++({ \
++ int __pu_err = 0; \
++ typeof(*(ptr)) __pu_val = (x); \
++ switch (sizeof (*(ptr))) { \
++ case 1: \
++ case 2: \
++ case 4: \
++ case 8: \
++ memcpy(ptr, &__pu_val, sizeof (*(ptr))); \
++ break; \
++ default: \
++ __pu_err = __put_user_bad(); \
++ break; \
++ } \
++ __pu_err; \
++})
++#define __put_user(x, ptr) put_user(x, ptr)
++
++extern int __put_user_bad(void);
++
++/*
++ * Tell gcc we read from memory instead of writing: this is because
++ * we do not write to any memory gcc knows about, so there are no
++ * aliasing issues.
++ */
++
++#define __ptr(x) ((unsigned long *)(x))
++
++#define get_user(x, ptr) \
++({ \
++ int __gu_err = 0; \
++ typeof(*(ptr)) __gu_val = 0; \
++ switch (sizeof(*(ptr))) { \
++ case 1: \
++ case 2: \
++ case 4: \
++ case 8: \
++ memcpy(&__gu_val, ptr, sizeof (*(ptr))); \
++ break; \
++ default: \
++ __gu_val = 0; \
++ __gu_err = __get_user_bad(); \
++ break; \
++ } \
++ (x) = __gu_val; \
++ __gu_err; \
++})
++#define __get_user(x, ptr) get_user(x, ptr)
++
++extern int __get_user_bad(void);
++
++#define copy_from_user(to, from, n) (memcpy(to, from, n), 0)
++#define copy_to_user(to, from, n) (memcpy(to, from, n), 0)
++
++#define __copy_from_user(to, from, n) copy_from_user(to, from, n)
++#define __copy_to_user(to, from, n) copy_to_user(to, from, n)
++#define __copy_to_user_inatomic __copy_to_user
++#define __copy_from_user_inatomic __copy_from_user
++
++#define copy_to_user_ret(to,from,n,retval) ({ if (copy_to_user(to,from,n)) return retval; })
++
++#define copy_from_user_ret(to,from,n,retval) ({ if (copy_from_user(to,from,n)) return retval; })
++
++/*
++ * Copy a null terminated string from userspace.
++ */
++
++static inline long
++strncpy_from_user(char *dst, const char *src, long count)
++{
++ char *tmp;
++ strncpy(dst, src, count);
++ for (tmp = dst; *tmp && count > 0; tmp++, count--)
++ ;
++ return(tmp - dst); /* DAVIDM should we count a NUL ? check getname */
++}
++
++/*
++ * Return the size of a string (including the ending 0)
++ *
++ * Return 0 on exception, a value greater than N if too long
++ */
++static inline long strnlen_user(const char *src, long n)
++{
++ return(strlen(src) + 1); /* DAVIDM make safer */
++}
++
++#define strlen_user(str) strnlen_user(str, 32767)
++
++/*
++ * Zero Userspace
++ */
++
++static inline unsigned long
++clear_user(void *to, unsigned long n)
++{
++ memset(to, 0, n);
++ return(0);
++}
++
++#endif /* _NIOS2NOMMU_UACCESS_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/uart_struct.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/uart_struct.h 2004-12-22 15:23:52.000000000 +0100
+@@ -0,0 +1,83 @@
++
++// UART Registers
++typedef volatile struct
++ {
++ int np_uartrxdata; // Read-only, 8-bit
++ int np_uarttxdata; // Write-only, 8-bit
++ int np_uartstatus; // Read-only, 8-bit
++ int np_uartcontrol; // Read/Write, 9-bit
++ int np_uartdivisor; // Read/Write, 16-bit, optional
++ int np_uartendofpacket; // Read/Write, end-of-packet character
++ } np_uart;
++
++// UART Status Register Bits
++enum
++ {
++ np_uartstatus_eop_bit = 12,
++ np_uartstatus_cts_bit = 11,
++ np_uartstatus_dcts_bit = 10,
++ np_uartstatus_e_bit = 8,
++ np_uartstatus_rrdy_bit = 7,
++ np_uartstatus_trdy_bit = 6,
++ np_uartstatus_tmt_bit = 5,
++ np_uartstatus_toe_bit = 4,
++ np_uartstatus_roe_bit = 3,
++ np_uartstatus_brk_bit = 2,
++ np_uartstatus_fe_bit = 1,
++ np_uartstatus_pe_bit = 0,
++
++ np_uartstatus_eop_mask = (1<<12),
++ np_uartstatus_cts_mask = (1<<11),
++ np_uartstatus_dcts_mask = (1<<10),
++ np_uartstatus_e_mask = (1<<8),
++ np_uartstatus_rrdy_mask = (1<<7),
++ np_uartstatus_trdy_mask = (1<<6),
++ np_uartstatus_tmt_mask = (1<<5),
++ np_uartstatus_toe_mask = (1<<4),
++ np_uartstatus_roe_mask = (1<<3),
++ np_uartstatus_brk_mask = (1<<2),
++ np_uartstatus_fe_mask = (1<<1),
++ np_uartstatus_pe_mask = (1<<0)
++ };
++
++// UART Control Register Bits
++enum
++ {
++ np_uartcontrol_ieop_bit = 12,
++ np_uartcontrol_rts_bit = 11,
++ np_uartcontrol_idcts_bit = 10,
++ np_uartcontrol_tbrk_bit = 9,
++ np_uartcontrol_ie_bit = 8,
++ np_uartcontrol_irrdy_bit = 7,
++ np_uartcontrol_itrdy_bit = 6,
++ np_uartcontrol_itmt_bit = 5,
++ np_uartcontrol_itoe_bit = 4,
++ np_uartcontrol_iroe_bit = 3,
++ np_uartcontrol_ibrk_bit = 2,
++ np_uartcontrol_ife_bit = 1,
++ np_uartcontrol_ipe_bit = 0,
++
++ np_uartcontrol_ieop_mask = (1<<12),
++ np_uartcontrol_rts_mask = (1<<11),
++ np_uartcontrol_idcts_mask = (1<<10),
++ np_uartcontrol_tbrk_mask = (1<<9),
++ np_uartcontrol_ie_mask = (1<<8),
++ np_uartcontrol_irrdy_mask = (1<<7),
++ np_uartcontrol_itrdy_mask = (1<<6),
++ np_uartcontrol_itmt_mask = (1<<5),
++ np_uartcontrol_itoe_mask = (1<<4),
++ np_uartcontrol_iroe_mask = (1<<3),
++ np_uartcontrol_ibrk_mask = (1<<2),
++ np_uartcontrol_ife_mask = (1<<1),
++ np_uartcontrol_ipe_mask = (1<<0)
++ };
++
++// UART Routines
++int nr_uart_rxchar(np_uart *uartBase); // 0 for default UART
++void nr_uart_txcr(void);
++void nr_uart_txchar(int c,np_uart *uartBase); // 0 for default UART
++void nr_uart_txhex(int x); // 16 or 32 bits
++void nr_uart_txhex16(short x);
++void nr_uart_txhex32(long x);
++void nr_uart_txstring(char *s);
++
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/ucontext.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/ucontext.h 2004-11-16 12:20:14.000000000 +0100
+@@ -0,0 +1,63 @@
++#ifndef _NIOSKNOMMU_UCONTEXT_H
++#define _NIOSKNOMMU_UCONTEXT_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/ucontext.h
++ *
++ * Derived from M68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++typedef int greg_t;
++#define NGREG 32
++typedef greg_t gregset_t[NGREG];
++
++#ifdef CONFIG_FPU
++typedef struct fpregset {
++ int f_pcr;
++ int f_psr;
++ int f_fpiaddr;
++ int f_fpregs[8][3];
++} fpregset_t;
++#endif
++
++struct mcontext {
++ int version;
++ int status_extension;
++ gregset_t gregs;
++#ifdef CONFIG_FPU
++ fpregset_t fpregs;
++#endif
++};
++
++#define MCONTEXT_VERSION 2
++
++struct ucontext {
++ unsigned long uc_flags;
++ struct ucontext *uc_link;
++ stack_t uc_stack;
++ struct mcontext uc_mcontext;
++#ifdef CONFIG_FPU
++ unsigned long uc_filler[80];
++#endif
++ sigset_t uc_sigmask; /* mask last for extensibility */
++};
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/unaligned.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/unaligned.h 2004-02-26 15:43:36.000000000 +0100
+@@ -0,0 +1,43 @@
++#ifndef __NIOS_UNALIGNED_H
++#define __NIOS_UNALIGNED_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/unaligned.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++/*
++ * The nios cannot do unaligned accesses itself.
++ */
++
++#define get_unaligned(ptr) ({ \
++ typeof((*(ptr))) x; \
++ memcpy(&x, (void*)ptr, sizeof(*(ptr))); \
++ x; \
++})
++
++#define put_unaligned(val, ptr) ({ \
++ typeof((*(ptr))) x = val; \
++ memcpy((void*)ptr, &x, sizeof(*(ptr))); \
++})
++
++#endif /* __NIOS_UNALIGNED_H */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/unistd.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/unistd.h 2004-12-23 15:46:22.000000000 +0100
+@@ -0,0 +1,686 @@
++#ifndef _ASM_NIOS_UNISTD_H_
++#define _ASM_NIOS_UNISTD_H_
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/unistd.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * //vic - kernel_thread moved to process.c
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/traps.h>
++
++/* TRAP isr expects the trap# (syscall=#TRAP_ID_SYSCALL) in r2,
++ * the syscall # in r3, and arguments in r4, r5, ...
++ * Return argument expected in r2.
++ */
++
++#define __NR_restart_syscall 0
++#define __NR_exit 1
++#define __NR_fork 2
++#define __NR_read 3
++#define __NR_write 4
++#define __NR_open 5
++#define __NR_close 6
++#define __NR_waitpid 7
++#define __NR_creat 8
++#define __NR_link 9
++#define __NR_unlink 10
++#define __NR_execve 11
++#define __NR_chdir 12
++#define __NR_time 13
++#define __NR_mknod 14
++#define __NR_chmod 15
++#define __NR_chown 16
++#define __NR_break 17
++#define __NR_oldstat 18
++#define __NR_lseek 19
++#define __NR_getpid 20
++#define __NR_mount 21
++#define __NR_umount 22
++#define __NR_setuid 23
++#define __NR_getuid 24
++#define __NR_stime 25
++#define __NR_ptrace 26
++#define __NR_alarm 27
++#define __NR_oldfstat 28
++#define __NR_pause 29
++#define __NR_utime 30
++#define __NR_stty 31
++#define __NR_gtty 32
++#define __NR_access 33
++#define __NR_nice 34
++#define __NR_ftime 35
++#define __NR_sync 36
++#define __NR_kill 37
++#define __NR_rename 38
++#define __NR_mkdir 39
++#define __NR_rmdir 40
++#define __NR_dup 41
++#define __NR_pipe 42
++#define __NR_times 43
++#define __NR_prof 44
++#define __NR_brk 45
++#define __NR_setgid 46
++#define __NR_getgid 47
++#define __NR_signal 48
++#define __NR_geteuid 49
++#define __NR_getegid 50
++#define __NR_acct 51
++#define __NR_umount2 52 //vic #define __NR_phys 52
++#define __NR_lock 53
++#define __NR_ioctl 54
++#define __NR_fcntl 55
++#define __NR_mpx 56
++#define __NR_setpgid 57
++#define __NR_ulimit 58
++#define __NR_oldolduname 59
++#define __NR_umask 60
++#define __NR_chroot 61
++#define __NR_ustat 62
++#define __NR_dup2 63
++#define __NR_getppid 64
++#define __NR_getpgrp 65
++#define __NR_setsid 66
++#define __NR_sigaction 67
++#define __NR_sgetmask 68
++#define __NR_ssetmask 69
++#define __NR_setreuid 70
++#define __NR_setregid 71
++#define __NR_sigsuspend 72
++#define __NR_sigpending 73
++#define __NR_sethostname 74
++#define __NR_setrlimit 75
++#define __NR_getrlimit 76
++#define __NR_getrusage 77
++#define __NR_gettimeofday 78
++#define __NR_settimeofday 79
++#define __NR_getgroups 80
++#define __NR_setgroups 81
++#define __NR_select 82
++#define __NR_symlink 83
++#define __NR_oldlstat 84
++#define __NR_readlink 85
++#define __NR_uselib 86
++#define __NR_swapon 87
++#define __NR_reboot 88
++#define __NR_readdir 89
++#define __NR_mmap 90
++#define __NR_munmap 91
++#define __NR_truncate 92
++#define __NR_ftruncate 93
++#define __NR_fchmod 94
++#define __NR_fchown 95
++#define __NR_getpriority 96
++#define __NR_setpriority 97
++#define __NR_profil 98
++#define __NR_statfs 99
++#define __NR_fstatfs 100
++#define __NR_ioperm 101
++#define __NR_socketcall 102
++#define __NR_syslog 103
++#define __NR_setitimer 104
++#define __NR_getitimer 105
++#define __NR_stat 106
++#define __NR_lstat 107
++#define __NR_fstat 108
++#define __NR_olduname 109
++#define __NR_iopl /* 110 */ not supported
++#define __NR_vhangup 111
++#define __NR_idle /* 112 */ Obsolete
++#define __NR_vm86 /* 113 */ not supported
++#define __NR_wait4 114
++#define __NR_swapoff 115
++#define __NR_sysinfo 116
++#define __NR_ipc 117
++#define __NR_fsync 118
++#define __NR_sigreturn 119
++#define __NR_clone 120
++#define __NR_setdomainname 121
++#define __NR_uname 122
++#define __NR_cacheflush 123
++#define __NR_adjtimex 124
++#define __NR_mprotect 125
++#define __NR_sigprocmask 126
++#define __NR_create_module 127
++#define __NR_init_module 128
++#define __NR_delete_module 129
++#define __NR_get_kernel_syms 130
++#define __NR_quotactl 131
++#define __NR_getpgid 132
++#define __NR_fchdir 133
++#define __NR_bdflush 134
++#define __NR_sysfs 135
++#define __NR_personality 136
++#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
++#define __NR_setfsuid 138
++#define __NR_setfsgid 139
++#define __NR__llseek 140
++#define __NR_getdents 141
++#define __NR__newselect 142
++#define __NR_flock 143
++#define __NR_msync 144
++#define __NR_readv 145
++#define __NR_writev 146
++#define __NR_getsid 147
++#define __NR_fdatasync 148
++#define __NR__sysctl 149
++#define __NR_mlock 150
++#define __NR_munlock 151
++#define __NR_mlockall 152
++#define __NR_munlockall 153
++#define __NR_sched_setparam 154
++#define __NR_sched_getparam 155
++#define __NR_sched_setscheduler 156
++#define __NR_sched_getscheduler 157
++#define __NR_sched_yield 158
++#define __NR_sched_get_priority_max 159
++#define __NR_sched_get_priority_min 160
++#define __NR_sched_rr_get_interval 161
++#define __NR_nanosleep 162
++#define __NR_mremap 163
++#define __NR_setresuid 164
++#define __NR_getresuid 165
++#define __NR_getpagesize 166
++#define __NR_query_module 167
++#define __NR_poll 168
++#define __NR_nfsservctl 169
++#define __NR_setresgid 170
++#define __NR_getresgid 171
++#define __NR_prctl 172
++#define __NR_rt_sigreturn 173
++#define __NR_rt_sigaction 174
++#define __NR_rt_sigprocmask 175
++#define __NR_rt_sigpending 176
++#define __NR_rt_sigtimedwait 177
++#define __NR_rt_sigqueueinfo 178
++#define __NR_rt_sigsuspend 179
++#define __NR_pread 180
++#define __NR_pwrite 181
++#define __NR_lchown 182
++#define __NR_getcwd 183
++#define __NR_capget 184
++#define __NR_capset 185
++#define __NR_sigaltstack 186
++#define __NR_sendfile 187
++#define __NR_getpmsg 188 /* some people actually want streams */
++#define __NR_putpmsg 189 /* some people actually want streams */
++#define __NR_vfork 190
++#define __NR_ugetrlimit 191
++#define __NR_mmap2 192
++#define __NR_truncate64 193
++#define __NR_ftruncate64 194
++#define __NR_stat64 195
++#define __NR_lstat64 196
++#define __NR_fstat64 197
++#define __NR_chown32 198
++#define __NR_getuid32 199
++#define __NR_getgid32 200
++#define __NR_geteuid32 201
++#define __NR_getegid32 202
++#define __NR_setreuid32 203
++#define __NR_setregid32 204
++#define __NR_getgroups32 205
++#define __NR_setgroups32 206
++#define __NR_fchown32 207
++#define __NR_setresuid32 208
++#define __NR_getresuid32 209
++#define __NR_setresgid32 210
++#define __NR_getresgid32 211
++#define __NR_lchown32 212
++#define __NR_setuid32 213
++#define __NR_setgid32 214
++#define __NR_setfsuid32 215
++#define __NR_setfsgid32 216
++#define __NR_pivot_root 217
++/* 218 unused */
++/* 219 unused */
++#define __NR_getdents64 220
++#define __NR_gettid 221
++#define __NR_tkill 222
++#define __NR_setxattr 223
++#define __NR_lsetxattr 224
++#define __NR_fsetxattr 225
++#define __NR_getxattr 226
++#define __NR_lgetxattr 227
++#define __NR_fgetxattr 228
++#define __NR_listxattr 229
++#define __NR_llistxattr 230
++#define __NR_flistxattr 231
++#define __NR_removexattr 232
++#define __NR_lremovexattr 233
++#define __NR_fremovexattr 234
++#define __NR_futex 235
++#define __NR_sendfile64 236
++#define __NR_mincore 237
++#define __NR_madvise 238
++#define __NR_fcntl64 239
++#define __NR_readahead 240
++#define __NR_io_setup 241
++#define __NR_io_destroy 242
++#define __NR_io_getevents 243
++#define __NR_io_submit 244
++#define __NR_io_cancel 245
++#define __NR_fadvise64 246
++#define __NR_exit_group 247
++#define __NR_lookup_dcookie 248
++#define __NR_epoll_create 249
++#define __NR_epoll_ctl 250
++#define __NR_epoll_wait 251
++#define __NR_remap_file_pages 252
++#define __NR_set_tid_address 253
++#define __NR_timer_create 254
++#define __NR_timer_settime 255
++#define __NR_timer_gettime 256
++#define __NR_timer_getoverrun 257
++#define __NR_timer_delete 258
++#define __NR_clock_settime 259
++#define __NR_clock_gettime 260
++#define __NR_clock_getres 261
++#define __NR_clock_nanosleep 262
++#define __NR_statfs64 263
++#define __NR_fstatfs64 264
++#define __NR_tgkill 265
++#define __NR_utimes 266
++#define __NR_fadvise64_64 267
++#define __NR_mbind 268
++#define __NR_get_mempolicy 269
++#define __NR_set_mempolicy 270
++#define __NR_mq_open 271
++#define __NR_mq_unlink 272
++#define __NR_mq_timedsend 273
++#define __NR_mq_timedreceive 274
++#define __NR_mq_notify 275
++#define __NR_mq_getsetattr 276
++#define __NR_waitid 277
++#define __NR_sys_setaltroot 278
++#define __NR_add_key 279
++#define __NR_request_key 280
++#define __NR_keyctl 281
++
++#define NR_syscalls 282
++
++/* user-visible error numbers are in the range -1 - -122: see
++ <asm-nios2nommu/errno.h> */
++
++#define __syscall_return(type, res) \
++do { \
++ if ((unsigned long)(res) >= (unsigned long)(-125)) { \
++ \
++ /* avoid using res which is declared to be in \
++ register r2; errno might expand to a function \
++ call and clobber it. */ \
++ \
++ int __err = -(res); \
++ errno = __err; \
++ res = -1; \
++ } \
++ return (type) (res); \
++} while (0)
++
++#define _syscall0(type,name) \
++type name(void) \
++{ \
++ long __res; \
++ \
++ __asm__ __volatile__ ( \
++ \
++ " \n\t" \
++ \
++ " movi r2, %2\n\t" /* TRAP_ID_SYSCALL */ \
++ " movi r3, %1\n\t" /* __NR_##name */ \
++ \
++ " trap\n\t" \
++ " mov %0, r2\n\t" /* syscall rtn */ \
++ \
++ " \n\t" \
++ \
++ : "=r" (__res) /* %0 */ \
++ \
++ : "i" (__NR_##name) /* %1 */ \
++ , "i" (TRAP_ID_SYSCALL) /* %2 */ \
++ \
++ : "r2" /* Clobbered */ \
++ , "r3" /* Clobbered */ \
++ ); \
++ \
++__syscall_return(type,__res); \
++}
++
++//;dgt2;tmp;can we RELY on syscall1 arg a
++//;dgt2;tmp; already being in r4 ?
++#define _syscall1(type,name,atype,a) \
++type name(atype a) \
++{ \
++ long __res; \
++ \
++ __asm__ __volatile__ ( \
++ \
++ " \n\t" \
++ \
++ " movi r2, %2\n\t" /* TRAP_ID_SYSCALL */ \
++ " movi r3, %1\n\t" /* __NR_##name */ \
++ " mov r4, %3\n\t" /* (long) a */ \
++ \
++ " trap\n\t" \
++ " mov %0, r2\n\t" /* syscall rtn */ \
++ \
++ " \n\t" \
++ \
++ : "=r" (__res) /* %0 */ \
++ \
++ : "i" (__NR_##name) /* %1 */ \
++ , "i" (TRAP_ID_SYSCALL) /* %2 */ \
++ , "r" ((long) a) /* %3 */ \
++ \
++ : "r2" /* Clobbered */ \
++ , "r3" /* Clobbered */ \
++ , "r4" /* Clobbered */ \
++ ); \
++ \
++__syscall_return(type,__res); \
++}
++
++//;dgt2;tmp;can we RELY on syscall2 args a,b
++//;dgt2;tmp; already being in r4,r5 ?
++#define _syscall2(type,name,atype,a,btype,b) \
++type name(atype a,btype b) \
++{ \
++ long __res; \
++ \
++ __asm__ __volatile__ ( \
++ \
++ " \n\t" \
++ \
++ " movi r2, %2\n\t" /* TRAP_ID_SYSCALL */ \
++ " movi r3, %1\n\t" /* __NR_##name */ \
++ " mov r4, %3\n\t" /* (long) a */ \
++ " mov r5, %4\n\t" /* (long) b */ \
++ \
++ " trap\n\t" \
++ " mov %0, r2\n\t" /* syscall rtn */ \
++ \
++ " \n\t" \
++ \
++ : "=r" (__res) /* %0 */ \
++ \
++ : "i" (__NR_##name) /* %1 */ \
++ , "i" (TRAP_ID_SYSCALL) /* %2 */ \
++ , "r" ((long) a) /* %3 */ \
++ , "r" ((long) b) /* %4 */ \
++ \
++ : "r2" /* Clobbered */ \
++ , "r3" /* Clobbered */ \
++ , "r4" /* Clobbered */ \
++ , "r5" /* Clobbered */ \
++ ); \
++ \
++__syscall_return(type,__res); \
++}
++
++//;dgt2;tmp;can we RELY on syscall3 args a,b,c
++//;dgt2;tmp; already being in r4,r5,r6 ?
++#define _syscall3(type,name,atype,a,btype,b,ctype,c) \
++type name(atype a,btype b,ctype c) \
++{ \
++ long __res; \
++ \
++ __asm__ __volatile__ ( \
++ \
++ " \n\t" \
++ \
++ " movi r2, %2\n\t" /* TRAP_ID_SYSCALL */ \
++ " movi r3, %1\n\t" /* __NR_##name */ \
++ " mov r4, %3\n\t" /* (long) a */ \
++ " mov r5, %4\n\t" /* (long) b */ \
++ " mov r6, %5\n\t" /* (long) c */ \
++ \
++ " trap\n\t" \
++ " mov %0, r2\n\t" /* syscall rtn */ \
++ \
++ " \n\t" \
++ \
++ : "=r" (__res) /* %0 */ \
++ \
++ : "i" (__NR_##name) /* %1 */ \
++ , "i" (TRAP_ID_SYSCALL) /* %2 */ \
++ , "r" ((long) a) /* %3 */ \
++ , "r" ((long) b) /* %4 */ \
++ , "r" ((long) c) /* %5 */ \
++ \
++ : "r2" /* Clobbered */ \
++ , "r3" /* Clobbered */ \
++ , "r4" /* Clobbered */ \
++ , "r5" /* Clobbered */ \
++ , "r6" /* Clobbered */ \
++ ); \
++ \
++__syscall_return(type,__res); \
++}
++
++//;dgt2;tmp;can we RELY on syscall4 args a,b,c,d
++//;dgt2;tmp; already being in r4,r5,r6,r7 ?
++#define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
++type name (atype a, btype b, ctype c, dtype d) \
++{ \
++ long __res; \
++ \
++ __asm__ __volatile__ ( \
++ \
++ " \n\t" \
++ \
++ " movi r2, %2\n\t" /* TRAP_ID_SYSCALL */ \
++ " movi r3, %1\n\t" /* __NR_##name */ \
++ " mov r4, %3\n\t" /* (long) a */ \
++ " mov r5, %4\n\t" /* (long) b */ \
++ " mov r6, %5\n\t" /* (long) c */ \
++ " mov r7, %6\n\t" /* (long) d */ \
++ \
++ " trap\n\t" \
++ " mov %0, r2\n\t" /* syscall rtn */ \
++ \
++ " \n\t" \
++ \
++ : "=r" (__res) /* %0 */ \
++ \
++ : "i" (__NR_##name) /* %1 */ \
++ , "i" (TRAP_ID_SYSCALL) /* %2 */ \
++ , "r" ((long) a) /* %3 */ \
++ , "r" ((long) b) /* %4 */ \
++ , "r" ((long) c) /* %5 */ \
++ , "r" ((long) d) /* %6 */ \
++ \
++ : "r2" /* Clobbered */ \
++ , "r3" /* Clobbered */ \
++ , "r4" /* Clobbered */ \
++ , "r5" /* Clobbered */ \
++ , "r6" /* Clobbered */ \
++ , "r7" /* Clobbered */ \
++ ); \
++ \
++__syscall_return(type,__res); \
++}
++
++//;dgt2;tmp;can we RELY on syscall5 args a,b,c,d
++//;dgt2;tmp; already being in r4,r5,r6,r7 ?
++#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
++type name (atype a,btype b,ctype c,dtype d,etype e) \
++{ \
++ long __res; \
++ \
++ __asm__ __volatile__ ( \
++ \
++ " \n\t" \
++ \
++ " movi r2, %2\n\t" /* TRAP_ID_SYSCALL */ \
++ " movi r3, %1\n\t" /* __NR_##name */ \
++ " mov r4, %3\n\t" /* (long) a */ \
++ " mov r5, %4\n\t" /* (long) b */ \
++ " mov r6, %5\n\t" /* (long) c */ \
++ " mov r7, %6\n\t" /* (long) c */ \
++ " mov r8, %7\n\t" /* (long) e */ \
++ \
++ " trap\n\t" \
++ " mov %0, r2\n\t" /* syscall rtn */ \
++ \
++ " \n\t" \
++ \
++ : "=r" (__res) /* %0 */ \
++ \
++ : "i" (__NR_##name) /* %1 */ \
++ , "i" (TRAP_ID_SYSCALL) /* %2 */ \
++ , "r" ((long) a) /* %3 */ \
++ , "r" ((long) b) /* %4 */ \
++ , "r" ((long) c) /* %5 */ \
++ , "r" ((long) d) /* %6 */ \
++ , "r" ((long) e) /* %7 */ \
++ \
++ : "r2" /* Clobbered */ \
++ , "r3" /* Clobbered */ \
++ , "r4" /* Clobbered */ \
++ , "r5" /* Clobbered */ \
++ , "r6" /* Clobbered */ \
++ , "r7" /* Clobbered */ \
++ , "r8" /* Clobbered */ \
++ ); \
++ \
++__syscall_return(type,__res); \
++}
++
++//;dgt2;tmp;can we RELY on syscall6 args a,b,c,d
++//;dgt2;tmp; already being in r4,r5,r6,r7 ?
++#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
++type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
++{ \
++ long __res; \
++ \
++ __asm__ __volatile__ ( \
++ \
++ " \n\t" \
++ \
++ " movi r2, %2\n\t" /* TRAP_ID_SYSCALL */ \
++ " movi r3, %1\n\t" /* __NR_##name */ \
++ " mov r4, %3\n\t" /* (long) a */ \
++ " mov r5, %4\n\t" /* (long) b */ \
++ " mov r6, %5\n\t" /* (long) c */ \
++ " mov r7, %6\n\t" /* (long) c */ \
++ " mov r8, %7\n\t" /* (long) e */ \
++ " mov r9, %8\n\t" /* (long) f */ \
++ \
++ " trap\n\t" \
++ " mov %0, r2\n\t" /* syscall rtn */ \
++ \
++ " \n\t" \
++ \
++ : "=r" (__res) /* %0 */ \
++ \
++ : "i" (__NR_##name) /* %1 */ \
++ , "i" (TRAP_ID_SYSCALL) /* %2 */ \
++ , "r" ((long) a) /* %3 */ \
++ , "r" ((long) b) /* %4 */ \
++ , "r" ((long) c) /* %5 */ \
++ , "r" ((long) d) /* %6 */ \
++ , "r" ((long) e) /* %7 */ \
++ , "r" ((long) f) /* %8 */ \
++ \
++ : "r2" /* Clobbered */ \
++ , "r3" /* Clobbered */ \
++ , "r4" /* Clobbered */ \
++ , "r5" /* Clobbered */ \
++ , "r6" /* Clobbered */ \
++ , "r7" /* Clobbered */ \
++ , "r8" /* Clobbered */ \
++ , "r9" /* Clobbered */ \
++ ); \
++ \
++__syscall_return(type,__res); \
++}
++
++#ifdef __KERNEL__
++#define __ARCH_WANT_IPC_PARSE_VERSION
++#define __ARCH_WANT_OLD_READDIR
++#define __ARCH_WANT_OLD_STAT
++#define __ARCH_WANT_STAT64
++#define __ARCH_WANT_SYS_ALARM
++#define __ARCH_WANT_SYS_GETHOSTNAME
++#define __ARCH_WANT_SYS_PAUSE
++#define __ARCH_WANT_SYS_SGETMASK
++#define __ARCH_WANT_SYS_SIGNAL
++#define __ARCH_WANT_SYS_TIME
++#define __ARCH_WANT_SYS_UTIME
++#define __ARCH_WANT_SYS_WAITPID
++#define __ARCH_WANT_SYS_SOCKETCALL
++#define __ARCH_WANT_SYS_FADVISE64
++#define __ARCH_WANT_SYS_GETPGRP
++#define __ARCH_WANT_SYS_LLSEEK
++#define __ARCH_WANT_SYS_NICE
++#define __ARCH_WANT_SYS_OLD_GETRLIMIT
++#define __ARCH_WANT_SYS_OLDUMOUNT
++#define __ARCH_WANT_SYS_SIGPENDING
++#define __ARCH_WANT_SYS_SIGPROCMASK
++#define __ARCH_WANT_SYS_RT_SIGACTION
++#endif
++
++#ifdef __KERNEL_SYSCALLS__
++
++/*
++ * we need this inline - forking from kernel space will result
++ * in NO COPY ON WRITE (!!!), until an execve is executed. This
++ * is no problem, but for the stack. This is handled by not letting
++ * main() use the stack at all after fork(). Thus, no function
++ * calls - which means inline code for fork too, as otherwise we
++ * would use the stack upon exit from 'fork()'.
++ *
++ * Actually only pause and fork are needed inline, so that there
++ * won't be any messing with the stack from main(), but we define
++ * some others too.
++ */
++#define __NR__exit __NR_exit
++static inline _syscall0(int,pause)
++static inline _syscall0(int,sync)
++static inline _syscall0(pid_t,setsid)
++static inline _syscall3(int,write,int,fd,const char *,buf,off_t,count)
++static inline _syscall3(int,read,int,fd,char *,buf,off_t,count)
++static inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count)
++static inline _syscall1(int,dup,int,fd)
++static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp)
++static inline _syscall3(int,open,const char *,file,int,flag,int,mode)
++static inline _syscall1(int,close,int,fd)
++static inline _syscall1(int,_exit,int,exitcode)
++static inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options)
++static inline _syscall1(int,delete_module,const char *,name)
++
++static inline pid_t wait(int * wait_stat)
++{
++ return waitpid(-1,wait_stat,0);
++}
++
++#endif
++
++/*
++ * "Conditional" syscalls
++ *
++ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
++ * but it doesn't work on all toolchains, so we just do it by hand
++ */
++#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
++
++#endif /* _ASM_NIOS_UNISTD_H_ */
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/user.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/user.h 2004-05-11 08:07:50.000000000 +0200
+@@ -0,0 +1,112 @@
++#ifndef _NIOS2NOMMU_USER_H
++#define _NIOS2NOMMU_USER_H
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/user.h
++ *
++ * Derived from M68knommu
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++#include <asm/page.h>
++
++/* Core file format: The core file is written in such a way that gdb
++ can understand it and provide useful information to the user (under
++ linux we use the 'trad-core' bfd). There are quite a number of
++ obstacles to being able to view the contents of the floating point
++ registers, and until these are solved you will not be able to view the
++ contents of them. Actually, you can read in the core file and look at
++ the contents of the user struct to find out what the floating point
++ registers contain.
++ The actual file contents are as follows:
++ UPAGE: 1 page consisting of a user struct that tells gdb what is present
++ in the file. Directly after this is a copy of the task_struct, which
++ is currently not used by gdb, but it may come in useful at some point.
++ All of the registers are stored as part of the upage. The upage should
++ always be only one page.
++ DATA: The data area is stored. We use current->end_text to
++ current->brk to pick up all of the user variables, plus any memory
++ that may have been malloced. No attempt is made to determine if a page
++ is demand-zero or if a page is totally unused, we just cover the entire
++ range. All of the addresses are rounded in such a way that an integral
++ number of pages is written.
++ STACK: We need the stack information in order to get a meaningful
++ backtrace. We need to write the data from (esp) to
++ current->start_stack, so we round each of these off in order to be able
++ to write an integer number of pages.
++ The minimum core file size is 3 pages, or 12288 bytes.
++*/
++
++struct user_m68kfp_struct {
++ unsigned long fpregs[8*3]; /* fp0-fp7 registers */
++ unsigned long fpcntl[3]; /* fp control regs */
++};
++
++/* This is needs more work, probably should look like gdb useage */
++struct user_regs_struct {
++ long r1,r2,r3,r4,r5,r6,r7,r8;
++ long r9,r10,r11,r12,r13,r14,r15;
++ long r16,r17,r18,r19,r20,r21,r22,r23;
++ long gp;
++ long sp;
++ long ra;
++ long fp;
++ long orig_r2;
++ long estatus;
++ long status_extension;
++ long ea;
++};
++
++
++/* When the kernel dumps core, it starts by dumping the user struct -
++ this will be used by gdb to figure out where the data and stack segments
++ are within the file, and what virtual addresses to use. */
++struct user{
++/* We start with the registers, to mimic the way that "memory" is returned
++ from the ptrace(3,...) function. */
++ struct user_regs_struct regs; /* Where the registers are actually stored */
++/* ptrace does not yet supply these. Someday.... */
++ int u_fpvalid; /* True if math co-processor being used. */
++ /* for this mess. Not yet used. */
++ struct user_m68kfp_struct m68kfp; /* Math Co-processor registers. */
++/* The rest of this junk is to help gdb figure out what goes where */
++ unsigned long int u_tsize; /* Text segment size (pages). */
++ unsigned long int u_dsize; /* Data segment size (pages). */
++ unsigned long int u_ssize; /* Stack segment size (pages). */
++ unsigned long start_code; /* Starting virtual address of text. */
++ unsigned long start_stack; /* Starting virtual address of stack area.
++ This is actually the bottom of the stack,
++ the top of the stack is always found in the
++ esp register. */
++ long int signal; /* Signal that caused the core dump. */
++ int reserved; /* No longer used */
++ struct user_regs_struct *u_ar0;
++ /* Used by gdb to help find the values for */
++ /* the registers. */
++ struct user_m68kfp_struct* u_fpstate; /* Math Co-processor pointer. */
++ unsigned long magic; /* To uniquely identify a core file */
++ char u_comm[32]; /* User command that was responsible */
++};
++#define NBPG PAGE_SIZE
++#define UPAGES 1
++#define HOST_TEXT_START_ADDR (u.start_code)
++#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
++
++#endif
+--- linux-libc-headers-2.6.9.1/include/asm-nios2nommu/virtconvert.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-libc-headers-2.6.9.1-nios2/include/asm-nios2nommu/virtconvert.h 2005-05-18 20:36:28.000000000 +0200
+@@ -0,0 +1,47 @@
++#ifndef __NIOS_VIRT_CONVERT__
++#define __NIOS_VIRT_CONVERT__
++
++/*--------------------------------------------------------------------
++ *
++ * include/asm-nios2nommu/virtconvert.h
++ *
++ * Derived from various works, Alpha, ix86, M68K, Sparc, ...et al
++ *
++ * Copyright (C) 2004 Microtronix Datacom Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ *
++ * Jan/20/2004 dgt NiosII
++ *
++ ---------------------------------------------------------------------*/
++
++
++/*
++ * Macros used for converting between virtual and physical mappings.
++ */
++
++#ifdef __KERNEL__
++
++// #include <linux/config.h>
++#include <asm/setup.h>
++#include <asm/page.h>
++
++#define mm_ptov(vaddr) ((void *) (vaddr))
++#define mm_vtop(vaddr) ((unsigned long) (vaddr))
++#define phys_to_virt(vaddr) ((void *) (vaddr))
++#define virt_to_phys(vaddr) ((unsigned long) (vaddr))
++
++#define virt_to_bus virt_to_phys
++#define bus_to_virt phys_to_virt
++
++#endif /*__KERNEL__ */
++#endif /*__NIOS_VIRT_CONVERT__*/
-e 's/mips.*/mips/' \
-e 's/mipsel.*/mips/' \
-e 's/cris.*/cris/' \
+ -e 's/nios2.*/nios2/' \
)
# just handle the ones that can be big or little
UCLIBC_TARGET_ENDIAN:=$(shell echo $(ARCH) | sed \
projects / buildroot.git / commitdiff