examples/minerva_soc: fix typo.

diff --git a/examples/minerva_soc.py b/examples/minerva_soc.py
index 99b05646c2e82417edc2fce7277192d47bf9f15c..a6281c051dfeaf2d680acc75e27bffda14e7f005 100644 (file)
--- a/examples/minerva_soc.py
+++ b/examples/minerva_soc.py
@@ -131,7 +131,7 @@ class _ClockResetGenerator(Elaboratable):
             else:
                 assert False
 
-            if self.platform.default_rst is not None:
+            if platform.default_rst is not None:
                 sync_pll_arst = ~sync_pll.locked | ResetSignal("_ref")
             else:
                 sync_pll_arst = ~sync_pll.locked