+2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
+
+ * gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
+ for A57.
+ (cortexa53_regmove_cost): New cost table for A53. Increase GP2FP/FP2GP
+ cost to spilling from integer to FP registers.
+
2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
* config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
NAMED_PARAM (FP2FP, 2)
};
+static const struct cpu_regmove_cost cortexa57_regmove_cost =
+{
+ NAMED_PARAM (GP2GP, 1),
+ /* Avoid the use of slow int<->fp moves for spilling by setting
+ their cost higher than memmov_cost. */
+ NAMED_PARAM (GP2FP, 5),
+ NAMED_PARAM (FP2GP, 5),
+ NAMED_PARAM (FP2FP, 2)
+};
+
+static const struct cpu_regmove_cost cortexa53_regmove_cost =
+{
+ NAMED_PARAM (GP2GP, 1),
+ /* Avoid the use of slow int<->fp moves for spilling by setting
+ their cost higher than memmov_cost. */
+ NAMED_PARAM (GP2FP, 5),
+ NAMED_PARAM (FP2GP, 5),
+ NAMED_PARAM (FP2FP, 2)
+};
+
/* Generic costs for vector insn classes. */
#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
__extension__
{
&cortexa53_extra_costs,
&generic_addrcost_table,
- &generic_regmove_cost,
+ &cortexa53_regmove_cost,
&generic_vector_cost,
NAMED_PARAM (memmov_cost, 4),
NAMED_PARAM (issue_rate, 2)
{
&cortexa57_extra_costs,
&cortexa57_addrcost_table,
- &generic_regmove_cost,
+ &cortexa57_regmove_cost,
&cortexa57_vector_cost,
NAMED_PARAM (memmov_cost, 4),
NAMED_PARAM (issue_rate, 3)