fprintf(stderr, "pre twin reg %s src %d dest %d pred %lx %lx\n",
xstr(INSN), *src_offs, *dest_offs, src_pred, dest_pred);
#endif
- if (!zeroingsrc)
+ if (inc_offs(vlen, subvl, *dest_subo))
{
- // skip over masked-out elements in the src reg
- while ((src_pset = (src_pred & (1<<pred_remap(src_preg, *src_offs))))
- == 0) {
- inc_offs(vlen, subvl, *src_offs, *src_subo);
- if (*src_offs >= vlen) {
- break;
- }
+ if (!zeroingsrc)
+ {
+ // skip over masked-out elements in the src reg
+ while ((src_pset = (src_pred & (1<<pred_remap(src_preg, *src_offs))))
+ == 0) {
+ (*src_offs) += 1;
+ if (*src_offs >= vlen) {
+ break;
+ }
+ }
}
- }
- if (!zeroing)
- {
- // skip over masked-out elements in the dest reg
- while ((dest_pset = (dest_pred & (1<<pred_remap(dest_preg, *dest_offs))))
- == 0) {
- inc_offs(vlen, subvl, *dest_offs, *dest_subo);
- if (*dest_offs >= vlen) {
- break;
- }
+ if (!zeroing)
+ {
+ // skip over masked-out elements in the dest reg
+ while ((dest_pset = (dest_pred & (1<<pred_remap(dest_preg, *dest_offs))))
+ == 0) {
+ (*dest_offs) += 1;
+ if (*dest_offs >= vlen) {
+ break;
+ }
+ }
}
}
if (*src_offs >= vlen || *dest_offs >= vlen) {
{
break;
}
+ if (inc_offs(vlen, subvl, *dest_subo)) {
#ifdef INSN_CATEGORY_TWINPREDICATION
- inc_offs(vlen, subvl, *src_offs, *src_subo);
+ (*src_offs) += 1;
#endif
- inc_offs(vlen, subvl, *dest_offs, *dest_subo);
+ (*dest_offs) += 1;
+ }
} // end voffs loop
#ifdef INSN_TYPE_BRANCH
// ok, at the end of the loop, if the predicates are equal,
return std::max(wid1, wid2);
}
-/* increments the offset and sub-offset appropriately in a FSM-based
+/* increments the sub-offset appropriately in a FSM-based
version of a twin-nested for-loop:
- for (offs = 0; offs < vlen; offs++) {
for (suboffs = 0; suboffs < subvl; suboffs++) {
... doooo stuuuuff (python would use "yield" here)
}
suboffs = 0; // reset to zero after "loop"
- }
*/
-bool inc_offs(int vlen, int subvl, int &offs, int &suboffs)
+bool inc_offs(int vlen, int subvl, int &suboffs)
{
suboffs++;
if (suboffs < subvl) {
- return true; // double-nested loop can continue
+ return false; // outer loop should not increment
}
suboffs = 0; // reset the sub-offs
- offs += 1; // increment the outer (VL) loop instead
- if (offs < vlen) {
- return true; // also can continue
- }
- return false; // should not continue, however let FN deal with it
+ return true; // indicates outer (VL) loop should increment
}
sv_insn_t::sv_insn_t(processor_t *pr, bool _sv_enabled,
#define SV_CFG_BANK (0x7)
#define SV_CFG_SIZE (0x3<<3)
-bool inc_offs(int vlen, int subvl, int &offs, int &suboffs);
+bool inc_offs(int vlen, int subvl, int &suboffs);
#endif