radv: Split out cliprect rule generation.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 009a03f41f726bc03534642b39ebbace7e380959..7ad964bdb8d2513edd4d8afb2cb782b53d74e3ec 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1163,30 +1163,8 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline,
                typed_memcpy(dynamic->discard_rectangle.rectangles,
                             discard_rectangle_info->pDiscardRectangles,
                             discard_rectangle_info->discardRectangleCount);
-
-               unsigned mask = 0;
-
-               for (unsigned i = 0; i < (1u << MAX_DISCARD_RECTANGLES); ++i) {
-                       /* Interpret i as a bitmask, and then set the bit in the mask if
-                        * that combination of rectangles in which the pixel is contained
-                        * should pass the cliprect test. */
-                       unsigned relevant_subset = i & ((1u << discard_rectangle_info->discardRectangleCount) - 1);
-
-                       if (discard_rectangle_info->discardRectangleMode == VK_DISCARD_RECTANGLE_MODE_INCLUSIVE_EXT &&
-                           !relevant_subset)
-                               continue;
-
-                       if (discard_rectangle_info->discardRectangleMode == VK_DISCARD_RECTANGLE_MODE_EXCLUSIVE_EXT &&
-                           relevant_subset)
-                               continue;
-
-                       mask |= 1u << i;
-               }
-               pipeline->graphics.pa_sc_cliprect_rule = mask;
-       } else {
-               /* Allow from all rectangle combinations */
-               pipeline->graphics.pa_sc_cliprect_rule = 0xffff;
        }
+
        pipeline->dynamic_state.mask = states;
 }
 
@@ -2943,6 +2921,37 @@ radv_compute_vgt_shader_stages_en(const struct radv_pipeline *pipeline)
        return stages;
 }
 
+static uint32_t
+radv_compute_cliprect_rule(const VkGraphicsPipelineCreateInfo *pCreateInfo)
+{
+       const  VkPipelineDiscardRectangleStateCreateInfoEXT *discard_rectangle_info =
+                       vk_find_struct_const(pCreateInfo->pNext, PIPELINE_DISCARD_RECTANGLE_STATE_CREATE_INFO_EXT);
+
+       if (!discard_rectangle_info)
+               return 0xffff;
+
+       unsigned mask = 0;
+
+       for (unsigned i = 0; i < (1u << MAX_DISCARD_RECTANGLES); ++i) {
+               /* Interpret i as a bitmask, and then set the bit in the mask if
+                * that combination of rectangles in which the pixel is contained
+                * should pass the cliprect test. */
+               unsigned relevant_subset = i & ((1u << discard_rectangle_info->discardRectangleCount) - 1);
+
+               if (discard_rectangle_info->discardRectangleMode == VK_DISCARD_RECTANGLE_MODE_INCLUSIVE_EXT &&
+                   !relevant_subset)
+                       continue;
+
+               if (discard_rectangle_info->discardRectangleMode == VK_DISCARD_RECTANGLE_MODE_EXCLUSIVE_EXT &&
+                   relevant_subset)
+                       continue;
+
+               mask |= 1u << i;
+       }
+
+       return mask;
+}
+
 static void
 radv_pipeline_generate_pm4(struct radv_pipeline *pipeline,
                            const VkGraphicsPipelineCreateInfo *pCreateInfo,
@@ -2979,7 +2988,7 @@ radv_pipeline_generate_pm4(struct radv_pipeline *pipeline,
        }
        radeon_set_context_reg(&pipeline->cs, R_028A6C_VGT_GS_OUT_PRIM_TYPE, pipeline->graphics.gs_out);
 
-       radeon_set_context_reg(&pipeline->cs, R_02820C_PA_SC_CLIPRECT_RULE, pipeline->graphics.pa_sc_cliprect_rule);
+       radeon_set_context_reg(&pipeline->cs, R_02820C_PA_SC_CLIPRECT_RULE, radv_compute_cliprect_rule(pCreateInfo));
 
        assert(pipeline->cs.cdw <= pipeline->cs.max_dw);
 }

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 8804724f55c413efdb2d71ba63184f6cabfd854e..781cccbafea1fbd4de8590dcd01b2dd5c4a2c5d1 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1212,7 +1212,6 @@ struct radv_pipeline {
                        uint8_t vtx_emit_num;
                        struct radv_prim_vertex_count prim_vertex_count;
                        bool can_use_guardband;
-                       uint32_t pa_sc_cliprect_rule;
                        uint32_t needed_dynamic_state;
                } graphics;
        };