intel: support for 16 bit config with 24 depth and 8 stencil

Patch adds additional singlesample config with 565 color buffer,
24 bit depth and 8 bit stencil buffer. This makes Quadrant benchmark
work on Android. Tested with Sandybridge and Ivybridge machines.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index f4ed64cc363ea53e9ce1f5c0bbeffeebdd7c2dbc..0194804db252f0dbeb80f556d4cb7b7c2e6124cf 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -935,11 +935,11 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
    /* Generate singlesample configs without accumulation buffer. */
    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
       __DRIconfig **new_configs;
-      const int num_depth_stencil_bits = 2;
+      int num_depth_stencil_bits = 2;
 
       /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
        * buffer that has a different number of bits per pixel than the color
-       * buffer.  This isn't yet supported here.
+       * buffer, gen >= 6 supports this.
        */
       depth_bits[0] = 0;
       stencil_bits[0] = 0;
@@ -947,6 +947,11 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
       if (formats[i] == MESA_FORMAT_RGB565) {
          depth_bits[1] = 16;
          stencil_bits[1] = 0;
+         if (screen->gen >= 6) {
+             depth_bits[2] = 24;
+             stencil_bits[2] = 8;
+             num_depth_stencil_bits = 3;
+         }
       } else {
          depth_bits[1] = 24;
          stencil_bits[1] = 8;