added under consideration, SDRAM

diff --git a/180nm_Oct2020/interfaces.mdwn b/180nm_Oct2020/interfaces.mdwn
index ce72e96288aff7a0d80a4da1abcf0c41a20e6155..eda03f0608784bb3c13d3e4ee6c3ee9ef6490e17 100644 (file)
--- a/180nm_Oct2020/interfaces.mdwn
+++ b/180nm_Oct2020/interfaces.mdwn
@@ -12,6 +12,10 @@ These are bare minimum viability:
 * [[shakti/m_class/LPC]]
 * [[shakti/m_class/EINT]]
 
+Under consideration:
+
+* [[shakti/m_class/sdram]] see <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006374.html>
+
 # Secondary priorities
 
 TODO