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Specify ice40 family to cells_sim.v using define
author
Eddie Hung
<eddie@fpgeh.com>
Thu, 29 Aug 2019 00:21:12 +0000
(17:21 -0700)
committer
Eddie Hung
<eddie@fpgeh.com>
Thu, 29 Aug 2019 00:21:12 +0000
(17:21 -0700)
techlibs/ice40/synth_ice40.cc
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diff --git
a/techlibs/ice40/synth_ice40.cc
b/techlibs/ice40/synth_ice40.cc
index c6de81bd91caa42a9a974326fe74e5bfe67d2b1a..2f77c03db21fb61668bf94833b9f6ef3b6b394ba 100644
(file)
--- a/
techlibs/ice40/synth_ice40.cc
+++ b/
techlibs/ice40/synth_ice40.cc
@@
-238,7
+238,14
@@
struct SynthIce40Pass : public ScriptPass
{
if (check_label("begin"))
{
- run("read_verilog -icells -lib +/ice40/cells_sim.v");
+ std::string define;
+ if (device_opt == "lp")
+ define = "-D ICE40_LX";
+ else if (device_opt == "u")
+ define = "-D ICE40_U";
+ else
+ define = "-D ICE40_HX";
+ run("read_verilog -icells " + define + " -lib +/ice40/cells_sim.v");
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
run("proc");
}