predicates.md (ext_sse_reg_operand): New.

* gcc/config/i386/predicates.md (ext_sse_reg_operand): New.
* gcc/config/i386/i386.md (*movti_internal): Use
predicate to determine if EVEX is needed.
(*movsi_internal): Ditto.
(*movdf_internal): Ditto.
(*movsf_internal): Ditto.
* gcc/config/i386/mmx.md (*mov<mode>_internal): Ditto.

From-SVN: r201936

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9647b90831fa6cefb176136f637fd833849891bd..e571e55169de82f371183effc481035f32ed50fa 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2013-08-23  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+       * gcc/config/i386/predicates.md (ext_sse_reg_operand): New.
+       * gcc/config/i386/i386.md (*movti_internal): Use
+       predicate to determine if EVEX is needed.
+       (*movsi_internal): Ditto.
+       (*movdf_internal): Ditto.
+       (*movsf_internal): Ditto.
+       * gcc/config/i386/mmx.md (*mov<mode>_internal): Ditto.
+
 2013-08-23  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/58209

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b55fd6fbe0a8c5614180d218066c0193a9aceb96..3d7533a12f190466c778fe618ce3974054c8f075 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2059,9 +2059,8 @@
      (cond [(eq_attr "alternative" "2")
              (const_string "SI")
            (eq_attr "alternative" "12,13")
-             (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
-                         (and (match_test "REG_P (operands[1])")
-                              (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+             (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+                         (match_operand 1 "ext_sse_reg_operand"))
                       (const_string "XI")
                     (ior (not (match_test "TARGET_SSE2"))
                          (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -2192,9 +2191,8 @@
      (cond [(eq_attr "alternative" "2,3")
              (const_string "DI")
            (eq_attr "alternative" "6,7")
-             (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
-                         (and (match_test "REG_P (operands[1])")
-                              (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+             (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+                         (match_operand 1 "ext_sse_reg_operand"))
                       (const_string "XI")
                     (ior (not (match_test "TARGET_SSE2"))
                          (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -2923,9 +2921,8 @@
 
               /* movaps is one byte shorter for non-AVX targets.  */
               (eq_attr "alternative" "10,14")
-                (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
-                            (and (match_test "REG_P (operands[1])")
-                                 (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+                (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+                            (match_operand 1 "ext_sse_reg_operand"))
                          (const_string "V8DF")
                        (ior (not (match_test "TARGET_SSE2"))
                             (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
@@ -3072,9 +3069,8 @@
                  better to maintain the whole registers in single format
                  to avoid problems on using packed logical operations.  */
               (eq_attr "alternative" "6")
-                (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
-                            (and (match_test "REG_P (operands[1])")
-                                 (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+                (cond [(ior  (match_operand 0 "ext_sse_reg_operand")
+                             (match_operand 1 "ext_sse_reg_operand"))
                          (const_string "V16SF")
                        (ior (match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
                             (match_test "TARGET_SSE_SPLIT_REGS"))

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 681cdb785852b0043eb98a60d4d7ecb58162fc04..17e24999258cb3c55a399681e2410b4c0969e3c1 100644 (file)
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -185,9 +185,8 @@
      (cond [(eq_attr "alternative" "2")
              (const_string "SI")
            (eq_attr "alternative" "11,12,15,16")
-             (cond [(ior (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[0]))")
-                         (and (match_test "REG_P (operands[1])")
-                              (match_test "EXT_REX_SSE_REGNO_P (REGNO (operands[1]))")))
+             (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+                         (match_operand 1 "ext_sse_reg_operand"))
                        (const_string "XI")
                     (match_test "<MODE>mode == V2SFmode")
                       (const_string "V4SF")

diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index b64ef6999ee34876d845020b0b8f8fb442da156d..3959c3892e425845bca6253f15f1f5bb47be12a7 100644 (file)
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -47,6 +47,12 @@
   (and (match_code "reg")
        (match_test "SSE_REGNO_P (REGNO (op))")))
 
+;; True if the operand is an AVX-512 new register.
+(define_predicate "ext_sse_reg_operand"
+  (and (match_code "reg")
+       (match_test "EXT_REX_SSE_REGNO_P (REGNO (op))")))
+
+
 ;; True if the operand is a Q_REGS class register.
 (define_predicate "q_regs_operand"
   (match_operand 0 "register_operand")