brw_imm_ud(0xffff) should have been converted to fs_reg(0xffffu) to
make sure the uint32_t fs_reg constructor was matched.
commit
49a938a265f5959c9b558995cc658f80acb6eb18
Author: Jordan Justen <jordan.l.justen@intel.com>
Date: Fri Feb 20 12:12:25 2015 -0800
i965/fs: Use fs_reg for CS/VS atomics pixel mask immediate data
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
*/
assert(stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_COMPUTE);
emit(MOV(component(sources[0], 7),
- fs_reg(0xffff)))->force_writemask_all = true;
+ fs_reg(0xffffu)))->force_writemask_all = true;
}
length++;
*/
assert(stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_COMPUTE);
emit(MOV(component(sources[0], 7),
- fs_reg(0xffff)))->force_writemask_all = true;
+ fs_reg(0xffffu)))->force_writemask_all = true;
}
/* Set the surface read offset. */