cris.c (cris_expand_prologue): Use gen_raw_REG instead of gen_rtx_raw_REG.

gcc/
	* config/cris/cris.c (cris_expand_prologue): Use gen_raw_REG
	instead of gen_rtx_raw_REG.
	(cris_expand_epilogue): Likewise.
	* config/microblaze/microblaze.c (microblaze_classify_address):
	Likewise.
	* config/sparc/sparc.md: Likewise.

From-SVN: r223383

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5b82a8551c1d6cc07e24d423657d2598a155b51c..778019dc50bc89463393b255fe98f8904dd221b5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2015-05-19  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * config/cris/cris.c (cris_expand_prologue): Use gen_raw_REG
+       instead of gen_rtx_raw_REG.
+       (cris_expand_epilogue): Likewise.
+       * config/microblaze/microblaze.c (microblaze_classify_address):
+       Likewise.
+       * config/sparc/sparc.md: Likewise.
+
 2015-05-19  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/alpha/alpha.c (alpha_legitimize_reload_address)

diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c
index fc79e3e89108c474c023acd5f19539fff0f01298..7c7d6257170c27795ad7e5eec3eae7a47ab59f84 100644 (file)
--- a/gcc/config/cris/cris.c
+++ b/gcc/config/cris/cris.c
@@ -3138,7 +3138,7 @@ cris_expand_prologue (void)
 
          mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
          set_mem_alias_set (mem, get_varargs_alias_set ());
-         insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
+         insn = emit_move_insn (mem, gen_raw_REG (SImode, regno));
 
          /* Note the absence of RTX_FRAME_RELATED_P on the above insn:
             the value isn't restored, so we don't want to tell dwarf2
@@ -3162,7 +3162,7 @@ cris_expand_prologue (void)
 
       mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
       set_mem_alias_set (mem, get_frame_alias_set ());
-      insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM));
+      insn = emit_move_insn (mem, gen_raw_REG (SImode, CRIS_SRP_REGNUM));
       RTX_FRAME_RELATED_P (insn) = 1;
       framesize += 4;
     }
@@ -3260,7 +3260,7 @@ cris_expand_prologue (void)
 
              mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
              set_mem_alias_set (mem, get_frame_alias_set ());
-             insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
+             insn = emit_move_insn (mem, gen_raw_REG (SImode, regno));
              RTX_FRAME_RELATED_P (insn) = 1;
 
              framesize += 4 + size;
@@ -3426,7 +3426,7 @@ cris_expand_epilogue (void)
        mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
                                                     stack_pointer_rtx));
        set_mem_alias_set (mem, get_frame_alias_set ());
-       insn = emit_move_insn (gen_rtx_raw_REG (SImode, regno), mem);
+       insn = emit_move_insn (gen_raw_REG (SImode, regno), mem);
 
        /* Whenever we emit insns with post-incremented addresses
           ourselves, we must add a post-inc note manually.  */
@@ -3512,7 +3512,7 @@ cris_expand_epilogue (void)
        {
          rtx mem;
          rtx insn;
-         rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
+         rtx srpreg = gen_raw_REG (SImode, CRIS_SRP_REGNUM);
          mem = gen_rtx_MEM (SImode,
                             gen_rtx_POST_INC (SImode,
                                               stack_pointer_rtx));
@@ -3527,8 +3527,7 @@ cris_expand_epilogue (void)
          if (crtl->calls_eh_return)
            emit_insn (gen_addsi3 (stack_pointer_rtx,
                                   stack_pointer_rtx,
-                                  gen_rtx_raw_REG (SImode,
-                                                   CRIS_STACKADJ_REG)));
+                                  gen_raw_REG (SImode, CRIS_STACKADJ_REG)));
          cris_expand_return (false);
        }
       else
@@ -3545,7 +3544,7 @@ cris_expand_epilogue (void)
       if (return_address_on_stack)
        {
          rtx mem;
-         rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
+         rtx srpreg = gen_raw_REG (SImode, CRIS_SRP_REGNUM);
          rtx insn;
 
          mem = gen_rtx_MEM (SImode,
@@ -3569,8 +3568,7 @@ cris_expand_epilogue (void)
   if (crtl->calls_eh_return)
     emit_insn (gen_addsi3 (stack_pointer_rtx,
                           stack_pointer_rtx,
-                          gen_rtx_raw_REG (SImode,
-                                           CRIS_STACKADJ_REG)));
+                          gen_raw_REG (SImode, CRIS_STACKADJ_REG)));
   cris_expand_return (false);
 }
 

diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
index 55be2d11674986a28f875b757d9058fdb214ee33..8f0f4085965f07e0a919744083f4c70f8b563788 100644 (file)
--- a/gcc/config/microblaze/microblaze.c
+++ b/gcc/config/microblaze/microblaze.c
@@ -866,7 +866,7 @@ microblaze_classify_address (struct microblaze_address_info *info, rtx x,
       }
     case CONST_INT:
       {
-       info->regA = gen_rtx_raw_REG (mode, 0);
+       info->regA = gen_raw_REG (mode, 0);
        info->type = ADDRESS_CONST_INT;
        info->offset = x;
        return true;
@@ -878,13 +878,13 @@ microblaze_classify_address (struct microblaze_address_info *info, rtx x,
        info->type = ADDRESS_SYMBOLIC;
        info->symbol_type = SYMBOL_TYPE_GENERAL;
        info->symbol = x;
-       info->regA = gen_rtx_raw_REG (mode, get_base_reg (x));
+       info->regA = gen_raw_REG (mode, get_base_reg (x));
 
        if (GET_CODE (x) == CONST)
          {
            if (GET_CODE (XEXP (x, 0)) == UNSPEC)
             {
-               info->regA = gen_rtx_raw_REG (mode,
+               info->regA = gen_raw_REG (mode,
                                  get_base_reg (XVECEXP (XEXP (x,0), 0, 0)));
                return microblaze_classify_unspec (info, XEXP (x, 0));
             }

diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index d059cc189d0dce531df013e3e16bce88f0d622d8..1760efff3766bdd013cfe1e223e21e65cf99e2be 100644 (file)
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -2364,7 +2364,7 @@
    && reload_completed"
   [(clobber (const_int 0))]
 {
-  operands[0] = gen_rtx_raw_REG (DImode, REGNO (operands[0]));
+  operands[0] = gen_raw_REG (DImode, REGNO (operands[0]));
 
   if (TARGET_ARCH64)
     {