uint32_t width, uint32_t height,
uint32_t tile_x, uint32_t tile_y);
+ /**
+ * Emit an MI_REPORT_PERF_COUNT command packet.
+ *
+ * This asks the GPU to write a report of the current OA counter values
+ * into @bo at the given offset and containing the given @report_id
+ * which we can cross-reference when parsing the report (gen7+ only).
+ */
+ void (*emit_mi_report_perf_count)(struct brw_context *brw,
+ struct brw_bo *bo,
+ uint32_t offset_in_bytes,
+ uint32_t report_id);
} vtbl;
struct brw_bufmgr *bufmgr;
}
}
-/**
- * Emit an MI_REPORT_PERF_COUNT command packet.
- *
- * This asks the GPU to write a report of the current OA counter
- * values into @bo at the given offset and containing the given
- * @report_id which we can cross-reference when parsing the report.
- */
-static void
-emit_mi_report_perf_count(struct brw_context *brw,
- struct brw_bo *bo,
- uint32_t offset_in_bytes,
- uint32_t report_id)
-{
- assert(offset_in_bytes % 64 == 0);
-
- BEGIN_BATCH(3);
- OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT);
- OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
- offset_in_bytes);
- OUT_BATCH(report_id);
- ADVANCE_BATCH();
-}
-
/**
* Add a query to the global list of "unaccumulated queries."
*
brw->perfquery.next_query_start_report_id += 2;
/* Take a starting OA counter snapshot. */
- emit_mi_report_perf_count(brw, obj->oa.bo, 0,
- obj->oa.begin_report_id);
+ brw->vtbl.emit_mi_report_perf_count(brw, obj->oa.bo, 0,
+ obj->oa.begin_report_id);
++brw->perfquery.n_active_oa_queries;
/* No already-buffered samples can possibly be associated with this query
*/
if (!obj->oa.results_accumulated) {
/* Take an ending OA counter snapshot. */
- emit_mi_report_perf_count(brw, obj->oa.bo,
- MI_RPC_BO_END_OFFSET_BYTES,
- obj->oa.begin_report_id + 1);
+ brw->vtbl.emit_mi_report_perf_count(brw, obj->oa.bo,
+ MI_RPC_BO_END_OFFSET_BYTES,
+ obj->oa.begin_report_id + 1);
}
--brw->perfquery.n_active_oa_queries;
/* ---------------------------------------------------------------------- */
+#if GEN_GEN >= 7
+static void
+genX(emit_mi_report_perf_count)(struct brw_context *brw,
+ struct brw_bo *bo,
+ uint32_t offset_in_bytes,
+ uint32_t report_id)
+{
+ brw_batch_emit(brw, GENX(MI_REPORT_PERF_COUNT), mi_rpc) {
+ mi_rpc.MemoryAddress = instruction_bo(bo, offset_in_bytes);
+ mi_rpc.ReportID = report_id;
+ }
+}
+#endif
+
+/* ---------------------------------------------------------------------- */
+
void
genX(init_atoms)(struct brw_context *brw)
{
STATIC_ASSERT(ARRAY_SIZE(compute_atoms) <= ARRAY_SIZE(brw->compute_atoms));
brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
compute_atoms, ARRAY_SIZE(compute_atoms));
+
+ brw->vtbl.emit_mi_report_perf_count = genX(emit_mi_report_perf_count);
#endif
}