sh.md (call): Extend 32-bit addresses to DImode for 32-bit TARGET_SHMEDIA.

	* config/sh/sh.md (call): Extend 32-bit addresses to DImode
	for 32-bit TARGET_SHMEDIA.
	(call_value): Likewise.

From-SVN: r87619

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8648e7ca4d3f4445f313f14b312014579c8fdc6b..31e4df25e35c3601ebcf8145068138d1ba919dc6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-09-16  Kaz Kojima  <kkojima@gcc.gnu.org>
+
+       * config/sh/sh.md (call): Extend 32-bit addresses to DImode
+       for 32-bit TARGET_SHMEDIA.
+       (call_value): Likewise.
+
 2004-09-16  Diego Novillo  <dnovillo@redhat.com>
 
        * tree-ssa-operands.c (add_call_clobber_ops): Make read-only

diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 31e05a2fead98988a10e3e5c850d66de9069fcab..5adcac226646b8edbb9fe47fae7b1c825af08154 100644 (file)
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -5800,11 +5800,19 @@
              if (GET_MODE (operands[0]) != DImode)
                operands[0] = gen_rtx_SUBREG (DImode, operands[0], 0);
            }
-         else
+         else if (TARGET_SHMEDIA64)
            {
              operands[0] = shallow_copy_rtx (operands[0]);
              PUT_MODE (operands[0], DImode);
            }
+         else
+           {
+             rtx reg = gen_reg_rtx (DImode);
+
+             operands[0] = copy_to_mode_reg (SImode, operands[0]);
+             emit_insn (gen_extendsidi2 (reg, operands[0]));
+             operands[0] = reg;
+           }
        }
       if (! target_reg_operand (operands[0], DImode))
        operands[0] = copy_to_mode_reg (DImode, operands[0]);
@@ -6025,11 +6033,19 @@
              if (GET_MODE (operands[1]) != DImode)
                operands[1] = gen_rtx_SUBREG (DImode, operands[1], 0);
            }
-         else
+         else if (TARGET_SHMEDIA64)
            {
              operands[1] = shallow_copy_rtx (operands[1]);
              PUT_MODE (operands[1], DImode);
            }
+         else
+           {
+             rtx reg = gen_reg_rtx (DImode);
+
+             operands[1] = copy_to_mode_reg (SImode, operands[1]);
+             emit_insn (gen_extendsidi2 (reg, operands[1]));
+             operands[1] = reg;
+           }
        }
       if (! target_reg_operand (operands[1], DImode))
        operands[1] = copy_to_mode_reg (DImode, operands[1]);