r600g: flush and invalidate htile cache when appropriate

Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>
NOTE: This is a candidate for the 9.1 branch.

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index b601f1430ce32f8c6784a29ab25cdee4d88de8a6..0a3372a76228771b6ad0b97c96058d0c8dab4c14 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1710,6 +1710,11 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
        }
        if (rctx->framebuffer.state.zsbuf) {
                rctx->flags |= R600_CONTEXT_WAIT_3D_IDLE | R600_CONTEXT_FLUSH_AND_INV;
+
+               rtex = (struct r600_texture*)rctx->framebuffer.state.zsbuf->texture;
+               if (rtex->htile) {
+                       rctx->flags |= R600_CONTEXT_FLUSH_AND_INV_DB_META;
+               }
        }
 
        util_copy_framebuffer_state(&rctx->framebuffer.state, state);

diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index dfd18b81a921856b5538cc31cc40e003adf63ce9..d018ebb0298b73300e6626086ab3c29601fccda3 100644 (file)
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -152,6 +152,7 @@ struct r600_so_target {
 #define R600_CONTEXT_FLUSH_AND_INV             (1 << 4)
 #define R600_CONTEXT_FLUSH_AND_INV_CB_META     (1 << 5)
 #define R600_CONTEXT_PS_PARTIAL_FLUSH          (1 << 6)
+#define R600_CONTEXT_FLUSH_AND_INV_DB_META      (1 << 7)
 
 struct r600_context;
 struct r600_screen;

diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 78b5b2930604d1d0ccc1d6a9a79779cb72a46295..da0b02fb0237788d0b709d27920b14e69ca5d721 100644 (file)
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -652,6 +652,12 @@ void r600_flush_emit(struct r600_context *rctx)
                cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_FLUSH_AND_INV_CB_META) | EVENT_INDEX(0);
        }
 
+       if (rctx->chip_class >= R700 &&
+           (rctx->flags & R600_CONTEXT_FLUSH_AND_INV_DB_META)) {
+               cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0);
+               cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_FLUSH_AND_INV_DB_META) | EVENT_INDEX(0);
+       }
+
        if (rctx->flags & R600_CONTEXT_FLUSH_AND_INV) {
                cs->buf[cs->cdw++] = PKT3(PKT3_EVENT_WRITE, 0, 0);
                cs->buf[cs->cdw++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT) | EVENT_INDEX(0);
@@ -747,6 +753,7 @@ void r600_context_flush(struct r600_context *ctx, unsigned flags)
         */
        ctx->flags |= R600_CONTEXT_FLUSH_AND_INV |
                      R600_CONTEXT_FLUSH_AND_INV_CB_META |
+                     R600_CONTEXT_FLUSH_AND_INV_DB_META |
                      R600_CONTEXT_WAIT_3D_IDLE |
                      R600_CONTEXT_WAIT_CP_DMA_IDLE;
 
@@ -1099,6 +1106,7 @@ void r600_cp_dma_copy_buffer(struct r600_context *rctx,
        rctx->flags |= R600_CONTEXT_INVAL_READ_CACHES |
                       R600_CONTEXT_FLUSH_AND_INV |
                       R600_CONTEXT_FLUSH_AND_INV_CB_META |
+                      R600_CONTEXT_FLUSH_AND_INV_DB_META |
                       R600_CONTEXT_STREAMOUT_FLUSH |
                       R600_CONTEXT_WAIT_3D_IDLE;
 

diff --git a/src/gallium/drivers/r600/r600_hw_context_priv.h b/src/gallium/drivers/r600/r600_hw_context_priv.h
index 692e6ec60fd001511cfeaca26e0717ffbb37bc19..3b50f682486469eecd39606d46dbcd7af5624206 100644 (file)
--- a/src/gallium/drivers/r600/r600_hw_context_priv.h
+++ b/src/gallium/drivers/r600/r600_hw_context_priv.h
@@ -29,7 +29,7 @@
 #include "r600_pipe.h"
 
 /* the number of CS dwords for flushing and drawing */
-#define R600_MAX_FLUSH_CS_DWORDS       12
+#define R600_MAX_FLUSH_CS_DWORDS       16
 #define R600_MAX_DRAW_CS_DWORDS                34
 #define R600_TRACE_CS_DWORDS           7
 

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 6f49eed43764f1af80e4aef1df437bf48bfeb9e3..c0384e82814ab4180cd1f14c307c9a2f48322aa4 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1556,6 +1556,11 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
        }
        if (rctx->framebuffer.state.zsbuf) {
                rctx->flags |= R600_CONTEXT_WAIT_3D_IDLE | R600_CONTEXT_FLUSH_AND_INV;
+
+               rtex = (struct r600_texture*)rctx->framebuffer.state.zsbuf->texture;
+               if (rctx->chip_class >= R700 && rtex->htile) {
+                       rctx->flags |= R600_CONTEXT_FLUSH_AND_INV_DB_META;
+               }
        }
 
        /* Set the new state. */

diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h
index 621e7a10e78a23acdb956e66fbfaff654d938205..81e5a6c6e1d616a98c663f424f7de4dcdeb5dff1 100644 (file)
--- a/src/gallium/drivers/r600/r600d.h
+++ b/src/gallium/drivers/r600/r600d.h
@@ -119,6 +119,7 @@
 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT   0x16
 #define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH       0x1f
 #define EVENT_TYPE_SAMPLE_STREAMOUTSTATS       0x20
+#define EVENT_TYPE_FLUSH_AND_INV_DB_META       0x2c /* supported on r700+ */
 #define EVENT_TYPE_FLUSH_AND_INV_CB_META       46 /* supported on r700+ */
 #define                EVENT_TYPE(x)                           ((x) << 0)
 #define                EVENT_INDEX(x)                          ((x) << 8)