vendor.xilinx_7series: generate also binary bitfile.

Fixes #139.

diff --git a/nmigen/vendor/xilinx_7series.py b/nmigen/vendor/xilinx_7series.py
index 30270704a929e8af23704a3b8e6deb52f6908022..193221abb0798c993a69c1ee4fb91c8c1896fd9d 100644 (file)
--- a/nmigen/vendor/xilinx_7series.py
+++ b/nmigen/vendor/xilinx_7series.py
@@ -42,7 +42,8 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
         * ``{{name}}_timing.rpt``: Vivado report.
         * ``{{name}}_power.rpt``: Vivado report.
         * ``{{name}}_route.dcp``: Vivado design checkpoint.
-        * ``{{name}}.bit``: binary bitstream.
+        * ``{{name}}.bit``: binary bitstream with metadata.
+        * ``{{name}}.bin``: binary bitstream.
     """
 
     toolchain = "Vivado"
@@ -92,7 +93,7 @@ class Xilinx7SeriesPlatform(TemplatedPlatform):
             report_timing_summary -datasheet -max_paths 10 -file {{name}}_timing.rpt
             report_power -file {{name}}_power.rpt
             {{get_override("script_before_bitstream")|default("# (script_before_bitstream placeholder)")}}
-            write_bitstream -force {{name}}.bit
+            write_bitstream -force -bin_file {{name}}.bit
             {{get_override("script_after_bitstream")|default("# (script_after_bitstream placeholder)")}}
             quit
         """,