CIMM8<5:2> << 6;
}}, {{
if (machInst == 0)
- fault = make_shared<IllegalInstFault>("zero instruction",
- machInst);
+ fault = std::make_shared<IllegalInstFault>("zero instruction",
+ machInst);
Rp2 = sp + imm;
}}, uint64_t);
format CompressedLoad {
}}, {{
STATUS status = xc->readMiscReg(MISCREG_STATUS);
if (status.fs == FPUStatus::OFF)
- fault = make_shared<IllegalInstFault>("FPU is off",
- machInst);
+ fault = std::make_shared<IllegalInstFault>("FPU is off",
+ machInst);
Fp2_bits = Mem;
}}, {{
}}, {{
STATUS status = xc->readMiscReg(MISCREG_STATUS);
if (status.fs == FPUStatus::OFF)
- fault = make_shared<IllegalInstFault>("FPU is off",
- machInst);
+ fault = std::make_shared<IllegalInstFault>("FPU is off",
+ machInst);
Mem = Fp2_bits;
}}, {{
}}, {{
if ((RC1 == 0) != (imm == 0)) {
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
} else // imm == 0
- fault = make_shared<IllegalInstFault>("immediate = 0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "immediate = 0", machInst);
}
Rc1_sd = Rc1_sd + imm;
}});
imm |= ~((uint64_t)0x1F);
}}, {{
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
Rc1_sd = (int32_t)Rc1_sd + imm;
}});
imm |= ~((uint64_t)0x1F);
}}, {{
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
Rc1_sd = imm;
}});
imm |= ~((int64_t)0x1FF);
}}, {{
if (imm == 0) {
- fault = make_shared<IllegalInstFault>("immediate = 0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "immediate = 0", machInst);
}
sp_sd = sp_sd + imm;
}});
imm |= ~((uint64_t)0x1FFFF);
}}, {{
if (RC1 == 0 || RC1 == 2) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
if (imm == 0) {
- fault = make_shared<IllegalInstFault>("immediate = 0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "immediate = 0", machInst);
}
Rc1_sd = imm;
}});
imm = CIMM5 | (CIMM1 << 5);
}}, {{
if (imm == 0) {
- fault = make_shared<IllegalInstFault>("immediate = 0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "immediate = 0", machInst);
}
Rp1 = Rp1 >> imm;
}}, uint64_t);
imm = CIMM5 | (CIMM1 << 5);
}}, {{
if (imm == 0) {
- fault = make_shared<IllegalInstFault>("immediate = 0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "immediate = 0", machInst);
}
Rp1_sd = Rp1_sd >> imm;
}}, uint64_t);
imm = CIMM5 | (CIMM1 << 5);
}}, {{
if (imm == 0) {
- fault = make_shared<IllegalInstFault>("immediate = 0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "immediate = 0", machInst);
}
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
Rc1 = Rc1 << imm;
}}, uint64_t);
CIMM5<1:0> << 6;
}}, {{
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
Rc1_sd = Mem_sw;
}}, {{
CIMM5<2:0> << 6;
}}, {{
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
Rc1_sd = Mem_sd;
}}, {{
0x0: decode RC2 {
0x0: Jump::c_jr({{
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
NPC = Rc1;
}}, IsIndirectControl, IsUncondControl, IsCall);
default: CROp::c_mv({{
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
Rc1 = Rc2;
}});
0x1: decode RC1 {
0x0: SystemOp::c_ebreak({{
if (RC2 != 0) {
- fault = make_shared<IllegalInstFault>("source reg x1",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x1", machInst);
}
- fault = make_shared<BreakpointFault>(xc->pcState());
+ fault = std::make_shared<BreakpointFault>(xc->pcState());
}}, IsSerializeAfter, IsNonSpeculative, No_OpClass);
default: decode RC2 {
0x0: Jump::c_jalr({{
if (RC1 == 0) {
- fault = make_shared<IllegalInstFault>
- ("source reg x0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x0", machInst);
}
ra = NPC;
NPC = Rc1;
format Load {
0x2: flw({{
STATUS status = xc->readMiscReg(MISCREG_STATUS);
- if (status.fs == FPUStatus::OFF)
- fault = make_shared<IllegalInstFault>("FPU is off",
- machInst);
+ if (status.fs == FPUStatus::OFF) {
+ fault = std::make_shared<IllegalInstFault>(
+ "FPU is off", machInst);
+ }
Fd_bits = (uint64_t)Mem_uw;
}}, inst_flags=FloatMemReadOp);
0x3: fld({{
STATUS status = xc->readMiscReg(MISCREG_STATUS);
if (status.fs == FPUStatus::OFF)
- fault = make_shared<IllegalInstFault>("FPU is off",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "FPU is off", machInst);
Fd_bits = Mem;
}}, inst_flags=FloatMemReadOp);
0x2: fsw({{
STATUS status = xc->readMiscReg(MISCREG_STATUS);
if (status.fs == FPUStatus::OFF)
- fault = make_shared<IllegalInstFault>("FPU is off",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "FPU is off", machInst);
Mem_uw = (uint32_t)Fs2_bits;
}}, inst_flags=FloatMemWriteOp);
0x3: fsd({{
STATUS status = xc->readMiscReg(MISCREG_STATUS);
if (status.fs == FPUStatus::OFF)
- fault = make_shared<IllegalInstFault>("FPU is off",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "FPU is off", machInst);
Mem_ud = Fs2_bits;
}}, inst_flags=FloatMemWriteOp);
0x1: div({{
if (Rs2_sd == 0) {
Rd_sd = -1;
- } else if (Rs1_sd == numeric_limits<int64_t>::min()
+ } else if (
+ Rs1_sd == std::numeric_limits<int64_t>::min()
&& Rs2_sd == -1) {
- Rd_sd = numeric_limits<int64_t>::min();
+ Rd_sd = std::numeric_limits<int64_t>::min();
} else {
Rd_sd = Rs1_sd/Rs2_sd;
}
}});
0x1: divu({{
if (Rs2 == 0) {
- Rd = numeric_limits<uint64_t>::max();
+ Rd = std::numeric_limits<uint64_t>::max();
} else {
Rd = Rs1/Rs2;
}
0x1: rem({{
if (Rs2_sd == 0) {
Rd = Rs1_sd;
- } else if (Rs1_sd == numeric_limits<int64_t>::min()
+ } else if (
+ Rs1_sd == std::numeric_limits<int64_t>::min()
&& Rs2_sd == -1) {
Rd = 0;
} else {
0x4: divw({{
if (Rs2_sw == 0) {
Rd_sd = -1;
- } else if (Rs1_sw == numeric_limits<int32_t>::min()
+ } else if (Rs1_sw == std::numeric_limits<int32_t>::min()
&& Rs2_sw == -1) {
- Rd_sd = numeric_limits<int32_t>::min();
+ Rd_sd = std::numeric_limits<int32_t>::min();
} else {
Rd_sd = Rs1_sw/Rs2_sw;
}
}});
0x1: divuw({{
if (Rs2_uw == 0) {
- Rd_sd = numeric_limits<uint64_t>::max();
+ Rd_sd = std::numeric_limits<uint64_t>::max();
} else {
Rd_sd = (int32_t)(Rs1_uw/Rs2_uw);
}
0x6: remw({{
if (Rs2_sw == 0) {
Rd_sd = Rs1_sw;
- } else if (Rs1_sw == numeric_limits<int32_t>::min()
+ } else if (Rs1_sw == std::numeric_limits<int32_t>::min()
&& Rs2_sw == -1) {
Rd_sd = 0;
} else {
|| issignalingnan(fs3)) {
FFLAGS |= FloatInvalid;
}
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
} else if (std::isinf(fs1) || std::isinf(fs2) ||
std::isinf(fs3)) {
- if (signbit(fs1) == signbit(fs2)
+ if (std::signbit(fs1) == std::signbit(fs2)
&& !std::isinf(fs3)) {
- fd = numeric_limits<float>::infinity();
- } else if (signbit(fs1) != signbit(fs2)
+ fd = std::numeric_limits<float>::infinity();
+ } else if (std::signbit(fs1) != std::signbit(fs2)
&& !std::isinf(fs3)) {
- fd = -numeric_limits<float>::infinity();
+ fd = -std::numeric_limits<float>::infinity();
} else { // Fs3_sf is infinity
fd = fs3;
}
|| issignalingnan(Fs3)) {
FFLAGS |= FloatInvalid;
}
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
} else if (std::isinf(Fs1) || std::isinf(Fs2) ||
std::isinf(Fs3)) {
- if (signbit(Fs1) == signbit(Fs2)
+ if (std::signbit(Fs1) == std::signbit(Fs2)
&& !std::isinf(Fs3)) {
- Fd = numeric_limits<double>::infinity();
- } else if (signbit(Fs1) != signbit(Fs2)
+ Fd = std::numeric_limits<double>::infinity();
+ } else if (std::signbit(Fs1) != std::signbit(Fs2)
&& !std::isinf(Fs3)) {
- Fd = -numeric_limits<double>::infinity();
+ Fd = -std::numeric_limits<double>::infinity();
} else {
Fd = Fs3;
}
|| issignalingnan(fs3)) {
FFLAGS |= FloatInvalid;
}
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
} else if (std::isinf(fs1) || std::isinf(fs2) ||
std::isinf(fs3)) {
- if (signbit(fs1) == signbit(fs2)
+ if (std::signbit(fs1) == std::signbit(fs2)
&& !std::isinf(fs3)) {
- fd = numeric_limits<float>::infinity();
- } else if (signbit(fs1) != signbit(fs2)
+ fd = std::numeric_limits<float>::infinity();
+ } else if (std::signbit(fs1) != std::signbit(fs2)
&& !std::isinf(fs3)) {
- fd = -numeric_limits<float>::infinity();
+ fd = -std::numeric_limits<float>::infinity();
} else { // Fs3_sf is infinity
fd = -fs3;
}
|| issignalingnan(Fs3)) {
FFLAGS |= FloatInvalid;
}
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
} else if (std::isinf(Fs1) || std::isinf(Fs2) ||
std::isinf(Fs3)) {
- if (signbit(Fs1) == signbit(Fs2)
+ if (std::signbit(Fs1) == std::signbit(Fs2)
&& !std::isinf(Fs3)) {
- Fd = numeric_limits<double>::infinity();
- } else if (signbit(Fs1) != signbit(Fs2)
+ Fd = std::numeric_limits<double>::infinity();
+ } else if (std::signbit(Fs1) != std::signbit(Fs2)
&& !std::isinf(Fs3)) {
- Fd = -numeric_limits<double>::infinity();
+ Fd = -std::numeric_limits<double>::infinity();
} else {
Fd = -Fs3;
}
|| issignalingnan(fs3)) {
FFLAGS |= FloatInvalid;
}
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
} else if (std::isinf(fs1) || std::isinf(fs2) ||
std::isinf(fs3)) {
- if (signbit(fs1) == signbit(fs2)
+ if (std::signbit(fs1) == std::signbit(fs2)
&& !std::isinf(fs3)) {
- fd = -numeric_limits<float>::infinity();
- } else if (signbit(fs1) != signbit(fs2)
+ fd = -std::numeric_limits<float>::infinity();
+ } else if (std::signbit(fs1) != std::signbit(fs2)
&& !std::isinf(fs3)) {
- fd = numeric_limits<float>::infinity();
+ fd = std::numeric_limits<float>::infinity();
} else { // Fs3_sf is infinity
fd = fs3;
}
|| issignalingnan(Fs3)) {
FFLAGS |= FloatInvalid;
}
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
} else if (std::isinf(Fs1) || std::isinf(Fs2)
|| std::isinf(Fs3)) {
- if (signbit(Fs1) == signbit(Fs2)
+ if (std::signbit(Fs1) == std::signbit(Fs2)
&& !std::isinf(Fs3)) {
- Fd = -numeric_limits<double>::infinity();
- } else if (signbit(Fs1) != signbit(Fs2)
+ Fd = -std::numeric_limits<double>::infinity();
+ } else if (std::signbit(Fs1) != std::signbit(Fs2)
&& !std::isinf(Fs3)) {
- Fd = numeric_limits<double>::infinity();
+ Fd = std::numeric_limits<double>::infinity();
} else {
Fd = Fs3;
}
|| issignalingnan(fs3)) {
FFLAGS |= FloatInvalid;
}
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
} else if (std::isinf(fs1) || std::isinf(fs2) ||
std::isinf(fs3)) {
- if (signbit(fs1) == signbit(fs2)
+ if (std::signbit(fs1) == std::signbit(fs2)
&& !std::isinf(fs3)) {
- fd = -numeric_limits<float>::infinity();
- } else if (signbit(fs1) != signbit(fs2)
+ fd = -std::numeric_limits<float>::infinity();
+ } else if (std::signbit(fs1) != std::signbit(fs2)
&& !std::isinf(fs3)) {
- fd = numeric_limits<float>::infinity();
+ fd = std::numeric_limits<float>::infinity();
} else { // Fs3_sf is infinity
fd = -fs3;
}
|| issignalingnan(Fs3)) {
FFLAGS |= FloatInvalid;
}
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
} else if (std::isinf(Fs1) || std::isinf(Fs2) ||
std::isinf(Fs3)) {
- if (signbit(Fs1) == signbit(Fs2)
+ if (std::signbit(Fs1) == std::signbit(Fs2)
&& !std::isinf(Fs3)) {
- Fd = -numeric_limits<double>::infinity();
- } else if (signbit(Fs1) != signbit(Fs2)
+ Fd = -std::numeric_limits<double>::infinity();
+ } else if (std::signbit(Fs1) != std::signbit(Fs2)
&& !std::isinf(Fs3)) {
- Fd = numeric_limits<double>::infinity();
+ Fd = std::numeric_limits<double>::infinity();
} else {
Fd = -Fs3;
}
if (issignalingnan(fs1) || issignalingnan(fs2)) {
FFLAGS |= FloatInvalid;
}
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
} else {
fd = fs1 + fs2;
}
if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
FFLAGS |= FloatInvalid;
}
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
} else {
Fd = Fs1 + Fs2;
}
if (issignalingnan(fs1) || issignalingnan(fs2)) {
FFLAGS |= FloatInvalid;
}
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
} else {
fd = fs1 - fs2;
}
if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
FFLAGS |= FloatInvalid;
}
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
} else {
Fd = Fs1 - Fs2;
}
if (issignalingnan(fs1) || issignalingnan(fs2)) {
FFLAGS |= FloatInvalid;
}
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
} else {
fd = fs1*fs2;
}
if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
FFLAGS |= FloatInvalid;
}
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
} else {
Fd = Fs1*Fs2;
}
if (issignalingnan(fs1) || issignalingnan(fs2)) {
FFLAGS |= FloatInvalid;
}
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
} else {
fd = fs1/fs2;
}
if (issignalingnan(Fs1) || issignalingnan(Fs2)) {
FFLAGS |= FloatInvalid;
}
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
} else {
Fd = Fs1/Fs2;
}
float fd;
if (issignalingnan(fs1)) {
- fd = numeric_limits<float>::signaling_NaN();
+ fd = std::numeric_limits<float>::signaling_NaN();
feclearexcept(FE_INVALID);
} else {
fd = copysign(fs1, fs2);
float fd;
if (issignalingnan(fs1)) {
- fd = numeric_limits<float>::signaling_NaN();
+ fd = std::numeric_limits<float>::signaling_NaN();
feclearexcept(FE_INVALID);
} else {
fd = copysign(fs1, -fs2);
float fd;
if (issignalingnan(fs1)) {
- fd = numeric_limits<float>::signaling_NaN();
+ fd = std::numeric_limits<float>::signaling_NaN();
feclearexcept(FE_INVALID);
} else {
- fd = fs1*(signbit(fs2) ? -1.0 : 1.0);
+ fd = fs1*(std::signbit(fs2) ? -1.0 : 1.0);
}
Fd_bits = (uint64_t)reinterpret_cast<uint32_t&>(fd);
}}, FloatMiscOp);
0x11: decode ROUND_MODE {
0x0: fsgnj_d({{
if (issignalingnan(Fs1)) {
- Fd = numeric_limits<double>::signaling_NaN();
+ Fd = std::numeric_limits<double>::signaling_NaN();
feclearexcept(FE_INVALID);
} else {
Fd = copysign(Fs1, Fs2);
}}, FloatMiscOp);
0x1: fsgnjn_d({{
if (issignalingnan(Fs1)) {
- Fd = numeric_limits<double>::signaling_NaN();
+ Fd = std::numeric_limits<double>::signaling_NaN();
feclearexcept(FE_INVALID);
} else {
Fd = copysign(Fs1, -Fs2);
}}, FloatMiscOp);
0x2: fsgnjx_d({{
if (issignalingnan(Fs1)) {
- Fd = numeric_limits<double>::signaling_NaN();
+ Fd = std::numeric_limits<double>::signaling_NaN();
feclearexcept(FE_INVALID);
} else {
- Fd = Fs1*(signbit(Fs2) ? -1.0 : 1.0);
+ Fd = Fs1*(std::signbit(Fs2) ? -1.0 : 1.0);
}
}}, FloatMiscOp);
}
}
0x20: fcvt_s_d({{
if (CONV_SGN != 1) {
- fault = make_shared<IllegalInstFault>("CONV_SGN != 1",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "CONV_SGN != 1", machInst);
}
float fd;
if (issignalingnan(Fs1)) {
- fd = numeric_limits<float>::quiet_NaN();
+ fd = std::numeric_limits<float>::quiet_NaN();
FFLAGS |= FloatInvalid;
} else {
fd = (float)Fs1;
}}, FloatCvtOp);
0x21: fcvt_d_s({{
if (CONV_SGN != 0) {
- fault = make_shared<IllegalInstFault>("CONV_SGN != 0",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "CONV_SGN != 0", machInst);
}
uint32_t temp;
float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
if (issignalingnan(fs1)) {
- Fd = numeric_limits<double>::quiet_NaN();
+ Fd = std::numeric_limits<double>::quiet_NaN();
FFLAGS |= FloatInvalid;
} else {
Fd = (double)fs1;
}}, FloatCvtOp);
0x2c: fsqrt_s({{
if (RS2 != 0) {
- fault = make_shared<IllegalInstFault>("source reg x1",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x1", machInst);
}
uint32_t temp;
float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
}}, FloatSqrtOp);
0x2d: fsqrt_d({{
if (RS2 != 0) {
- fault = make_shared<IllegalInstFault>("source reg x1",
- machInst);
+ fault = std::make_shared<IllegalInstFault>(
+ "source reg x1", machInst);
}
Fd = sqrt(Fs1);
}}, FloatSqrtOp);
float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
if (std::isnan(fs1)) {
- Rd_sd = numeric_limits<int32_t>::max();
+ Rd_sd = std::numeric_limits<int32_t>::max();
FFLAGS |= FloatInvalid;
} else if (fs1 >=
- float(numeric_limits<int32_t>::max())) {
- Rd_sd = numeric_limits<int32_t>::max();
+ float(std::numeric_limits<int32_t>::max())) {
+ Rd_sd = std::numeric_limits<int32_t>::max();
FFLAGS |= FloatInvalid;
} else if (fs1 <=
- float(numeric_limits<int32_t>::min())) {
- Rd_sd = numeric_limits<int32_t>::min();
+ float(std::numeric_limits<int32_t>::min())) {
+ Rd_sd = std::numeric_limits<int32_t>::min();
FFLAGS |= FloatInvalid;
} else {
Rd_sd = (int32_t)fs1;
float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
if (std::isnan(fs1)) {
- Rd = numeric_limits<uint64_t>::max();
+ Rd = std::numeric_limits<uint64_t>::max();
FFLAGS |= FloatInvalid;
} else if (fs1 < 0.0) {
Rd = 0;
FFLAGS |= FloatInvalid;
} else if (fs1 >
- float(numeric_limits<uint32_t>::max())) {
- Rd = numeric_limits<uint64_t>::max();
+ float(std::numeric_limits<uint32_t>::max())) {
+ Rd = std::numeric_limits<uint64_t>::max();
FFLAGS |= FloatInvalid;
} else {
Rd = (uint32_t)fs1;
float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
if (std::isnan(fs1)) {
- Rd_sd = numeric_limits<int64_t>::max();
+ Rd_sd = std::numeric_limits<int64_t>::max();
FFLAGS |= FloatInvalid;
} else if (fs1 >
- float(numeric_limits<int64_t>::max())) {
- Rd_sd = numeric_limits<int64_t>::max();
+ float(std::numeric_limits<int64_t>::max())) {
+ Rd_sd = std::numeric_limits<int64_t>::max();
FFLAGS |= FloatInvalid;
} else if (fs1 <
- float(numeric_limits<int64_t>::min())) {
- Rd_sd = numeric_limits<int64_t>::min();
+ float(std::numeric_limits<int64_t>::min())) {
+ Rd_sd = std::numeric_limits<int64_t>::min();
FFLAGS |= FloatInvalid;
} else {
Rd_sd = (int64_t)fs1;
float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
if (std::isnan(fs1)) {
- Rd = numeric_limits<uint64_t>::max();
+ Rd = std::numeric_limits<uint64_t>::max();
FFLAGS |= FloatInvalid;
} else if (fs1 < 0.0) {
Rd = 0;
FFLAGS |= FloatInvalid;
} else if (fs1 >
- float(numeric_limits<uint64_t>::max())) {
- Rd = numeric_limits<uint64_t>::max();
+ float(std::numeric_limits<uint64_t>::max())) {
+ Rd = std::numeric_limits<uint64_t>::max();
FFLAGS |= FloatInvalid;
} else {
Rd = (uint64_t)fs1;
0x61: decode CONV_SGN {
0x0: fcvt_w_d({{
if (std::isnan(Fs1)) {
- Rd_sd = numeric_limits<int32_t>::max();
+ Rd_sd = std::numeric_limits<int32_t>::max();
FFLAGS |= FloatInvalid;
} else if (Fs1 >
- float(numeric_limits<int32_t>::max())) {
- Rd_sd = numeric_limits<int32_t>::max();
+ float(std::numeric_limits<int32_t>::max())) {
+ Rd_sd = std::numeric_limits<int32_t>::max();
FFLAGS |= FloatInvalid;
} else if (Fs1 <
- float(numeric_limits<int32_t>::min())) {
- Rd_sd = numeric_limits<int32_t>::min();
+ float(std::numeric_limits<int32_t>::min())) {
+ Rd_sd = std::numeric_limits<int32_t>::min();
FFLAGS |= FloatInvalid;
} else {
Rd_sd = (int32_t)Fs1;
}}, FloatCvtOp);
0x1: fcvt_wu_d({{
if (std::isnan(Fs1)) {
- Rd = numeric_limits<uint64_t>::max();
+ Rd = std::numeric_limits<uint64_t>::max();
FFLAGS |= FloatInvalid;
} else if (Fs1 < 0) {
Rd = 0;
FFLAGS |= FloatInvalid;
} else if (Fs1 >
- float(numeric_limits<uint32_t>::max())) {
- Rd = numeric_limits<uint64_t>::max();
+ float(std::numeric_limits<uint32_t>::max())) {
+ Rd = std::numeric_limits<uint64_t>::max();
FFLAGS |= FloatInvalid;
} else {
Rd = (uint32_t)Fs1;
}}, FloatCvtOp);
0x2: fcvt_l_d({{
if (std::isnan(Fs1)) {
- Rd_sd = numeric_limits<int64_t>::max();
+ Rd_sd = std::numeric_limits<int64_t>::max();
FFLAGS |= FloatInvalid;
} else if (Fs1 >
- float(numeric_limits<int64_t>::max())) {
- Rd_sd = numeric_limits<int64_t>::max();
+ float(std::numeric_limits<int64_t>::max())) {
+ Rd_sd = std::numeric_limits<int64_t>::max();
FFLAGS |= FloatInvalid;
} else if (Fs1 <
- float(numeric_limits<int64_t>::min())) {
- Rd_sd = numeric_limits<int64_t>::min();
+ float(std::numeric_limits<int64_t>::min())) {
+ Rd_sd = std::numeric_limits<int64_t>::min();
FFLAGS |= FloatInvalid;
} else {
Rd_sd = Fs1;
}}, FloatCvtOp);
0x3: fcvt_lu_d({{
if (std::isnan(Fs1)) {
- Rd = numeric_limits<uint64_t>::max();
+ Rd = std::numeric_limits<uint64_t>::max();
FFLAGS |= FloatInvalid;
} else if (Fs1 < 0) {
Rd = 0;
FFLAGS |= FloatInvalid;
} else if (Fs1 >
- float(numeric_limits<uint64_t>::max())) {
- Rd = numeric_limits<uint64_t>::max();
+ float(std::numeric_limits<uint64_t>::max())) {
+ Rd = std::numeric_limits<uint64_t>::max();
FFLAGS |= FloatInvalid;
} else {
Rd = Fs1;
0x1: fclass_s({{
uint32_t temp;
float fs1 = reinterpret_cast<float&>(temp = Fs1_bits);
- switch (fpclassify(fs1)) {
+ switch (std::fpclassify(fs1)) {
case FP_INFINITE:
- if (signbit(fs1)) {
+ if (std::signbit(fs1)) {
Rd = 1 << 0;
} else {
Rd = 1 << 7;
}
break;
case FP_ZERO:
- if (signbit(fs1)) {
+ if (std::signbit(fs1)) {
Rd = 1 << 3;
} else {
Rd = 1 << 4;
}
break;
case FP_SUBNORMAL:
- if (signbit(fs1)) {
+ if (std::signbit(fs1)) {
Rd = 1 << 2;
} else {
Rd = 1 << 5;
}
break;
case FP_NORMAL:
- if (signbit(fs1)) {
+ if (std::signbit(fs1)) {
Rd = 1 << 1;
} else {
Rd = 1 << 6;
Rd = Fs1_bits;
}}, FloatCvtOp);
0x1: fclass_d({{
- switch (fpclassify(Fs1)) {
+ switch (std::fpclassify(Fs1)) {
case FP_INFINITE:
- if (signbit(Fs1)) {
+ if (std::signbit(Fs1)) {
Rd = 1 << 0;
} else {
Rd = 1 << 7;
}
break;
case FP_ZERO:
- if (signbit(Fs1)) {
+ if (std::signbit(Fs1)) {
Rd = 1 << 3;
} else {
Rd = 1 << 4;
}
break;
case FP_SUBNORMAL:
- if (signbit(Fs1)) {
+ if (std::signbit(Fs1)) {
Rd = 1 << 2;
} else {
Rd = 1 << 5;
}
break;
case FP_NORMAL:
- if (signbit(Fs1)) {
+ if (std::signbit(Fs1)) {
Rd = 1 << 1;
} else {
Rd = 1 << 6;
0x0: decode FUNCT7 {
0x0: decode RS2 {
0x0: ecall({{
- fault = make_shared<SyscallFault>(
+ fault = std::make_shared<SyscallFault>(
(PrivilegeMode)xc->readMiscReg(MISCREG_PRV));
}}, IsSerializeAfter, IsNonSpeculative, IsSyscall,
No_OpClass);
0x1: ebreak({{
- fault = make_shared<BreakpointFault>(
+ fault = std::make_shared<BreakpointFault>(
xc->pcState());
}}, IsSerializeAfter, IsNonSpeculative, No_OpClass);
0x2: uret({{
MISCREG_PRV);
if (pm == PRV_U ||
(pm == PRV_S && status.tsr == 1)) {
- fault = make_shared<IllegalInstFault>(
+ fault = std::make_shared<IllegalInstFault>(
"sret in user mode or TSR enabled",
machInst);
NPC = NPC;
MISCREG_PRV);
if (pm == PRV_U ||
(pm == PRV_S && status.tw == 1)) {
- fault = make_shared<IllegalInstFault>(
+ fault = std::make_shared<IllegalInstFault>(
"wfi in user mode or TW enabled",
machInst);
}
STATUS status = xc->readMiscReg(MISCREG_STATUS);
auto pm = (PrivilegeMode)xc->readMiscReg(MISCREG_PRV);
if (pm == PRV_U || (pm == PRV_S && status.tvm == 1)) {
- fault = make_shared<IllegalInstFault>(
+ fault = std::make_shared<IllegalInstFault>(
"sfence in user mode or TVM enabled",
machInst);
}
}}, IsNonSpeculative, IsSerializeAfter, No_OpClass);
0x18: mret({{
if (xc->readMiscReg(MISCREG_PRV) != PRV_M) {
- fault = make_shared<IllegalInstFault>(
+ fault = std::make_shared<IllegalInstFault>(
"mret at lower privilege", machInst);
NPC = NPC;
} else {