+2018-09-15 Alan Modra <amodra@gmail.com>
+
+ * testsuite/gas/aarch64/armv8_2-a-crypto-fp16-illegal.d,
+ * testsuite/gas/aarch64/armv8_2-a-illegal.d,
+ * testsuite/gas/aarch64/armv8_4-a-illegal.d,
+ * testsuite/gas/aarch64/armv8_4-a-registers-illegal.d,
+ * testsuite/gas/aarch64/deprecated.d,
+ * testsuite/gas/aarch64/diagnostic.d,
+ * testsuite/gas/aarch64/illegal-2.d,
+ * testsuite/gas/aarch64/illegal-by-element.d,
+ * testsuite/gas/aarch64/illegal-crypto-nofp.d,
+ * testsuite/gas/aarch64/illegal-fcmla.d,
+ * testsuite/gas/aarch64/illegal-fjcvtzs.d,
+ * testsuite/gas/aarch64/illegal-fp16-nofp.d,
+ * testsuite/gas/aarch64/illegal-ldapr.d,
+ * testsuite/gas/aarch64/illegal-ldraa.d,
+ * testsuite/gas/aarch64/illegal-lse.d,
+ * testsuite/gas/aarch64/illegal-nofp-armv8_3.d,
+ * testsuite/gas/aarch64/illegal-nofp16.d,
+ * testsuite/gas/aarch64/illegal-ras-1.d,
+ * testsuite/gas/aarch64/illegal-sysreg-2.d,
+ * testsuite/gas/aarch64/illegal-sysreg-3.d,
+ * testsuite/gas/aarch64/illegal.d,
+ * testsuite/gas/aarch64/legacy_reg_names.d,
+ * testsuite/gas/aarch64/pan-illegal.d,
+ * testsuite/gas/aarch64/pr22529.d,
+ * testsuite/gas/aarch64/rm-simd-ext.d,
+ * testsuite/gas/aarch64/sve-invalid.d,
+ * testsuite/gas/aarch64/sve-reg-diagnostic.d,
+ * testsuite/gas/aarch64/sve-sysreg-invalid.d,
+ * testsuite/gas/aarch64/sysreg-diagnostic.d,
+ * testsuite/gas/aarch64/verbose-error.d,
+ * testsuite/gas/all/byte.d,
+ * testsuite/gas/all/org-1.d,
+ * testsuite/gas/all/org-2.d,
+ * testsuite/gas/all/org-3.d,
+ * testsuite/gas/all/sleb128-9.d,
+ * testsuite/gas/arc/asm-errors-2.d,
+ * testsuite/gas/arc/asm-errors-3.d,
+ * testsuite/gas/arc/asm-errors.d,
+ * testsuite/gas/arc/attr-rf16.d,
+ * testsuite/gas/arc/relocs-errors.d,
+ * testsuite/gas/arc/textinsn-errors.d,
+ * testsuite/gas/arm/addsw-bad.d,
+ * testsuite/gas/arm/addthumb2err.d,
+ * testsuite/gas/arm/adr-invalid.d,
+ * testsuite/gas/arm/arch7em-bad-1.d,
+ * testsuite/gas/arm/arch7em-bad-2.d,
+ * testsuite/gas/arm/arch7em-bad-3.d,
+ * testsuite/gas/arm/arch7m-bad.d,
+ * testsuite/gas/arm/archv6s-m-bad.d,
+ * testsuite/gas/arm/archv6t2-bad.d,
+ * testsuite/gas/arm/arm-idiv-bad.d,
+ * testsuite/gas/arm/arm-it-bad-2.d,
+ * testsuite/gas/arm/arm-it-bad-3.d,
+ * testsuite/gas/arm/arm-it-bad.d,
+ * testsuite/gas/arm/arm3-bad.d,
+ * testsuite/gas/arm/arm7-bad.d,
+ * testsuite/gas/arm/armv1-bad.d,
+ * testsuite/gas/arm/armv1.d,
+ * testsuite/gas/arm/armv2-mp-bad.d,
+ * testsuite/gas/arm/armv8-2-fp16-scalar-bad.d,
+ * testsuite/gas/arm/armv8-2-fp16-simd-warning-thumb.d,
+ * testsuite/gas/arm/armv8-2-fp16-simd-warning.d,
+ * testsuite/gas/arm/armv8-a+rdma-warning.d,
+ * testsuite/gas/arm/armv8-a-bad.d,
+ * testsuite/gas/arm/armv8-a-it-bad.d,
+ * testsuite/gas/arm/armv8-r-bad.d,
+ * testsuite/gas/arm/armv8-r-it-bad.d,
+ * testsuite/gas/arm/armv8_2-a-fp16-illegal.d,
+ * testsuite/gas/arm/armv8_3-a-fp-bad.d,
+ * testsuite/gas/arm/armv8_3-a-simd-bad.d,
+ * testsuite/gas/arm/barrier-bad-thumb.d,
+ * testsuite/gas/arm/barrier-bad.d,
+ * testsuite/gas/arm/bl-local-v4t.d,
+ * testsuite/gas/arm/blx-bl-convert.d,
+ * testsuite/gas/arm/blx-local.d,
+ * testsuite/gas/arm/branch-reloc.d,
+ * testsuite/gas/arm/copro-arm_v2plus-arm_v1.d,
+ * testsuite/gas/arm/copro-arm_v5plus-arm_v4.d,
+ * testsuite/gas/arm/copro-arm_v5teplus-arm_v5.d,
+ * testsuite/gas/arm/copro-arm_v6plus-arm_v5te.d,
+ * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-1.d,
+ * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-2.d,
+ * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-3.d,
+ * testsuite/gas/arm/copro-thumb_v6t2plus-thumb_v4t-4.d,
+ * testsuite/gas/arm/crc32-armv8-a-bad.d,
+ * testsuite/gas/arm/crc32-armv8-r-bad.d,
+ * testsuite/gas/arm/depr-swp.d,
+ * testsuite/gas/arm/dest-unpredictable.d,
+ * testsuite/gas/arm/dotprod-illegal.d,
+ * testsuite/gas/arm/dotprod-legacy-arch.d,
+ * testsuite/gas/arm/forbid-armv7-idiv-ext.d,
+ * testsuite/gas/arm/group-reloc-alu-encoding-bad.d,
+ * testsuite/gas/arm/group-reloc-alu-parsing-bad.d,
+ * testsuite/gas/arm/group-reloc-ldc-encoding-bad.d,
+ * testsuite/gas/arm/group-reloc-ldc-parsing-bad.d,
+ * testsuite/gas/arm/group-reloc-ldr-encoding-bad.d,
+ * testsuite/gas/arm/group-reloc-ldr-parsing-bad.d,
+ * testsuite/gas/arm/group-reloc-ldrs-encoding-bad.d,
+ * testsuite/gas/arm/group-reloc-ldrs-parsing-bad.d,
+ * testsuite/gas/arm/insn-error-a.d,
+ * testsuite/gas/arm/insn-error-t.d,
+ * testsuite/gas/arm/inst-po-2.d,
+ * testsuite/gas/arm/iwmmxt-bad.d,
+ * testsuite/gas/arm/iwmmxt-bad2.d,
+ * testsuite/gas/arm/ld-sp-warn-cortex-m3.d,
+ * testsuite/gas/arm/ld-sp-warn-cortex-m4.d,
+ * testsuite/gas/arm/ld-sp-warn-v7.d,
+ * testsuite/gas/arm/ld-sp-warn-v7a.d,
+ * testsuite/gas/arm/ld-sp-warn-v7em.d,
+ * testsuite/gas/arm/ld-sp-warn-v7m.d,
+ * testsuite/gas/arm/ld-sp-warn-v7r.d,
+ * testsuite/gas/arm/ld-sp-warn.d,
+ * testsuite/gas/arm/ldgesb-bad.d,
+ * testsuite/gas/arm/ldgesh-bad.d,
+ * testsuite/gas/arm/ldr-bad.d,
+ * testsuite/gas/arm/ldr-t-bad.d,
+ * testsuite/gas/arm/ldrd-unpredictable.d,
+ * testsuite/gas/arm/ldsgeb.d,
+ * testsuite/gas/arm/ldsgeh.d,
+ * testsuite/gas/arm/missing.d,
+ * testsuite/gas/arm/mrs-msr-arm-v7-a-bad.d,
+ * testsuite/gas/arm/mrs-msr-thumb-v7-m-bad.d,
+ * testsuite/gas/arm/msr-imm-bad.d,
+ * testsuite/gas/arm/msr-reg-bad.d,
+ * testsuite/gas/arm/mul-overlap.d,
+ * testsuite/gas/arm/neon-addressing-bad.d,
+ * testsuite/gas/arm/neon-cond-bad.d,
+ * testsuite/gas/arm/neon-ldst-align-bad.d,
+ * testsuite/gas/arm/neon-ldst-es-bad.d,
+ * testsuite/gas/arm/neon-suffix-bad.d,
+ * testsuite/gas/arm/neon-vmov-bad.d,
+ * testsuite/gas/arm/noarm.d,
+ * testsuite/gas/arm/pr18256.d,
+ * testsuite/gas/arm/pr18347.d,
+ * testsuite/gas/arm/pr20429.d,
+ * testsuite/gas/arm/pr22773.d,
+ * testsuite/gas/arm/r15-bad.d,
+ * testsuite/gas/arm/reloc-bad.d,
+ * testsuite/gas/arm/req.d,
+ * testsuite/gas/arm/shift-bad-pc.d,
+ * testsuite/gas/arm/shift-bad.d,
+ * testsuite/gas/arm/simd_by_scalar_low_regbank.d,
+ * testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d,
+ * testsuite/gas/arm/sp-pc-validations-bad-t-v8a.d,
+ * testsuite/gas/arm/sp-pc-validations-bad-t.d,
+ * testsuite/gas/arm/sp-pc-validations-bad.d,
+ * testsuite/gas/arm/sp-usage-thumb2-relax-on-v7.d,
+ * testsuite/gas/arm/srs-arm.d,
+ * testsuite/gas/arm/srs-t2.d,
+ * testsuite/gas/arm/strex-bad-t.d,
+ * testsuite/gas/arm/t16-bad.d,
+ * testsuite/gas/arm/thumb-b-bad.d,
+ * testsuite/gas/arm/thumb-w-bad.d,
+ * testsuite/gas/arm/thumb2_bad_reg.d,
+ * testsuite/gas/arm/thumb2_it_bad.d,
+ * testsuite/gas/arm/thumb2_it_bad_auto.d,
+ * testsuite/gas/arm/thumb2_ldmstm_bad.d,
+ * testsuite/gas/arm/thumb2_ldstd_unpredictable.d,
+ * testsuite/gas/arm/thumb2_mul-bad.d,
+ * testsuite/gas/arm/thumb2_str-bad.d,
+ * testsuite/gas/arm/thumb32.d,
+ * testsuite/gas/arm/udf-bad.d,
+ * testsuite/gas/arm/udf.d,
+ * testsuite/gas/arm/undefined.d,
+ * testsuite/gas/arm/undefined_coff.d,
+ * testsuite/gas/arm/vcmp-zero-bad.d,
+ * testsuite/gas/arm/vcvt-bad.d,
+ * testsuite/gas/arm/vfp-bad.d,
+ * testsuite/gas/arm/vfp-bad_t2.d,
+ * testsuite/gas/arm/vfpv3-d16-bad.d,
+ * testsuite/gas/arm/vldm-thumb-bad.d,
+ * testsuite/gas/arm/vldmw-arm-bad.d,
+ * testsuite/gas/arm/vldmw-thumb-bad.d,
+ * testsuite/gas/arm/vstr-arm-bad.d,
+ * testsuite/gas/arm/vstr-thumb-bad.d,
+ * testsuite/gas/arm/weakdef-2.d,
+ * testsuite/gas/avr/pr21621.d,
+ * testsuite/gas/elf/bad-bss.d,
+ * testsuite/gas/elf/bad-group.d,
+ * testsuite/gas/elf/bad-group.err,
+ * testsuite/gas/elf/bad-section-flag.d,
+ * testsuite/gas/elf/bad-section-flag.err,
+ * testsuite/gas/elf/bad-size.d,
+ * testsuite/gas/elf/bad-size.err,
+ * testsuite/gas/elf/common1.d,
+ * testsuite/gas/elf/common2.d,
+ * testsuite/gas/elf/common5a.d,
+ * testsuite/gas/elf/common5b.d,
+ * testsuite/gas/elf/common5c.d,
+ * testsuite/gas/elf/common5d.d,
+ * testsuite/gas/elf/dwarf2-10.d,
+ * testsuite/gas/elf/dwarf2-8.d,
+ * testsuite/gas/elf/dwarf2-9.d,
+ * testsuite/gas/elf/pr21661.d,
+ * testsuite/gas/elf/pseudo.d,
+ * testsuite/gas/elf/section13.d,
+ * testsuite/gas/i386/bad-size.d,
+ * testsuite/gas/i386/bundle-bad.d,
+ * testsuite/gas/i386/ilp32/x86-64-sse-check-warn.d,
+ * testsuite/gas/i386/intel-intel.d,
+ * testsuite/gas/i386/intel.d,
+ * testsuite/gas/i386/intelok.d,
+ * testsuite/gas/i386/mpx-add-bnd-prefix.d,
+ * testsuite/gas/i386/sse-check-warn.d,
+ * testsuite/gas/i386/string-ok.d,
+ * testsuite/gas/i386/vgather-check-warn.d,
+ * testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d,
+ * testsuite/gas/i386/x86-64-sse-check-warn.d,
+ * testsuite/gas/i386/x86-64-vgather-check-warn.d,
+ * testsuite/gas/mips/addiu-error.d,
+ * testsuite/gas/mips/branch-extern-3.d,
+ * testsuite/gas/mips/branch-extern-4.d,
+ * testsuite/gas/mips/branch-local-2.d,
+ * testsuite/gas/mips/branch-local-3.d,
+ * testsuite/gas/mips/branch-local-5.d,
+ * testsuite/gas/mips/branch-local-6.d,
+ * testsuite/gas/mips/branch-local-n32-2.d,
+ * testsuite/gas/mips/branch-local-n32-3.d,
+ * testsuite/gas/mips/branch-local-n32-5.d,
+ * testsuite/gas/mips/branch-local-n32-6.d,
+ * testsuite/gas/mips/branch-local-n64-2.d,
+ * testsuite/gas/mips/branch-local-n64-3.d,
+ * testsuite/gas/mips/branch-local-n64-5.d,
+ * testsuite/gas/mips/branch-local-n64-6.d,
+ * testsuite/gas/mips/branch-section-3.d,
+ * testsuite/gas/mips/branch-section-4.d,
+ * testsuite/gas/mips/branch-weak-3.d,
+ * testsuite/gas/mips/branch-weak-4.d,
+ * testsuite/gas/mips/break-error.d,
+ * testsuite/gas/mips/crc-err.d,
+ * testsuite/gas/mips/crc64-err.d,
+ * testsuite/gas/mips/ginv-err.d,
+ * testsuite/gas/mips/interaptiv-mr2@isa-override-1.d,
+ * testsuite/gas/mips/interaptiv-mr2@isa-override-2.d,
+ * testsuite/gas/mips/isa-override-2.d,
+ * testsuite/gas/mips/lui-1.d,
+ * testsuite/gas/mips/lui-2.d,
+ * testsuite/gas/mips/macro-warn-1-n32.d,
+ * testsuite/gas/mips/macro-warn-1.d,
+ * testsuite/gas/mips/macro-warn-2.d,
+ * testsuite/gas/mips/macro-warn-3.d,
+ * testsuite/gas/mips/macro-warn-4.d,
+ * testsuite/gas/mips/micromips-branch-delay.d,
+ * testsuite/gas/mips/micromips-branch-relax-insn32-pic.d,
+ * testsuite/gas/mips/micromips-branch-relax-insn32.d,
+ * testsuite/gas/mips/micromips-branch-relax-pic.d,
+ * testsuite/gas/mips/micromips-branch-relax.d,
+ * testsuite/gas/mips/micromips-compact.d,
+ * testsuite/gas/mips/micromips-insn32.d,
+ * testsuite/gas/mips/micromips-noinsn32.d,
+ * testsuite/gas/mips/micromips-size-1.d,
+ * testsuite/gas/mips/micromips-trap.d,
+ * testsuite/gas/mips/micromips-warn-branch-delay.d,
+ * testsuite/gas/mips/micromips.d,
+ * testsuite/gas/mips/micromips@addiu-error.d,
+ * testsuite/gas/mips/micromips@mips5-fp.d,
+ * testsuite/gas/mips/micromips@msa-relax.d,
+ * testsuite/gas/mips/micromips@relax-at.d,
+ * testsuite/gas/mips/micromips@relax-offset.d,
+ * testsuite/gas/mips/micromips@relax.d,
+ * testsuite/gas/mips/mips-gp32-fp64-pic.d,
+ * testsuite/gas/mips/mips-gp32-fp64.d,
+ * testsuite/gas/mips/mips-gp64-fp32-pic.d,
+ * testsuite/gas/mips/mips-gp64-fp32.d,
+ * testsuite/gas/mips/mips-gp64-fp64.d,
+ * testsuite/gas/mips/mips16-32@mips16-insn-e.d,
+ * testsuite/gas/mips/mips16-32@mips16-insn-t.d,
+ * testsuite/gas/mips/mips16-32@mips16-macro-e.d,
+ * testsuite/gas/mips/mips16-32@mips16-macro-t.d,
+ * testsuite/gas/mips/mips16-32@mips16-macro.d,
+ * testsuite/gas/mips/mips16-64@mips16-insn-e.d,
+ * testsuite/gas/mips/mips16-64@mips16-insn-t.d,
+ * testsuite/gas/mips/mips16-absolute-reloc-2.d,
+ * testsuite/gas/mips/mips16-absolute-reloc-3.d,
+ * testsuite/gas/mips/mips16-branch-addend-5.d,
+ * testsuite/gas/mips/mips16-branch-unextended-1.d,
+ * testsuite/gas/mips/mips16-branch-unextended-2.d,
+ * testsuite/gas/mips/mips16-insn-e.d,
+ * testsuite/gas/mips/mips16-insn-t.d,
+ * testsuite/gas/mips/mips16-jal-t.d,
+ * testsuite/gas/mips/mips16-macro-e.d,
+ * testsuite/gas/mips/mips16-macro-t.d,
+ * testsuite/gas/mips/mips16-pcrel-2.d,
+ * testsuite/gas/mips/mips16-pcrel-3.d,
+ * testsuite/gas/mips/mips16-pcrel-4.d,
+ * testsuite/gas/mips/mips16-pcrel-5.d,
+ * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d,
+ * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d,
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d,
+ * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d,
+ * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d,
+ * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d,
+ * testsuite/gas/mips/mips16-pcrel-addend-pic-8.d,
+ * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d,
+ * testsuite/gas/mips/mips16-pcrel-delay-0.d,
+ * testsuite/gas/mips/mips16-pcrel-delay-1.d,
+ * testsuite/gas/mips/mips16-pcrel-n64-0.d,
+ * testsuite/gas/mips/mips16-pcrel-n64-1.d,
+ * testsuite/gas/mips/mips16-pcrel-pic-0.d,
+ * testsuite/gas/mips/mips16-pcrel-pic-1.d,
+ * testsuite/gas/mips/mips16-reg-error.d,
+ * testsuite/gas/mips/mips16-relax-unextended-1.d,
+ * testsuite/gas/mips/mips16-relax-unextended-2.d,
+ * testsuite/gas/mips/mips16-reloc-error.d,
+ * testsuite/gas/mips/mips16-sdrasp.d,
+ * testsuite/gas/mips/mips16@addiu-error.d,
+ * testsuite/gas/mips/mips16e-32@mips16-insn-e.d,
+ * testsuite/gas/mips/mips16e-32@mips16-insn-t.d,
+ * testsuite/gas/mips/mips16e-32@mips16-macro-e.d,
+ * testsuite/gas/mips/mips16e-32@mips16-macro-t.d,
+ * testsuite/gas/mips/mips16e-32@mips16-macro.d,
+ * testsuite/gas/mips/mips16e-32@mips16e-64.d,
+ * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d,
+ * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d,
+ * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d,
+ * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d,
+ * testsuite/gas/mips/mips16e2-32@mips16-macro.d,
+ * testsuite/gas/mips/mips16e2-32@mips16e-64.d,
+ * testsuite/gas/mips/mips16e2-copy-err.d,
+ * testsuite/gas/mips/mips16e2-imm-error.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-e.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro-t.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-macro.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-sub.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64-sub.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-64.d,
+ * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e-sub.d,
+ * testsuite/gas/mips/mips16e2-mt-err.d,
+ * testsuite/gas/mips/mips16e2-reloc-error.d,
+ * testsuite/gas/mips/mips16e2@lui-2.d,
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-2.d,
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d,
+ * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d,
+ * testsuite/gas/mips/mips1@isa-override-2.d,
+ * testsuite/gas/mips/mips1@relax-offset.d,
+ * testsuite/gas/mips/mips2@isa-override-2.d,
+ * testsuite/gas/mips/mips32-mt.d,
+ * testsuite/gas/mips/mips32@isa-override-2.d,
+ * testsuite/gas/mips/mips32r2@isa-override-2.d,
+ * testsuite/gas/mips/mips32r3@isa-override-2.d,
+ * testsuite/gas/mips/mips32r5@isa-override-2.d,
+ * testsuite/gas/mips/mips32r6@isa-override-2.d,
+ * testsuite/gas/mips/mips5-fp.d,
+ * testsuite/gas/mips/mips64-mips3d-incl.d,
+ * testsuite/gas/mips/mips64-mips3d.d,
+ * testsuite/gas/mips/mipsr6@mips5-fp.d,
+ * testsuite/gas/mips/msa-relax.d,
+ * testsuite/gas/mips/octeon3@isa-override-1.d,
+ * testsuite/gas/mips/octeon3@isa-override-2.d,
+ * testsuite/gas/mips/option-pic-relax-2.d,
+ * testsuite/gas/mips/option-pic-relax-3.d,
+ * testsuite/gas/mips/option-pic-relax-4.d,
+ * testsuite/gas/mips/option-pic-relax-5.d,
+ * testsuite/gas/mips/org-1.d,
+ * testsuite/gas/mips/org-10.d,
+ * testsuite/gas/mips/org-4.d,
+ * testsuite/gas/mips/org-5.d,
+ * testsuite/gas/mips/org-6.d,
+ * testsuite/gas/mips/r3000@isa-override-2.d,
+ * testsuite/gas/mips/r3000@relax-offset.d,
+ * testsuite/gas/mips/r3900@isa-override-2.d,
+ * testsuite/gas/mips/r3900@relax-offset.d,
+ * testsuite/gas/mips/reginfo-2-n32.d,
+ * testsuite/gas/mips/reginfo-2.d,
+ * testsuite/gas/mips/relax-at.d,
+ * testsuite/gas/mips/relax-offset.d,
+ * testsuite/gas/mips/relax-swap1-mips1.d,
+ * testsuite/gas/mips/relax-swap1-mips2.d,
+ * testsuite/gas/mips/relax-swap2.d,
+ * testsuite/gas/mips/relax.d,
+ * testsuite/gas/mips/save-err.d,
+ * testsuite/gas/mips/set-arch.d,
+ * testsuite/gas/mips/xpa-err.d,
+ * testsuite/gas/mips/xpa-virt-err.d,
+ * testsuite/gas/msp430/bad.d,
+ * testsuite/gas/msp430/errata_warns.d,
+ * testsuite/gas/msp430/pr22133.d,
+ * testsuite/gas/ppc/lsp-checks.d,
+ * testsuite/gas/ppc/misalign.d,
+ * testsuite/gas/ppc/spe2-checks.d,
+ * testsuite/gas/riscv/bad-csr.d,
+ * testsuite/gas/riscv/c-addi16sp-fail.d,
+ * testsuite/gas/riscv/c-addi4spn-fail.d,
+ * testsuite/gas/riscv/c-fld-fsd-fail.d,
+ * testsuite/gas/riscv/c-lui-fail.d,
+ * testsuite/gas/riscv/c-nonzero-imm.d,
+ * testsuite/gas/riscv/c-nonzero-reg.d,
+ * testsuite/gas/riscv/fence-fail.d,
+ * testsuite/gas/riscv/lla64-fail.d,
+ * testsuite/gas/riscv/rouding-fail.d,
+ * testsuite/gas/sh/pcrel-hms.d,
+ * testsuite/gas/sh/pcrel.d,
+ * testsuite/gas/sparc/dcti-couples-v8.d,
+ * testsuite/gas/sparc/dcti-couples-v9c.d,
+ * testsuite/gas/tic6x/arch-invalid-1.d,
+ * testsuite/gas/tic6x/arch-invalid-2.d,
+ * testsuite/gas/tic6x/dir-junk.d,
+ * testsuite/gas/tic6x/insns-bad-1.d,
+ * testsuite/gas/tic6x/insns-bad-2.d,
+ * testsuite/gas/tic6x/parallel-bad-1.d,
+ * testsuite/gas/tic6x/parallel-bad-2.d,
+ * testsuite/gas/tic6x/parallel-bad-3.d,
+ * testsuite/gas/tic6x/parallel-bad-4.d,
+ * testsuite/gas/tic6x/predicate-bad-1.d,
+ * testsuite/gas/tic6x/predicate-bad-2.d,
+ * testsuite/gas/tic6x/predicate-bad-3.d,
+ * testsuite/gas/tic6x/reloc-bad-1.d,
+ * testsuite/gas/tic6x/reloc-bad-2.d,
+ * testsuite/gas/tic6x/reloc-bad-3.d,
+ * testsuite/gas/tic6x/reloc-bad-4.d,
+ * testsuite/gas/tic6x/reloc-bad-5.d,
+ * testsuite/gas/tic6x/reloc-bad-6.d,
+ * testsuite/gas/tic6x/resource-func-unit-1.d,
+ * testsuite/gas/tic6x/resource-func-unit-2.d,
+ * testsuite/gas/tic6x/sploop-bad-1.d,
+ * testsuite/gas/tic6x/sploop-bad-2.d,
+ * testsuite/gas/tic6x/sploop-bad-3.d,
+ * testsuite/gas/tic6x/sploop-bad-4.d,
+ * testsuite/gas/tic6x/sploop-bad-5.d,
+ * testsuite/gas/tic6x/sploop-bad-6.d,
+ * testsuite/gas/tic6x/sploop-bad-7.d,
+ * testsuite/gas/tic6x/unwind-bad-1.d,
+ * testsuite/gas/tic6x/unwind-bad-2.d,
+ * testsuite/lib/gas-defs.exp (run_dump_tests): Replace stderr
+ and error-output with warning_output and error_output.
+ (slurp_options): Accept underscore rather than dash.
+
2018-09-15 Alan Modra <amodra@gmail.com>
* testsuite/gas/aarch64/codealign.d,
#as: -march=armv8.2-a+crypto+sm4+sha3
#source: armv8_2-a-illegal.s
-#error-output: armv8_2-a-illegal.l
+#error_output: armv8_2-a-illegal.l
#as: -march=armv8.2-a
#source: armv8_2-a-illegal.s
-#error-output: armv8_2-a-illegal.l
+#error_output: armv8_2-a-illegal.l
#as: -march=armv8.4-a
#source: armv8_4-a-illegal.s
-#error-output: armv8_4-a-illegal.l
+#error_output: armv8_4-a-illegal.l
#as: -march=armv8.4-a+crypto+sm4+sha3
#source: armv8_4-a-registers-illegal.s
-#error-output: armv8_4-a-registers-illegal.l
+#error_output: armv8_4-a-registers-illegal.l
#name: Deprecated Support
#source: deprecated.s
-#error-output: deprecated.l
+#warning_output: deprecated.l
#as: --warn
#name: Diagnostics Quality
#source: diagnostic.s
-#error-output: diagnostic.l
+#error_output: diagnostic.l
#name: Illegal Instructions - 2
#as:
#source: illegal-2.s
-#error-output: illegal-2.l
+#error_output: illegal-2.l
#as: -march=armv8-a
#source: illegal-by-element.s
-#error-output: illegal-by-element.l
+#error_output: illegal-by-element.l
#as: -march=armv8-a+crypto+nofp
#source: crypto.s
-#error-output: illegal-crypto-nofp.l
+#error_output: illegal-crypto-nofp.l
#as: -march=armv8.3-a -mno-verbose-error
-#error-output: illegal-fcmla.l
+#error_output: illegal-fcmla.l
#as: -march=armv8.3-a -mno-verbose-error
-#error-output: illegal-fjcvtzs.l
+#error_output: illegal-fjcvtzs.l
#as: -march=armv8.2-a+fp16+nofp -mno-verbose-error
-#error-output: illegal-fp16-nofp.l
+#error_output: illegal-fp16-nofp.l
#as: -march=armv8.3-a -mno-verbose-error
-#error-output: illegal-ldapr.l
+#error_output: illegal-ldapr.l
#as: -march=armv8.3-a -mno-verbose-error
-#error-output: illegal-ldraa.l
+#error_output: illegal-ldraa.l
#name: LSE Illegal Instruction Operands
#source: illegal-lse.s
#as: -march=armv8-a+lse -mno-verbose-error
-#error-output: illegal-lse.l
+#error_output: illegal-lse.l
#as: -march=armv8.3-a+nofp -mno-verbose-error
-#error-output: illegal-nofp-armv8_3.l
+#error_output: illegal-nofp-armv8_3.l
#as: -march=armv8.2-a+nofp16 -mno-verbose-error
-#error-output: illegal-nofp16.l
+#error_output: illegal-nofp16.l
#name: Illegal RAS instruction use.
#source: illegal-ras-1.s
#as: -march=armv8-a -mno-verbose-error
-#error-output: illegal-ras-1.l
+#error_output: illegal-ras-1.l
#as: -march=armv8-a
#source: sysreg-2.s
-#error-output: illegal-sysreg-2.l
+#error_output: illegal-sysreg-2.l
#as: -march=armv8-a
#source: sysreg-3.s
-#error-output: illegal-sysreg-3.l
+#error_output: illegal-sysreg-3.l
#name: Illegal Instructions
#as: -mno-verbose-error
#source: illegal.s
-#error-output: illegal.l
+#error_output: illegal.l
#name: Legacy register names errors
-#error-output: legacy_reg_names.l
+#error_output: legacy_reg_names.l
#as: -march=armv8.1-a --defsym ERROR=1
#source: pan.s
-#error-output: pan-illegal.l
+#error_output: pan-illegal.l
#as: -march=armv8.4-a
#source: pr22529.s
-#error-output: pr22529.l
+#error_output: pr22529.l
#name: SIMD Extension Removal
#source: rm-simd-ext.s
-#error-output: rm-simd-ext.l
+#error_output: rm-simd-ext.l
#as: -mcpu=cortex-a57+nosimd
#name: Invalid SVE instructions
#as: -march=armv8-a+sve
#source: sve-invalid.s
-#error-output: sve-invalid.l
+#error_output: sve-invalid.l
#name: Diagnostics Quality (SVE registers)
#source: sve-reg-diagnostic.s
-#error-output: sve-reg-diagnostic.l
+#error_output: sve-reg-diagnostic.l
#as: -march=armv8-a+nosve
#source: sve-sysreg.s
-#error-output: sve-sysreg-invalid.l
+#error_output: sve-sysreg-invalid.l
#objdump: -dr -M notes
#as: -march=armv8-a
-#error-output: sysreg-diagnostic.l
+#warning_output: sysreg-diagnostic.l
.*: file format .*
#name: Verbose Error Messages
#as: -mverbose-error
#source: verbose-error.s
-#error-output: verbose-error.l
+#error_output: verbose-error.l
#name: bad byte directive
-#error-output: byte.l
+#error_output: byte.l
# Quoted expressions are now allowed in .byte (and similar) expressions.
#skip: *-*-*
#name: .org test 1
#as: -gdwarf2
-#error-output: org-1.l
+#error_output: org-1.l
#name: .org test 2
-#error-output: org-2.l
+#error_output: org-2.l
#name: .org test 3
-#error-output: org-3.l
+#error_output: org-3.l
#name: undefined symbols in sleb128 directive
#source: sleb128-9.s
-#error-output: sleb128-9.l
+#error_output: sleb128-9.l
#notarget: riscv*-*
#as: -mcpu=arcem
-#error-output: asm-errors-2.err
+#error_output: asm-errors-2.err
#as:
-#error-output: asm-errors-3.err
+#error_output: asm-errors-3.err
#as: -mcpu=arc700
-#error-output: asm-errors.err
+#error_output: asm-errors.err
-#error-output: attr-rf16.err
+#warning_output: attr-rf16.err
#as:
#readelf: -A
-#error-output: relocs-errors.err
+#error_output: relocs-errors.err
-#error-output: textinsn-errors.err
+#warning_output: textinsn-errors.err
#name: Invalid Immediate field for flag-setting add,sub
#skip: *-*-pe *-*-wince
-#error-output: addsw-bad.l
+#error_output: addsw-bad.l
#name: bad Thumb2 Add{S} and Sub{S} instructions
#as: -march=armv7-a
-#error-output: addthumb2err.l
+#error_output: addthumb2err.l
# Test some Thumb2 instructions:
# name: Invalid use of ADR and ADRL
-# error-output: adr-invalid.l
+# error_output: adr-invalid.l
#name: Valid v7E-M, invalid v7-M
#as: -march=armv7-m
#source: arch7em.s
-#error-output: arch7em-bad.l
+#error_output: arch7em-bad.l
#name: Valid v8-M Mainline with DSP extension, invalid v8-M Baseline
#as: -march=armv8-m.base
#source: arch7em.s
-#error-output: arch7em-bad.l
+#error_output: arch7em-bad.l
#name: Valid v8-M Mainline with DSP extension, invalid v8-M Mainline
#as: -march=armv8-m.main
#source: arch7em.s
-#error-output: arch7em-bad.l
+#error_output: arch7em-bad.l
#name: Invalid V7M instructions
#as: -march=armv7m
-#error-output: arch7m-bad.l
+#error_output: arch7m-bad.l
#name: Valid v6S-M, invalid v6-M
#as: -march=armv6-m
#source: archv6s-m.s
-#error-output: archv6s-m-bad.l
+#error_output: archv6s-m-bad.l
#name: Invalid V6T2 instructions
#as: -march=armv6t2
-#error-output: archv6t2-bad.l
+#error_output: archv6t2-bad.l
#name: Invalid V7 ARM DIV instructions
#as: -march=armv7-a
-#error-output: arm-idiv-bad.l
+#error_output: arm-idiv-bad.l
#name: Test unclosed IT block validation.
#as: -march=armv7a
#skip: *-*-pe
-#error-output: arm-it-bad-2.l
+#warning_output: arm-it-bad-2.l
#name: Test automatic IT generation in Thumb-1 architectures.
#as: -mimplicit-it=always
-#error-output: arm-it-bad-3.l
+#error_output: arm-it-bad-3.l
#name: Test IT block validation in ARM mode.
#as: -march=armv7a -mimplicit-it=never
-#error-output: arm-it-bad.l
+#error_output: arm-it-bad.l
# name: ARM 3 errors
# as: -mcpu=arm3
-# error-output: arm3-bad.l
+# error_output: arm3-bad.l
# name: ARM mode Thumb errors
# as:
-# error-output: arm7-bad.l
+# error_output: arm7-bad.l
#name: ARM v1 errors
#as: -mcpu=arm7m
-#error-output: armv1-bad.l
+#error_output: armv1-bad.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: ARM v1 instructions
#as: -mcpu=arm7t
-#error-output: armv1.l
+#warning_output: armv1.l
# Test the ARM v1 instructions
#name: ARM MP Extension errors
#source: blank.s
#as: -march=armv2+mp
-#error-output: armv2-mp-bad.l
+#error_output: armv2-mp-bad.l
#name: Invalid armv8.2-a scalar fp16
#source: armv8-2-fp16-scalar-bad.s
#as: -march=armv8.2-a+fp16 -mfpu=fp-armv8
-#error-output: armv8-2-fp16-scalar-bad.l
+#error_output: armv8-2-fp16-scalar-bad.l
#name: Reject ARM v8.2 FP16 SIMD instruction for early arch (Thumb)
#source: armv8-2-fp16-simd.s
#as: -march=armv8.2-a -mfpu=neon-fp-armv8 -mthumb
-#error-output: armv8-2-fp16-simd-warning.l
+#error_output: armv8-2-fp16-simd-warning.l
#name: Reject ARM v8.2 FP16 SIMD instruction for early arch
#source: armv8-2-fp16-simd.s
#as: -march=armv8.2-a -mfpu=neon-fp-armv8
-#error-output: armv8-2-fp16-simd-warning.l
+#error_output: armv8-2-fp16-simd-warning.l
#objdump: -dr
#skip: *-*-pe *-*-wince
#source: armv8-a+rdma.s
-#error-output: armv8-a+rdma.l
\ No newline at end of file
+#warning_output: armv8-a+rdma.l
#name: Invalid v8-a
#source: armv8-ar-bad.s
#as: -march=armv8-a
-#error-output: armv8-ar-bad.l
+#error_output: armv8-ar-bad.l
#name: Deprecated IT blocks (ARM v8)
#source: armv8-ar-it-bad.s
-#error-output: armv8-ar-it-bad.l
+#error_output: armv8-ar-it-bad.l
#as: -march=armv8-a -mimplicit-it=always
#name: Invalid v8-r
#source: armv8-ar-bad.s
#as: -march=armv8-r
-#error-output: armv8-ar-bad.l
+#error_output: armv8-ar-bad.l
#name: Deprecated IT blocks (ARM v8)
#source: armv8-ar-it-bad.s
-#error-output: armv8-ar-it-bad.l
+#error_output: armv8-ar-it-bad.l
#as: -march=armv8-r -mimplicit-it=always
#as: -march=armv8.2-a+fp16fml -mfpu=neon-fp-armv8
-#error-output: armv8_2-a-fp16-illegal.l
+#error_output: armv8_2-a-fp16-illegal.l
#as: -march=armv8.3-a+fp
-#error-output: armv8_3-a-fp-bad.l
+#error_output: armv8_3-a-fp-bad.l
#as: -march=armv8.3-a+fp16+simd
-#error-output: armv8_3-a-simd-bad.l
+#error_output: armv8_3-a-simd-bad.l
#skip: *-*-pe *-*-wince
#source: barrier-bad.s
#as: -mthumb
-#error-output: barrier-bad.l
+#error_output: barrier-bad.l
#name: Bad barrier options (ARM)
#skip: *-*-pe *-*-wince
-#error-output: barrier-bad.l
+#error_output: barrier-bad.l
#objdump: -drw --prefix-addresses --show-raw-insn
#target: *-*-*eabi* *-*-nacl*
#as:
-# stderr: blx-local-thumb.l
+#warning_output: blx-local-thumb.l
.*: +file format .*arm.*
Disassembly of section .text:
#name: blx->bl convert under no -march/cpu
-#error-output: blx-bl-convert.l
+#warning_output: blx-bl-convert.l
#objdump: -d
#skip: *-*-pe *-wince-* *-*-vxworks *-*-netbsdelf *-*-nto*
#objdump: -drw --prefix-addresses --show-raw-insn
#target: *-*-*eabi* *-*-nacl*
#as:
-# stderr: blx-local.l
+#warning_output: blx-local.l
# Test assembler resolution of blx and bl instructions in ARM mode.
.*: +file format .*arm.*
#target: *-*-*eabi* *-*-nacl*
#as: -march=armv5t
#objdump: -rd
-#stderr: branch-reloc.l
+#warning_output: branch-reloc.l
# Test the generation of relocation for inter-section branches
#objdump: -dr --prefix-addresses --show-raw-insn
#name: No ARMv2 ARM CoProcessor Instructions on ARMv1
#as: -march=armv1 -EL
-#error-output: copro-arm_v2plus-thumb_v6t2plus-unavail.l
+#error_output: copro-arm_v2plus-thumb_v6t2plus-unavail.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: No ARMv5 ARM CoProcessor Instructions on ARMv4
#as: -march=armv4 -EL
-#error-output: copro-arm_v5plus-thumb_v6t2plus-unavail.l
+#error_output: copro-arm_v5plus-thumb_v6t2plus-unavail.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: No ARMv5TE ARM CoProcessor Instructions on ARMv5
#as: -march=armv5 -EL
-#error-output: copro-arm_v5teplus-thumb_v6t2plus-unavail.l
+#error_output: copro-arm_v5teplus-thumb_v6t2plus-unavail.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: No ARMv6 ARM CoProcessor Instructions on ARMv5TE
#as: -march=armv5te -EL
-#error-output: copro-arm_v6plus-thumb_v6t2plus-unavail.l
+#error_output: copro-arm_v6plus-thumb_v6t2plus-unavail.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: No ARMv6T2 Thumb CoProcessor Instructions on ARMv4T (1)
#as: -march=armv4t -mthumb -EL
-#error-output: copro-arm_v2plus-thumb_v6t2plus-unavail.l
+#error_output: copro-arm_v2plus-thumb_v6t2plus-unavail.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: No ARMv6T2 Thumb CoProcessor Instructions on ARMv4T (2)
#as: -march=armv4t -mthumb -EL
-#error-output: copro-arm_v5plus-thumb_v6t2plus-unavail.l
+#error_output: copro-arm_v5plus-thumb_v6t2plus-unavail.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: No ARMv6T2 Thumb CoProcessor Instructions on ARMv4T (3)
#as: -march=armv4t -mthumb -EL
-#error-output: copro-arm_v5teplus-thumb_v6t2plus-unavail.l
+#error_output: copro-arm_v5teplus-thumb_v6t2plus-unavail.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: No ARMv6T2 Thumb CoProcessor Instructions on ARMv4T (4)
#as: -march=armv4t -mthumb -EL
-#error-output: copro-arm_v6plus-thumb_v6t2plus-unavail.l
+#error_output: copro-arm_v6plus-thumb_v6t2plus-unavail.l
#name: Unpredictable ARMv8-A CRC32 instructions.
#source: crc32-armv8-ar-bad.s
#as: -march=armv8-a+crc
-#stderr: crc32-bad.l
+#warning_output: crc32-bad.l
#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
#name: Unpredictable ARMv8-R CRC32 instructions.
#source: crc32-armv8-ar-bad.s
#as: -march=armv8-r+crc
-#stderr: crc32-bad.l
+#warning_output: crc32-bad.l
#notarget: *-*-pe *-*-wince
.*: +file format .*arm.*
#name: Deprecated swp{b} instructions
#source: depr-swp.s
-#error-output: depr-swp.l
+#warning_output: depr-swp.l
# name: Unpredictable MRRC and MRRC2 instructions. - ARM
-# error-output: dest-unpredictable.l
+# error_output: dest-unpredictable.l
#as: -march=armv8.2-a+dotprod -mfpu=neon-fp-armv8
-#error-output: dotprod-illegal.l
+#error_output: dotprod-illegal.l
#as: -march=armv8.1-a+dotprod -mfpu=neon-fp-armv8
#source: dotprod.s
-#error-output: dotprod-legacy-arch.l
+#error_output: dotprod-legacy-arch.l
# name: Forbidden idiv for ARMv7
# source: blank.s
# as: -march=armv7+idiv
-#error-output: forbid-armv7-idiv-ext.l
+# error_output: forbid-armv7-idiv-ext.l
#name: Group relocation tests, encoding failures (alu)
#skip: *-*-pe *-*-wince *-*-vxworks
-#error-output: group-reloc-alu-encoding-bad.l
+#error_output: group-reloc-alu-encoding-bad.l
#name: Group relocation tests, parsing failures (alu)
#skip: *-*-pe *-*-wince
-#error-output: group-reloc-alu-parsing-bad.l
+#error_output: group-reloc-alu-parsing-bad.l
#name: Group relocation tests, encoding failures (ldc)
#skip: *-*-pe *-*-wince *-*-vxworks
-#error-output: group-reloc-ldc-encoding-bad.l
+#error_output: group-reloc-ldc-encoding-bad.l
#name: Group relocation tests, parsing failures (ldc)
#skip: *-*-pe *-*-wince
-#error-output: group-reloc-ldc-parsing-bad.l
+#error_output: group-reloc-ldc-parsing-bad.l
#name: Group relocation tests, encoding failures (ldr)
#skip: *-*-pe *-*-wince *-*-vxworks
-#error-output: group-reloc-ldr-encoding-bad.l
+#error_output: group-reloc-ldr-encoding-bad.l
#name: Group relocation tests, parsing failures (ldr)
#skip: *-*-pe *-*-wince
-#error-output: group-reloc-ldr-parsing-bad.l
+#error_output: group-reloc-ldr-parsing-bad.l
#name: Group relocation tests, encoding failures (ldrs)
#skip: *-*-pe *-*-wince *-*-vxworks
-#error-output: group-reloc-ldrs-encoding-bad.l
+#error_output: group-reloc-ldrs-encoding-bad.l
#name: Group relocation tests, parsing failures (ldrs)
#skip: *-*-pe *-*-wince
-#error-output: group-reloc-ldrs-parsing-bad.l
+#error_output: group-reloc-ldrs-parsing-bad.l
#name: invalid instruction recovery test - ARM version
#objdump: -d --prefix-addresses --show-raw-insn
#skip: *-*-pe *-*-wince
-#error-output: insn-error-a.l
+#error_output: insn-error-a.l
#name: invalid instruction recovery test - Thumb version
#objdump: -d --prefix-addresses --show-raw-insn
#skip: *-*-pe *-*-wince
-#error-output: insn-error-t.l
+#error_output: insn-error-t.l
#name: .inst pseudo-opcode validations test
#objdump: -d --prefix-addresses --show-raw-insn
#skip: *-*-pe *-*-wince
-#error-output: inst-po-2.l
+#error_output: inst-po-2.l
#name: iWMMXt errors
#as: -mcpu=iwmmxt
-#error-output: iwmmxt-bad.l
+#error_output: iwmmxt-bad.l
#name: iWMMXt CoProcessor offset errors
#as: -mcpu=iwmmxt
-#error-output: iwmmxt-bad2.l
+#error_output: iwmmxt-bad2.l
# name: Erratum 752419: Warn Loads with writebacks to SP (cortex m3)
# as: -mcpu=cortex-m3
# source: ld-sp-warn.s
-# error-output: ld-sp-warn-cortex-m3.l
+# error_output: ld-sp-warn-cortex-m3.l
# name: Erratum 752419: Warn Loads with writebacks to SP (cortex m4)
# as: -mcpu=cortex-m4
# source: ld-sp-warn.s
-# error-output: ld-sp-warn-cortex-m4.l
+# error_output: ld-sp-warn-cortex-m4.l
# name: Erratum 752419: Warn Loads with writebacks to SP (v7)
# as: -march=armv7
# source: ld-sp-warn.s
-# error-output: ld-sp-warn-v7.l
+# error_output: ld-sp-warn-v7.l
# name: Erratum 752419: Warn Loads with writebacks to SP (v7a)
# as: -march=armv7-a
# source: ld-sp-warn.s
-# error-output: ld-sp-warn-v7a.l
+# error_output: ld-sp-warn-v7a.l
# name: Erratum 752419: Warn Loads with writebacks to SP (v7em)
# as: -march=armv7e-m
# source: ld-sp-warn.s
-# error-output: ld-sp-warn-v7e-m.l
+# error_output: ld-sp-warn-v7e-m.l
# name: Erratum 752419: Warn Loads with writebacks to SP (v7m)
# as: -march=armv7m
# source: ld-sp-warn.s
-# error-output: ld-sp-warn-v7m.l
+# error_output: ld-sp-warn-v7m.l
# name: Erratum 752419: Warn Loads with writebacks to SP (v7r)
# as: -march=armv7-r
# source: ld-sp-warn.s
-# error-output: ld-sp-warn-v7r.l
+# error_output: ld-sp-warn-v7r.l
# name: Erratum 752419: Warn Loads with writebacks to SP
# source: ld-sp-warn.s
-# error-output: ld-sp-warn.l
+# error_output: ld-sp-warn.l
# name: Reject ld<cc>sb instructions
# as: -march=armv7-a
-# error-output: ldgesb-bad.l
+# error_output: ldgesb-bad.l
# skip: *-*-pe *-*-wince
# name: Reject ld<cc>sh instructions
# as: -march=armv7-a
-# error-output: ldgesh-bad.l
+# error_output: ldgesh-bad.l
# skip: *-*-pe *-*-wince
# name: Unpredictable operations - ldr - arm
-# error-output: ldr-bad.l
+# error_output: ldr-bad.l
# name: Unpredictable operations - ldr - thumb
-# error-output: ldr-t-bad.l
+# error_output: ldr-t-bad.l
# name: Unpredictable LDRD and STRD instructions. - ARM
-# error-output: ldrd-unpredictable.l
+# warning_output: ldrd-unpredictable.l
# name: Accept lds<cc>sb mnemonics
-# error-output: ldsgeb.l
+# warning_output: ldsgeb.l
# name: Accept lds<cc>sh mnemonics
-# error-output: ldsgeh.l
+# warning_output: ldsgeh.l
#name: missing operands
#as: -march=armv5
-#error-output: missing.l
+#error_output: missing.l
# name: MRS/MSR negative test, architecture v7-A, ARM mode
-# error-output: mrs-msr-arm-v7-a-bad.l
+# error_output: mrs-msr-arm-v7-a-bad.l
# name: MRS/MSR negative test, architecture v7-M, Thumb mode
-# error-output: mrs-msr-thumb-v7-m-bad.l
+# error_output: mrs-msr-thumb-v7-m-bad.l
# name: Cannot use MSR with immediates in thumb mode.
# skip: *-*-pe *-*-wince
-# error-output: msr-imm-bad.l
+# error_output: msr-imm-bad.l
# source: msr-imm.s
# as: -march=armv7-a -mthumb
# name: Cannot use flag-variant of PSR on v7m and v6m.
# skip: *-*-pe *-*-wince
-# error-output: msr-reg-bad.l
+# error_output: msr-reg-bad.l
# source: msr-reg.s
# as: -march=armv7-m
# name: Overlapping multiplication operands without architecture specification
-# error-output: mul-overlap.l
+# warning_output: mul-overlap.l
# name: Bad operand in Advanced SIMD Neon instructions
# as: -mfpu=neon
-# error-output: neon-addressing-bad.l
+# error_output: neon-addressing-bad.l
# name: Illegal conditions in Neon instructions, ARM mode
# as: -mfpu=neon -I$srcdir/$subdir
-# error-output: neon-cond-bad.l
+# error_output: neon-cond-bad.l
# name: Bad alignment in Advanced SIMD Neon instructions
# as: -mfpu=neon
-# error-output: neon-ldst-align-bad.l
+# error_output: neon-ldst-align-bad.l
# name: Bad element size combinations in Neon load/store instructions
# as: -mfpu=neon
-# error-output: neon-ldst-es-bad.l
+# error_output: neon-ldst-es-bad.l
# name: Bad suffix for non-Neon mnemonic
# as: -mfpu=neon
-# error-output: neon-suffix-bad.l
+# error_output: neon-suffix-bad.l
# name: Bad shape for vmov
# as: -mfpu=neon
-# error-output: neon-vmov-bad.l
+# error_output: neon-vmov-bad.l
# name: Disallow ARM instructions on V7M
# as:
-# error-output: noarm.l
+# error_output: noarm.l
# name: PR18256 - Bad code triggers internal error
#as:
-#error-output: pr18256.l
+#error_output: pr18256.l
# name: PR18347 - GAS silently ignores a misconstructed LDR instruction
#as:
-#error-output: pr18347.l
+#warning_output: pr18347.l
# name: PR 20429: Too many registers in VPUSH/VPOP
# as: -mfpu=neon
-# error-output: pr20429.l
+# error_output: pr20429.l
# name: PR 22773: Invalid immediate constants produce incorrect instruction
-# error-output: pr22773.l
+# error_output: pr22773.l
#name: Invalid use of r15 errors
-#error-output: r15-bad.l
+#error_output: r15-bad.l
#name: Invalid relocations
-#error-output: reloc-bad.l
+#error_output: reloc-bad.l
#notarget: *-*-vxworks
#name: .req errors
#as: -mcpu=arm7m
-#error-output: req.l
+#error_output: req.l
# name: pc used in instructions with register-shifted register
# as:
-# error-output: shift-bad-pc.l
+# warning_output: shift-bad-pc.l
# name: PR 12854: Extraneous shifts
# as:
-# error-output: shift-bad.l
+# error_output: shift-bad.l
#name: VMUL/VMLA/VMLS by scalar reg restriction
#source: simd_by_scalar_low_regbank.s
#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
-#error-output: simd_by_scalar_low_regbank.l
+#error_output: simd_by_scalar_low_regbank.l
#name: VMUL/VMLA/VMLS by scalar reg restriction (Thumb)
#source: simd_by_scalar_low_regbank.s
#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8 -mthumb
-#error-output: simd_by_scalar_low_regbank.l
+#error_output: simd_by_scalar_low_regbank.l
# as: -march=armv8-a
# name: Invalid SP and PC operands test - THUMB (v8a)
# source: sp-pc-validations-bad-t.s
-# error-output: sp-pc-validations-bad-t-v8a.l
+# error_output: sp-pc-validations-bad-t-v8a.l
# name: Invalid SP and PC operands test - THUMB (v7a)
# as: -march=armv7-a
-# error-output: sp-pc-validations-bad-t.l
+# error_output: sp-pc-validations-bad-t.l
# name: Invalid SP and PC operands test - ARM
-# error-output: sp-pc-validations-bad.l
+# error_output: sp-pc-validations-bad.l
#as: -march=armv7-a
#name: Invalid SP operands test - THUMB (v7a)
#source: sp-usage-thumb2-relax.s
-#error-output: sp-usage-thumb2-relax-on-v7.l
+#error_output: sp-usage-thumb2-relax-on-v7.l
# name: SRS instruction in ARM mode
-# error-output: srs-arm.l
+# error_output: srs-arm.l
# name: SRS instruction in Thumb-2 mode
-# error-output: srs-t2.l
+# error_output: srs-t2.l
# name: Bad addressing modes STREXH/STREXB. - THUMB
# as: -march=armv7-a
-# error-output: strex-bad-t.l
+# error_output: strex-bad-t.l
#name: Valid ARM, invalid Thumb
#as: -march=armv6k
-#error-output: t16-bad.l
+#error_output: t16-bad.l
#name: Out of range Thumb branches (PR 12848)
#skip: *-*-pe *-*-wince
#as: -mthumb
-#error-output: thumb-b-bad.l
+#error_output: thumb-b-bad.l
#name: Wide instruction rejected in non-Thumb2 cores.
#skip: *-*-pe *-*-wince
-#error-output: thumb-w-bad.l
+#error_output: thumb-w-bad.l
#name: Invalid r13/r15 register usage
#as: -march=armv7r
-#error-output: thumb2_bad_reg.l
+#error_output: thumb2_bad_reg.l
#name: Invalid IT instructions
#as:
-#error-output: thumb2_it_bad.l
+#error_output: thumb2_it_bad.l
# Modifications to this test shall be mirrored to thumb2_it_bad_auto.d.
#name: Invalid IT instructions
#as: -mimplicit-it=always
#source: thumb2_it_bad.s
-#error-output: thumb2_it_bad.l
+#error_output: thumb2_it_bad.l
#name: Invalid Thumb-2 LDM/STM instructions
#as: -march=armv6t2
-#error-output: thumb2_ldmstm_bad.l
+#error_output: thumb2_ldmstm_bad.l
# name: Unpredictable LDRD and STRD instructions. - Thumb-2
-# error-output: thumb2_ldstd_unpredictable.l
+# warning_output: thumb2_ldstd_unpredictable.l
#name: Invalid Thumb-2 multiply instructions
#as: -march=armv6kt2
-#error-output: thumb2_mul-bad.l
+#error_output: thumb2_mul-bad.l
#name: Invalid Thumb-2 str instructions
#as: -march=armv6kt2
-#error-output: thumb2_str-bad.l
+#error_output: thumb2_str-bad.l
# objdump: -dr --prefix-addresses --show-raw-insn
# The arm-aout and arm-pe ports do not support Thumb branch relocations.
# notarget: *-*-pe
-# stderr: thumb32.l
+# warning_output: thumb32.l
.*: +file format .*arm.*
#name: Invalid UDF operands
-#error-output: udf-bad.l
+#error_output: udf-bad.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: UDF
#as: -march=armv8-a
-#error-output: udf.l
+#warning_output: udf.l
.*: +file format .*arm.*
# COFF and aout based ports, except Windows CE,
# use a different naming convention for local labels.
#skip: *-unknown-pe *-*-vxworks
-#error-output: undefined.l
+#error_output: undefined.l
# COFF and aout based ports, except Windows CE,
# use a different naming convention for local labels.
#noskip: *-unknown-pe
-#error-output: undefined_coff.l
+#error_output: undefined_coff.l
# name: UAL vcmp with #0.0 bad instructions.
# as: -mfpu=vfpv3
# source: vcmp-zero-bad.s
-# error-output: vcmp-zero-bad.l
+# error_output: vcmp-zero-bad.l
#name: Invalid Immediate field for VCVT (between floating-point and fixed-point, VFP)
#skip: *-*-pe *-*-wince
-#error-output: vcvt-bad.l
+#error_output: vcvt-bad.l
#as: -mcpu=cortex-a8 -mfpu=vfpv3
#name: VFP errors
#as: -mfpu=vfp
-#error-output: vfp-bad.l
+#error_output: vfp-bad.l
#name: Thumb-2 VFP errors
#as: -mfpu=vfp
-#error-output: vfp-bad_t2.l
+#error_output: vfp-bad_t2.l
# name: VFPv3-D16
# as: -mfpu=vfpv3-d16
-# error-output: vfpv3-d16-bad.l
+# error_output: vfpv3-d16-bad.l
# source: vfpv3-32drs.s
# name: VFP VLDM and VSTM, Thumb mode
# as: -mfpu=vfp3 -mthumb
# source: vldm.s
-# error-output: vldm-thumb-bad.l
+# error_output: vldm-thumb-bad.l
# name: VFP VLDM and VSTM with writeback, ARM mode
# as: -mfpu=vfp3
# source: vldmw-bad.s
-# error-output: vldmw-bad.l
+# error_output: vldmw-bad.l
# name: VFP VLDM and VSTM with writeback, Thumb mode
# as: -mfpu=vfp3 -mthumb
# source: vldmw-bad.s
-# error-output: vldmw-bad.l
+# error_output: vldmw-bad.l
# name: VFP PC-relative VSTR arm mode
# as: -mfpu=vfp3 -mcpu=cortex-a8
# source: vstr-bad.s
-# error-output: vstr-arm-bad.l
+# warning_output: vstr-arm-bad.l
# name: VFP PC-relative VSTR thumb mode
# as: -mfpu=vfp -mthumb -mcpu=arm1156t2f-s
# source: vstr-bad.s
-# error-output: vstr-thumb-bad.l
+# error_output: vstr-thumb-bad.l
# name: adr of weak
# as:
-# error-output: weakdef-2.l
+# error_output: weakdef-2.l
# This test is only valid on ELF based ports.
-#notarget: *-*-pe *-*-wince
+# notarget: *-*-pe *-*-wince
#name: PR 21621 (correct generation of skip warnings)
#as:
#target: avr-*-*
-#error-output: pr21621.l
+#warning_output: pr21621.l
#name: bad .bss / .struct data allocation directives
#source: bss.s
-#error-output: bad-bss.err
+#error_output: bad-bss.err
#target: i?86-*-* x86_64-*-* ia64-*-* arm-*-* aarch64-*-*
#name: Check bad group
-#error-output: bad-group.err
+#error_output: bad-group.err
-.*bad-group\.s: Assembler messages:
-.*bad-group\.s:10: Error: .*
+.*: Assembler messages:
+.*:10: Error: .*
#pass
#name: Check bad section flag
-#error-output: bad-section-flag.err
+#error_output: bad-section-flag.err
-.*bad-section-flag\.s: Assembler messages:
-.*bad-section-flag\.s:1: Fatal error: .*
+.*: Assembler messages:
+.*:1: Fatal error: .*
#name: Check bad size directive
-#error-output: bad-size.err
+#error_output: bad-size.err
-.*bad-size\.s: Assembler messages:
+.*: Assembler messages:
#...
-.*bad-size\.s:.* Error: \.size expression .* does not evaluate to a constant
+.*:.* Error: \.size expression .* does not evaluate to a constant
#name: weak and common directives
-#error-output: common1.l
+#error_output: common1.l
#name: common and weak directives
-#error-output: common2.l
+#error_output: common2.l
#source: common5a.s
#as:
-#error-output: common5a.l
+#error_output: common5a.l
#notarget: alpha-*-*
# The Alpha target uses its own .set pseudo-insn.
#source: common5b.s
#as:
-#error-output: common5b.l
+#error_output: common5b.l
#notarget: alpha-*-*
# The Alpha target uses its own .set pseudo-insn.
#source: common5c.s
#as:
-#error-output: common5a.l
+#error_output: common5a.l
#notarget: alpha-*-*
# The Alpha target uses its own .set pseudo-insn.
#source: common5d.s
#as:
-#error-output: common5b.l
+#error_output: common5b.l
#notarget: alpha-*-*
# The Alpha target uses its own .set pseudo-insn.
#as:
#name: DWARF2 10
-#error-output: dwarf2-10.l
+#error_output: dwarf2-10.l
# The mep target tries to relay code sections which breaks symbolic view computations.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: mep-* tile*-*
#as:
#name: DWARF2 8
-#error-output: dwarf2-8.l
+#error_output: dwarf2-8.l
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: tile*-*
#as:
#name: DWARF2 9
-#error-output: dwarf2-9.l
+#error_output: dwarf2-9.l
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: tile*-*
#name: unsupported .symver with common symbol
-#error-output: pr21661.l
+#error_output: pr21661.l
#name: Ill-formed directives
-#error-output: pseudo.l
+#error_output: pseudo.l
#name: mbind sections without SHF_ALLOC
-#error-output: section13.l
+#error_output: section13.l
#as: --size-check=warning
#objdump: -dw
#name: Check bad size directive
-#error-output: bad-size.warn
+#warning_output: bad-size.warn
.*: +file format .*
#name: .bundle_align_mode diagnostics
-#error-output: bundle-bad.l
+#error_output: bundle-bad.l
#source: ../sse-check.s
-#stderr: ../sse-check-warn.e
+#warning_output: ../sse-check-warn.e
#as: -msse-check=warning
#objdump: -dw
#name: x86-64 (ILP32) SSE check (warning)
#objdump: -dwMintel
#name: i386 intel
#source: intel.s
-#stderr: intel.e
+#warning_output: intel.e
.*: +file format .*
#as: -J
#objdump: -dw
#name: i386 intel
-#stderr: intel.e
+#warning_output: intel.e
.*: +file format .*
#as: -J --divide
#objdump: -dwMintel
#name: i386 intel-ok
-#stderr: intelok.e
+#warning_output: intelok.e
.*: +file format .*
#as: -madd-bnd-prefix
-#stderr: mpx-add-bnd-prefix.e
+#warning_output: mpx-add-bnd-prefix.e
#objdump: -drw
#name: Check -madd-bnd-prefix
#source: sse-check.s
#as: -msse-check=warning
-#stderr: sse-check-warn.e
+#warning_output: sse-check-warn.e
#objdump: -dw
#name: i386 SSE check (warning)
#dump: sse-check.d
#as: -J
#objdump: -dw -mi386
#name: string insn operands
-#stderr: string-ok.e
+#warning_output: string-ok.e
.*: +file format .*
Disassembly of section .text:
#source: vgather-check.s
-#stderr: vgather-check-warn.e
+#warning_output: vgather-check-warn.e
#objdump: -dw
#name: i386 vgather check (warning)
#as: -madd-bnd-prefix
-#stderr: x86-64-mpx-add-bnd-prefix.e
+#warning_output: x86-64-mpx-add-bnd-prefix.e
#objdump: -drw
#name: Check -madd-bnd-prefix (x86-64)
#source: sse-check.s
#as: -msse-check=warning
-#stderr: sse-check-warn.e
+#warning_output: sse-check-warn.e
#objdump: -dw
#name: x86-64 SSE check (warning)
#dump: sse-check.d
#source: x86-64-vgather-check.s
-#stderr: x86-64-vgather-check-warn.e
+#warning_output: x86-64-vgather-check-warn.e
#objdump: -dw
#name: x86-64 vgather check (warning)
#name: MIPS ADDIU errors
#as: -32
-#error-output: addiu-error.l
+#error_output: addiu-error.l
#name: MIPS relaxed branch to an external symbol
#as: -32 -KPIC -mips1 --relax-branch
#source: branch-extern.s
-#stderr: branch-extern.l
+#warning_output: branch-extern.l
.*: +file format .*mips.*
#name: microMIPS relaxed branch to an external symbol
#as: -32 -KPIC -mmicromips --relax-branch
#source: branch-extern.s
-#stderr: branch-extern.l
+#warning_output: branch-extern.l
.*: +file format .*mips.*
#name: MIPS branch local symbol relocation 2
#as: -32
-#error-output: branch-local-2.l
+#error_output: branch-local-2.l
#name: MIPS branch local symbol relocation 3
#as: -32
-#error-output: branch-local-3.l
+#error_output: branch-local-3.l
#name: MIPS branch local symbol relocation 5
#as: -32
-#error-output: branch-local-5.l
+#error_output: branch-local-5.l
#name: MIPS branch local symbol relocation 6
#as: -32
-#error-output: branch-local-6.l
+#error_output: branch-local-6.l
#name: MIPS branch local symbol relocation 2 (n32)
#as: -n32 -march=from-abi
-#error-output: branch-local-2.l
+#error_output: branch-local-2.l
#name: MIPS branch local symbol relocation 3 (n32)
#as: -n32 -march=from-abi
-#error-output: branch-local-3.l
+#error_output: branch-local-3.l
#name: MIPS branch local symbol relocation 5 (n32)
#as: -n32 -march=from-abi
-#error-output: branch-local-5.l
+#error_output: branch-local-5.l
#source: branch-local-5.s
#name: MIPS branch local symbol relocation 6 (n32)
#as: -n32 -march=from-abi
-#error-output: branch-local-6.l
+#error_output: branch-local-6.l
#source: branch-local-6.s
#name: MIPS branch local symbol relocation 2 (n64)
#as: -64 -march=from-abi
-#error-output: branch-local-2.l
+#error_output: branch-local-2.l
#name: MIPS branch local symbol relocation 3 (n64)
#as: -64 -march=from-abi
-#error-output: branch-local-3.l
+#error_output: branch-local-3.l
#name: MIPS branch local symbol relocation 5 (n64)
#as: -64 -march=from-abi
-#error-output: branch-local-5.l
+#error_output: branch-local-5.l
#source: branch-local-5.s
#name: MIPS branch local symbol relocation 6 (n64)
#as: -64 -march=from-abi
-#error-output: branch-local-6.l
+#error_output: branch-local-6.l
#source: branch-local-6.s
#name: MIPS relaxed branch to a different section
#as: -32 --relax-branch
#source: branch-section.s
-#stderr: branch-section.l
+#warning_output: branch-section.l
.*: +file format .*mips.*
#name: microMIPS relaxed branch to a different section
#as: -32 -mmicromips --relax-branch
#source: branch-section.s
-#stderr: branch-section.l
+#warning_output: branch-section.l
.*: +file format .*mips.*
#name: MIPS relaxed branch to a weak symbol
#as: -32 --relax-branch --defsym align=12
#source: branch-weak.s
-#stderr: branch-weak.l
+#warning_output: branch-weak.l
.*: +file format .*mips.*
#name: microMIPS relaxed branch to a weak symbol
#as: -32 -mmicromips --relax-branch --defsym align=12
#source: branch-weak.s
-#stderr: branch-weak.l
+#warning_output: branch-weak.l
.*: +file format .*mips.*
#name: MIPS BREAK errors
#as: -32
-#error-output: break-error.l
+#error_output: break-error.l
#name: MIPS CRC instruction errors
#as: -32 -mcrc
-#error-output: crc-err.l
+#error_output: crc-err.l
#name: MIPS CRC64 instruction errors
#as: -mcrc
-#error-output: crc64-err.l
+#error_output: crc64-err.l
#name: MIPS GINV instruction errors
#as: -32 -mginv
-#error-output: ginv-err.l
+#error_output: ginv-err.l
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
-#stderr: interaptiv-mr2@isa-override-1.l
+#warning_output: interaptiv-mr2@isa-override-1.l
#dump: mips32r2@isa-override-1.d
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: interaptiv-mr2@isa-override-2.l
+#error_output: interaptiv-mr2@isa-override-2.l
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: isa-override-2.l
+#error_output: isa-override-2.l
#name: MIPS LUI errors 1
#as: -32
-#error-output: lui-1.l
+#error_output: lui-1.l
#name: MIPS LUI errors 2
#as: -32
-#error-output: lui-2.l
+#error_output: lui-2.l
#as: -march=from-abi -n32 -KPIC
#source: macro-warn-1.s
-#stderr: macro-warn-1-n32.l
+#warning_output: macro-warn-1-n32.l
#objdump: -p
#pass
#as: -32 -KPIC
#source: macro-warn-1.s
-#stderr: macro-warn-1.l
+#warning_output: macro-warn-1.l
#objdump: -p
#pass
#as: -32 -KPIC
#source: macro-warn-2.s
-#stderr: macro-warn-2.l
+#warning_output: macro-warn-2.l
#objdump: -p
#pass
#as: -32
#source: macro-warn-3.s
-#stderr: macro-warn-3.l
+#warning_output: macro-warn-3.l
#objdump: -p
#pass
#as: -32
#source: macro-warn-4.s
-#stderr: macro-warn-4.l
+#warning_output: macro-warn-4.l
#objdump: -p
#pass
#name: microMIPS branch delay
#as: -32 -march=mips64 -mmicromips
#source: micromips-branch-delay.s
-#stderr: micromips-branch-delay.l
+#warning_output: micromips-branch-delay.l
# Test microMIPS branch delay slots.
#objdump: -dr --show-raw-insn
#name: Relax microMIPS branches (insn32 mode, pic)
#as: -mips32r2 -32 -relax-branch -KPIC -minsn32 --defsym insn32=1
-#stderr: micromips-branch-relax-insn32-pic.l
+#warning_output: micromips-branch-relax-insn32-pic.l
#source: micromips-branch-relax.s
.*: +file format .*mips.*
#objdump: -dr --show-raw-insn
#name: Relax microMIPS branches (insn32 mode)
#as: -mips32r2 -32 -relax-branch -minsn32 --defsym insn32=1
-#stderr: micromips-branch-relax-insn32.l
+#warning_output: micromips-branch-relax-insn32.l
#source: micromips-branch-relax.s
.*: +file format .*mips.*
#objdump: -dr --show-raw-insn
#name: Relax microMIPS branches (pic)
#as: -mips32r2 -32 -relax-branch -KPIC
-#stderr: micromips-branch-relax-pic.l
+#warning_output: micromips-branch-relax-pic.l
#source: micromips-branch-relax.s
.*: +file format .*mips.*
#objdump: -dr --show-raw-insn
#name: Relax microMIPS branches
#as: -mips32r2 -32 -relax-branch
-#stderr: micromips-branch-relax.l
+#warning_output: micromips-branch-relax.l
#source: micromips-branch-relax.s
.*: +file format .*mips.*
#objdump: -dr --show-raw-insn
#name: microMIPS for MIPS32r2 (with branch compaction)
#as: -mips32r2 -32 -mfp64 -EB --defsym compact=1
-#stderr: micromips-warn.l
+#warning_output: micromips-warn.l
#source: micromips.s
.*: +file format .*mips.*
#objdump: -drz --show-raw-insn
#name: microMIPS for MIPS32r2 (insn32 mode)
#as: -mips32r2 -32 -mfp64 -minsn32 -EB --defsym insn32=1
-#stderr: micromips-warn.l
+#warning_output: micromips-warn.l
#source: micromips.s
.*: +file format .*mips.*
#objdump: -dr --show-raw-insn
#name: microMIPS for MIPS32r2 (instructions valid in insn32 mode)
#as: -mips32r2 -32 -mfp64 -EB --defsym insn32=1
-#stderr: micromips-warn.l
+#warning_output: micromips-warn.l
#source: micromips.s
.*: +file format .*mips.*
#name: microMIPS instruction size 1
#as: -32 -march=mips64 -mmicromips
#source: micromips-size-1.s
-#stderr: micromips-size-1.l
+#warning_output: micromips-size-1.l
# Test microMIPS instruction size overrides (#1).
#objdump: -dr --show-raw-insn
#name: microMIPS for MIPS32r2 (w/traps)
#as: -mips32r2 -32 -trap -mfp64 -EB
-#stderr: micromips-warn.l
+#warning_output: micromips-warn.l
#source: micromips.s
.*: +file format .*mips.*
#name: microMIPS fixed-size branch delay slots
#as: -mmicromips
#source: micromips-warn-branch-delay.s
-#stderr: micromips-warn-branch-delay.l
+#warning_output: micromips-warn-branch-delay.l
.*: +file format .*mips.*
#objdump: -dr --show-raw-insn
#name: microMIPS for MIPS32r2
#as: -mips32r2 -32 -mfp64 -EB
-#stderr: micromips-warn.l
+#warning_output: micromips-warn.l
#source: micromips.s
.*: +file format .*mips.*
#name: MIPS ADDIU errors
#as: -32
-#error-output: micromips@addiu-error.l
+#error_output: micromips@addiu-error.l
#source: addiu-error.s
#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
#name: MIPS mips5 instructions
#source: mips5-fp.s
-#stderr: mips5-fp.l
+#warning_output: mips5-fp.l
# Check MIPS V instruction assembly (microMIPS).
#objdump: -dr --prefix-addresses --show-raw-insn -Mmsa
#name: MSA relax
#as: -32 -mmsa -relax-branch
-#stderr: msa-relax.l
+#warning_output: msa-relax.l
#source: msa-relax.s
.*: +file format .*mips.*
#as: -KPIC -32 -relax-branch --defsym atk0=1
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS relax with .set at
-#stderr: relax.l
+#warning_output: relax.l
#source: relax.s
# Test relaxation with .set at (microMIPS).
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS PIC branch relaxation with offset
#as: -32 -relax-branch
-#stderr: relax-offset.l
+#warning_output: relax-offset.l
#source: relax-offset.s
.*: +file format .*mips.*
#as: -KPIC -32 -relax-branch
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS relax
-#stderr: relax.l
+#warning_output: relax.l
#source: relax.s
# Test relaxation (microMIPS).
#objdump: -d -mmips:8000
#as: -32 -march=8000 -EB -mgp32 -mfp64 -KPIC
#name: MIPS -mgp32 -mfp64 (SVR4 PIC)
-#stderr: mips-gp32-fp64.l
+#warning_output: mips-gp32-fp64.l
.*: +file format.*
#objdump: -d -mmips:8000
#as: -32 -march=8000 -EB -mgp32 -mfp64
#name: MIPS -mgp32 -mfp64
-#stderr: mips-gp32-fp64.l
+#warning_output: mips-gp32-fp64.l
.*: +file format.*
#objdump: -d -mmips:8000
#as: -mabi=o64 -march=8000 -EB -mfp32 -KPIC
#name: MIPS -mgp64 -mfp32 (SVR4 PIC)
-#stderr: mips-gp64-fp32-pic.l
+#warning_output: mips-gp64-fp32-pic.l
.*: +file format.*
#objdump: -d -mmips:8000
#as: -mabi=o64 -march=8000 -EB -mfp32
#name: MIPS -mgp64 -mfp32
-#stderr: mips-gp64-fp32.l
+#warning_output: mips-gp64-fp32.l
.*: +file format.*
#objdump: -d -mmips:8000
#as: -mabi=o64 -march=8000 -EB
#name: MIPS -mgp64 -mfp64
-#stderr: mips-gp64-fp64.l
+#warning_output: mips-gp64-fp64.l
.*: +file format.*
#as: -32
#name: MIPS16 explicit extended instructions
-#error-output: mips16-32@mips16-insn-e.l
+#error_output: mips16-32@mips16-insn-e.l
#source: mips16-insn-e.s
#as: -32
#name: MIPS16 explicit unextended instructions
-#error-output: mips16-32@mips16-insn-t.l
+#error_output: mips16-32@mips16-insn-t.l
#source: mips16-insn-t.s
#as: -32
#name: MIPS16 explicit extended macros
#source: mips16-macro-e.s
-#error-output: mips16-32@mips16-macro-e.l
+#error_output: mips16-32@mips16-macro-e.l
#as: -32
#name: MIPS16 explicit unextended macros
#source: mips16-macro-t.s
-#error-output: mips16-32@mips16-macro-t.l
+#error_output: mips16-32@mips16-macro-t.l
#as: -32
#name: MIPS16 macros
#source: mips16-macro.s
-#error-output: mips16-32@mips16-macro.l
+#error_output: mips16-32@mips16-macro.l
#as: -32
#name: MIPS16 explicit extended instructions
-#error-output: mips16-64@mips16-insn-e.l
+#error_output: mips16-64@mips16-insn-e.l
#source: mips16-insn-e.s
#as: -32
#name: MIPS16 explicit unextended instructions
-#error-output: mips16-64@mips16-insn-t.l
+#error_output: mips16-64@mips16-insn-t.l
#source: mips16-insn-t.s
#name: MIPS16 absolute relocation 2
#as: -32
-#error-output: mips16-absolute-reloc-2.l
+#error_output: mips16-absolute-reloc-2.l
#name: MIPS16 absolute relocation 3
#as: -32 -mips3
-#error-output: mips16-absolute-reloc-3.l
+#error_output: mips16-absolute-reloc-3.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 branch relocation with addend 5
#as: -32
-#error-output: mips16-branch-addend-5.l
+#error_output: mips16-branch-addend-5.l
#name: MIPS16 unextended branch instructions with relocation 1
#as: -32
-#error-output: mips16-branch-unextended.l
+#error_output: mips16-branch-unextended.l
#name: MIPS16 unextended branch instructions with relocation 2
#as: -32
-#error-output: mips16-branch-unextended.l
+#error_output: mips16-branch-unextended.l
#as: -32
#name: MIPS16 explicit extended instructions
-#error-output: mips16-insn-e.l
+#error_output: mips16-insn-e.l
#as: -32
#name: MIPS16 explicit unextended instructions
-#error-output: mips16-insn-t.l
+#error_output: mips16-insn-t.l
#name: MIPS16 explicit unextended JAL instructions
#as: -32
-#error-output: mips16-jal-t.l
+#error_output: mips16-jal-t.l
#as: -32
#name: MIPS16 explicit extended macros
-#error-output: mips16-macro-e.l
+#error_output: mips16-macro-e.l
#as: -32
#name: MIPS16 explicit unextended macros
-#error-output: mips16-macro-t.l
+#error_output: mips16-macro-t.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operations 2
#as: -32
-#stderr: mips16-pcrel-2.l
+#warning_output: mips16-pcrel-2.l
#dump: mips16-pcrel-0.d
#name: MIPS16 PC-relative operations 3
#as: -32
-#error-output: mips16-pcrel-3.l
+#error_output: mips16-pcrel-3.l
#name: MIPS16 PC-relative operations 4
#as: -32
-#error-output: mips16-pcrel-4.l
+#error_output: mips16-pcrel-4.l
#name: MIPS16 PC-relative operations 5
#as: -32
-#error-output: mips16-pcrel-5.l
+#error_output: mips16-pcrel-5.l
#name: MIPS16 PC-relative reference to absolute expression 4 (n64)
#as: -64
#source: mips16-pcrel-absolute-4.s
-#error-output: mips16-pcrel-absolute-4.l
+#error_output: mips16-pcrel-absolute-4.l
#name: MIPS16 PC-relative reference to absolute expression 6 (n64)
#as: -64
#source: mips16-pcrel-absolute-6.s
-#error-output: mips16-pcrel-absolute-6.l
+#error_output: mips16-pcrel-absolute-6.l
#name: MIPS16 PC-relative reference to absolute expression 4 (PIC, n64)
#as: -64 -call_shared
#source: mips16-pcrel-absolute-4.s
-#error-output: mips16-pcrel-absolute-4.l
+#error_output: mips16-pcrel-absolute-4.l
#name: MIPS16 PC-relative reference to absolute expression 6 (PIC, n64)
#as: -64 -call_shared
#source: mips16-pcrel-absolute-6.s
-#error-output: mips16-pcrel-absolute-6.l
+#error_output: mips16-pcrel-absolute-6.l
#name: MIPS16 PC-relative relocation with addend 8 (n64)
#as: -64
#source: mips16-pcrel-addend-8.s
-#error-output: mips16-pcrel-addend-8.l
+#error_output: mips16-pcrel-addend-8.l
#name: MIPS16 PC-relative relocation with addend 9 (n64)
#as: -64
#source: mips16-pcrel-addend-9.s
-#error-output: mips16-pcrel-addend-9.l
+#error_output: mips16-pcrel-addend-9.l
#name: MIPS16 PC-relative relocation with addend 8 (PIC)
#as: -32 -call_shared
#source: mips16-pcrel-addend-8.s
-#error-output: mips16-pcrel-addend-8.l
+#error_output: mips16-pcrel-addend-8.l
#name: MIPS16 PC-relative relocation with addend 9 (PIC)
#as: -32 -call_shared
#source: mips16-pcrel-addend-9.s
-#error-output: mips16-pcrel-addend-9.l
+#error_output: mips16-pcrel-addend-9.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operation in delay slot 0
#as: -32
-#stderr: mips16-pcrel-delay-0.l
+#warning_output: mips16-pcrel-delay-0.l
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operation in delay slot 1
#as: -32
-#stderr: mips16-pcrel-delay-1.l
+#warning_output: mips16-pcrel-delay-1.l
.*: +file format .*mips.*
#name: MIPS16 PC-relative operations 0 (n64)
#as: -64
#source: mips16-pcrel-0.s
-#error-output: mips16-pcrel-0.l
+#error_output: mips16-pcrel-0.l
#name: MIPS16 PC-relative operations 1 (n64)
#as: -64
#source: mips16-pcrel-1.s
-#error-output: mips16-pcrel-1.l
+#error_output: mips16-pcrel-1.l
#name: MIPS16 PC-relative operations 0 (PIC)
#as: -32 -call_shared
#source: mips16-pcrel-0.s
-#error-output: mips16-pcrel-0.l
+#error_output: mips16-pcrel-0.l
#name: MIPS16 PC-relative operations 1 (PIC)
#as: -32 -call_shared
#source: mips16-pcrel-1.s
-#error-output: mips16-pcrel-1.l
+#error_output: mips16-pcrel-1.l
#name: MIPS16 register errors
#as: -32 -mips64r2
-#error-output: mips16-reg-error.l
+#error_output: mips16-reg-error.l
#name: MIPS16 relaxation with unextended instructions forced 1
#as: -32
-#error-output: mips16-relax-unextended-1.l
+#error_output: mips16-relax-unextended-1.l
#name: MIPS16 relaxation with unextended instructions forced 2
#as: -32
-#error-output: mips16-relax-unextended-2.l
+#error_output: mips16-relax-unextended-2.l
#name: MIPS16 relocation errors
#as: -32 -mips64r2
-#error-output: mips16-reloc-error.l
+#error_output: mips16-reloc-error.l
#name: MIPS16 SDRASP opcode with 32-bit ISA
#as: -32 -march=mips1
-#error-output: mips16-sdrasp.l
+#error_output: mips16-sdrasp.l
#name: MIPS ADDIU errors
#as: -32
-#error-output: mips16@addiu-error.l
+#error_output: mips16@addiu-error.l
#source: addiu-error.s
#as: -32
#name: MIPS16 explicit extended instructions
-#error-output: mips16e-32@mips16-insn-e.l
+#error_output: mips16e-32@mips16-insn-e.l
#source: mips16-insn-e.s
#as: -32
#name: MIPS16 explicit unextended instructions
-#error-output: mips16e-32@mips16-insn-t.l
+#error_output: mips16e-32@mips16-insn-t.l
#source: mips16-insn-t.s
#as: -32
#name: MIPS16 explicit extended macros
#source: mips16-macro-e.s
-#error-output: mips16e-32@mips16-macro-e.l
+#error_output: mips16e-32@mips16-macro-e.l
#as: -32
#name: MIPS16 explicit unextended macros
#source: mips16-macro-t.s
-#error-output: mips16e-32@mips16-macro-t.l
+#error_output: mips16e-32@mips16-macro-t.l
#as: -32
#name: MIPS16 macros
#source: mips16-macro.s
-#error-output: mips16e-32@mips16-macro.l
+#error_output: mips16e-32@mips16-macro.l
#as: -32
#name: MIPS16e-64
#source: mips16e-64.s
-#error-output: mips16e-32@mips16e-64.l
+#error_output: mips16e-32@mips16e-64.l
#as: -32
#name: MIPS16 explicit extended instructions
-#error-output: mips16e2-32@mips16-insn-e.l
+#error_output: mips16e2-32@mips16-insn-e.l
#source: mips16-insn-e.s
#as: -32
#name: MIPS16 explicit unextended instructions
-#error-output: mips16e2-32@mips16-insn-t.l
+#error_output: mips16e2-32@mips16-insn-t.l
#source: mips16-insn-t.s
#as: -32
#name: MIPS16 explicit extended macros
#source: mips16-macro-e.s
-#error-output: mips16e2-32@mips16-macro-e.l
+#error_output: mips16e2-32@mips16-macro-e.l
#as: -32
#name: MIPS16 explicit unextended macros
#source: mips16-macro-t.s
-#error-output: mips16e2-32@mips16-macro-t.l
+#error_output: mips16e2-32@mips16-macro-t.l
#as: -32
#name: MIPS16 macros
#source: mips16-macro.s
-#error-output: mips16e2-32@mips16-macro.l
+#error_output: mips16e2-32@mips16-macro.l
#as: -32
#name: MIPS16e-64
#source: mips16e-64.s
-#error-output: mips16e-32@mips16e-64.l
+#error_output: mips16e-32@mips16e-64.l
#name: MIPS16e2 interAptiv MR2 COPYW/UCOPYW ASMACRO instruction errors
#as: -32 -mips16 -march=interaptiv-mr2
-#error-output: mips16e2-copy-err.l
+#error_output: mips16e2-copy-err.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16e2 ASE immediates
#as: -32 -mips32r2 -mmips16e2
-#error-output: mips16e2-imm-error.l
+#error_output: mips16e2-imm-error.l
#as: -32
#name: MIPS16 explicit extended instructions
-#error-output: mips16e2-interaptiv-mr2@mips16-insn-e.l
+#error_output: mips16e2-interaptiv-mr2@mips16-insn-e.l
#source: mips16-insn-e.s
#as: -32
#name: MIPS16 explicit unextended instructions
-#error-output: mips16e2-interaptiv-mr2@mips16-insn-t.l
+#error_output: mips16e2-interaptiv-mr2@mips16-insn-t.l
#source: mips16-insn-t.s
#as: -32
#name: MIPS16 explicit extended macros
#source: mips16-macro-e.s
-#error-output: mips16e2-interaptiv-mr2@mips16-macro-e.l
+#error_output: mips16e2-interaptiv-mr2@mips16-macro-e.l
#as: -32
#name: MIPS16 explicit unextended macros
#source: mips16-macro-t.s
-#error-output: mips16e2-interaptiv-mr2@mips16-macro-t.l
+#error_output: mips16e2-interaptiv-mr2@mips16-macro-t.l
#as: -32
#name: MIPS16 macros
#source: mips16-macro.s
-#error-output: mips16e2-interaptiv-mr2@mips16-macro.l
+#error_output: mips16e2-interaptiv-mr2@mips16-macro.l
#as: -32 -I$srcdir/$subdir
#name: MIPS16 ISA subset disassembly
#source: mips16-sub.s
-#stderr: mips16e2-interaptiv-mr2@mips16-sub.l
+#warning_output: mips16e2-interaptiv-mr2@mips16-sub.l
#dump: mips16-32@mips16-sub.d
#objdump: -dr --prefix-address --show-raw-insn
#as: -32 -I$srcdir/$subdir
#name: MIPS16e 64-bit ISA subset disassembly
-#stderr: mips16e2-interaptiv-mr2@mips16e-64-sub.l
+#warning_output: mips16e2-interaptiv-mr2@mips16e-64-sub.l
#source: mips16e-64-sub.s
#dump: mips16-32@mips16e-64-sub.d
#as: -32
#name: MIPS16e-64
#source: mips16e-64.s
-#error-output: mips16e-32@mips16e-64.l
+#error_output: mips16e-32@mips16e-64.l
#objdump: -dr --prefix-address --show-raw-insn
#as: -32 -I$srcdir/$subdir
#name: MIPS16e ISA subset disassembly
-#stderr: mips16e2-interaptiv-mr2@mips16e-sub.l
+#warning_output: mips16e2-interaptiv-mr2@mips16e-sub.l
#source: mips16e-sub.s
#dump: mips16e-sub.d
#name: MIPS16e2 MT ASE instruction errors
#as: -32 -mips16 -mips32r2 -mmips16e2 -mmt
-#error-output: mips16e2-mt-err.l
+#error_output: mips16e2-mt-err.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16e2 relocation errors
#as: -32 -mips64r2 -mmips16e2
-#error-output: mips16e2-reloc-error.l
+#error_output: mips16e2-reloc-error.l
#name: MIPS LUI errors 2
#as: -32
-#error-output: mips16e2@lui-2.l
+#error_output: mips16e2@lui-2.l
#source: lui-2.s
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operations 2
#as: -32
-#stderr: mips16-pcrel-2.l
+#warning_output: mips16-pcrel-2.l
#source: mips16-pcrel-2.s
#dump: mips16e2@mips16-pcrel-0.d
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operation in delay slot 0
#as: -32
-#stderr: mips16-pcrel-delay-0.l
+#warning_output: mips16-pcrel-delay-0.l
#source: mips16-pcrel-delay-0.s
.*: +file format .*mips.*
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 PC-relative operation in delay slot 1
#as: -32
-#stderr: mips16-pcrel-delay-1.l
+#warning_output: mips16-pcrel-delay-1.l
#source: mips16-pcrel-delay-1.s
.*: +file format .*mips.*
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: mips1@isa-override-2.l
+#error_output: mips1@isa-override-2.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS PIC branch relaxation with offset
#as: -32 -relax-branch
-#stderr: relax-offset.l
+#warning_output: relax-offset.l
#source: relax-offset.s
.*: +file format .*mips.*
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: mips2@isa-override-2.l
+#error_output: mips2@isa-override-2.l
#objdump: -dr --prefix-addresses --show-raw-insn -M cp0-names=mips32
#name: MIPS MT ASE for MIPS32
#as: -mmt -mips32r2 -32
-#stderr: mips32-mt.l
# Check MIPS MT ASE for MIPS32 Instruction Assembly
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: mips32@isa-override-2.l
+#error_output: mips32@isa-override-2.l
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: mips32r2@isa-override-2.l
+#error_output: mips32r2@isa-override-2.l
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: mips32r3@isa-override-2.l
+#error_output: mips32r3@isa-override-2.l
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: mips32r5@isa-override-2.l
+#error_output: mips32r5@isa-override-2.l
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: mips32r6@isa-override-2.l
+#error_output: mips32r6@isa-override-2.l
#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
#name: MIPS mips5 instructions
-#stderr: mips5-fp.l
+#warning_output: mips5-fp.l
# Check MIPS V instruction assembly
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS MIPS64 MIPS-3D ASE instructions
#source: mips64-mips3d.s
-#stderr: mips64-mips3d.l
+#warning_output: mips64-mips3d.l
#as: -64
# Check MIPS64 MIPS-3D ASE instruction assembly and disassembly
#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa64
#name: MIPS MIPS64 MIPS-3D ASE instructions (-mips3d flag)
#as: -mips64 -mips3d
-#stderr: mips64-mips3d.l
+#warning_output: mips64-mips3d.l
# Check MIPS64 MIPS-3D ASE instruction assembly and disassembly
#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
#name: MIPS mips5 instructions
-#stderr: mipsr6@mips5-fp.l
# Check MIPS V instruction assembly
#objdump: -dr --prefix-addresses --show-raw-insn -Mmsa
#name: MSA relax
#as: -32 -mmsa -relax-branch
-#stderr: msa-relax.l
+#warning_output: msa-relax.l
.*: +file format .*mips.*
#name: MIPS ISA override code generation
#as: -32
#source: isa-override-1.s
-#stderr: octeon3@isa-override-1.l
+#warning_output: octeon3@isa-override-1.l
#dump: mips64r2@isa-override-1.d
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: octeon3@isa-override-2.l
+#error_output: octeon3@isa-override-2.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS `.option picX' with relaxation 2
#as: -32 -mips2 --relax-branch
-#stderr: option-pic-relax-2.l
+#warning_output: option-pic-relax-2.l
# Verify that relaxation is done according to the `.option picX' setting
# at the time the relevant instruction was assembled rather than at
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS `.option picX' with relaxation 3
#as: -32 --relax-branch
-#stderr: option-pic-relax-3.l
+#warning_output: option-pic-relax-3.l
# Verify that relaxation is done according to the `.option picX' setting
# at the time the relevant instruction was assembled rather than at
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS `.option picX' with relaxation 4
#as: -32 -mmicromips --relax-branch
-#stderr: option-pic-relax-4.l
+#warning_output: option-pic-relax-4.l
# Verify that relaxation is done according to the `.option picX' setting
# at the time the relevant instruction was assembled rather than at
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS `.option picX' with relaxation 5
#as: -32 -mmicromips --relax-branch
-#stderr: option-pic-relax-5.l
+#warning_output: option-pic-relax-5.l
# Verify that relaxation is done according to the `.option picX' setting
# at the time the relevant instruction was assembled rather than at
#nm: -g --defined-only
#as: --relax-branch
#name: MIPS .org test 1
-#stderr: org-1.l
+#warning_output: org-1.l
0+100000 . bar
0+000000 . foo
#nm: -g --defined-only
#as: --relax-branch
#name: MIPS .org test 10
-#stderr: org-10.l
+#warning_output: org-10.l
0+100000 . bar
0+000000 . foo
#as: --relax-branch
#name: MIPS .org test 4
-#error-output: org-4.l
+#error_output: org-4.l
#as: -32
#name: MIPS .org test 5
-#error-output: org-5.l
+#error_output: org-5.l
#name: MIPS .org test 6
-#error-output: org-6.l
+#error_output: org-6.l
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: mips1@isa-override-2.l
+#error_output: mips1@isa-override-2.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS PIC branch relaxation with offset
#as: -32 -relax-branch
-#stderr: relax-offset.l
+#warning_output: relax-offset.l
#source: relax-offset.s
#dump: mips1@relax-offset.d
#name: MIPS ISA override code generation 2
#as: -32
#source: isa-override-2.s
-#error-output: r3900@isa-override-2.l
+#error_output: r3900@isa-override-2.l
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS PIC branch relaxation with offset
#as: -32 -relax-branch
-#stderr: relax-offset.l
+#warning_output: relax-offset.l
#source: relax-offset.s
#dump: mips1@relax-offset.d
#name: MIPS assembled .reginfo section size (n32)
#as: -n32 -mips3 --no-pad-sections
#source: reginfo-2.s
-#error-output: reginfo-2.l
+#error_output: reginfo-2.l
#name: MIPS assembled .reginfo section size
#as: -32
-#error-output: reginfo-2.l
+#error_output: reginfo-2.l
#as: -KPIC -32 -relax-branch --defsym atk0=1
#objdump: -dr --prefix-addresses
#name: MIPS relax with .set at
-#stderr: relax.l
+#warning_output: relax.l
#source: relax.s
# Test relaxation with .set at.
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS PIC branch relaxation with offset
#as: -32 -relax-branch
-#stderr: relax-offset.l
+#warning_output: relax-offset.l
.*: +file format .*mips.*
#name: MIPS1 branch relaxation with swapping
#as: -32 -mips1 -KPIC -relax-branch
#source: relax-swap1.s
-#stderr: relax-swap1.l
+#warning_output: relax-swap1.l
.*: +file format .*mips.*
#name: MIPS2 branch relaxation with swapping
#as: -32 -mips2 -KPIC -relax-branch
#source: relax-swap1.s
-#stderr: relax-swap1.l
+#warning_output: relax-swap1.l
.*: +file format .*mips.*
#name: MIPS2 branch likely relaxation with swapping
#as: -32 -mips2 -KPIC -relax-branch
#source: relax-swap2.s
-#stderr: relax-swap2.l
+#warning_output: relax-swap2.l
.*: +file format .*mips.*
#as: -KPIC -32 -relax-branch
#objdump: -dr --prefix-addresses
#name: MIPS relax
-#stderr: relax.l
+#warning_output: relax.l
# Test relaxation.
#name: SAVE/RESTORE instruction errors
#as: -32
-#error-output: save-err.l
+#error_output: save-err.l
#objdump: -dr --prefix-addresses --show-raw-insn -mmips:sb1 -M gpr-names=32
#name: .set arch=FOO
-#stderr: set-arch.l
+#warning_output: set-arch.l
dump\.o: file format .*
#name: MIPS XPA instruction errors
#as: -32 -mxpa
-#error-output: xpa-err.l
+#error_output: xpa-err.l
#name: MIPS XPA Virtualization ASE instruction errors
#as: -32 -mxpa -mvirt
-#error-output: xpa-virt-err.l
+#error_output: xpa-virt-err.l
#name: Diagnostics Quality
#source: bad.s
#as: -my
-#error-output: bad.l
+#error_output: bad.l
#name: Warning Messages for Silicon Errata
#source: errata_warns.s
#as: -msilicon-errata-warn=cpu4,cpu8,cpu11,cpu12,cpu13,cpu19
-#error-output: errata_warns.l
+#warning_output: errata_warns.l
#name: Extraneous extra text at the end of operands
#source: pr22133.s
#as:
-#error-output: pr22133.l
+#error_output: pr22133.l
#name: Test LSP operands checks
#as: -a32 -mbig -mvle
-#error-output: lsp-checks.l
+#error_output: lsp-checks.l
#as:
-#error-output: misalign.l
+#error_output: misalign.l
#as: -a32 -mbig -mvle -mspe2
#name: Test SPE2 operands checks
-#error-output: spe2-checks.l
+#error_output: spe2-checks.l
#as:
#source: bad-csr.s
-#error-output: bad-csr.l
+#error_output: bad-csr.l
#as: -march=rv32ic
#source: c-addi16sp-fail.s
-#error-output: c-addi16sp-fail.l
+#error_output: c-addi16sp-fail.l
#as: -march=rv32ic
#source: c-addi4spn-fail.s
-#error-output: c-addi4spn-fail.l
+#error_output: c-addi4spn-fail.l
#as: -march=rv32ic
#source: c-fld-fsd-fail.s
-#error-output: c-fld-fsd-fail.l
+#error_output: c-fld-fsd-fail.l
#as: -march=rv32ic
#source: c-lui-fail.s
-#error-output: c-lui-fail.l
+#error_output: c-lui-fail.l
#as:
#objdump: -dr
-#error-output: c-nonzero-imm.l
+#error_output: c-nonzero-imm.l
#as: -march=rv64gc
#objdump: -dr
-#error-output: c-nonzero-reg.l
+#error_output: c-nonzero-reg.l
#as: -march=rv32i
#source: fence-fail.s
-#error-output: fence-fail.l
+#error_output: fence-fail.l
#as: -march=rv64i -mabi=lp64
#source: lla64-fail.s
-#error-output: lla64-fail.l
+#error_output: lla64-fail.l
#as: -march=rv32ifd
#source: rouding-fail.s
-#error-output: rouding-fail.l
+#error_output: rouding-fail.l
#source: pcrel.s
#objdump: -d -EB
#name: PC-relative loads
-#stderr: pcrel.l
+#warning_output: pcrel.l
.*: file format .*sh.*
#as: -big
#objdump: -d
#name: PC-relative loads
-#stderr: pcrel.l
+#warning_output: pcrel.l
.*: file format .*sh.*
#as: -Av8 --dcti-couples-detect
#name: dcti couples (v8)
#source: dcti-couples.s
-#error-output: dcti-couples-v8.l
+#warning_output: dcti-couples-v8.l
#as: -Av9c --dcti-couples-detect
#name: dcti couples (v9c+)
#source: dcti-couples.s
-#error-output: dcti-couples-v9c.l
+#warning_output: dcti-couples-v9c.l
#name: C6X invalid -march
#as: -march=invalid
#source: dummy.s
-#error-output: arch-invalid-1.l
+#error_output: arch-invalid-1.l
#name: C6X invalid .arch
-#error-output: arch-invalid-2.l
+#error_output: arch-invalid-2.l
#name: C6X junk after directives
-#error-output: dir-junk.l
+#error_output: dir-junk.l
#name: C6X bad instructions 1
-#error-output: insns-bad-1.l
+#error_output: insns-bad-1.l
#name: C6X bad instructions 2
#as: -march=c62x
-#error-output: insns-bad-2.l
+#error_output: insns-bad-2.l
#name: C6X bad parallel syntax
-#error-output: parallel-bad-1.l
+#error_output: parallel-bad-1.l
#name: C6X bad parallel positioning
-#error-output: parallel-bad-2.l
+#error_output: parallel-bad-2.l
#name: C6X too many parallel instructions
-#error-output: parallel-bad-3.l
+#error_output: parallel-bad-3.l
#name: C6X too many parallel instructions, multiple sections
-#error-output: parallel-bad-4.l
+#error_output: parallel-bad-4.l
#name: C6X bad predicate syntax
-#error-output: predicate-bad-1.l
+#error_output: predicate-bad-1.l
#name: C6X bad predicates for architecture
#as: -march=c62x
-#error-output: predicate-bad-2.l
+#error_output: predicate-bad-2.l
#name: C6X bad predicates for instructions
#as: -march=c674x
-#error-output: predicate-bad-3.l
+#error_output: predicate-bad-3.l
#name: C6X bad relocations 1
-#error-output: reloc-bad-1.l
+#error_output: reloc-bad-1.l
#name: C6X bad relocations 2
-#error-output: reloc-bad-2.l
+#error_output: reloc-bad-2.l
#name: C6X bad relocations 3
-#error-output: reloc-bad-3.l
+#error_output: reloc-bad-3.l
#name: C6X bad relocations 4
-#error-output: reloc-bad-4.l
+#error_output: reloc-bad-4.l
#name: C6X bad relocations 5
-#error-output: reloc-bad-5.l
+#error_output: reloc-bad-5.l
#name: C6X bad relocations 6
-#error-output: reloc-bad-6.l
+#error_output: reloc-bad-6.l
#name: C6X parallel instructions on same functional unit
-#error-output: resource-func-unit-1.l
+#error_output: resource-func-unit-1.l
#name: C6X parallel instructions on same functional unit, multiple sections
-#error-output: resource-func-unit-2.l
+#error_output: resource-func-unit-2.l
#name: C6X bad SPLOOP instructions 1
-#error-output: sploop-bad-1.l
+#error_output: sploop-bad-1.l
#name: C6X bad SPLOOP instructions 2
-#error-output: sploop-bad-2.l
+#error_output: sploop-bad-2.l
#name: C6X bad SPLOOP instructions 3
-#error-output: sploop-bad-3.l
+#error_output: sploop-bad-3.l
#name: C6X bad SPLOOP instructions 4
-#error-output: sploop-bad-4.l
+#error_output: sploop-bad-4.l
#name: C6X bad SPLOOP instructions 5
-#error-output: sploop-bad-5.l
+#error_output: sploop-bad-5.l
#name: C6X bad SPLOOP instructions 6
-#error-output: sploop-bad-6.l
+#error_output: sploop-bad-6.l
#name: C6X bad SPLOOP instructions 7
-#error-output: sploop-bad-7.l
+#error_output: sploop-bad-7.l
#name: C6X unwinding directive errors
-#error-output: unwind-bad-1.l
+#error_output: unwind-bad-1.l
#name: C6X unwinding bad frame layouts
-#error-output: unwind-bad-2.l
+#error_output: unwind-bad-2.l
# Expect a gas warning matching REGEX. It is an error to issue
# both "error" and "warning".
#
-# stderr: FILE
+# warning_output: FILE
# FILE contains regexp lines to be matched against the diagnostic
# output of the assembler. This does not preclude the use of
# PROG, addr2line, nm, objdump, or readelf.
#
-# error-output: FILE
-# Means the same as 'stderr', but also indicates that the assembler
+# error_output: FILE
+# Means the same as 'warning_output', but also indicates that the assembler
# is expected to exit unsuccessfully (therefore PROG, addr2line, nm,
# objdump, and readelf have no meaning and should not be supplied).
#
set opts(PROG) {}
set opts(source) {}
set opts(dump) {}
- set opts(stderr) {}
+ set opts(warning_output) {}
set opts(error) {}
- set opts(error-output) {}
+ set opts(error_output) {}
set opts(warning) {}
set opts(target) {}
set opts(notarget) {}
verbose "Testing $testname"
if { (($opts(warning) != "") && ($opts(error) != "")) \
- || (($opts(warning) != "") && ($opts(stderr) != "")) \
- || (($opts(error-output) != "") && ($opts(stderr) != "")) \
- || (($opts(error-output) != "") && ($opts(error) != "")) \
- || (($opts(error-output) != "") && ($opts(warning) != "")) } {
- perror "$testname: bad mix of stderr, error-output, error, and warning test-directives"
+ || (($opts(warning) != "") && ($opts(warning_output) != "")) \
+ || (($opts(error_output) != "") && ($opts(warning_output) != "")) \
+ || (($opts(error_output) != "") && ($opts(error) != "")) \
+ || (($opts(error_output) != "") && ($opts(warning) != "")) } {
+ perror "$testname: bad mix of warning_output, error_output, error, and warning test-directives"
unresolved $testname
return
}
- if { $opts(error-output) != "" } then {
- set opts(stderr) $opts(error-output)
+ if { $opts(error_output) != "" } then {
+ set opts(warning_output) $opts(error_output)
}
set program ""
# It's meaningless to require an output-testing method when we
# expect an error.
- if { $opts(error) == "" && $opts(error-output) == "" } {
+ if { $opts(error) == "" && $opts(error_output) == "" } {
if {$opts(PROG) != ""} {
switch -- $opts(PROG) {
addr2line { set program addr2line }
send_log "$comp_output\n"
verbose "$comp_output" 3
- if { $opts(stderr) == "" } then {
+ if { $opts(warning_output) == "" } then {
if { [regexp $expmsg $comp_output] \
&& (($cmdret == 0) == ($opts(warning) != "")) } {
# We have the expected output from gas.
fail $testname
return
}
- set stderrfile $srcdir/$subdir/$opts(stderr)
+ set stderrfile $srcdir/$subdir/$opts(warning_output)
verbose "wrote pruned stderr to dump.stderr" 3
if { [regexp_diff "dump.stderr" "$stderrfile"] } then {
if { $opts(error) != "" } {
fail $testname
verbose "pruned stderr is [file_contents "dump.stderr"]" 2
return
- } elseif { $opts(error-output) != "" } then {
+ } elseif { $opts(error_output) != "" } then {
pass $testname
return
}
}
} else {
- if { $opts(error) != "" || $opts(error-output) != "" } {
+ if { $opts(error) != "" || $opts(error_output) != "" } {
fail $testname
}
}
set ws {[ ]*}
set nws {[^ ]*}
# whitespace is ignored anywhere except within the options list;
- # option names are alphabetic plus dash
- set pat "^#${ws}(\[a-zA-Z0-9-\]*)$ws:${ws}(.*)$ws\$"
+ # option names are alphanumeric plus underscore.
+ set pat "^#${ws}(\[a-zA-Z0-9_\]*)$ws:${ws}(.*)$ws\$"
while { [gets $f line] != -1 } {
set line [string trim $line]
# Whitespace here is space-tab.
projects / binutils-gdb.git / commitdiff