README: update Intro

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 [> Intro
 --------
-LiteX is a FPGA design/SoC builder that can be used to build cores, create
-SoCs and full FPGA designs.
+LiteX is a MiSoC-based SoC builder using Migen as Python DSL that can be used
+to create SoCs and full FPGA designs.
 
-LiteX is based on Migen and provides specific building/debugging tools for
-a higher level of abstraction and compatibily with the LiteX core ecosystem.
+LiteX provides specific building/debugging tools for high level of abstraction
+and compatibily with the LiteX core ecosystem.
 
 Think of Migen as a toolbox to create FPGA designs in Python and LiteX as a
 toolbox to create/develop/debug FPGA SoCs in Python.