radv: fix txs for sampler buffers
authorDave Airlie <airlied@redhat.com>
Tue, 28 Feb 2017 06:26:55 +0000 (16:26 +1000)
committerDave Airlie <airlied@redhat.com>
Tue, 28 Feb 2017 22:02:24 +0000 (08:02 +1000)
I messed this up when I wrote it, this fixes:
dEQP-VK.memory.pipeline_barrier.*uniform_texel_buffer.*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/amd/common/ac_nir_to_llvm.c

index db7194c3086ccf81852d0754aa218d6332c7daa5..a3310e10a721004216b997c9d1034a02e92ab824 100644 (file)
@@ -3625,7 +3625,7 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
        }
 
        if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
-               result = get_buffer_size(ctx, res_ptr, false);
+               result = get_buffer_size(ctx, res_ptr, true);
                goto write_result;
        }