- Added "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs)
- Added "synth_xilinx -abc9" (experimental)
- Added "synth_ice40 -abc9" (experimental)
+ - Added "synth -abc9" (experimental)
- Extended "muxcover -mux{4,8,16}=<cost>"
- - Added "synth -abc9" (experimental)
+ - Fixed sign extension of unsized constants with 'bx and 'bz MSB
+ - Added "muxpack" pass
+ - "synth_xilinx" to now infer wide multiplexers (-nomux to disable)
Yosys 0.7 .. Yosys 0.8