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Remove debug
authorEddie Hung <eddie@fpgeh.com>
Fri, 30 Aug 2019 22:03:43 +0000 (15:03 -0700)
committerEddie Hung <eddie@fpgeh.com>
Fri, 30 Aug 2019 22:03:43 +0000 (15:03 -0700)
passes/pmgen/xilinx_dsp.pmg patch | blob | history

diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg
index 08b432b8efb19e687f8c1d4e963541904c2d8e8e..a4e1bf86d6ee18e10cd43461fe66d2637abb9690 100644 (file)
--- a/passes/pmgen/xilinx_dsp.pmg
+++ b/passes/pmgen/xilinx_dsp.pmg
@@ -83,7 +83,6 @@ endmatch
 
 code clock sigM sigP
        if (ffM) {
-        log_warning("M FOUND!\n");
                sigM = port(ffM, \Q);
                for (auto b : sigM)
                        if (b.wire->get_bool_attribute(\keep))