2009-02-xx Ruan Beihong <ruanbeihong@gmail.com> Richard Sandiford <rdsandiford@google...

gcc/
2009-02-xx  Ruan Beihong  <ruanbeihong@gmail.com>
	    Richard Sandiford  <rdsandiford@googlemail.com>

	* config/mips/mips.c (CODE_FOR_loongson_biadd): Delete.
	* config/mips/loongson.md (reduc_uplus_<mode>): Rename to...
	(loongson_biadd): ...this.

Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com>
From-SVN: r144243

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6947e99f36f96a09c7c88c1eea21710199551522..de0bfe3561d3fdc40ec0076af6592d06ddac256b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2009-02-17  Ruan Beihong  <ruanbeihong@gmail.com>
+           Richard Sandiford  <rdsandiford@googlemail.com>
+
+       * config/mips/mips.c (CODE_FOR_loongson_biadd): Delete.
+       * config/mips/loongson.md (reduc_uplus_<mode>): Rename to...
+       (loongson_biadd): ...this.
+
 2009-02-17  Richard Guenther  <rguenther@suse.de>
 
        PR tree-optimization/39202

diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md
index 8cdb5f466e9cd63c451ddf1cb19a615ae06f0ca4..8febfd73fac6f72a2af9f58038f00faaf8a091a9 100644 (file)
--- a/gcc/config/mips/loongson.md
+++ b/gcc/config/mips/loongson.md
@@ -358,7 +358,7 @@
   [(set_attr "type" "fadd")])
 
 ;; Sum of unsigned byte integers.
-(define_insn "reduc_uplus_<mode>"
+(define_insn "loongson_biadd"
   [(set (match_operand:<V_stretch_half> 0 "register_operand" "=f")
         (unspec:<V_stretch_half> [(match_operand:VB 1 "register_operand" "f")]
                                 UNSPEC_LOONGSON_BIADD))]

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index c98528e7eb424f940a6956b3d5689a36b2d09f17..c69423f0d6880a0c6db2d831e452de8f2a27fb19 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -11253,7 +11253,6 @@ AVAIL_NON_MIPS16 (cache, TARGET_CACHE_BUILTIN)
 #define CODE_FOR_loongson_pminub CODE_FOR_uminv8qi3
 #define CODE_FOR_loongson_pmulhuh CODE_FOR_umulv4hi3_highpart
 #define CODE_FOR_loongson_pmulhh CODE_FOR_smulv4hi3_highpart
-#define CODE_FOR_loongson_biadd CODE_FOR_reduc_uplus_v8qi
 #define CODE_FOR_loongson_psubw CODE_FOR_subv2si3
 #define CODE_FOR_loongson_psubh CODE_FOR_subv4hi3
 #define CODE_FOR_loongson_psubb CODE_FOR_subv8qi3