radv: use the dispatch initiator for indirect dispatches

Missed that when I allowed waves to be launched out-of-order.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 9d59028bfd266ca1cfae785ea309a17851c353c0..e0d664661646968b5663fa4cff2b784b4820bf1b 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -3187,6 +3187,7 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer,
        struct radeon_winsys *ws = cmd_buffer->device->ws;
        struct radeon_winsys_cs *cs = cmd_buffer->cs;
        struct ac_userdata_info *loc;
+       unsigned dispatch_initiator;
        uint8_t grid_used;
 
        grid_used = compute_shader->info.info.cs.grid_components_used;
@@ -3196,6 +3197,16 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer,
 
        MAYBE_UNUSED unsigned cdw_max = radeon_check_space(ws, cs, 25);
 
+       dispatch_initiator = S_00B800_COMPUTE_SHADER_EN(1) |
+                            S_00B800_FORCE_START_AT_000(1);
+
+       if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) {
+               /* If the KMD allows it (there is a KMD hw register for it),
+                * allow launching waves out-of-order.
+                */
+               dispatch_initiator |= S_00B800_ORDER_MODE(1);
+       }
+
        if (info->indirect) {
                uint64_t va = radv_buffer_get_va(info->indirect->bo);
 
@@ -3221,7 +3232,7 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer,
                                        PKT3_SHADER_TYPE_S(1));
                        radeon_emit(cs, va);
                        radeon_emit(cs, va >> 32);
-                       radeon_emit(cs, 1);
+                       radeon_emit(cs, dispatch_initiator);
                } else {
                        radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0) |
                                        PKT3_SHADER_TYPE_S(1));
@@ -3232,19 +3243,10 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer,
                        radeon_emit(cs, PKT3(PKT3_DISPATCH_INDIRECT, 1, 0) |
                                        PKT3_SHADER_TYPE_S(1));
                        radeon_emit(cs, 0);
-                       radeon_emit(cs, 1);
+                       radeon_emit(cs, dispatch_initiator);
                }
        } else {
                unsigned blocks[3] = { info->blocks[0], info->blocks[1], info->blocks[2] };
-               unsigned dispatch_initiator = S_00B800_COMPUTE_SHADER_EN(1) |
-                                             S_00B800_FORCE_START_AT_000(1);
-
-               if (cmd_buffer->device->physical_device->rad_info.chip_class >= CIK) {
-                       /* If the KMD allows it (there is a KMD hw register for
-                        * it), allow launching waves out-of-order.
-                        */
-                       dispatch_initiator |= S_00B800_ORDER_MODE(1);
-               }
 
                if (info->unaligned) {
                        unsigned *cs_block_size = compute_shader->info.cs.block_size;