aco: fix WaR check for >64-bit FLAT/GLOBAL instructions

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 5986e0019 ('aco: improve WAR hazard workaround with >64bit stores')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3541>

diff --git a/src/amd/compiler/aco_insert_NOPs.cpp b/src/amd/compiler/aco_insert_NOPs.cpp
index 8c032bb699c54b551aef13913c33438357722235..605ed8a20813f2ab2645df56c1bf0e4943a0b323 100644 (file)
--- a/src/amd/compiler/aco_insert_NOPs.cpp
+++ b/src/amd/compiler/aco_insert_NOPs.cpp
@@ -333,8 +333,8 @@ int handle_instruction_gfx8_9(NOP_ctx_gfx8_9& ctx, aco_ptr<Instruction>& instr,
                               pred->operands.size() == 3 &&
                               pred->operands[2].size() > 2;
          if (consider_buf || consider_mimg || consider_flat) {
-            PhysReg wrdata = pred->operands[3].physReg();
-            unsigned size = pred->operands[3].size();
+            PhysReg wrdata = pred->operands[consider_flat ? 2 : 3].physReg();
+            unsigned size = pred->operands[consider_flat ? 2 : 3].size();
             assert(wrdata >= 256);
             for (const Definition& def : instr->definitions) {
                if (regs_intersect(def.physReg(), def.size(), wrdata, size))