i965/gen7 depth: Set depth size based on LOD0 for 3D textures

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index d8efa7690ce83fb933297eb3100120a7b10bf016..22911bf5423db5232a9e06999d8a97585d60cd78 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -82,8 +82,8 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
       depth *= 6;
       break;
    case GL_TEXTURE_3D:
-      assert(rb);
-      depth = MAX2(rb->Depth, 1);
+      assert(mt);
+      depth = MAX2(mt->logical_depth0, 1);
       /* fallthrough */
    default:
       surftype = translate_tex_target(gl_target);