r300/compiler: implement and lower OPCODE_CLAMP
authorMarek Olšák <maraeo@gmail.com>
Wed, 1 Dec 2010 15:44:22 +0000 (16:44 +0100)
committerMarek Olšák <maraeo@gmail.com>
Wed, 1 Dec 2010 17:29:50 +0000 (18:29 +0100)
Needed for st/vega.

src/gallium/drivers/r300/r300_tgsi_to_rc.c
src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c
src/mesa/drivers/dri/r300/compiler/radeon_opcodes.h
src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c

index 33448bf0def238225f7c7d44a1e07df6fc70b53b..15a323989b26965f43d6cd23dbfd70370c55d376 100644 (file)
@@ -57,7 +57,7 @@ static unsigned translate_opcode(unsigned opcode)
      /* case TGSI_OPCODE_DP2A: return RC_OPCODE_DP2A; */
                                         /* gap */
         case TGSI_OPCODE_FRC: return RC_OPCODE_FRC;
-     /* case TGSI_OPCODE_CLAMP: return RC_OPCODE_CLAMP; */
+        case TGSI_OPCODE_CLAMP: return RC_OPCODE_CLAMP;
         case TGSI_OPCODE_FLR: return RC_OPCODE_FLR;
      /* case TGSI_OPCODE_ROUND: return RC_OPCODE_ROUND; */
         case TGSI_OPCODE_EX2: return RC_OPCODE_EX2;
index da495a3afaa7d9eb0b666456646e8454f562be9e..113b27632a20db7e8bf432329c56ed33d00ba0e9 100644 (file)
@@ -66,6 +66,13 @@ struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = {
                .HasDstReg = 1,
                .IsComponentwise = 1
        },
+       {
+               .Opcode = RC_OPCODE_CLAMP,
+               .Name = "CLAMP",
+               .NumSrcRegs = 3,
+               .HasDstReg = 1,
+               .IsComponentwise = 1
+       },
        {
                .Opcode = RC_OPCODE_CMP,
                .Name = "CMP",
index d3f639c87012fc0d8268e52c484879db5c5798a5..7e666101276a2ed96269e324f91777281bbcf5f9 100644 (file)
@@ -50,6 +50,9 @@ typedef enum {
        /** vec4 instruction: dst.c = ceil(src0.c) */
        RC_OPCODE_CEIL,
 
+       /** vec4 instruction: dst.c = clamp(src0.c, src1.c, src2.c) */
+       RC_OPCODE_CLAMP,
+
        /** vec4 instruction: dst.c = src0.c < 0.0 ? src1.c : src2.c */
        RC_OPCODE_CMP,
 
index 106e03495d88e63f59539015241448a0e452922e..01c2e74e7b324666204dfccf113e9579e602be51 100644 (file)
@@ -217,6 +217,22 @@ static void transform_CEIL(struct radeon_compiler* c,
        rc_remove_instruction(inst);
 }
 
+static void transform_CLAMP(struct radeon_compiler *c,
+       struct rc_instruction *inst)
+{
+       /* CLAMP dst, src, min, max
+        *    into:
+        * MIN tmp, src, max
+        * MAX dst, tmp, min
+        */
+       int tempreg = rc_find_free_temporary(c);
+       emit2(c, inst->Prev, RC_OPCODE_MIN, 0, dstreg(RC_FILE_TEMPORARY, tempreg),
+               inst->U.I.SrcReg[0], inst->U.I.SrcReg[2]);
+       emit2(c, inst->Prev, RC_OPCODE_MAX, inst->U.I.SaturateMode, inst->U.I.DstReg,
+               srcreg(RC_FILE_TEMPORARY, tempreg), inst->U.I.SrcReg[1]);
+       rc_remove_instruction(inst);
+}
+
 static void transform_DP2(struct radeon_compiler* c,
        struct rc_instruction* inst)
 {
@@ -554,6 +570,7 @@ int radeonTransformALU(
        switch(inst->U.I.Opcode) {
        case RC_OPCODE_ABS: transform_ABS(c, inst); return 1;
        case RC_OPCODE_CEIL: transform_CEIL(c, inst); return 1;
+       case RC_OPCODE_CLAMP: transform_CLAMP(c, inst); return 1;
        case RC_OPCODE_DP2: transform_DP2(c, inst); return 1;
        case RC_OPCODE_DPH: transform_DPH(c, inst); return 1;
        case RC_OPCODE_DST: transform_DST(c, inst); return 1;
@@ -782,6 +799,7 @@ int r300_transform_vertex_alu(
        switch(inst->U.I.Opcode) {
        case RC_OPCODE_ABS: transform_r300_vertex_ABS(c, inst); return 1;
        case RC_OPCODE_CEIL: transform_CEIL(c, inst); return 1;
+       case RC_OPCODE_CLAMP: transform_CLAMP(c, inst); return 1;
        case RC_OPCODE_CMP: transform_r300_vertex_CMP(c, inst); return 1;
        case RC_OPCODE_DP2: transform_r300_vertex_DP2(c, inst); return 1;
        case RC_OPCODE_DP3: transform_r300_vertex_DP3(c, inst); return 1;