[libre-riscv-dev] [Bug 372] create cycle-accurate JIT-compiler-based processor simulator
authorbugzilla-daemon <bugzilla-daemon@libre-soc.org>
Tue, 9 Jun 2020 23:17:05 +0000 (23:17 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Tue, 9 Jun 2020 23:17:06 +0000 (00:17 +0100)
d6/9c1cd520ec5980525940280b45f6ca36d7bc9d [new file with mode: 0644]

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+From: bugzilla-daemon@libre-soc.org
+To: libre-riscv-dev@lists.libre-riscv.org
+Date: Tue, 09 Jun 2020 23:17:05 +0000
+X-Bugzilla-Reason: CC
+X-Bugzilla-Type: changed
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
+X-Bugzilla-Version: unspecified
+X-Bugzilla-Keywords: 
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: programmerjake@gmail.com
+X-Bugzilla-Status: CONFIRMED
+X-Bugzilla-Resolution: 
+X-Bugzilla-Priority: Low
+X-Bugzilla-Assigned-To: programmerjake@gmail.com
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+Message-ID: <bug-372-13-rAIOYewmBF@https.bugs.libre-soc.org/>
+In-Reply-To: <bug-372-13@https.bugs.libre-soc.org/>
+References: <bug-372-13@https.bugs.libre-soc.org/>
+X-Bugzilla-URL: https://bugs.libre-soc.org/
+Auto-Submitted: auto-generated
+MIME-Version: 1.0
+Subject: [libre-riscv-dev] [Bug 372] create cycle-accurate
+ JIT-compiler-based processor simulator
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+
+aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTM3MgoKLS0tIENvbW1l
+bnQgIzMgZnJvbSBKYWNvYiBMaWZzaGF5IDxwcm9ncmFtbWVyamFrZUBnbWFpbC5jb20+IC0tLQoo
+SW4gcmVwbHkgdG8gTHVrZSBLZW5uZXRoIENhc3NvbiBMZWlnaHRvbiBmcm9tIGNvbW1lbnQgIzIp
+Cj4gKEluIHJlcGx5IHRvIEphY29iIExpZnNoYXkgZnJvbSBjb21tZW50ICMwKQo+ID4gVGhpcyBj
+b3VsZCBhbGxvdyBzaW11bGF0aW5nIG91ciBwcm9jZXNzb3IgbW9kZWwgbXVjaCBmYXN0ZXIgdGhh
+biBtb3N0IG90aGVyCj4gPiBtZXRob2RzLgo+IAo+IHBlYXJwYyBhbHJlYWR5IGNvbnRhaW5zIGJv
+dGggYSBKSVQgYW5kIGEgY3ljbGUtYWNjdXJhdGUgbW9kZS4KPiB0aGVyZSBpcyBhbHNvIHBvd2Vy
+LWdlbTUgd2hpY2ggd2FzIHJlY2VudGx5IHVwZGF0ZWQgdG8gYmUgY2FwYWJsZSBvZgo+IHJ1bm5p
+bmcgYSBsaW51eCBrZXJuZWwgKGFuZCB0aGUgNTAwbWIvc2VjIG1lbW9yeSBsZWFrIGZpeGVkKS4K
+PiAKPiBib3RoIG9mIHRoZXNlIGFyZSB3cml0dGVuIGluIGMgLyBjKysgYW5kIGFyZSBleHRyZW1l
+bHkgZmFzdC4KPiAKPiBpcyB0aGVyZSBhIGNvbXBlbGxpbmcgcmVhc29uIHRvLCB1c2luZyBhbiBh
+cHByb3ByaWF0ZSBjb2xsb3F1aWFsaXNtLAo+ICJyZWludmVudCB0aGUgd2hlZWw/IgoKSSBoYXZl
+bid0IGhlYXJkIG9mIGEgc2ltdWxhdG9yIHRoYXQgaXMgY3ljbGUtYWNjdXJhdGUgYW5kIEpJVC1j
+b21waWxlZCBhdCB0aGUKc2FtZSB0aW1lLCBhbGwgdGhlIG9uZXMgSSd2ZSBzZWVuIGJlZm9yZSBh
+cmUgb25lIG9yIHRoZSBvdGhlciAocGVyaGFwcwpkeW5hbWljYWxseSBzd2l0Y2hhYmxlKSBidXQg
+bm90IGJvdGggc2ltdWx0YW5lb3VzbHkuCgpUaGlzIGJ1ZyByZXBvcnQgd2FzIG1vc3RseSBqdXN0
+IHRvIHJlY29yZCBteSBpZGVhIHNpbmNlIGl0IHdvdWxkIGJlIHVzZWZ1bCwKcmF0aGVyIHRoYW4g
+YSBzdHJpY3QgcmVxdWlyZW1lbnQuCgpUaGlzIGNvdWxkIGJlIHVzZWQgdG8gZG8gdGhpbmdzIGxp
+a2UgcnVuIGEgZmV3IHRlbnMgb3IgaHVuZHJlZHMgb2YgYmlsbGlvbnMgb2YKY3ljbGVzIG9uIGEg
+ZnBnYSBhbmQgY2hlY2sgdGhhdCB0aGUgZW50aXJlIHBpcGVsaW5lIHN0YXRlIG1hdGNoZXMgdGhl
+IHNpbXVsYXRvcgpleGFjdGx5IC0tIHVubGVzcyB0aGUgc2ltdWxhdG9yIGlzIHF1aXRlIGZhc3Qs
+IHRoYXQgaXNuJ3QgdmVyeSBwcmFjdGljYWwgc2ltcGx5CmJlY2F1c2UgdGhlIGV4aXN0aW5nIHNp
+bXVsYXRvcnMgYXJlIHRvbyBzbG93IG9yIG5vdCBjeWNsZS1hY2N1cmF0ZS4KClRoaXMgaXMgbGlr
+ZSBhIGJvdW5kZWQtY3ljbGUtY291bnQgZm9ybWFsIHByb29mIChpY3IgdGhlIHJpZ2h0IHRlcm0p
+IGV4Y2VwdAp0aGF0IHdlIGNhbiBydW4gaXQgZm9yIG1pbGxpb25zIG9yIGJpbGxpb25zIG9mIHRp
+bWVzIGFzIG1hbnkgY3ljbGVzLgoKLS0gCllvdSBhcmUgcmVjZWl2aW5nIHRoaXMgbWFpbCBiZWNh
+dXNlOgpZb3UgYXJlIG9uIHRoZSBDQyBsaXN0IGZvciB0aGUgYnVnLgpfX19fX19fX19fX19fX19f
+X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaWJyZS1yaXNjdi1kZXYgbWFpbGluZyBs
+aXN0CmxpYnJlLXJpc2N2LWRldkBsaXN0cy5saWJyZS1yaXNjdi5vcmcKaHR0cDovL2xpc3RzLmxp
+YnJlLXJpc2N2Lm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpYnJlLXJpc2N2LWRldgo=
+