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diff --git a/openpower/sv/biginteger/analysis.mdwn b/openpower/sv/biginteger/analysis.mdwn
index 5ba008fca80b0563623bc0024a33ce8ba41b0f2c..1be393b7cc8acacb4728408f930572df0cab50c6 100644 (file)
--- a/openpower/sv/biginteger/analysis.mdwn
+++ b/openpower/sv/biginteger/analysis.mdwn
@@ -18,7 +18,10 @@ a straightforward big-integer add or subtract.  Vectorised `adde`
 or `addex` is perfectly sufficient to produce arbitrary-length
 big-integer add due to the rules set in SVP64 that all Vector Operations
 are directly equivalent to the strict Program Order Execution of
-their element-level operations.
+their element-level operations.  Assuming that the two bigints (or
+a part thereof) have been loaded into sequentially-contiguous
+registers, with the least-significant bits being in the lowest-numbered
+register in each case:
 
     R0,CA = A0+B0+CA  adde r0,a0,b0
         |
@@ -43,6 +46,12 @@ in back-end hardware that need only read the first incoming XER.CA and
 only store the last XER.CA. The size of the underlying back-end SIMD ALU
 is entirely at the discretion of the implementer.
 
+If there is pressure on the register file (multi-million-digit big integers)
+then a partial-sum may be carried out with LD and ST in a standard
+Cray-style Vector Loop:
+
+   
+
 # Multiply
 
 Long-multiply, assuming an O(N^2) algorithm, is performed by summing