r600g: don't need 3 bos here.
authorDave Airlie <airlied@redhat.com>
Fri, 10 Sep 2010 01:22:41 +0000 (11:22 +1000)
committerDave Airlie <airlied@redhat.com>
Fri, 10 Sep 2010 01:29:23 +0000 (11:29 +1000)
the code should reloc correctly a single BO 3 times.

src/gallium/drivers/r600/r600_hw_states.c
src/gallium/winsys/r600/drm/r600_states.h

index 55723360bf6d5565b663ffd764c20ecc88939e77..4de3eae065fc1c1cb3e3bd3b7f0f0ce8ac3ee7a8 100644 (file)
@@ -120,12 +120,8 @@ static void r600_cb(struct r600_context *rctx, struct radeon_state *rstate,
        rtex = (struct r600_resource_texture*)state->cbufs[cb]->texture;
        rbuffer = &rtex->resource;
        rstate->bo[0] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
-       rstate->bo[1] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
-       rstate->bo[2] = radeon_bo_incref(rscreen->rw, rbuffer->bo);
-       rstate->placement[0] = RADEON_GEM_DOMAIN_GTT;
-       rstate->placement[2] = RADEON_GEM_DOMAIN_GTT;
-       rstate->placement[4] = RADEON_GEM_DOMAIN_GTT;
-       rstate->nbo = 3;
+       rstate->placement[0] = RADEON_GEM_DOMAIN_VRAM;
+       rstate->nbo = 1;
        pitch = (rtex->pitch[level] / rtex->bpt) / 8 - 1;
        slice = (rtex->pitch[level] / rtex->bpt) * state->cbufs[cb]->height / 64 - 1;
 
index 06f6c7773d2dde72e971a1abf899be55becf3779..a0175fb603f080774665f6b6f4752ab121ccbf97 100644 (file)
@@ -404,8 +404,8 @@ static const struct radeon_register R600_names_CB0[] = {
        {0x000280A0, 0, 0, "CB_COLOR0_INFO"},
        {0x00028060, 0, 0, "CB_COLOR0_SIZE"},
        {0x00028080, 0, 0, "CB_COLOR0_VIEW"},
-       {0x000280E0, 1, 1, "CB_COLOR0_FRAG"},
-       {0x000280C0, 1, 2, "CB_COLOR0_TILE"},
+       {0x000280E0, 1, 0, "CB_COLOR0_FRAG"},
+       {0x000280C0, 1, 0, "CB_COLOR0_TILE"},
        {0x00028100, 0, 0, "CB_COLOR0_MASK"},
 };