x86: Remove TheISA from x86 devices.
authorGabe Black <gabeblack@google.com>
Tue, 29 Oct 2019 02:02:24 +0000 (19:02 -0700)
committerGabe Black <gabeblack@google.com>
Wed, 30 Oct 2019 00:23:36 +0000 (00:23 +0000)
This was really only in the PC platform class.

Change-Id: I5365d965ea335a7c45be9f80706a875b19ed0417
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22263
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/x86/pc.cc

index 6746b50264a47b7083ab01267d783e28c68e9c6f..e37c95e57f25399d36ba7251fba74211522f89d7 100644 (file)
@@ -40,7 +40,6 @@
 
 #include "arch/x86/intmessage.hh"
 #include "arch/x86/x86_traits.hh"
-#include "config/the_isa.hh"
 #include "cpu/intr_control.hh"
 #include "dev/x86/i82094aa.hh"
 #include "dev/x86/i8254.hh"
@@ -48,9 +47,6 @@
 #include "dev/x86/south_bridge.hh"
 #include "sim/system.hh"
 
-using namespace std;
-using namespace TheISA;
-
 Pc::Pc(const Params *p)
     : Platform(p), system(p->system)
 {
@@ -65,7 +61,7 @@ Pc::init()
     /*
      * Initialize the timer.
      */
-    I8254 & timer = *southBridge->pit;
+    auto &timer = *southBridge->pit;
     //Timer 0, mode 2, no bcd, 16 bit count
     timer.writeControl(0x34);
     //Timer 0, latch command
@@ -77,13 +73,13 @@ Pc::init()
     /*
      * Initialize the I/O APIC.
      */
-    I82094AA & ioApic = *southBridge->ioApic;
-    I82094AA::RedirTableEntry entry = 0;
-    entry.deliveryMode = DeliveryMode::ExtInt;
+    X86ISA::I82094AA &ioApic = *southBridge->ioApic;
+    X86ISA::I82094AA::RedirTableEntry entry = 0;
+    entry.deliveryMode = X86ISA::DeliveryMode::ExtInt;
     entry.vector = 0x20;
     ioApic.writeReg(0x10, entry.bottomDW);
     ioApic.writeReg(0x11, entry.topDW);
-    entry.deliveryMode = DeliveryMode::Fixed;
+    entry.deliveryMode = X86ISA::DeliveryMode::Fixed;
     entry.vector = 0x24;
     ioApic.writeReg(0x18, entry.bottomDW);
     ioApic.writeReg(0x19, entry.topDW);