return reg;
}
-static struct operand * create_immediate_operand (int value)
+static struct operand *
+create_immediate_operand (int value)
{
struct immediate_operand *op = malloc (sizeof (*op));
return (struct operand *) op;
}
-static struct operand * create_bitfield_operand (int width, int offset)
+static struct operand *
+create_bitfield_operand (int width, int offset)
{
struct bitfield_operand *op = malloc (sizeof (*op));
return create_register_operand_with_size (reg, -1);
}
-static struct operand * create_register_all_operand (void)
+static struct operand *
+create_register_all_operand (void)
{
struct register_operand *op = malloc (sizeof (*op));
return (struct operand *) op;
}
-static struct operand * create_register_all16_operand (void)
+static struct operand *
+create_register_all16_operand (void)
{
struct register_operand *op = malloc (sizeof (*op));
\f
static void
-z_ext24_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand)
+z_ext24_decode (struct mem_read_abstraction_base *mra, int *n_operands,
+ struct operand **operand)
{
uint8_t buffer[3];
int status = mra->read (mra, 0, 3, buffer);
static uint32_t
-z_decode_signed_value (struct mem_read_abstraction_base *mra, int offset, short size)
+z_decode_signed_value (struct mem_read_abstraction_base *mra, int offset,
+ short size)
{
assert (size >0);
assert (size <= 4);
/* An eight bit immediate operand. */
static void
imm1_decode (struct mem_read_abstraction_base *mra,
- int *n_operands, struct operand **operand)
+ int *n_operands, struct operand **operand)
{
x_imm1 (mra, 0, n_operands, operand);
}
else
n = x;
- operand = create_immediate_operand (n);
+ operand = create_immediate_operand (n);
break;
}
case OPR_REG:
{
uint8_t x = (postbyte & 0x07);
- operand = create_register_operand (x);
+ operand = create_register_operand (x);
break;
}
case OPR_OFXYS:
{
- operand = create_memory_operand (false, postbyte & 0x0F, 1,
+ operand = create_memory_operand (false, postbyte & 0x0F, 1,
xysp_reg_from_postbyte (postbyte), -1);
break;
}
case OPR_REG_DIRECT:
{
- operand = create_memory_operand (false, 0, 2, postbyte & 0x07,
+ operand = create_memory_operand (false, 0, 2, postbyte & 0x07,
xysp_reg_from_postbyte (postbyte));
break;
}
case OPR_REG_INDIRECT:
{
- operand = create_memory_operand (true, 0, 2, postbyte & 0x07,
+ operand = create_memory_operand (true, 0, 2, postbyte & 0x07,
(postbyte & 0x10) ? REG_Y : REG_X);
break;
}
idx -= 0x1UL << 8;
}
- operand = create_memory_operand (true, idx, 1,
+ operand = create_memory_operand (true, idx, 1,
xysp_reg_from_postbyte (postbyte), -1);
break;
}
idx -= 0x1UL << 24;
}
- operand = create_memory_operand (false, idx, 1,
+ operand = create_memory_operand (false, idx, 1,
xysp_reg_from_postbyte (postbyte), -1);
break;
}
idx -= 0x1UL << 24;
}
- operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
+ operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
break;
}
idx -= 0x1UL << 8;
}
- operand = create_memory_operand (false, idx, 1,
+ operand = create_memory_operand (false, idx, 1,
xysp_reg_from_postbyte (postbyte), -1);
break;
}
uint32_t idx = x[1] | x[0] << 8 ;
idx |= (postbyte & 0x30) << 12;
- operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
+ operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
break;
}
ext24 |= buffer[i] << (8 * (size - i - 1));
}
- operand = create_memory_operand (true, ext24, 0, -1, -1);
+ operand = create_memory_operand (true, ext24, 0, -1, -1);
break;
}
operand[(*n_operands)++] = create_register_operand (REG_X);
}
-static void ld_18bit_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
+static void
+ld_18bit_decode (struct mem_read_abstraction_base *mra, int *n_operands,
+ struct operand **operand);
static enum optr
mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint)
static void
loop_primitive_decode (struct mem_read_abstraction_base *mra,
- int *n_operands, struct operand **operands)
+ int *n_operands, struct operand **operands)
{
int offs = 1;
uint8_t lb;
static enum optr
-shift_discrim (struct mem_read_abstraction_base *mra, enum optr hint ATTRIBUTE_UNUSED)
+shift_discrim (struct mem_read_abstraction_base *mra,
+ enum optr hint ATTRIBUTE_UNUSED)
{
size_t i;
uint8_t sb;
static void
-shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands)
+shift_decode (struct mem_read_abstraction_base *mra, int *n_operands,
+ struct operand **operands)
{
size_t i;
case SB_REG_REG_N:
{
- uint8_t xb;
- mra->read (mra, 1, 1, &xb);
-
- /* This case is slightly unusual.
- If XB matches the binary pattern 0111XXXX, then instead of
- interpreting this as a general OPR postbyte in the IMMe4 mode,
- the XB byte is interpreted in s special way. */
- if ((xb & 0xF0) == 0x70)
- {
- if (byte & 0x10)
- {
- int shift = ((sb & 0x08) >> 3) | ((xb & 0x0f) << 1);
- operands[(*n_operands)++] = create_immediate_operand (shift);
- }
- else
- {
- /* This should not happen. */
- abort ();
- }
- }
- else
- {
- operands[(*n_operands)++] = x_opr_decode (mra, 1);
- }
+ uint8_t xb;
+ mra->read (mra, 1, 1, &xb);
+
+ /* This case is slightly unusual.
+ If XB matches the binary pattern 0111XXXX, then instead of
+ interpreting this as a general OPR postbyte in the IMMe4 mode,
+ the XB byte is interpreted in s special way. */
+ if ((xb & 0xF0) == 0x70)
+ {
+ if (byte & 0x10)
+ {
+ int shift = ((sb & 0x08) >> 3) | ((xb & 0x0f) << 1);
+ operands[(*n_operands)++] = create_immediate_operand (shift);
+ }
+ else
+ {
+ /* This should not happen. */
+ abort ();
+ }
+ }
+ else
+ {
+ operands[(*n_operands)++] = x_opr_decode (mra, 1);
+ }
}
break;
case SB_REG_OPR_OPR:
case SB_REG_OPR_EFF:
case SB_OPR_N:
{
- int imm = (sb & 0x08) ? 2 : 1;
- operands[(*n_operands)++] = create_immediate_operand (imm);
+ int imm = (sb & 0x08) ? 2 : 1;
+ operands[(*n_operands)++] = create_immediate_operand (imm);
}
break;
if (byte & 0x40)
{
if ((byte & 0x3F) == 0)
- {
- operand[(*n_operands)++] = create_register_all16_operand ();
- }
+ operand[(*n_operands)++] = create_register_all16_operand ();
else
for (bit = 5; bit >= 0; --bit)
{
else
{
if ((byte & 0x3F) == 0)
- {
- operand[(*n_operands)++] = create_register_all_operand ();
- }
+ operand[(*n_operands)++] = create_register_all_operand ();
else
for (bit = 5; bit >= 0; --bit)
{
}
static enum optr
-bit_field_discrim (struct mem_read_abstraction_base *mra, enum optr hint ATTRIBUTE_UNUSED)
+bit_field_discrim (struct mem_read_abstraction_base *mra,
+ enum optr hint ATTRIBUTE_UNUSED)
{
int status;
bfd_byte bb;
{
bbs = bb_modes + i;
if ((bb & bbs->mask) == bbs->value)
- {
- mode = bbs->mode;
- break;
- }
+ {
+ mode = bbs->mode;
+ break;
+ }
}
int reg1 = byte2 & 0x07;
/* First operand */
case BB_REG_REG_REG:
case BB_REG_REG_IMM:
{
- int reg_src = (bb >> 2) & 0x07;
- operands[(*n_operands)++] = create_register_operand (reg_src);
+ int reg_src = (bb >> 2) & 0x07;
+ operands[(*n_operands)++] = create_register_operand (reg_src);
}
break;
case BB_OPR_REG_REG:
case BB_OPR_REG_IMM:
{
- int reg_src = (byte2 & 0x07);
- operands[(*n_operands)++] = create_register_operand (reg_src);
+ int reg_src = (byte2 & 0x07);
+ operands[(*n_operands)++] = create_register_operand (reg_src);
}
break;
case BB_REG_OPR_REG:
case BB_OPR_REG_REG:
case BB_REG_OPR_REG:
{
- int reg_parm = bb & 0x03;
+ int reg_parm = bb & 0x03;
operands[(*n_operands)++] = create_register_operand (reg_parm);
}
break;
case BB_OPR_REG_IMM:
case BB_REG_OPR_IMM:
{
- bfd_byte i1;
- mra->read (mra, 1, 1, &i1);
- int offset = i1 & 0x1f;
- int width = bb & 0x03;
- width <<= 3;
- width |= i1 >> 5;
- operands[(*n_operands)++] = create_bitfield_operand (width, offset);
+ bfd_byte i1;
+ mra->read (mra, 1, 1, &i1);
+ int offset = i1 & 0x1f;
+ int width = bb & 0x03;
+ width <<= 3;
+ width |= i1 >> 5;
+ operands[(*n_operands)++] = create_bitfield_operand (width, offset);
}
break;
}