+2013-09-06 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * config/aarch64/arm_neon.h
+ (vqtbl<1,2,3,4><q>_s8): Fix control vector parameter type.
+ (vqtbx<1,2,3,4><q>_s8): Likewise.
+
2013-09-06 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/types.md: Add "no_insn", "multiple" and "untyped"
}
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vqtbl1_s8 (int8x16_t a, int8x8_t b)
+vqtbl1_s8 (int8x16_t a, uint8x8_t b)
{
int8x8_t result;
__asm__ ("tbl %0.8b, {%1.16b}, %2.8b"
}
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vqtbl1q_s8 (int8x16_t a, int8x16_t b)
+vqtbl1q_s8 (int8x16_t a, uint8x16_t b)
{
int8x16_t result;
__asm__ ("tbl %0.16b, {%1.16b}, %2.16b"
}
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vqtbl2_s8 (int8x16x2_t tab, int8x8_t idx)
+vqtbl2_s8 (int8x16x2_t tab, uint8x8_t idx)
{
int8x8_t result;
__asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t"
}
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vqtbl2q_s8 (int8x16x2_t tab, int8x16_t idx)
+vqtbl2q_s8 (int8x16x2_t tab, uint8x16_t idx)
{
int8x16_t result;
__asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t"
}
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vqtbl3_s8 (int8x16x3_t tab, int8x8_t idx)
+vqtbl3_s8 (int8x16x3_t tab, uint8x8_t idx)
{
int8x8_t result;
__asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t"
}
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vqtbl3q_s8 (int8x16x3_t tab, int8x16_t idx)
+vqtbl3q_s8 (int8x16x3_t tab, uint8x16_t idx)
{
int8x16_t result;
__asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t"
}
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vqtbl4_s8 (int8x16x4_t tab, int8x8_t idx)
+vqtbl4_s8 (int8x16x4_t tab, uint8x8_t idx)
{
int8x8_t result;
__asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t"
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vqtbl4q_s8 (int8x16x4_t tab, int8x16_t idx)
+vqtbl4q_s8 (int8x16x4_t tab, uint8x16_t idx)
{
int8x16_t result;
__asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t"
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vqtbx1_s8 (int8x8_t r, int8x16_t tab, int8x8_t idx)
+vqtbx1_s8 (int8x8_t r, int8x16_t tab, uint8x8_t idx)
{
int8x8_t result = r;
__asm__ ("tbx %0.8b,{%1.16b},%2.8b"
}
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vqtbx1q_s8 (int8x16_t r, int8x16_t tab, int8x16_t idx)
+vqtbx1q_s8 (int8x16_t r, int8x16_t tab, uint8x16_t idx)
{
int8x16_t result = r;
__asm__ ("tbx %0.16b,{%1.16b},%2.16b"
}
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vqtbx2_s8 (int8x8_t r, int8x16x2_t tab, int8x8_t idx)
+vqtbx2_s8 (int8x8_t r, int8x16x2_t tab, uint8x8_t idx)
{
int8x8_t result = r;
__asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t"
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vqtbx2q_s8 (int8x16_t r, int8x16x2_t tab, int8x16_t idx)
+vqtbx2q_s8 (int8x16_t r, int8x16x2_t tab, uint8x16_t idx)
{
int8x16_t result = r;
__asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t"
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vqtbx3_s8 (int8x8_t r, int8x16x3_t tab, int8x8_t idx)
+vqtbx3_s8 (int8x8_t r, int8x16x3_t tab, uint8x8_t idx)
{
int8x8_t result = r;
__asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t"
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vqtbx3q_s8 (int8x16_t r, int8x16x3_t tab, int8x16_t idx)
+vqtbx3q_s8 (int8x16_t r, int8x16x3_t tab, uint8x16_t idx)
{
int8x16_t result = r;
__asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t"
__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vqtbx4_s8 (int8x8_t r, int8x16x4_t tab, int8x8_t idx)
+vqtbx4_s8 (int8x8_t r, int8x16x4_t tab, uint8x8_t idx)
{
int8x8_t result = r;
__asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t"
__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vqtbx4q_s8 (int8x16_t r, int8x16x4_t tab, int8x16_t idx)
+vqtbx4q_s8 (int8x16_t r, int8x16x4_t tab, uint8x16_t idx)
{
int8x16_t result = r;
__asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t"
+2013-09-06 James Greenhalgh <james.greenhalgh@arm.com>
+
+ * gcc.target/aarch64/table-intrinsics.c
+ (qtbl_tests8_< ,2,3,4>): Fix control vector parameter type.
+ (qtb_tests8_< ,2,3,4>): Likewise.
+ (qtblq_tests8_< ,2,3,4>): Likewise.
+ (qtbxq_tests8_< ,2,3,4>): Likewise.
+
2013-09-06 Eric Botcazou <ebotcazou@adacore.com>
* gnat.dg/warn10.ad[sb]: New test.
}
int8x8_t
-qtbl_tests8_ (int8x16_t tab, int8x8_t idx)
+qtbl_tests8_ (int8x16_t tab, uint8x8_t idx)
{
return vqtbl1_s8 (tab, idx);
}
}
int8x8_t
-qtbl_tests8_2 (int8x16x2_t tab, int8x8_t idx)
+qtbl_tests8_2 (int8x16x2_t tab, uint8x8_t idx)
{
return vqtbl2_s8 (tab, idx);
}
}
int8x8_t
-qtbl_tests8_3 (int8x16x3_t tab, int8x8_t idx)
+qtbl_tests8_3 (int8x16x3_t tab, uint8x8_t idx)
{
return vqtbl3_s8 (tab, idx);
}
}
int8x8_t
-qtbl_tests8_4 (int8x16x4_t tab, int8x8_t idx)
+qtbl_tests8_4 (int8x16x4_t tab, uint8x8_t idx)
{
return vqtbl4_s8 (tab, idx);
}
}
int8x8_t
-qtb_tests8_ (int8x8_t r, int8x16_t tab, int8x8_t idx)
+qtb_tests8_ (int8x8_t r, int8x16_t tab, uint8x8_t idx)
{
return vqtbx1_s8 (r, tab, idx);
}
}
int8x8_t
-qtb_tests8_2 (int8x8_t r, int8x16x2_t tab, int8x8_t idx)
+qtb_tests8_2 (int8x8_t r, int8x16x2_t tab, uint8x8_t idx)
{
return vqtbx2_s8 (r, tab, idx);
}
}
int8x8_t
-qtb_tests8_3 (int8x8_t r, int8x16x3_t tab, int8x8_t idx)
+qtb_tests8_3 (int8x8_t r, int8x16x3_t tab, uint8x8_t idx)
{
return vqtbx3_s8 (r, tab, idx);
}
}
int8x8_t
-qtb_tests8_4 (int8x8_t r, int8x16x4_t tab, int8x8_t idx)
+qtb_tests8_4 (int8x8_t r, int8x16x4_t tab, uint8x8_t idx)
{
return vqtbx4_s8 (r, tab, idx);
}
}
int8x16_t
-qtblq_tests8_ (int8x16_t tab, int8x16_t idx)
+qtblq_tests8_ (int8x16_t tab, uint8x16_t idx)
{
return vqtbl1q_s8 (tab, idx);
}
}
int8x16_t
-qtblq_tests8_2 (int8x16x2_t tab, int8x16_t idx)
+qtblq_tests8_2 (int8x16x2_t tab, uint8x16_t idx)
{
return vqtbl2q_s8 (tab, idx);
}
}
int8x16_t
-qtblq_tests8_3 (int8x16x3_t tab, int8x16_t idx)
+qtblq_tests8_3 (int8x16x3_t tab, uint8x16_t idx)
{
return vqtbl3q_s8 (tab, idx);
}
}
int8x16_t
-qtblq_tests8_4 (int8x16x4_t tab, int8x16_t idx)
+qtblq_tests8_4 (int8x16x4_t tab, uint8x16_t idx)
{
return vqtbl4q_s8 (tab, idx);
}
}
int8x16_t
-qtbxq_tests8_ (int8x16_t r, int8x16_t tab, int8x16_t idx)
+qtbxq_tests8_ (int8x16_t r, int8x16_t tab, uint8x16_t idx)
{
return vqtbx1q_s8 (r, tab, idx);
}
}
int8x16_t
-qtbxq_tests8_2 (int8x16_t r, int8x16x2_t tab, int8x16_t idx)
+qtbxq_tests8_2 (int8x16_t r, int8x16x2_t tab, uint8x16_t idx)
{
return vqtbx2q_s8 (r, tab, idx);
}
}
int8x16_t
-qtbxq_tests8_3 (int8x16_t r, int8x16x3_t tab, int8x16_t idx)
+qtbxq_tests8_3 (int8x16_t r, int8x16x3_t tab, uint8x16_t idx)
{
return vqtbx3q_s8 (r, tab, idx);
}
}
int8x16_t
-qtbxq_tests8_4 (int8x16_t r, int8x16x4_t tab, int8x16_t idx)
+qtbxq_tests8_4 (int8x16_t r, int8x16x4_t tab, uint8x16_t idx)
{
return vqtbx4q_s8 (r, tab, idx);
}