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diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn
index ba359a93c321b15a6634bec32308643aa44d13c0..67c83f629a883782fbc91acb94b5a7b2595e1b08 100644 (file)
--- a/openpower/sv/rfc/ls002.mdwn
+++ b/openpower/sv/rfc/ls002.mdwn
@@ -164,17 +164,16 @@ Special registers altered:
     None
 
 An additional 16-bits of immediate is
-inserted into `FRT` to extend its accuracy to
-a full FP32, which is then stored in the usual FP64 Format within the FPR.
+inserted into the low-order half of the single-format value
+corresponding to the contents of FRT.
+
+**This instruction performs a Read-Modify-Write on FRT.**
+In hardware, `fishmv` may be macro-op-fused with `fmvis`.
 
-**This instruction performs a Read-Modify-Write.** *FRT is read, the
-additional
-16 bit immediate inserted, and the result also written to FRT.
-This is strategically similar to how `li` combined with `oris` is
-used to construct 32-bit Integers.
-`fishmv` may be macro-op-fused with `fmvis`*
 
 Programmer's note:
+The use of these two instructions is strategically similar to
+how `li` combined with `oris` may be used to construct 32-bit Integers.
 If a prior `fmvis` instruction had been used to
 set the upper 16-bits from an FP32 value, `fishmv` may be used
 to set the