More instruction tests.

diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog
index b113ba77f2f2558a76f3b2964bc012efcdee2e8e..d63b1d5b3e0e454490c6ade83c57d89eb50a60c9 100644 (file)
--- a/sim/testsuite/ChangeLog
+++ b/sim/testsuite/ChangeLog
@@ -1,5 +1,8 @@
 Thu Feb 19 11:15:45 1998  Nick Clifton  <nickc@cygnus.com>
 
+       * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
+       address into a general register.
+
        * sim/m32r/or3.cgs: Test OR3 instruction.
        * sim/m32r/rach.cgs: Test RACH instruction.
        * sim/m32r/rem.cgs: Test REM instruction.

diff --git a/sim/testsuite/sim/m32r/mvfc.cgs b/sim/testsuite/sim/m32r/mvfc.cgs
new file mode 100644 (file)
index 0000000..0c160d9
--- /dev/null
+++ b/sim/testsuite/sim/m32r/mvfc.cgs
@@ -0,0 +1,17 @@
+# m32r testcase for mvfc $dr,$scr
+# mach(): m32r m32rx
+
+       .include "testutils.inc"
+
+       start
+
+       .global mvfc
+mvfc:
+       mvi_h_condbit   0
+       mvi_h_gr r4, 2
+
+       mvfc r4, cr1
+
+       test_h_gr r4, 0x80000000
+
+       pass

diff --git a/sim/testsuite/sim/m32r/remu.cgs b/sim/testsuite/sim/m32r/remu.cgs
new file mode 100644 (file)
index 0000000..9098ca6
--- /dev/null
+++ b/sim/testsuite/sim/m32r/remu.cgs
@@ -0,0 +1,18 @@
+# m32r testcase for remu $dr,$sr
+# mach(): m32r m32rx
+
+       .include "testutils.inc"
+
+       start
+
+       .global remu
+remu:
+       mvi_h_gr r4, -17
+       mvi_h_gr r5, 7
+
+       remu r4, r5
+
+       test_h_gr r4, 4
+;      test_h_gr r4, -3
+
+       pass

diff --git a/sim/testsuite/sim/m32r/rte.cgs b/sim/testsuite/sim/m32r/rte.cgs
new file mode 100644 (file)
index 0000000..c431e07
--- /dev/null
+++ b/sim/testsuite/sim/m32r/rte.cgs
@@ -0,0 +1,22 @@
+# m32r testcase for rte
+# mach(): m32r m32rx
+
+       .include "testutils.inc"
+
+       start
+
+       .global rte
+rte:
+       mvi_h_gr r4, 0x80030000 ; C set, interrupt disabled, using interrupt stack
+       mvtc r4, cr0
+
+       mvaddr_h_gr r4, ok
+       mvtc r4, cr6
+
+;      rte
+       fail
+ok:
+       mvfc r4, cr0
+       test_h_gr r4, 0x03030000 ; C clear, interrupts enabled, user stack
+
+       pass