[2/3][AArch64] Keep CTZ components together until after reload

	PR middle-end/37780
	* config/aarch64/aarch64.md (ctz<mode>2): Convert to
	define_insn_and_split.

From-SVN: r237139

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7d8e76b3cd8f5635ace7556bcda3dd22115a3ba3..8a1a2a6d52fb13a4761e9da53320b4e57b057c06 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR middle-end/37780
+       * config/aarch64/aarch64.md (ctz<mode>2): Convert to
+       define_insn_and_split.
+
 2016-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        PR middle-end/37780

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index f04f7daed276ad53619623405c384ffe300fc8c1..dbc52c3286faf955aea8472803c90ad778d52ed8 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3784,16 +3784,23 @@
   [(set_attr "type" "rbit")]
 )
 
-(define_expand "ctz<mode>2"
-  [(match_operand:GPI 0 "register_operand")
-   (match_operand:GPI 1 "register_operand")]
+;; Split after reload into RBIT + CLZ.  Since RBIT is represented as an UNSPEC
+;; it is unlikely to fold with any other operation, so keep this as a CTZ
+;; expression and split after reload to enable scheduling them apart if
+;; needed.
+
+(define_insn_and_split "ctz<mode>2"
+ [(set (match_operand:GPI           0 "register_operand" "=r")
+       (ctz:GPI (match_operand:GPI  1 "register_operand" "r")))]
   ""
-  {
-    emit_insn (gen_rbit<mode>2 (operands[0], operands[1]));
-    emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
-    DONE;
-  }
-)
+  "#"
+  "reload_completed"
+  [(const_int 0)]
+  "
+  emit_insn (gen_rbit<mode>2 (operands[0], operands[1]));
+  emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
+  DONE;
+")
 
 (define_insn "*and<mode>_compare0"
   [(set (reg:CC_NZ CC_REGNUM)