i965: brwInitVtbl needs to know the chipset generation

Fixes major regressions since de958de.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 418c8737145d5fee9db0de94b5e5b53ab442e536..e94df2658cea46e22e928db64a4b73dd7e48c98b 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -140,6 +140,11 @@ brwCreateContext(int api,
       return false;
    }
 
+   /* brwInitVtbl needs to know the chipset generation so that it can set the
+    * right pointers.
+    */
+   brw->intel.gen = screen->gen;
+
    brwInitVtbl( brw );
 
    brwInitDriverFunctions(screen, &functions);

diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index 9951e7da2cc16126a8d4b0cd3ebc47b9b85de5da..ca2e7a9a5baa8b48584de6c0914cede95bf793ef 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -249,6 +249,7 @@ void brwInitVtbl( struct brw_context *brw )
    brw->intel.vtbl.render_target_supported = brw_render_target_supported;
    brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
 
+   assert(brw->intel.gen >= 4);
    if (brw->intel.gen >= 7) {
       gen7_init_vtable_surface_functions(brw);
    } else if (brw->intel.gen >= 4) {